cmi.c revision 75174
172016Scg/* 272016Scg * Copyright (c) 2000 Orion Hodson <O.Hodson@cs.ucl.ac.uk> 372016Scg * All rights reserved. 472016Scg * 572016Scg * Redistribution and use in source and binary forms, with or without 672016Scg * modification, are permitted provided that the following conditions 772016Scg * are met: 872016Scg * 1. Redistributions of source code must retain the above copyright 972016Scg * notice, this list of conditions and the following disclaimer. 1072016Scg * 2. Redistributions in binary form must reproduce the above copyright 1172016Scg * notice, this list of conditions and the following disclaimer in the 1272016Scg * documentation and/or other materials provided with the distribution. 1372016Scg * 1472016Scg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1572016Scg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1672016Scg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1772016Scg * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1872016Scg * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1972016Scg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2072016Scg * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2172016Scg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 2272016Scg * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2372016Scg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 2472016Scg * SUCH DAMAGE. 2572016Scg * 2672016Scg * This driver exists largely as a result of other people's efforts. 2772016Scg * Much of register handling is based on NetBSD CMI8x38 audio driver 2872016Scg * by Takuya Shiozaki <AoiMoe@imou.to>. Chen-Li Tien 2972016Scg * <cltien@cmedia.com.tw> clarified points regarding the DMA related 3072016Scg * registers and the 8738 mixer devices. His Linux was driver a also 3172016Scg * useful reference point. 3273772Scg * 3374994Sorion * TODO: MIDI 3472016Scg * 3572016Scg * SPDIF contributed by Gerhard Gonter <gonter@whisky.wu-wien.ac.at>. 3672016Scg * 3774994Sorion * This card/code does not always manage to sample at 44100 - actual 3874994Sorion * rate drifts slightly between recordings (usually 0-3%). No 3974994Sorion * differences visible in register dumps between times that work and 4074994Sorion * those that don't. 4174994Sorion * 4272016Scg * $FreeBSD: head/sys/dev/sound/pci/cmi.c 75174 2001-04-04 13:48:33Z orion $ 4372016Scg */ 4472016Scg 4572016Scg#include <dev/sound/pcm/sound.h> 4672016Scg#include <dev/sound/pci/cmireg.h> 4772016Scg#include <dev/sound/isa/sb.h> 4872016Scg 4972016Scg#include <pci/pcireg.h> 5072016Scg#include <pci/pcivar.h> 5172016Scg 5274994Sorion#include <sys/sysctl.h> 5374994Sorion 5472016Scg#include "mixer_if.h" 5572016Scg 5672016Scg/* Supported chip ID's */ 5772016Scg#define CMI8338A_PCI_ID 0x010013f6 5872016Scg#define CMI8338B_PCI_ID 0x010113f6 5972016Scg#define CMI8738_PCI_ID 0x011113f6 6072016Scg#define CMI8738B_PCI_ID 0x011213f6 6172016Scg 6272016Scg/* Buffer size max is 64k for permitted DMA boundaries */ 6372016Scg#define CMI_BUFFER_SIZE 16384 6472016Scg 6572016Scg/* Interrupts per length of buffer */ 6672016Scg#define CMI_INTR_PER_BUFFER 2 6772016Scg 6872016Scg/* Clarify meaning of named defines in cmireg.h */ 6972016Scg#define CMPCI_REG_DMA0_MAX_SAMPLES CMPCI_REG_DMA0_BYTES 7072016Scg#define CMPCI_REG_DMA0_INTR_SAMPLES CMPCI_REG_DMA0_SAMPLES 7172016Scg#define CMPCI_REG_DMA1_MAX_SAMPLES CMPCI_REG_DMA1_BYTES 7272016Scg#define CMPCI_REG_DMA1_INTR_SAMPLES CMPCI_REG_DMA1_SAMPLES 7372016Scg 7472016Scg/* Our indication of custom mixer control */ 7572016Scg#define CMPCI_NON_SB16_CONTROL 0xff 7672016Scg 7772016Scg/* Debugging macro's */ 7874994Sorion#undef DEB 7972016Scg#ifndef DEB 8072016Scg#define DEB(x) /* x */ 8172016Scg#endif /* DEB */ 8272016Scg 8372016Scg#ifndef DEBMIX 8472016Scg#define DEBMIX(x) /* x */ 8572016Scg#endif /* DEBMIX */ 8672016Scg 8772016Scg/* ------------------------------------------------------------------------- */ 8872016Scg/* Structures */ 8972016Scg 9074994Sorionstruct sc_info; 9172016Scg 9274994Sorionstruct sc_chinfo { 9374994Sorion struct sc_info *parent; 9474994Sorion struct pcm_channel *channel; 9574994Sorion struct snd_dbuf *buffer; 9674994Sorion u_int32_t fmt, spd, phys_buf, bps; 9774994Sorion u_int32_t dma_active:1, dma_was_active:1; 9874994Sorion int dir; 9972016Scg}; 10072016Scg 10174994Sorionstruct sc_info { 10274994Sorion device_t dev; 10373772Scg 10474994Sorion bus_space_tag_t st; 10574994Sorion bus_space_handle_t sh; 10674994Sorion bus_dma_tag_t parent_dmat; 10775174Sorion struct resource *reg, *irq; 10874994Sorion int regid, irqid; 10974994Sorion void *ih; 11072016Scg 11174994Sorion struct sc_chinfo pch, rch; 11272016Scg}; 11372016Scg 11472016Scg/* Channel caps */ 11572016Scg 11672016Scgstatic u_int32_t cmi_fmt[] = { 11772016Scg AFMT_U8, 11872016Scg AFMT_STEREO | AFMT_U8, 11972016Scg AFMT_S16_LE, 12072016Scg AFMT_STEREO | AFMT_S16_LE, 12172016Scg 0 12272016Scg}; 12372016Scg 12474763Scgstatic struct pcmchan_caps cmi_caps = {5512, 48000, cmi_fmt, 0}; 12572016Scg 12672016Scg/* ------------------------------------------------------------------------- */ 12772016Scg/* Register Utilities */ 12872016Scg 12972016Scgstatic u_int32_t 13074994Sorioncmi_rd(struct sc_info *sc, int regno, int size) 13172016Scg{ 13272016Scg switch (size) { 13372016Scg case 1: 13474994Sorion return bus_space_read_1(sc->st, sc->sh, regno); 13572016Scg case 2: 13674994Sorion return bus_space_read_2(sc->st, sc->sh, regno); 13772016Scg case 4: 13874994Sorion return bus_space_read_4(sc->st, sc->sh, regno); 13972016Scg default: 14072016Scg DEB(printf("cmi_rd: failed 0x%04x %d\n", regno, size)); 14172016Scg return 0xFFFFFFFF; 14272016Scg } 14372016Scg} 14472016Scg 14572016Scgstatic void 14674994Sorioncmi_wr(struct sc_info *sc, int regno, u_int32_t data, int size) 14772016Scg{ 14872016Scg switch (size) { 14972016Scg case 1: 15074994Sorion bus_space_write_1(sc->st, sc->sh, regno, data); 15172016Scg break; 15272016Scg case 2: 15374994Sorion bus_space_write_2(sc->st, sc->sh, regno, data); 15472016Scg break; 15572016Scg case 4: 15674994Sorion bus_space_write_4(sc->st, sc->sh, regno, data); 15772016Scg break; 15872016Scg } 15972016Scg} 16072016Scg 16172016Scgstatic void 16274994Sorioncmi_partial_wr4(struct sc_info *sc, 16372016Scg int reg, int shift, u_int32_t mask, u_int32_t val) 16472016Scg{ 16572016Scg u_int32_t r; 16672016Scg 16774994Sorion r = cmi_rd(sc, reg, 4); 16872016Scg r &= ~(mask << shift); 16972016Scg r |= val << shift; 17074994Sorion cmi_wr(sc, reg, r, 4); 17172016Scg} 17272016Scg 17372016Scgstatic void 17474994Sorioncmi_clr4(struct sc_info *sc, int reg, u_int32_t mask) 17572016Scg{ 17672016Scg u_int32_t r; 17773772Scg 17874994Sorion r = cmi_rd(sc, reg, 4); 17972016Scg r &= ~mask; 18074994Sorion cmi_wr(sc, reg, r, 4); 18172016Scg} 18272016Scg 18372016Scgstatic void 18474994Sorioncmi_set4(struct sc_info *sc, int reg, u_int32_t mask) 18572016Scg{ 18672016Scg u_int32_t r; 18772016Scg 18874994Sorion r = cmi_rd(sc, reg, 4); 18972016Scg r |= mask; 19074994Sorion cmi_wr(sc, reg, r, 4); 19172016Scg} 19272016Scg 19372016Scg/* ------------------------------------------------------------------------- */ 19472016Scg/* Rate Mapping */ 19572016Scg 19673772Scgstatic int cmi_rates[] = {5512, 8000, 11025, 16000, 19772016Scg 22050, 32000, 44100, 48000}; 19872016Scg#define NUM_CMI_RATES (sizeof(cmi_rates)/sizeof(cmi_rates[0])) 19972016Scg 20072016Scg/* cmpci_rate_to_regvalue returns sampling freq selector for FCR1 20172016Scg * register - reg order is 5k,11k,22k,44k,8k,16k,32k,48k */ 20272016Scg 20373772Scgstatic u_int32_t 20472016Scgcmpci_rate_to_regvalue(int rate) 20572016Scg{ 20672016Scg int i, r; 20773772Scg 20872016Scg for(i = 0; i < NUM_CMI_RATES - 1; i++) { 20972016Scg if (rate < ((cmi_rates[i] + cmi_rates[i + 1]) / 2)) { 21072016Scg break; 21172016Scg } 21272016Scg } 21372016Scg 21472016Scg DEB(printf("cmpci_rate_to_regvalue: %d -> %d\n", rate, cmi_rates[i])); 21572016Scg 21672016Scg r = ((i >> 1) | (i << 2)) & 0x07; 21772016Scg return r; 21872016Scg} 21972016Scg 22073772Scgstatic int 22173772Scgcmpci_regvalue_to_rate(u_int32_t r) 22272016Scg{ 22372016Scg int i; 22472016Scg 22572016Scg i = ((r << 1) | (r >> 2)) & 0x07; 22672016Scg DEB(printf("cmpci_regvalue_to_rate: %d -> %d\n", r, i)); 22772016Scg return cmi_rates[i]; 22872016Scg} 22972016Scg 23072016Scg/* ------------------------------------------------------------------------- */ 23174994Sorion/* ADC/DAC control - there are 2 dma channels on 8738, either can be 23274994Sorion * playback or capture. We use ch0 for playback and ch1 for capture. */ 23372016Scg 23472016Scgstatic void 23575174Sorioncmi_dma_prog(struct sc_info *sc, struct sc_chinfo *ch, u_int32_t base) 23672016Scg{ 23775174Sorion u_int32_t s, i, sz, physbuf; 23874994Sorion 23975174Sorion physbuf = vtophys(sndbuf_getbuf(ch->buffer)); 24074994Sorion 24175174Sorion cmi_wr(sc, base, physbuf, 4); 24274994Sorion sz = (u_int32_t)sndbuf_getsize(ch->buffer); 24374994Sorion 24474994Sorion s = sz / ch->bps - 1; 24575174Sorion cmi_wr(sc, base + 4, s, 2); 24674994Sorion 24774994Sorion i = sz / (ch->bps * CMI_INTR_PER_BUFFER) - 1; 24875174Sorion cmi_wr(sc, base + 6, i, 2); 24975174Sorion} 25074994Sorion 25175174Sorion 25275174Sorionstatic void 25375174Sorioncmi_ch0_start(struct sc_info *sc, struct sc_chinfo *ch) 25475174Sorion{ 25575174Sorion cmi_dma_prog(sc, ch, CMPCI_REG_DMA0_BASE); 25675174Sorion 25775174Sorion cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 25875174Sorion cmi_set4(sc, CMPCI_REG_INTR_CTRL, 25975174Sorion CMPCI_REG_CH0_INTR_ENABLE); 26075174Sorion 26174994Sorion ch->dma_active = 1; 26272016Scg} 26372016Scg 26474994Sorionstatic u_int32_t 26574994Sorioncmi_ch0_stop(struct sc_info *sc, struct sc_chinfo *ch) 26672016Scg{ 26774994Sorion u_int32_t r = ch->dma_active; 26872016Scg 26975174Sorion cmi_clr4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 27075174Sorion cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); 27174994Sorion ch->dma_active = 0; 27274994Sorion return r; 27372016Scg} 27472016Scg 27572016Scgstatic void 27674994Sorioncmi_ch1_start(struct sc_info *sc, struct sc_chinfo *ch) 27772016Scg{ 27875174Sorion cmi_dma_prog(sc, ch, CMPCI_REG_DMA1_BASE); 27975174Sorion cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 28075174Sorion /* Enable Interrupts */ 28175174Sorion cmi_set4(sc, CMPCI_REG_INTR_CTRL, 28275174Sorion CMPCI_REG_CH1_INTR_ENABLE); 28374994Sorion DEB(printf("cmi_ch1_start: dma prog\n")); 28474994Sorion ch->dma_active = 1; 28572016Scg} 28672016Scg 28774994Sorionstatic u_int32_t 28874994Sorioncmi_ch1_stop(struct sc_info *sc, struct sc_chinfo *ch) 28972016Scg{ 29074994Sorion u_int32_t r = ch->dma_active; 29172016Scg 29275174Sorion cmi_clr4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 29375174Sorion cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); 29474994Sorion ch->dma_active = 0; 29574994Sorion return r; 29672016Scg} 29772016Scg 29872016Scgstatic void 29974994Sorioncmi_spdif_speed(struct sc_info *sc, int speed) { 30072016Scg u_int32_t fcr1, lcr, mcr; 30172016Scg 30272016Scg if (speed >= 44100) { 30372016Scg fcr1 = CMPCI_REG_SPDIF0_ENABLE; 30472016Scg lcr = CMPCI_REG_XSPDIF_ENABLE; 30573772Scg mcr = (speed == 48000) ? 30672016Scg CMPCI_REG_W_SPDIF_48L | CMPCI_REG_SPDIF_48K : 0; 30772016Scg } else { 30872016Scg fcr1 = mcr = lcr = 0; 30972016Scg } 31072016Scg 31174994Sorion cmi_partial_wr4(sc, CMPCI_REG_MISC, 0, 31272016Scg CMPCI_REG_W_SPDIF_48L | CMPCI_REG_SPDIF_48K, mcr); 31374994Sorion cmi_partial_wr4(sc, CMPCI_REG_FUNC_1, 0, 31474994Sorion CMPCI_REG_SPDIF0_ENABLE, fcr1); 31574994Sorion cmi_partial_wr4(sc, CMPCI_REG_LEGACY_CTRL, 0, 31672016Scg CMPCI_REG_XSPDIF_ENABLE, lcr); 31772016Scg} 31872016Scg 31972016Scg/* ------------------------------------------------------------------------- */ 32072016Scg/* Channel Interface implementation */ 32172016Scg 32272016Scgstatic void * 32374994Sorioncmichan_init(kobj_t obj, void *devinfo, 32474994Sorion struct snd_dbuf *b, struct pcm_channel *c, int dir) 32572016Scg{ 32674994Sorion struct sc_info *sc = devinfo; 32774994Sorion struct sc_chinfo *ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; 32872016Scg 32974994Sorion ch->parent = sc; 33074994Sorion ch->channel = c; 33174994Sorion ch->bps = 1; 33274994Sorion ch->fmt = AFMT_U8; 33374994Sorion ch->spd = DSP_DEFAULT_SPEED; 33474994Sorion ch->buffer = b; 33574994Sorion ch->dma_active = 0; 33674994Sorion if (sndbuf_alloc(ch->buffer, sc->parent_dmat, CMI_BUFFER_SIZE) != 0) { 33772016Scg DEB(printf("cmichan_init failed\n")); 33872016Scg return NULL; 33972016Scg } 34072016Scg 34172016Scg ch->dir = dir; 34275174Sorion if (ch->dir == PCMDIR_PLAY) { 34375174Sorion cmi_dma_prog(sc, ch, CMPCI_REG_DMA0_BASE); 34472016Scg } else { 34575174Sorion cmi_dma_prog(sc, ch, CMPCI_REG_DMA1_BASE); 34672016Scg } 34772016Scg 34872016Scg return ch; 34972016Scg} 35072016Scg 35173772Scgstatic int 35273772Scgcmichan_setformat(kobj_t obj, void *data, u_int32_t format) 35372016Scg{ 35474994Sorion struct sc_chinfo *ch = data; 35572016Scg u_int32_t f; 35672016Scg 35772016Scg if (format & AFMT_S16_LE) { 35872016Scg f = CMPCI_REG_FORMAT_16BIT; 35972016Scg ch->bps = 2; 36072016Scg } else { 36172016Scg f = CMPCI_REG_FORMAT_8BIT; 36272016Scg ch->bps = 1; 36372016Scg } 36472016Scg 36572016Scg if (format & AFMT_STEREO) { 36672016Scg f |= CMPCI_REG_FORMAT_STEREO; 36772016Scg ch->bps *= 2; 36872016Scg } else { 36972016Scg f |= CMPCI_REG_FORMAT_MONO; 37072016Scg } 37172016Scg 37272016Scg if (ch->dir == PCMDIR_PLAY) { 37372016Scg cmi_partial_wr4(ch->parent, 37472016Scg CMPCI_REG_CHANNEL_FORMAT, 37572016Scg CMPCI_REG_CH0_FORMAT_SHIFT, 37672016Scg CMPCI_REG_CH0_FORMAT_MASK, 37772016Scg f); 37872016Scg } else { 37972016Scg cmi_partial_wr4(ch->parent, 38072016Scg CMPCI_REG_CHANNEL_FORMAT, 38172016Scg CMPCI_REG_CH1_FORMAT_SHIFT, 38272016Scg CMPCI_REG_CH1_FORMAT_MASK, 38372016Scg f); 38472016Scg } 38573772Scg ch->fmt = format; 38672016Scg 38772016Scg return 0; 38872016Scg} 38972016Scg 39073772Scgstatic int 39172016Scgcmichan_setspeed(kobj_t obj, void *data, u_int32_t speed) 39273772Scg{ 39374994Sorion struct sc_chinfo *ch = data; 39472016Scg u_int32_t r, rsp; 39572016Scg 39672016Scg r = cmpci_rate_to_regvalue(speed); 39772016Scg if (ch->dir == PCMDIR_PLAY) { 39872016Scg if (speed < 44100) /* disable if req before rate change */ 39972016Scg cmi_spdif_speed(ch->parent, speed); 40072016Scg cmi_partial_wr4(ch->parent, 40172016Scg CMPCI_REG_FUNC_1, 40272016Scg CMPCI_REG_DAC_FS_SHIFT, 40372016Scg CMPCI_REG_DAC_FS_MASK, 40472016Scg r); 40572016Scg if (speed >= 44100) /* enable if req after rate change */ 40672016Scg cmi_spdif_speed(ch->parent, speed); 40772016Scg rsp = cmi_rd(ch->parent, CMPCI_REG_FUNC_1, 4); 40872016Scg rsp >>= CMPCI_REG_DAC_FS_SHIFT; 40972016Scg rsp &= CMPCI_REG_DAC_FS_MASK; 41072016Scg } else { 41172016Scg cmi_partial_wr4(ch->parent, 41272016Scg CMPCI_REG_FUNC_1, 41372016Scg CMPCI_REG_ADC_FS_SHIFT, 41472016Scg CMPCI_REG_ADC_FS_MASK, 41572016Scg r); 41672016Scg rsp = cmi_rd(ch->parent, CMPCI_REG_FUNC_1, 4); 41772016Scg rsp >>= CMPCI_REG_ADC_FS_SHIFT; 41872016Scg rsp &= CMPCI_REG_ADC_FS_MASK; 41972016Scg } 42072016Scg ch->spd = cmpci_regvalue_to_rate(r); 42172016Scg 42273772Scg DEB(printf("cmichan_setspeed (%s) %d -> %d (%d)\n", 42372016Scg (ch->dir == PCMDIR_PLAY) ? "play" : "rec", 42472016Scg speed, ch->spd, cmpci_regvalue_to_rate(rsp))); 42572016Scg 42672016Scg return ch->spd; 42772016Scg} 42872016Scg 42972016Scgstatic int 43072016Scgcmichan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 43172016Scg{ 43274994Sorion struct sc_chinfo *ch = data; 43372016Scg 43472016Scg /* user has requested interrupts every blocksize bytes */ 43572016Scg if (blocksize > CMI_BUFFER_SIZE / CMI_INTR_PER_BUFFER) { 43672016Scg blocksize = CMI_BUFFER_SIZE / CMI_INTR_PER_BUFFER; 43772016Scg } 43872016Scg sndbuf_resize(ch->buffer, CMI_INTR_PER_BUFFER, blocksize); 43972016Scg 44072016Scg return sndbuf_getsize(ch->buffer); 44172016Scg} 44272016Scg 44372016Scgstatic int 44472016Scgcmichan_trigger(kobj_t obj, void *data, int go) 44572016Scg{ 44674994Sorion struct sc_chinfo *ch = data; 44774994Sorion struct sc_info *sc = ch->parent; 44872016Scg 44972016Scg if (ch->dir == PCMDIR_PLAY) { 45072016Scg switch(go) { 45172016Scg case PCMTRIG_START: 45274994Sorion cmi_ch0_start(sc, ch); 45372016Scg break; 45472016Scg case PCMTRIG_ABORT: 45574994Sorion cmi_ch0_stop(sc, ch); 45672016Scg break; 45772016Scg } 45873772Scg } else { 45972016Scg switch(go) { 46072016Scg case PCMTRIG_START: 46174994Sorion cmi_ch1_start(sc, ch); 46272016Scg break; 46372016Scg case PCMTRIG_ABORT: 46474994Sorion cmi_ch1_stop(sc, ch); 46572016Scg break; 46672016Scg } 46772016Scg } 46872016Scg return 0; 46972016Scg} 47072016Scg 47172016Scgstatic int 47272016Scgcmichan_getptr(kobj_t obj, void *data) 47372016Scg{ 47474994Sorion struct sc_chinfo *ch = data; 47574994Sorion struct sc_info *sc = ch->parent; 47672016Scg u_int32_t physptr, bufptr, sz; 47772016Scg 47872016Scg if (ch->dir == PCMDIR_PLAY) { 47974994Sorion physptr = cmi_rd(sc, CMPCI_REG_DMA0_BASE, 4); 48072016Scg } else { 48174994Sorion physptr = cmi_rd(sc, CMPCI_REG_DMA1_BASE, 4); 48272016Scg } 48373772Scg 48472016Scg sz = sndbuf_getsize(ch->buffer); 48574994Sorion bufptr = (physptr - ch->phys_buf + sz - ch->bps) % sz; 48672016Scg 48772016Scg return bufptr; 48872016Scg} 48972016Scg 49073772Scgstatic void 49173772Scgcmi_intr(void *data) 49272016Scg{ 49374994Sorion struct sc_info *sc = data; 49472016Scg u_int32_t intrstat; 49572016Scg 49674994Sorion intrstat = cmi_rd(sc, CMPCI_REG_INTR_STATUS, 4); 49772016Scg if ((intrstat & CMPCI_REG_ANY_INTR) == 0) { 49872016Scg return; 49972016Scg } 50072016Scg 50172016Scg /* Disable interrupts */ 50272016Scg if (intrstat & CMPCI_REG_CH0_INTR) { 50374994Sorion cmi_clr4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 50472016Scg } 50572016Scg 50672016Scg if (intrstat & CMPCI_REG_CH1_INTR) { 50774994Sorion cmi_clr4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 50872016Scg } 50972016Scg 51072016Scg /* Signal interrupts to channel */ 51172016Scg if (intrstat & CMPCI_REG_CH0_INTR) { 51274994Sorion chn_intr(sc->pch.channel); 51372016Scg } 51472016Scg 51572016Scg if (intrstat & CMPCI_REG_CH1_INTR) { 51674994Sorion chn_intr(sc->rch.channel); 51772016Scg } 51873772Scg 51972016Scg /* Enable interrupts */ 52072016Scg if (intrstat & CMPCI_REG_CH0_INTR) { 52174994Sorion cmi_set4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); 52272016Scg } 52372016Scg 52472016Scg if (intrstat & CMPCI_REG_CH1_INTR) { 52574994Sorion cmi_set4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); 52672016Scg } 52772016Scg 52872016Scg return; 52972016Scg} 53072016Scg 53174763Scgstatic struct pcmchan_caps * 53272016Scgcmichan_getcaps(kobj_t obj, void *data) 53372016Scg{ 53472016Scg return &cmi_caps; 53572016Scg} 53672016Scg 53772016Scgstatic kobj_method_t cmichan_methods[] = { 53872016Scg KOBJMETHOD(channel_init, cmichan_init), 53972016Scg KOBJMETHOD(channel_setformat, cmichan_setformat), 54072016Scg KOBJMETHOD(channel_setspeed, cmichan_setspeed), 54172016Scg KOBJMETHOD(channel_setblocksize, cmichan_setblocksize), 54272016Scg KOBJMETHOD(channel_trigger, cmichan_trigger), 54372016Scg KOBJMETHOD(channel_getptr, cmichan_getptr), 54472016Scg KOBJMETHOD(channel_getcaps, cmichan_getcaps), 54572016Scg { 0, 0 } 54672016Scg}; 54772016ScgCHANNEL_DECLARE(cmichan); 54872016Scg 54972016Scg/* ------------------------------------------------------------------------- */ 55072016Scg/* Mixer - sb16 with kinks */ 55172016Scg 55273772Scgstatic void 55374994Sorioncmimix_wr(struct sc_info *sc, u_int8_t port, u_int8_t val) 55472016Scg{ 55574994Sorion cmi_wr(sc, CMPCI_REG_SBADDR, port, 1); 55674994Sorion cmi_wr(sc, CMPCI_REG_SBDATA, val, 1); 55772016Scg} 55872016Scg 55973772Scgstatic u_int8_t 56074994Sorioncmimix_rd(struct sc_info *sc, u_int8_t port) 56172016Scg{ 56274994Sorion cmi_wr(sc, CMPCI_REG_SBADDR, port, 1); 56374994Sorion return (u_int8_t)cmi_rd(sc, CMPCI_REG_SBDATA, 1); 56472016Scg} 56572016Scg 56672016Scgstruct sb16props { 56772016Scg u_int8_t rreg; /* right reg chan register */ 56872016Scg u_int8_t stereo:1; /* (no explanation needed, honest) */ 56972016Scg u_int8_t rec:1; /* recording source */ 57072016Scg u_int8_t bits:3; /* num bits to represent maximum gain rep */ 57172016Scg u_int8_t oselect; /* output select mask */ 57272016Scg u_int8_t iselect; /* right input select mask */ 57372016Scg} static const cmt[SOUND_MIXER_NRDEVICES] = { 57473772Scg [SOUND_MIXER_SYNTH] = {CMPCI_SB16_MIXER_FM_R, 1, 1, 5, 57572016Scg CMPCI_SB16_SW_FM, CMPCI_SB16_MIXER_FM_SRC_R}, 57672016Scg [SOUND_MIXER_CD] = {CMPCI_SB16_MIXER_CDDA_R, 1, 1, 5, 57772016Scg CMPCI_SB16_SW_CD, CMPCI_SB16_MIXER_CD_SRC_R}, 57872016Scg [SOUND_MIXER_LINE] = {CMPCI_SB16_MIXER_LINE_R, 1, 1, 5, 57972016Scg CMPCI_SB16_SW_LINE, CMPCI_SB16_MIXER_LINE_SRC_R}, 58073772Scg [SOUND_MIXER_MIC] = {CMPCI_SB16_MIXER_MIC, 0, 1, 5, 58172016Scg CMPCI_SB16_SW_MIC, CMPCI_SB16_MIXER_MIC_SRC}, 58272016Scg [SOUND_MIXER_SPEAKER] = {CMPCI_SB16_MIXER_SPEAKER, 0, 0, 2, 0, 0}, 58372016Scg [SOUND_MIXER_PCM] = {CMPCI_SB16_MIXER_VOICE_R, 1, 0, 5, 0, 0}, 58472016Scg [SOUND_MIXER_VOLUME] = {CMPCI_SB16_MIXER_MASTER_R, 1, 0, 5, 0, 0}, 58572016Scg /* These controls are not implemented in CMI8738, but maybe at a 58672016Scg future date. They are not documented in C-Media documentation, 58772016Scg though appear in other drivers for future h/w (ALSA, Linux, NetBSD). 58872016Scg */ 58973772Scg [SOUND_MIXER_IGAIN] = {CMPCI_SB16_MIXER_INGAIN_R, 1, 0, 2, 0, 0}, 59073772Scg [SOUND_MIXER_OGAIN] = {CMPCI_SB16_MIXER_OUTGAIN_R, 1, 0, 2, 0, 0}, 59173772Scg [SOUND_MIXER_BASS] = {CMPCI_SB16_MIXER_BASS_R, 1, 0, 4, 0, 0}, 59273772Scg [SOUND_MIXER_TREBLE] = {CMPCI_SB16_MIXER_TREBLE_R, 1, 0, 4, 0, 0}, 59374994Sorion /* The mic pre-amp is implemented with non-SB16 compatible 59474994Sorion registers. */ 59572016Scg [SOUND_MIXER_MONITOR] = {CMPCI_NON_SB16_CONTROL, 0, 1, 4, 0}, 59672016Scg}; 59772016Scg 59872016Scg#define MIXER_GAIN_REG_RTOL(r) (r - 1) 59972016Scg 60072016Scgstatic int 60174763Scgcmimix_init(struct snd_mixer *m) 60272016Scg{ 60374994Sorion struct sc_info *sc = mix_getdevinfo(m); 60474994Sorion u_int32_t i,v; 60572016Scg 60674994Sorion for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { 60772016Scg if (cmt[i].bits) v |= 1 << i; 60872016Scg } 60972016Scg mix_setdevs(m, v); 61074994Sorion 61174994Sorion for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { 61274994Sorion if (cmt[i].rec) v |= 1 << i; 61372016Scg } 61472016Scg mix_setrecdevs(m, v); 61572016Scg 61674994Sorion cmimix_wr(sc, CMPCI_SB16_MIXER_RESET, 0); 61774994Sorion cmimix_wr(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); 61874994Sorion cmimix_wr(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); 61974994Sorion cmimix_wr(sc, CMPCI_SB16_MIXER_OUTMIX, 62072016Scg CMPCI_SB16_SW_CD | CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); 62172016Scg return 0; 62272016Scg} 62372016Scg 62472016Scgstatic int 62574763Scgcmimix_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 62672016Scg{ 62774994Sorion struct sc_info *sc = mix_getdevinfo(m); 62872016Scg u_int32_t r, l, max; 62972016Scg u_int8_t v; 63072016Scg 63172016Scg max = (1 << cmt[dev].bits) - 1; 63272016Scg 63372016Scg if (cmt[dev].rreg == CMPCI_NON_SB16_CONTROL) { 63474994Sorion /* For time being this can only be one thing (mic in 63574994Sorion * mic/aux reg) */ 63674994Sorion v = cmi_rd(sc, CMPCI_REG_AUX_MIC, 1) & 0xf0; 63772016Scg l = left * max / 100; 63874994Sorion /* 3 bit gain with LSB MICGAIN off(1),on(1) -> 4 bit value */ 63973772Scg v |= ((l << 1) | (~l >> 3)) & 0x0f; 64074994Sorion cmi_wr(sc, CMPCI_REG_AUX_MIC, v, 1); 64172016Scg return 0; 64272016Scg } 64372016Scg 64472016Scg l = (left * max / 100) << (8 - cmt[dev].bits); 64572016Scg if (cmt[dev].stereo) { 64672016Scg r = (right * max / 100) << (8 - cmt[dev].bits); 64774994Sorion cmimix_wr(sc, MIXER_GAIN_REG_RTOL(cmt[dev].rreg), l); 64874994Sorion cmimix_wr(sc, cmt[dev].rreg, r); 64972016Scg DEBMIX(printf("Mixer stereo write dev %d reg 0x%02x "\ 65072016Scg "value 0x%02x:0x%02x\n", 65172016Scg dev, MIXER_GAIN_REG_RTOL(cmt[dev].rreg), l, r)); 65272016Scg } else { 65372016Scg r = l; 65474994Sorion cmimix_wr(sc, cmt[dev].rreg, l); 65572016Scg DEBMIX(printf("Mixer mono write dev %d reg 0x%02x " \ 65672016Scg "value 0x%02x:0x%02x\n", 65772016Scg dev, cmt[dev].rreg, l, l)); 65872016Scg } 65972016Scg 66072016Scg /* Zero gain does not mute channel from output, but this does... */ 66174994Sorion v = cmimix_rd(sc, CMPCI_SB16_MIXER_OUTMIX); 66272016Scg if (l == 0 && r == 0) { 66372016Scg v &= ~cmt[dev].oselect; 66472016Scg } else { 66572016Scg v |= cmt[dev].oselect; 66672016Scg } 66774994Sorion cmimix_wr(sc, CMPCI_SB16_MIXER_OUTMIX, v); 66872016Scg 66972016Scg return 0; 67072016Scg} 67172016Scg 67272016Scgstatic int 67374763Scgcmimix_setrecsrc(struct snd_mixer *m, u_int32_t src) 67472016Scg{ 67574994Sorion struct sc_info *sc = mix_getdevinfo(m); 67672016Scg u_int32_t i, ml, sl; 67772016Scg 67872016Scg ml = sl = 0; 67972016Scg for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 68072016Scg if ((1<<i) & src) { 68172016Scg if (cmt[i].stereo) { 68272016Scg sl |= cmt[i].iselect; 68372016Scg } else { 68472016Scg ml |= cmt[i].iselect; 68572016Scg } 68672016Scg } 68772016Scg } 68874994Sorion cmimix_wr(sc, CMPCI_SB16_MIXER_ADCMIX_R, sl|ml); 68972016Scg DEBMIX(printf("cmimix_setrecsrc: reg 0x%02x val 0x%02x\n", 69073772Scg CMPCI_SB16_MIXER_ADCMIX_R, sl|ml)); 69172016Scg ml = CMPCI_SB16_MIXER_SRC_R_TO_L(ml); 69274994Sorion cmimix_wr(sc, CMPCI_SB16_MIXER_ADCMIX_L, sl|ml); 69373772Scg DEBMIX(printf("cmimix_setrecsrc: reg 0x%02x val 0x%02x\n", 69473772Scg CMPCI_SB16_MIXER_ADCMIX_L, sl|ml)); 69572016Scg 69672016Scg return src; 69772016Scg} 69872016Scg 69972016Scgstatic kobj_method_t cmi_mixer_methods[] = { 70072016Scg KOBJMETHOD(mixer_init, cmimix_init), 70172016Scg KOBJMETHOD(mixer_set, cmimix_set), 70272016Scg KOBJMETHOD(mixer_setrecsrc, cmimix_setrecsrc), 70372016Scg { 0, 0 } 70472016Scg}; 70572016ScgMIXER_DECLARE(cmi_mixer); 70672016Scg 70772016Scg/* ------------------------------------------------------------------------- */ 70872016Scg/* Power and reset */ 70972016Scg 71072016Scgstatic void 71174994Sorioncmi_power(struct sc_info *sc, int state) 71272016Scg{ 71372016Scg switch (state) { 71472016Scg case 0: /* full power */ 71574994Sorion cmi_clr4(sc, CMPCI_REG_MISC, CMPCI_REG_POWER_DOWN); 71672016Scg break; 71772016Scg default: 71872016Scg /* power off */ 71974994Sorion cmi_set4(sc, CMPCI_REG_MISC, CMPCI_REG_POWER_DOWN); 72072016Scg break; 72172016Scg } 72272016Scg} 72372016Scg 72474994Sorionstatic int 72574994Sorioncmi_init(struct sc_info *sc) 72674994Sorion{ 72774994Sorion /* Effect reset */ 72874994Sorion cmi_set4(sc, CMPCI_REG_MISC, CMPCI_REG_BUS_AND_DSP_RESET); 72974994Sorion DELAY(100); 73074994Sorion cmi_clr4(sc, CMPCI_REG_MISC, CMPCI_REG_BUS_AND_DSP_RESET); 73174994Sorion 73274994Sorion /* Disable interrupts and channels */ 73374994Sorion cmi_clr4(sc, CMPCI_REG_FUNC_0, 73474994Sorion CMPCI_REG_CH0_ENABLE | CMPCI_REG_CH1_ENABLE); 73575174Sorion cmi_clr4(sc, CMPCI_REG_INTR_CTRL, 73675174Sorion CMPCI_REG_CH0_INTR_ENABLE | CMPCI_REG_CH1_INTR_ENABLE); 73774994Sorion 73875174Sorion /* Configure DMA channels, ch0 = play, ch1 = capture */ 73975174Sorion cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); 74075174Sorion cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); 74175174Sorion 74274994Sorion /* Attempt to enable 4 Channel output */ 74374994Sorion cmi_set4(sc, CMPCI_REG_MISC, CMPCI_REG_N4SPK3D); 74474994Sorion 74574994Sorion /* Disable SPDIF1 - not compatible with config */ 74674994Sorion cmi_clr4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF1_ENABLE); 74774994Sorion cmi_clr4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP); 74874994Sorion 74974994Sorion return 0; 75074994Sorion} 75174994Sorion 75274994Sorionstatic void 75374994Sorioncmi_uninit(struct sc_info *sc) 75474994Sorion{ 75574994Sorion /* Disable interrupts and channels */ 75674994Sorion cmi_clr4(sc, CMPCI_REG_INTR_CTRL, 75774994Sorion CMPCI_REG_CH0_INTR_ENABLE | 75874994Sorion CMPCI_REG_CH1_INTR_ENABLE | 75974994Sorion CMPCI_REG_TDMA_INTR_ENABLE); 76074994Sorion cmi_clr4(sc, CMPCI_REG_FUNC_0, 76174994Sorion CMPCI_REG_CH0_ENABLE | CMPCI_REG_CH1_ENABLE); 76274994Sorion} 76374994Sorion 76472016Scg/* ------------------------------------------------------------------------- */ 76572016Scg/* Bus and device registration */ 76672016Scgstatic int 76772016Scgcmi_probe(device_t dev) 76872016Scg{ 76972016Scg switch(pci_get_devid(dev)) { 77072016Scg case CMI8338A_PCI_ID: 77172016Scg device_set_desc(dev, "CMedia CMI8338A"); 77272016Scg return 0; 77372016Scg case CMI8338B_PCI_ID: 77472016Scg device_set_desc(dev, "CMedia CMI8338B"); 77572016Scg return 0; 77672016Scg case CMI8738_PCI_ID: 77772016Scg device_set_desc(dev, "CMedia CMI8738"); 77872016Scg return 0; 77972016Scg case CMI8738B_PCI_ID: 78072016Scg device_set_desc(dev, "CMedia CMI8738B"); 78172016Scg return 0; 78272016Scg default: 78372016Scg return ENXIO; 78472016Scg } 78572016Scg} 78672016Scg 78773772Scgstatic int 78872016Scgcmi_attach(device_t dev) 78972016Scg{ 79074994Sorion struct snddev_info *d; 79174994Sorion struct sc_info *sc; 79274994Sorion u_int32_t data; 79374994Sorion char status[SND_STATUSLEN]; 79472016Scg 79572016Scg d = device_get_softc(dev); 79674994Sorion sc = malloc(sizeof(struct sc_info), M_DEVBUF, M_NOWAIT); 79774994Sorion if (sc == NULL) { 79872016Scg device_printf(dev, "cannot allocate softc\n"); 79972016Scg return ENXIO; 80072016Scg } 80174994Sorion bzero(sc, sizeof(*sc)); 80273772Scg 80372016Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 80472016Scg data |= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN); 80572016Scg pci_write_config(dev, PCIR_COMMAND, data, 2); 80672016Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 80772016Scg 80874994Sorion sc->regid = PCIR_MAPS; 80974994Sorion sc->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->regid, 81072016Scg 0, BUS_SPACE_UNRESTRICTED, 1, RF_ACTIVE); 81174994Sorion if (!sc->reg) { 81272016Scg device_printf(dev, "cmi_attach: Cannot allocate bus resource\n"); 81372016Scg goto bad; 81472016Scg } 81574994Sorion sc->st = rman_get_bustag(sc->reg); 81674994Sorion sc->sh = rman_get_bushandle(sc->reg); 81772016Scg 81874994Sorion sc->irqid = 0; 81974994Sorion sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid, 82072016Scg 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 82174994Sorion if (!sc->irq || 82274994Sorion snd_setup_intr(dev, sc->irq, 0, cmi_intr, sc, &sc->ih)){ 82372016Scg device_printf(dev, "cmi_attach: Unable to map interrupt\n"); 82472016Scg goto bad; 82572016Scg } 82673772Scg 82772016Scg if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 82872016Scg /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 82972016Scg /*highaddr*/BUS_SPACE_MAXADDR, 83072016Scg /*filter*/NULL, /*filterarg*/NULL, 83173772Scg /*maxsize*/CMI_BUFFER_SIZE, /*nsegments*/1, 83273772Scg /*maxsegz*/0x3ffff, /*flags*/0, 83374994Sorion &sc->parent_dmat) != 0) { 83472016Scg device_printf(dev, "cmi_attach: Unable to create dma tag\n"); 83572016Scg goto bad; 83672016Scg } 83772016Scg 83874994Sorion cmi_power(sc, 0); 83975174Sorion if (cmi_init(sc)) 84075174Sorion goto bad; 84172016Scg 84274994Sorion if (mixer_init(dev, &cmi_mixer_class, sc)) 84372016Scg goto bad; 84472016Scg 84574994Sorion if (pcm_register(dev, sc, 1, 1)) 84673772Scg goto bad; 84773772Scg 84874994Sorion pcm_addchan(dev, PCMDIR_PLAY, &cmichan_class, sc); 84974994Sorion pcm_addchan(dev, PCMDIR_REC, &cmichan_class, sc); 85072016Scg 85172016Scg snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld", 85274994Sorion rman_get_start(sc->reg), rman_get_start(sc->irq)); 85372016Scg pcm_setstatus(dev, status); 85472016Scg 85572016Scg DEB(printf("cmi_attach: succeeded\n")); 85672016Scg return 0; 85773772Scg 85872016Scg bad: 85974994Sorion if (sc->parent_dmat) 86074994Sorion bus_dma_tag_destroy(sc->parent_dmat); 86174994Sorion if (sc->ih) 86274994Sorion bus_teardown_intr(dev, sc->irq, sc->ih); 86374994Sorion if (sc->irq) 86474994Sorion bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 86574994Sorion if (sc->reg) 86674994Sorion bus_release_resource(dev, SYS_RES_IOPORT, sc->regid, sc->reg); 86774994Sorion if (sc) 86874994Sorion free(sc, M_DEVBUF); 86972016Scg 87072016Scg return ENXIO; 87172016Scg} 87272016Scg 87372016Scgstatic int 87472016Scgcmi_detach(device_t dev) 87572016Scg{ 87674994Sorion struct sc_info *sc; 87772016Scg int r; 87872016Scg 87972016Scg r = pcm_unregister(dev); 88072016Scg if (r) return r; 88172016Scg 88274994Sorion sc = pcm_getdevinfo(dev); 88374994Sorion cmi_uninit(sc); 88474994Sorion cmi_power(sc, 3); 88572016Scg 88674994Sorion bus_dma_tag_destroy(sc->parent_dmat); 88774994Sorion bus_teardown_intr(dev, sc->irq, sc->ih); 88874994Sorion bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 88974994Sorion bus_release_resource(dev, SYS_RES_IOPORT, sc->regid, sc->reg); 89074994Sorion free(sc, M_DEVBUF); 89174994Sorion 89272016Scg return 0; 89372016Scg} 89472016Scg 89574994Sorionstatic int 89674994Sorioncmi_suspend(device_t dev) 89774994Sorion{ 89874994Sorion struct sc_info *sc = pcm_getdevinfo(dev); 89974994Sorion 90074994Sorion sc->pch.dma_was_active = cmi_ch0_stop(sc, &sc->pch); 90174994Sorion sc->rch.dma_was_active = cmi_ch1_stop(sc, &sc->rch); 90274994Sorion cmi_power(sc, 3); 90374994Sorion return 0; 90474994Sorion} 90574994Sorion 90674994Sorionstatic int 90774994Sorioncmi_resume(device_t dev) 90874994Sorion{ 90974994Sorion struct sc_info *sc = pcm_getdevinfo(dev); 91074994Sorion 91174994Sorion cmi_power(sc, 0); 91274994Sorion if (cmi_init(sc) != 0) { 91374994Sorion device_printf(dev, "unable to reinitialize the card\n"); 91474994Sorion return ENXIO; 91574994Sorion } 91674994Sorion 91774994Sorion if (mixer_reinit(dev) == -1) { 91874994Sorion device_printf(dev, "unable to reinitialize the mixer\n"); 91974994Sorion return ENXIO; 92074994Sorion } 92174994Sorion 92274994Sorion if (sc->pch.dma_was_active) { 92374994Sorion cmichan_setspeed(NULL, &sc->pch, sc->pch.spd); 92474994Sorion cmichan_setformat(NULL, &sc->pch, sc->pch.fmt); 92574994Sorion cmi_ch0_start(sc, &sc->pch); 92674994Sorion } 92774994Sorion 92874994Sorion if (sc->rch.dma_was_active) { 92974994Sorion cmichan_setspeed(NULL, &sc->rch, sc->rch.spd); 93074994Sorion cmichan_setformat(NULL, &sc->rch, sc->rch.fmt); 93174994Sorion cmi_ch1_start(sc, &sc->rch); 93274994Sorion } 93374994Sorion return 0; 93474994Sorion} 93574994Sorion 93672016Scgstatic device_method_t cmi_methods[] = { 93772016Scg DEVMETHOD(device_probe, cmi_probe), 93872016Scg DEVMETHOD(device_attach, cmi_attach), 93972016Scg DEVMETHOD(device_detach, cmi_detach), 94074994Sorion DEVMETHOD(device_resume, cmi_resume), 94174994Sorion DEVMETHOD(device_suspend, cmi_suspend), 94272016Scg { 0, 0 } 94372016Scg}; 94472016Scg 94572016Scgstatic driver_t cmi_driver = { 94672016Scg "pcm", 94772016Scg cmi_methods, 94874763Scg sizeof(struct snddev_info) 94972016Scg}; 95072016Scg 95172016Scgstatic devclass_t pcm_devclass; 95272016ScgDRIVER_MODULE(snd_cmipci, pci, cmi_driver, pcm_devclass, 0, 0); 95372016ScgMODULE_DEPEND(snd_cmipci, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 95472016ScgMODULE_VERSION(snd_cmipci, 1); 955