smbus_if.m revision 41012
138776Snsouch# 238776Snsouch# Copyright (c) 1998 Nicolas Souchu 338776Snsouch# All rights reserved. 438776Snsouch# 538776Snsouch# Redistribution and use in source and binary forms, with or without 638776Snsouch# modification, are permitted provided that the following conditions 738776Snsouch# are met: 838776Snsouch# 1. Redistributions of source code must retain the above copyright 938776Snsouch# notice, this list of conditions and the following disclaimer. 1038776Snsouch# 2. Redistributions in binary form must reproduce the above copyright 1138776Snsouch# notice, this list of conditions and the following disclaimer in the 1238776Snsouch# documentation and/or other materials provided with the distribution. 1338776Snsouch# 1438776Snsouch# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1538776Snsouch# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1638776Snsouch# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1738776Snsouch# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1838776Snsouch# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1938776Snsouch# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2038776Snsouch# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2138776Snsouch# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2238776Snsouch# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2338776Snsouch# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2438776Snsouch# SUCH DAMAGE. 2538776Snsouch# 2641012Snsouch# $Id: smbus_if.m,v 1.3 1998/11/07 14:56:04 nsouch Exp $ 2738776Snsouch# 2838776Snsouch 2941012SnsouchINTERFACE smbus; 3038776Snsouch 3138776Snsouch# 3240785Snsouch# Interpret interrupt 3338776Snsouch# 3438776SnsouchMETHOD void intr { 3538776Snsouch device_t dev; 3638776Snsouch u_char devaddr; 3738776Snsouch char low; 3838776Snsouch char high; 3938776Snsouch int error; 4038776Snsouch}; 4138776Snsouch 4238776Snsouch# 4340785Snsouch# smbus callback 4440785Snsouch# 4540785SnsouchMETHOD int callback { 4640785Snsouch device_t dev; 4740785Snsouch int index; 4840785Snsouch caddr_t data; 4940785Snsouch}; 5040785Snsouch 5140785Snsouch# 5238776Snsouch# Quick command 5338776Snsouch# 5438776SnsouchMETHOD int quick { 5538776Snsouch device_t dev; 5638776Snsouch u_char slave; 5738776Snsouch int how; 5838776Snsouch}; 5938776Snsouch 6038776Snsouch# 6138776Snsouch# Send Byte command 6238776Snsouch# 6338776SnsouchMETHOD int sendb { 6438776Snsouch device_t dev; 6538776Snsouch u_char slave; 6638776Snsouch char byte; 6738776Snsouch}; 6838776Snsouch 6938776Snsouch# 7038776Snsouch# Receive Byte command 7138776Snsouch# 7238776SnsouchMETHOD int recvb { 7338776Snsouch device_t dev; 7438776Snsouch u_char slave; 7538776Snsouch char *byte; 7638776Snsouch}; 7738776Snsouch 7838776Snsouch# 7938776Snsouch# Write Byte command 8038776Snsouch# 8138776SnsouchMETHOD int writeb { 8238776Snsouch device_t dev; 8338776Snsouch u_char slave; 8438776Snsouch char cmd; 8538776Snsouch char byte; 8638776Snsouch}; 8738776Snsouch 8838776Snsouch# 8938776Snsouch# Write Word command 9038776Snsouch# 9138776SnsouchMETHOD int writew { 9238776Snsouch device_t dev; 9338776Snsouch u_char slave; 9438776Snsouch char cmd; 9538776Snsouch short word; 9638776Snsouch}; 9738776Snsouch 9838776Snsouch# 9938776Snsouch# Read Byte command 10038776Snsouch# 10138776SnsouchMETHOD int readb { 10238776Snsouch device_t dev; 10338776Snsouch u_char slave; 10438776Snsouch char cmd; 10538776Snsouch char *byte; 10638776Snsouch}; 10738776Snsouch 10838776Snsouch# 10938776Snsouch# Read Word command 11038776Snsouch# 11138776SnsouchMETHOD int readw { 11238776Snsouch device_t dev; 11338776Snsouch u_char slave; 11438776Snsouch char cmd; 11538776Snsouch short *word; 11638776Snsouch}; 11738776Snsouch 11838776Snsouch# 11938776Snsouch# Process Call command 12038776Snsouch# 12138776SnsouchMETHOD int pcall { 12238776Snsouch device_t dev; 12338776Snsouch u_char slave; 12438776Snsouch char cmd; 12538776Snsouch short sdata; 12638776Snsouch short *rdata; 12738776Snsouch}; 12838776Snsouch 12938776Snsouch# 13038776Snsouch# Block Write command 13138776Snsouch# 13240994SnsouchMETHOD int bwrite { 13338776Snsouch device_t dev; 13438776Snsouch u_char slave; 13538776Snsouch char cmd; 13638776Snsouch u_char count; 13738776Snsouch char *buf; 13838776Snsouch}; 13938776Snsouch 14038776Snsouch# 14138776Snsouch# Block Read command 14238776Snsouch# 14340994SnsouchMETHOD int bread { 14438776Snsouch device_t dev; 14538776Snsouch u_char slave; 14638776Snsouch char cmd; 14738776Snsouch u_char count; 14838776Snsouch char *buf; 14938776Snsouch}; 150