sio.c revision 83546
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: head/sys/dev/sio/sio.c 83546 2001-09-16 11:14:56Z murray $ 34 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 35 * from: i386/isa sio.c,v 1.234 36 */ 37 38#include "opt_comconsole.h" 39#include "opt_compat.h" 40#include "opt_ddb.h" 41#include "opt_sio.h" 42#include "card.h" 43#include "pci.h" 44 45/* 46 * Serial driver, based on 386BSD-0.1 com driver. 47 * Mostly rewritten to use pseudo-DMA. 48 * Works for National Semiconductor NS8250-NS16550AF UARTs. 49 * COM driver, based on HP dca driver. 50 * 51 * Changes for PC-Card integration: 52 * - Added PC-Card driver table and handlers 53 */ 54#include <sys/param.h> 55#include <sys/systm.h> 56#include <sys/bus.h> 57#include <sys/bus.h> 58#include <sys/conf.h> 59#include <sys/dkstat.h> 60#include <sys/fcntl.h> 61#include <sys/interrupt.h> 62#include <sys/kernel.h> 63#include <sys/lock.h> 64#include <sys/malloc.h> 65#include <sys/module.h> 66#include <sys/mutex.h> 67#include <sys/proc.h> 68#include <sys/reboot.h> 69#include <sys/sysctl.h> 70#include <sys/syslog.h> 71#include <sys/tty.h> 72#include <machine/bus_pio.h> 73#include <machine/bus.h> 74#include <sys/rman.h> 75#include <sys/timetc.h> 76#include <sys/timepps.h> 77 78#include <isa/isareg.h> 79#include <isa/isavar.h> 80#if NPCI > 0 81#include <pci/pcireg.h> 82#include <pci/pcivar.h> 83#endif 84 85#include <machine/clock.h> 86#include <machine/resource.h> 87 88#include <isa/sioreg.h> 89 90#ifdef COM_ESP 91#include <dev/ic/esp.h> 92#endif 93#include <dev/ic/ns16550.h> 94 95#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 96 97#define CALLOUT_MASK 0x80 98#define CONTROL_MASK 0x60 99#define CONTROL_INIT_STATE 0x20 100#define CONTROL_LOCK_STATE 0x40 101#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 102#define MINOR_MAGIC_MASK (CALLOUT_MASK | CONTROL_MASK) 103#define MINOR_TO_UNIT(mynor) ((mynor) & ~MINOR_MAGIC_MASK) 104 105#ifdef COM_MULTIPORT 106/* checks in flags for multiport and which is multiport "master chip" 107 * for a given card 108 */ 109#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 110#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 111#define COM_NOTAST4(flags) ((flags) & 0x04) 112#endif /* COM_MULTIPORT */ 113 114#define COM_CONSOLE(flags) ((flags) & 0x10) 115#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 116#define COM_LLCONSOLE(flags) ((flags) & 0x40) 117#define COM_DEBUGGER(flags) ((flags) & 0x80) 118#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 119#define COM_NOFIFO(flags) ((flags) & 0x02) 120#define COM_ST16650A(flags) ((flags) & 0x20000) 121#define COM_C_NOPROBE (0x40000) 122#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 123#define COM_C_IIR_TXRDYBUG (0x80000) 124#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 125#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 126 127#define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 128 129#define sio_getreg(com, off) \ 130 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 131#define sio_setreg(com, off, value) \ 132 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 133 134/* 135 * com state bits. 136 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 137 * than the other bits so that they can be tested as a group without masking 138 * off the low bits. 139 * 140 * The following com and tty flags correspond closely: 141 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 142 * comstop()) 143 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 144 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 145 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 146 * TS_FLUSH is not used. 147 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 148 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 149 */ 150#define CS_BUSY 0x80 /* output in progress */ 151#define CS_TTGO 0x40 /* output not stopped by XOFF */ 152#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 153#define CS_CHECKMSR 1 /* check of MSR scheduled */ 154#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 155#define CS_DTR_OFF 0x10 /* DTR held off */ 156#define CS_ODONE 4 /* output completed */ 157#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 158#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 159 160static char const * const error_desc[] = { 161#define CE_OVERRUN 0 162 "silo overflow", 163#define CE_INTERRUPT_BUF_OVERFLOW 1 164 "interrupt-level buffer overflow", 165#define CE_TTY_BUF_OVERFLOW 2 166 "tty-level buffer overflow", 167}; 168 169#define CE_NTYPES 3 170#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 171 172/* types. XXX - should be elsewhere */ 173typedef u_int Port_t; /* hardware port */ 174typedef u_char bool_t; /* boolean */ 175 176/* queue of linear buffers */ 177struct lbq { 178 u_char *l_head; /* next char to process */ 179 u_char *l_tail; /* one past the last char to process */ 180 struct lbq *l_next; /* next in queue */ 181 bool_t l_queued; /* nonzero if queued */ 182}; 183 184/* com device structure */ 185struct com_s { 186 u_int flags; /* Copy isa device flags */ 187 u_char state; /* miscellaneous flag bits */ 188 bool_t active_out; /* nonzero if the callout device is open */ 189 u_char cfcr_image; /* copy of value written to CFCR */ 190#ifdef COM_ESP 191 bool_t esp; /* is this unit a hayes esp board? */ 192#endif 193 u_char extra_state; /* more flag bits, separate for order trick */ 194 u_char fifo_image; /* copy of value written to FIFO */ 195 bool_t hasfifo; /* nonzero for 16550 UARTs */ 196 bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 197 bool_t loses_outints; /* nonzero if device loses output interrupts */ 198 u_char mcr_image; /* copy of value written to MCR */ 199#ifdef COM_MULTIPORT 200 bool_t multiport; /* is this unit part of a multiport device? */ 201#endif /* COM_MULTIPORT */ 202 bool_t no_irq; /* nonzero if irq is not attached */ 203 bool_t gone; /* hardware disappeared */ 204 bool_t poll; /* nonzero if polling is required */ 205 bool_t poll_output; /* nonzero if polling for output is required */ 206 int unit; /* unit number */ 207 int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 208 u_int tx_fifo_size; 209 u_int wopeners; /* # processes waiting for DCD in open() */ 210 211 /* 212 * The high level of the driver never reads status registers directly 213 * because there would be too many side effects to handle conveniently. 214 * Instead, it reads copies of the registers stored here by the 215 * interrupt handler. 216 */ 217 u_char last_modem_status; /* last MSR read by intr handler */ 218 u_char prev_modem_status; /* last MSR handled by high level */ 219 220 u_char hotchar; /* ldisc-specific char to be handled ASAP */ 221 u_char *ibuf; /* start of input buffer */ 222 u_char *ibufend; /* end of input buffer */ 223 u_char *ibufold; /* old input buffer, to be freed */ 224 u_char *ihighwater; /* threshold in input buffer */ 225 u_char *iptr; /* next free spot in input buffer */ 226 int ibufsize; /* size of ibuf (not include error bytes) */ 227 int ierroff; /* offset of error bytes in ibuf */ 228 229 struct lbq obufq; /* head of queue of output buffers */ 230 struct lbq obufs[2]; /* output buffers */ 231 232 bus_space_tag_t bst; 233 bus_space_handle_t bsh; 234 235 Port_t data_port; /* i/o ports */ 236#ifdef COM_ESP 237 Port_t esp_port; 238#endif 239 Port_t int_id_port; 240 Port_t modem_ctl_port; 241 Port_t line_status_port; 242 Port_t modem_status_port; 243 Port_t intr_ctl_port; /* Ports of IIR register */ 244 245 struct tty *tp; /* cross reference */ 246 247 /* Initial state. */ 248 struct termios it_in; /* should be in struct tty */ 249 struct termios it_out; 250 251 /* Lock state. */ 252 struct termios lt_in; /* should be in struct tty */ 253 struct termios lt_out; 254 255 bool_t do_timestamp; 256 bool_t do_dcd_timestamp; 257 struct timeval timestamp; 258 struct timeval dcd_timestamp; 259 struct pps_state pps; 260 261 u_long bytes_in; /* statistics */ 262 u_long bytes_out; 263 u_int delta_error_counts[CE_NTYPES]; 264 u_long error_counts[CE_NTYPES]; 265 266 struct resource *irqres; 267 struct resource *ioportres; 268 void *cookie; 269 dev_t devs[6]; 270 271 /* 272 * Data area for output buffers. Someday we should build the output 273 * buffer queue without copying data. 274 */ 275 u_char obuf1[256]; 276 u_char obuf2[256]; 277}; 278 279#ifdef COM_ESP 280static int espattach __P((struct com_s *com, Port_t esp_port)); 281#endif 282static int sioattach __P((device_t dev, int rid)); 283static int sio_isa_attach __P((device_t dev)); 284 285static timeout_t siobusycheck; 286static timeout_t siodtrwakeup; 287static void comhardclose __P((struct com_s *com)); 288static void sioinput __P((struct com_s *com)); 289static void siointr1 __P((struct com_s *com)); 290static void siointr __P((void *arg)); 291static int commctl __P((struct com_s *com, int bits, int how)); 292static int comparam __P((struct tty *tp, struct termios *t)); 293static void siopoll __P((void *)); 294static int sioprobe __P((device_t dev, int xrid)); 295static int sio_isa_probe __P((device_t dev)); 296static void siosettimeout __P((void)); 297static int siosetwater __P((struct com_s *com, speed_t speed)); 298static void comstart __P((struct tty *tp)); 299static void comstop __P((struct tty *tp, int rw)); 300static timeout_t comwakeup; 301static void disc_optim __P((struct tty *tp, struct termios *t, 302 struct com_s *com)); 303 304#if NCARD > 0 305static int sio_pccard_attach __P((device_t dev)); 306static int sio_pccard_detach __P((device_t dev)); 307static int sio_pccard_probe __P((device_t dev)); 308#endif /* NCARD > 0 */ 309 310#if NPCI > 0 311static int sio_pci_attach __P((device_t dev)); 312static void sio_pci_kludge_unit __P((device_t dev)); 313static int sio_pci_probe __P((device_t dev)); 314#endif /* NPCI > 0 */ 315 316static char driver_name[] = "sio"; 317static struct mtx sio_lock; 318static int sio_inited; 319 320/* table and macro for fast conversion from a unit number to its com struct */ 321static devclass_t sio_devclass; 322#define com_addr(unit) ((struct com_s *) \ 323 devclass_get_softc(sio_devclass, unit)) 324 325static device_method_t sio_isa_methods[] = { 326 /* Device interface */ 327 DEVMETHOD(device_probe, sio_isa_probe), 328 DEVMETHOD(device_attach, sio_isa_attach), 329 330 { 0, 0 } 331}; 332 333static driver_t sio_isa_driver = { 334 driver_name, 335 sio_isa_methods, 336 sizeof(struct com_s), 337}; 338 339#if NCARD > 0 340static device_method_t sio_pccard_methods[] = { 341 /* Device interface */ 342 DEVMETHOD(device_probe, sio_pccard_probe), 343 DEVMETHOD(device_attach, sio_pccard_attach), 344 DEVMETHOD(device_detach, sio_pccard_detach), 345 346 { 0, 0 } 347}; 348 349static driver_t sio_pccard_driver = { 350 driver_name, 351 sio_pccard_methods, 352 sizeof(struct com_s), 353}; 354#endif /* NCARD > 0 */ 355 356#if NPCI > 0 357static device_method_t sio_pci_methods[] = { 358 /* Device interface */ 359 DEVMETHOD(device_probe, sio_pci_probe), 360 DEVMETHOD(device_attach, sio_pci_attach), 361 362 { 0, 0 } 363}; 364 365static driver_t sio_pci_driver = { 366 driver_name, 367 sio_pci_methods, 368 sizeof(struct com_s), 369}; 370#endif /* NPCI > 0 */ 371 372static d_open_t sioopen; 373static d_close_t sioclose; 374static d_read_t sioread; 375static d_write_t siowrite; 376static d_ioctl_t sioioctl; 377 378#define CDEV_MAJOR 28 379static struct cdevsw sio_cdevsw = { 380 /* open */ sioopen, 381 /* close */ sioclose, 382 /* read */ sioread, 383 /* write */ siowrite, 384 /* ioctl */ sioioctl, 385 /* poll */ ttypoll, 386 /* mmap */ nommap, 387 /* strategy */ nostrategy, 388 /* name */ driver_name, 389 /* maj */ CDEV_MAJOR, 390 /* dump */ nodump, 391 /* psize */ nopsize, 392 /* flags */ D_TTY | D_KQFILTER, 393 /* kqfilter */ ttykqfilter, 394}; 395 396int comconsole = -1; 397static volatile speed_t comdefaultrate = CONSPEED; 398#ifdef __alpha__ 399static volatile speed_t gdbdefaultrate = CONSPEED; 400#endif 401static u_int com_events; /* input chars + weighted output completions */ 402static Port_t siocniobase; 403#ifndef __alpha__ 404static int siocnunit; 405#endif 406static Port_t siogdbiobase; 407static int siogdbunit = -1; 408static void *sio_slow_ih; 409static void *sio_fast_ih; 410static int sio_timeout; 411static int sio_timeouts_until_log; 412static struct callout_handle sio_timeout_handle 413 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 414static int sio_numunits; 415 416static struct speedtab comspeedtab[] = { 417 { 0, 0 }, 418 { 50, COMBRD(50) }, 419 { 75, COMBRD(75) }, 420 { 110, COMBRD(110) }, 421 { 134, COMBRD(134) }, 422 { 150, COMBRD(150) }, 423 { 200, COMBRD(200) }, 424 { 300, COMBRD(300) }, 425 { 600, COMBRD(600) }, 426 { 1200, COMBRD(1200) }, 427 { 1800, COMBRD(1800) }, 428 { 2400, COMBRD(2400) }, 429 { 4800, COMBRD(4800) }, 430 { 9600, COMBRD(9600) }, 431 { 19200, COMBRD(19200) }, 432 { 38400, COMBRD(38400) }, 433 { 57600, COMBRD(57600) }, 434 { 115200, COMBRD(115200) }, 435 { -1, -1 } 436}; 437 438#ifdef COM_ESP 439/* XXX configure this properly. */ 440static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 441static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 442#endif 443 444/* 445 * handle sysctl read/write requests for console speed 446 * 447 * In addition to setting comdefaultrate for I/O through /dev/console, 448 * also set the initial and lock values for the /dev/ttyXX device 449 * if there is one associated with the console. Finally, if the /dev/tty 450 * device has already been open, change the speed on the open running port 451 * itself. 452 */ 453 454static int 455sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 456{ 457 int error, s; 458 speed_t newspeed; 459 struct com_s *com; 460 struct tty *tp; 461 462 newspeed = comdefaultrate; 463 464 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 465 if (error || !req->newptr) 466 return (error); 467 468 comdefaultrate = newspeed; 469 470 if (comconsole < 0) /* serial console not selected? */ 471 return (0); 472 473 com = com_addr(comconsole); 474 if (com == NULL) 475 return (ENXIO); 476 477 /* 478 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 479 * (note, the lock rates really are boolean -- if non-zero, disallow 480 * speed changes) 481 */ 482 com->it_in.c_ispeed = com->it_in.c_ospeed = 483 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 484 com->it_out.c_ispeed = com->it_out.c_ospeed = 485 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 486 487 /* 488 * if we're open, change the running rate too 489 */ 490 tp = com->tp; 491 if (tp && (tp->t_state & TS_ISOPEN)) { 492 tp->t_termios.c_ispeed = 493 tp->t_termios.c_ospeed = comdefaultrate; 494 s = spltty(); 495 error = comparam(tp, &tp->t_termios); 496 splx(s); 497 } 498 return error; 499} 500 501SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 502 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 503 504#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 505#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 506 507#if NCARD > 0 508static int 509sio_pccard_probe(dev) 510 device_t dev; 511{ 512 /* Do not probe IRQ - pccard doesn't turn on the interrupt line */ 513 /* until bus_setup_intr */ 514 SET_FLAG(dev, COM_C_NOPROBE); 515 516 return (sioprobe(dev, 0)); 517} 518 519static int 520sio_pccard_attach(dev) 521 device_t dev; 522{ 523 return (sioattach(dev, 0)); 524} 525 526/* 527 * sio_detach - unload the driver and clear the table. 528 * XXX TODO: 529 * This is usually called when the card is ejected, but 530 * can be caused by a modunload of a controller driver. 531 * The idea is to reset the driver's view of the device 532 * and ensure that any driver entry points such as 533 * read and write do not hang. 534 */ 535static int 536sio_pccard_detach(dev) 537 device_t dev; 538{ 539 struct com_s *com; 540 int i; 541 542 com = (struct com_s *) device_get_softc(dev); 543 if (com == NULL) { 544 device_printf(dev, "NULL com in siounload\n"); 545 return (0); 546 } 547 com->gone = 1; 548 for (i = 0 ; i < 6; i++) 549 destroy_dev(com->devs[i]); 550 if (com->irqres) { 551 bus_teardown_intr(dev, com->irqres, com->cookie); 552 bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 553 } 554 if (com->ioportres) 555 bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres); 556 if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 557 device_printf(dev, "still open, forcing close\n"); 558 (*linesw[com->tp->t_line].l_close)(com->tp, 0); 559 com->tp->t_gen++; 560 ttyclose(com->tp); 561 ttwakeup(com->tp); 562 ttwwakeup(com->tp); 563 } else { 564 if (com->ibuf != NULL) 565 free(com->ibuf, M_DEVBUF); 566 } 567 device_printf(dev, "unloaded\n"); 568 return (0); 569} 570#endif /* NCARD > 0 */ 571 572#if NPCI > 0 573struct pci_ids { 574 u_int32_t type; 575 const char *desc; 576 int rid; 577}; 578 579static struct pci_ids pci_ids[] = { 580 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 581 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 }, 582 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 583 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 584 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 }, 585 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 }, 586 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 }, 587 /* { 0xXXXXXXXX, "Xircom Cardbus modem", 0x10 }, */ 588 { 0x00000000, NULL, 0 } 589}; 590 591static int 592sio_pci_attach(dev) 593 device_t dev; 594{ 595 u_int32_t type; 596 struct pci_ids *id; 597 598 type = pci_get_devid(dev); 599 id = pci_ids; 600 while (id->type && id->type != type) 601 id++; 602 if (id->desc == NULL) 603 return (ENXIO); 604 sio_pci_kludge_unit(dev); 605 return (sioattach(dev, id->rid)); 606} 607 608/* 609 * Don't cut and paste this to other drivers. It is a horrible kludge 610 * which will fail to work and also be unnecessary in future versions. 611 */ 612static void 613sio_pci_kludge_unit(dev) 614 device_t dev; 615{ 616 devclass_t dc; 617 int err; 618 int start; 619 int unit; 620 621 unit = 0; 622 start = 0; 623 while (resource_int_value("sio", unit, "port", &start) == 0 && 624 start > 0) 625 unit++; 626 if (device_get_unit(dev) < unit) { 627 dc = device_get_devclass(dev); 628 while (devclass_get_device(dc, unit)) 629 unit++; 630 device_printf(dev, "moving to sio%d\n", unit); 631 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 632 if (err) 633 device_printf(dev, "error moving device %d\n", err); 634 } 635} 636 637static int 638sio_pci_probe(dev) 639 device_t dev; 640{ 641 u_int32_t type; 642 struct pci_ids *id; 643 644 type = pci_get_devid(dev); 645 id = pci_ids; 646 while (id->type && id->type != type) 647 id++; 648 if (id->desc == NULL) 649 return (ENXIO); 650 device_set_desc(dev, id->desc); 651 return (sioprobe(dev, id->rid)); 652} 653#endif /* NPCI > 0 */ 654 655static struct isa_pnp_id sio_ids[] = { 656 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 657 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 658 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 659 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 660 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 661 /* Devices that do not have a compatid */ 662 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */ 663 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 664 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 665 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 666 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 667 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/ 668 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 669 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 670 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 671 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 672 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */ 673 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 674 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 675 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 676 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 677 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 678 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 679 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 680 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 681 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */ 682 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 683 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 684 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 685 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */ 686 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/ 687 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 688 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 689 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 690 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 691 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 692 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */ 693 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 694 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 695 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */ 696 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 697 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 698 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */ 699 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 700 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */ 701 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 702 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 703 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 704 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 705 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 706 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 707 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */ 708 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 709 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 710 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 711 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 712 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 713 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 714 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 715 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 716 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 717 {0x11007256, NULL}, /* USR0011 - USR ? */ 718 {0x01017256, NULL}, /* USR0101 - USR ? */ 719 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 720 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 721 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 722 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 723 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 724 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 725 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 726 {0x90307256, NULL}, /* USR3090 - USR ? */ 727 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */ 728 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 729 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 730 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */ 731 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 732 {0} 733}; 734 735 736 737static int 738sio_isa_probe(dev) 739 device_t dev; 740{ 741 /* Check isapnp ids */ 742 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 743 return (ENXIO); 744 return (sioprobe(dev, 0)); 745} 746 747static int 748sioprobe(dev, xrid) 749 device_t dev; 750 int xrid; 751{ 752#if 0 753 static bool_t already_init; 754 device_t xdev; 755#endif 756 struct com_s *com; 757 bool_t failures[10]; 758 int fn; 759 device_t idev; 760 Port_t iobase; 761 intrmask_t irqmap[4]; 762 intrmask_t irqs; 763 u_char mcr_image; 764 int result; 765 u_long xirq; 766 u_int flags = device_get_flags(dev); 767 int rid; 768 struct resource *port; 769 770 rid = xrid; 771 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 772 0, ~0, IO_COMSIZE, RF_ACTIVE); 773 if (!port) 774 return (ENXIO); 775 776 com = device_get_softc(dev); 777 com->bst = rman_get_bustag(port); 778 com->bsh = rman_get_bushandle(port); 779 780 if (atomic_cmpset_int(&sio_inited, 0, 1)) 781 mtx_init(&sio_lock, driver_name, MTX_SPIN); 782 783#if 0 784 /* 785 * XXX this is broken - when we are first called, there are no 786 * previously configured IO ports. We could hard code 787 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 788 * This code has been doing nothing since the conversion since 789 * "count" is zero the first time around. 790 */ 791 if (!already_init) { 792 /* 793 * Turn off MCR_IENABLE for all likely serial ports. An unused 794 * port with its MCR_IENABLE gate open will inhibit interrupts 795 * from any used port that shares the interrupt vector. 796 * XXX the gate enable is elsewhere for some multiports. 797 */ 798 device_t *devs; 799 int count, i, xioport; 800 801 devclass_get_devices(sio_devclass, &devs, &count); 802 for (i = 0; i < count; i++) { 803 xdev = devs[i]; 804 if (device_is_enabled(xdev) && 805 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 806 NULL) == 0) 807 outb(xioport + com_mcr, 0); 808 } 809 free(devs, M_TEMP); 810 already_init = TRUE; 811 } 812#endif 813 814 if (COM_LLCONSOLE(flags)) { 815 printf("sio%d: reserved for low-level i/o\n", 816 device_get_unit(dev)); 817 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 818 return (ENXIO); 819 } 820 821 /* 822 * If the device is on a multiport card and has an AST/4 823 * compatible interrupt control register, initialize this 824 * register and prepare to leave MCR_IENABLE clear in the mcr. 825 * Otherwise, prepare to set MCR_IENABLE in the mcr. 826 * Point idev to the device struct giving the correct id_irq. 827 * This is the struct for the master device if there is one. 828 */ 829 idev = dev; 830 mcr_image = MCR_IENABLE; 831#ifdef COM_MULTIPORT 832 if (COM_ISMULTIPORT(flags)) { 833 Port_t xiobase; 834 u_long io; 835 836 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 837 if (idev == NULL) { 838 printf("sio%d: master device %d not configured\n", 839 device_get_unit(dev), COM_MPMASTER(flags)); 840 idev = dev; 841 } 842 if (!COM_NOTAST4(flags)) { 843 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 844 NULL) == 0) { 845 xiobase = io; 846 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 847 NULL, NULL) == 0) 848 outb(xiobase + com_scr, 0x80); 849 else 850 outb(xiobase + com_scr, 0); 851 } 852 mcr_image = 0; 853 } 854 } 855#endif /* COM_MULTIPORT */ 856 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 857 mcr_image = 0; 858 859 bzero(failures, sizeof failures); 860 iobase = rman_get_start(port); 861 862 /* 863 * We don't want to get actual interrupts, just masked ones. 864 * Interrupts from this line should already be masked in the ICU, 865 * but mask them in the processor as well in case there are some 866 * (misconfigured) shared interrupts. 867 */ 868 mtx_lock_spin(&sio_lock); 869/* EXTRA DELAY? */ 870 871 /* 872 * Initialize the speed and the word size and wait long enough to 873 * drain the maximum of 16 bytes of junk in device output queues. 874 * The speed is undefined after a master reset and must be set 875 * before relying on anything related to output. There may be 876 * junk after a (very fast) soft reboot and (apparently) after 877 * master reset. 878 * XXX what about the UART bug avoided by waiting in comparam()? 879 * We don't want to to wait long enough to drain at 2 bps. 880 */ 881 if (iobase == siocniobase) 882 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 883 else { 884 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 885 sio_setreg(com, com_dlbl, COMBRD(SIO_TEST_SPEED) & 0xff); 886 sio_setreg(com, com_dlbh, (u_int) COMBRD(SIO_TEST_SPEED) >> 8); 887 sio_setreg(com, com_cfcr, CFCR_8BITS); 888 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 889 } 890 891 /* 892 * Enable the interrupt gate and disable device interupts. This 893 * should leave the device driving the interrupt line low and 894 * guarantee an edge trigger if an interrupt can be generated. 895 */ 896/* EXTRA DELAY? */ 897 sio_setreg(com, com_mcr, mcr_image); 898 sio_setreg(com, com_ier, 0); 899 DELAY(1000); /* XXX */ 900 irqmap[0] = isa_irq_pending(); 901 902 /* 903 * Attempt to set loopback mode so that we can send a null byte 904 * without annoying any external device. 905 */ 906/* EXTRA DELAY? */ 907 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 908 909 /* 910 * Attempt to generate an output interrupt. On 8250's, setting 911 * IER_ETXRDY generates an interrupt independent of the current 912 * setting and independent of whether the THR is empty. On 16450's, 913 * setting IER_ETXRDY generates an interrupt independent of the 914 * current setting. On 16550A's, setting IER_ETXRDY only 915 * generates an interrupt when IER_ETXRDY is not already set. 916 */ 917 sio_setreg(com, com_ier, IER_ETXRDY); 918 919 /* 920 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 921 * an interrupt. They'd better generate one for actually doing 922 * output. Loopback may be broken on the same incompatibles but 923 * it's unlikely to do more than allow the null byte out. 924 */ 925 sio_setreg(com, com_data, 0); 926 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 927 928 /* 929 * Turn off loopback mode so that the interrupt gate works again 930 * (MCR_IENABLE was hidden). This should leave the device driving 931 * an interrupt line high. It doesn't matter if the interrupt 932 * line oscillates while we are not looking at it, since interrupts 933 * are disabled. 934 */ 935/* EXTRA DELAY? */ 936 sio_setreg(com, com_mcr, mcr_image); 937 938 /* 939 * Some pcmcia cards have the "TXRDY bug", so we check everyone 940 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 941 */ 942 if (COM_NOPROBE(flags)) { 943 /* Reading IIR register twice */ 944 for (fn = 0; fn < 2; fn ++) { 945 DELAY(10000); 946 failures[6] = sio_getreg(com, com_iir); 947 } 948 /* Check IIR_TXRDY clear ? */ 949 result = 0; 950 if (failures[6] & IIR_TXRDY) { 951 /* Nop, Double check with clearing IER */ 952 sio_setreg(com, com_ier, 0); 953 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 954 /* Ok. we're familia this gang */ 955 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 956 } else { 957 /* Unknown, Just omit this chip.. XXX */ 958 result = ENXIO; 959 sio_setreg(com, com_mcr, 0); 960 } 961 } else { 962 /* OK. this is well-known guys */ 963 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 964 } 965 sio_setreg(com, com_ier, 0); 966 sio_setreg(com, com_cfcr, CFCR_8BITS); 967 mtx_unlock_spin(&sio_lock); 968 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 969 return (iobase == siocniobase ? 0 : result); 970 } 971 972 /* 973 * Check that 974 * o the CFCR, IER and MCR in UART hold the values written to them 975 * (the values happen to be all distinct - this is good for 976 * avoiding false positive tests from bus echoes). 977 * o an output interrupt is generated and its vector is correct. 978 * o the interrupt goes away when the IIR in the UART is read. 979 */ 980/* EXTRA DELAY? */ 981 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 982 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 983 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 984 DELAY(10000); /* Some internal modems need this time */ 985 irqmap[1] = isa_irq_pending(); 986 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 987 DELAY(1000); /* XXX */ 988 irqmap[2] = isa_irq_pending(); 989 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 990 991 /* 992 * Turn off all device interrupts and check that they go off properly. 993 * Leave MCR_IENABLE alone. For ports without a master port, it gates 994 * the OUT2 output of the UART to 995 * the ICU input. Closing the gate would give a floating ICU input 996 * (unless there is another device driving it) and spurious interrupts. 997 * (On the system that this was first tested on, the input floats high 998 * and gives a (masked) interrupt as soon as the gate is closed.) 999 */ 1000 sio_setreg(com, com_ier, 0); 1001 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 1002 failures[7] = sio_getreg(com, com_ier); 1003 DELAY(1000); /* XXX */ 1004 irqmap[3] = isa_irq_pending(); 1005 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 1006 1007 mtx_unlock_spin(&sio_lock); 1008 1009 irqs = irqmap[1] & ~irqmap[0]; 1010 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 1011 ((1 << xirq) & irqs) == 0) 1012 printf( 1013 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 1014 device_get_unit(dev), xirq, irqs); 1015 if (bootverbose) 1016 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 1017 device_get_unit(dev), 1018 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 1019 1020 result = 0; 1021 for (fn = 0; fn < sizeof failures; ++fn) 1022 if (failures[fn]) { 1023 sio_setreg(com, com_mcr, 0); 1024 result = ENXIO; 1025 if (bootverbose) { 1026 printf("sio%d: probe failed test(s):", 1027 device_get_unit(dev)); 1028 for (fn = 0; fn < sizeof failures; ++fn) 1029 if (failures[fn]) 1030 printf(" %d", fn); 1031 printf("\n"); 1032 } 1033 break; 1034 } 1035 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1036 return (iobase == siocniobase ? 0 : result); 1037} 1038 1039#ifdef COM_ESP 1040static int 1041espattach(com, esp_port) 1042 struct com_s *com; 1043 Port_t esp_port; 1044{ 1045 u_char dips; 1046 u_char val; 1047 1048 /* 1049 * Check the ESP-specific I/O port to see if we're an ESP 1050 * card. If not, return failure immediately. 1051 */ 1052 if ((inb(esp_port) & 0xf3) == 0) { 1053 printf(" port 0x%x is not an ESP board?\n", esp_port); 1054 return (0); 1055 } 1056 1057 /* 1058 * We've got something that claims to be a Hayes ESP card. 1059 * Let's hope so. 1060 */ 1061 1062 /* Get the dip-switch configuration */ 1063 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 1064 dips = inb(esp_port + ESP_STATUS1); 1065 1066 /* 1067 * Bits 0,1 of dips say which COM port we are. 1068 */ 1069 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 1070 printf(" : ESP"); 1071 else { 1072 printf(" esp_port has com %d\n", dips & 0x03); 1073 return (0); 1074 } 1075 1076 /* 1077 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 1078 */ 1079 outb(esp_port + ESP_CMD1, ESP_GETTEST); 1080 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 1081 val = inb(esp_port + ESP_STATUS2); 1082 if ((val & 0x70) < 0x20) { 1083 printf("-old (%o)", val & 0x70); 1084 return (0); 1085 } 1086 1087 /* 1088 * Check for ability to emulate 16550: bit 7 == 1 1089 */ 1090 if ((dips & 0x80) == 0) { 1091 printf(" slave"); 1092 return (0); 1093 } 1094 1095 /* 1096 * Okay, we seem to be a Hayes ESP card. Whee. 1097 */ 1098 com->esp = TRUE; 1099 com->esp_port = esp_port; 1100 return (1); 1101} 1102#endif /* COM_ESP */ 1103 1104static int 1105sio_isa_attach(dev) 1106 device_t dev; 1107{ 1108 return (sioattach(dev, 0)); 1109} 1110 1111static int 1112sioattach(dev, xrid) 1113 device_t dev; 1114 int xrid; 1115{ 1116 struct com_s *com; 1117#ifdef COM_ESP 1118 Port_t *espp; 1119#endif 1120 Port_t iobase; 1121 int unit; 1122 u_int flags; 1123 int rid; 1124 struct resource *port; 1125 int ret; 1126 1127 rid = xrid; 1128 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 1129 0, ~0, IO_COMSIZE, RF_ACTIVE); 1130 if (!port) 1131 return (ENXIO); 1132 1133 iobase = rman_get_start(port); 1134 unit = device_get_unit(dev); 1135 com = device_get_softc(dev); 1136 flags = device_get_flags(dev); 1137 1138 if (unit >= sio_numunits) 1139 sio_numunits = unit + 1; 1140 /* 1141 * sioprobe() has initialized the device registers as follows: 1142 * o cfcr = CFCR_8BITS. 1143 * It is most important that CFCR_DLAB is off, so that the 1144 * data port is not hidden when we enable interrupts. 1145 * o ier = 0. 1146 * Interrupts are only enabled when the line is open. 1147 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 1148 * interrupt control register or the config specifies no irq. 1149 * Keeping MCR_DTR and MCR_RTS off might stop the external 1150 * device from sending before we are ready. 1151 */ 1152 bzero(com, sizeof *com); 1153 com->unit = unit; 1154 com->ioportres = port; 1155 com->bst = rman_get_bustag(port); 1156 com->bsh = rman_get_bushandle(port); 1157 com->cfcr_image = CFCR_8BITS; 1158 com->dtr_wait = 3 * hz; 1159 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1160 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1161 com->tx_fifo_size = 1; 1162 com->obufs[0].l_head = com->obuf1; 1163 com->obufs[1].l_head = com->obuf2; 1164 1165 com->data_port = iobase + com_data; 1166 com->int_id_port = iobase + com_iir; 1167 com->modem_ctl_port = iobase + com_mcr; 1168 com->mcr_image = inb(com->modem_ctl_port); 1169 com->line_status_port = iobase + com_lsr; 1170 com->modem_status_port = iobase + com_msr; 1171 com->intr_ctl_port = iobase + com_ier; 1172 1173 /* 1174 * We don't use all the flags from <sys/ttydefaults.h> since they 1175 * are only relevant for logins. It's important to have echo off 1176 * initially so that the line doesn't start blathering before the 1177 * echo flag can be turned off. 1178 */ 1179 com->it_in.c_iflag = 0; 1180 com->it_in.c_oflag = 0; 1181 com->it_in.c_cflag = TTYDEF_CFLAG; 1182 com->it_in.c_lflag = 0; 1183 if (unit == comconsole) { 1184 com->it_in.c_iflag = TTYDEF_IFLAG; 1185 com->it_in.c_oflag = TTYDEF_OFLAG; 1186 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1187 com->it_in.c_lflag = TTYDEF_LFLAG; 1188 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1189 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1190 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1191 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1192 } else 1193 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1194 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1195 mtx_unlock_spin(&sio_lock); 1196 /* 1197 * Leave i/o resources allocated if this is a `cn'-level 1198 * console, so that other devices can't snarf them. 1199 */ 1200 if (iobase != siocniobase) 1201 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1202 return (ENOMEM); 1203 } 1204 mtx_unlock_spin(&sio_lock); 1205 termioschars(&com->it_in); 1206 com->it_out = com->it_in; 1207 1208 /* attempt to determine UART type */ 1209 printf("sio%d: type", unit); 1210 1211 1212#ifdef COM_MULTIPORT 1213 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1214#else 1215 if (!COM_IIR_TXRDYBUG(flags)) 1216#endif 1217 { 1218 u_char scr; 1219 u_char scr1; 1220 u_char scr2; 1221 1222 scr = sio_getreg(com, com_scr); 1223 sio_setreg(com, com_scr, 0xa5); 1224 scr1 = sio_getreg(com, com_scr); 1225 sio_setreg(com, com_scr, 0x5a); 1226 scr2 = sio_getreg(com, com_scr); 1227 sio_setreg(com, com_scr, scr); 1228 if (scr1 != 0xa5 || scr2 != 0x5a) { 1229 printf(" 8250"); 1230 goto determined_type; 1231 } 1232 } 1233 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1234 DELAY(100); 1235 com->st16650a = 0; 1236 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1237 case FIFO_RX_LOW: 1238 printf(" 16450"); 1239 break; 1240 case FIFO_RX_MEDL: 1241 printf(" 16450?"); 1242 break; 1243 case FIFO_RX_MEDH: 1244 printf(" 16550?"); 1245 break; 1246 case FIFO_RX_HIGH: 1247 if (COM_NOFIFO(flags)) { 1248 printf(" 16550A fifo disabled"); 1249 } else { 1250 com->hasfifo = TRUE; 1251 if (COM_ST16650A(flags)) { 1252 com->st16650a = 1; 1253 com->tx_fifo_size = 32; 1254 printf(" ST16650A"); 1255 } else { 1256 com->tx_fifo_size = COM_FIFOSIZE(flags); 1257 printf(" 16550A"); 1258 } 1259 } 1260#ifdef COM_ESP 1261 for (espp = likely_esp_ports; *espp != 0; espp++) 1262 if (espattach(com, *espp)) { 1263 com->tx_fifo_size = 1024; 1264 break; 1265 } 1266#endif 1267 if (!com->st16650a) { 1268 if (!com->tx_fifo_size) 1269 com->tx_fifo_size = 16; 1270 else 1271 printf(" lookalike with %d bytes FIFO", 1272 com->tx_fifo_size); 1273 } 1274 1275 break; 1276 } 1277 1278#ifdef COM_ESP 1279 if (com->esp) { 1280 /* 1281 * Set 16550 compatibility mode. 1282 * We don't use the ESP_MODE_SCALE bit to increase the 1283 * fifo trigger levels because we can't handle large 1284 * bursts of input. 1285 * XXX flow control should be set in comparam(), not here. 1286 */ 1287 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1288 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1289 1290 /* Set RTS/CTS flow control. */ 1291 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1292 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1293 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1294 1295 /* Set flow-control levels. */ 1296 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1297 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1298 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1299 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1300 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1301 } 1302#endif /* COM_ESP */ 1303 sio_setreg(com, com_fifo, 0); 1304determined_type: ; 1305 1306#ifdef COM_MULTIPORT 1307 if (COM_ISMULTIPORT(flags)) { 1308 device_t masterdev; 1309 1310 com->multiport = TRUE; 1311 printf(" (multiport"); 1312 if (unit == COM_MPMASTER(flags)) 1313 printf(" master"); 1314 printf(")"); 1315 masterdev = devclass_get_device(sio_devclass, 1316 COM_MPMASTER(flags)); 1317 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1318 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1319 } 1320#endif /* COM_MULTIPORT */ 1321 if (unit == comconsole) 1322 printf(", console"); 1323 if (COM_IIR_TXRDYBUG(flags)) 1324 printf(" with a bogus IIR_TXRDY register"); 1325 printf("\n"); 1326 1327 if (sio_fast_ih == NULL) { 1328 swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 1329 &sio_fast_ih); 1330 swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 1331 &sio_slow_ih); 1332 } 1333 com->devs[0] = make_dev(&sio_cdevsw, unit, 1334 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1335 com->devs[1] = make_dev(&sio_cdevsw, unit | CONTROL_INIT_STATE, 1336 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1337 com->devs[2] = make_dev(&sio_cdevsw, unit | CONTROL_LOCK_STATE, 1338 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1339 com->devs[3] = make_dev(&sio_cdevsw, unit | CALLOUT_MASK, 1340 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1341 com->devs[4] = make_dev(&sio_cdevsw, 1342 unit | CALLOUT_MASK | CONTROL_INIT_STATE, 1343 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1344 com->devs[5] = make_dev(&sio_cdevsw, 1345 unit | CALLOUT_MASK | CONTROL_LOCK_STATE, 1346 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1347 com->flags = flags; 1348 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1349 pps_init(&com->pps); 1350 1351 rid = 0; 1352 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1353 RF_ACTIVE); 1354 if (com->irqres) { 1355 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1356 INTR_TYPE_TTY | INTR_FAST, 1357 siointr, com, &com->cookie); 1358 if (ret) { 1359 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1360 com->irqres, INTR_TYPE_TTY, 1361 siointr, com, &com->cookie); 1362 if (ret == 0) 1363 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1364 } 1365 if (ret) 1366 device_printf(dev, "could not activate interrupt\n"); 1367#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1368 defined(ALT_BREAK_TO_DEBUGGER)) 1369 /* 1370 * Enable interrupts for early break-to-debugger support 1371 * on the console. 1372 */ 1373 if (ret == 0 && unit == comconsole) 1374 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1375 IER_EMSC); 1376#endif 1377 } 1378 1379 return (0); 1380} 1381 1382static int 1383sioopen(dev, flag, mode, td) 1384 dev_t dev; 1385 int flag; 1386 int mode; 1387 struct thread *td; 1388{ 1389 struct com_s *com; 1390 int error; 1391 int mynor; 1392 int s; 1393 struct tty *tp; 1394 int unit; 1395 1396 mynor = minor(dev); 1397 unit = MINOR_TO_UNIT(mynor); 1398 com = com_addr(unit); 1399 if (com == NULL) 1400 return (ENXIO); 1401 if (com->gone) 1402 return (ENXIO); 1403 if (mynor & CONTROL_MASK) 1404 return (0); 1405 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1406 s = spltty(); 1407 /* 1408 * We jump to this label after all non-interrupted sleeps to pick 1409 * up any changes of the device state. 1410 */ 1411open_top: 1412 while (com->state & CS_DTR_OFF) { 1413 error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 1414 if (com_addr(unit) == NULL) 1415 return (ENXIO); 1416 if (error != 0 || com->gone) 1417 goto out; 1418 } 1419 if (tp->t_state & TS_ISOPEN) { 1420 /* 1421 * The device is open, so everything has been initialized. 1422 * Handle conflicts. 1423 */ 1424 if (mynor & CALLOUT_MASK) { 1425 if (!com->active_out) { 1426 error = EBUSY; 1427 goto out; 1428 } 1429 } else { 1430 if (com->active_out) { 1431 if (flag & O_NONBLOCK) { 1432 error = EBUSY; 1433 goto out; 1434 } 1435 error = tsleep(&com->active_out, 1436 TTIPRI | PCATCH, "siobi", 0); 1437 if (com_addr(unit) == NULL) 1438 return (ENXIO); 1439 if (error != 0 || com->gone) 1440 goto out; 1441 goto open_top; 1442 } 1443 } 1444 if (tp->t_state & TS_XCLUDE && 1445 suser_td(td)) { 1446 error = EBUSY; 1447 goto out; 1448 } 1449 } else { 1450 /* 1451 * The device isn't open, so there are no conflicts. 1452 * Initialize it. Initialization is done twice in many 1453 * cases: to preempt sleeping callin opens if we are 1454 * callout, and to complete a callin open after DCD rises. 1455 */ 1456 tp->t_oproc = comstart; 1457 tp->t_param = comparam; 1458 tp->t_stop = comstop; 1459 tp->t_dev = dev; 1460 tp->t_termios = mynor & CALLOUT_MASK 1461 ? com->it_out : com->it_in; 1462 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1463 com->poll = com->no_irq; 1464 com->poll_output = com->loses_outints; 1465 ++com->wopeners; 1466 error = comparam(tp, &tp->t_termios); 1467 --com->wopeners; 1468 if (error != 0) 1469 goto out; 1470 /* 1471 * XXX we should goto open_top if comparam() slept. 1472 */ 1473 if (com->hasfifo) { 1474 /* 1475 * (Re)enable and drain fifos. 1476 * 1477 * Certain SMC chips cause problems if the fifos 1478 * are enabled while input is ready. Turn off the 1479 * fifo if necessary to clear the input. We test 1480 * the input ready bit after enabling the fifos 1481 * since we've already enabled them in comparam() 1482 * and to handle races between enabling and fresh 1483 * input. 1484 */ 1485 while (TRUE) { 1486 sio_setreg(com, com_fifo, 1487 FIFO_RCV_RST | FIFO_XMT_RST 1488 | com->fifo_image); 1489 /* 1490 * XXX the delays are for superstitious 1491 * historical reasons. It must be less than 1492 * the character time at the maximum 1493 * supported speed (87 usec at 115200 bps 1494 * 8N1). Otherwise we might loop endlessly 1495 * if data is streaming in. We used to use 1496 * delays of 100. That usually worked 1497 * because DELAY(100) used to usually delay 1498 * for about 85 usec instead of 100. 1499 */ 1500 DELAY(50); 1501 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1502 break; 1503 sio_setreg(com, com_fifo, 0); 1504 DELAY(50); 1505 (void) inb(com->data_port); 1506 } 1507 } 1508 1509 mtx_lock_spin(&sio_lock); 1510 (void) inb(com->line_status_port); 1511 (void) inb(com->data_port); 1512 com->prev_modem_status = com->last_modem_status 1513 = inb(com->modem_status_port); 1514 if (COM_IIR_TXRDYBUG(com->flags)) { 1515 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1516 | IER_EMSC); 1517 } else { 1518 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1519 | IER_ERLS | IER_EMSC); 1520 } 1521 mtx_unlock_spin(&sio_lock); 1522 /* 1523 * Handle initial DCD. Callout devices get a fake initial 1524 * DCD (trapdoor DCD). If we are callout, then any sleeping 1525 * callin opens get woken up and resume sleeping on "siobi" 1526 * instead of "siodcd". 1527 */ 1528 /* 1529 * XXX `mynor & CALLOUT_MASK' should be 1530 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1531 * TRAPDOOR_CARRIER is the default initial state for callout 1532 * devices and SOFT_CARRIER is like CLOCAL except it hides 1533 * the true carrier. 1534 */ 1535 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1536 (*linesw[tp->t_line].l_modem)(tp, 1); 1537 } 1538 /* 1539 * Wait for DCD if necessary. 1540 */ 1541 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1542 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1543 ++com->wopeners; 1544 error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 1545 if (com_addr(unit) == NULL) 1546 return (ENXIO); 1547 --com->wopeners; 1548 if (error != 0 || com->gone) 1549 goto out; 1550 goto open_top; 1551 } 1552 error = (*linesw[tp->t_line].l_open)(dev, tp); 1553 disc_optim(tp, &tp->t_termios, com); 1554 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1555 com->active_out = TRUE; 1556 siosettimeout(); 1557out: 1558 splx(s); 1559 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1560 comhardclose(com); 1561 return (error); 1562} 1563 1564static int 1565sioclose(dev, flag, mode, td) 1566 dev_t dev; 1567 int flag; 1568 int mode; 1569 struct thread *td; 1570{ 1571 struct com_s *com; 1572 int mynor; 1573 int s; 1574 struct tty *tp; 1575 1576 mynor = minor(dev); 1577 if (mynor & CONTROL_MASK) 1578 return (0); 1579 com = com_addr(MINOR_TO_UNIT(mynor)); 1580 if (com == NULL) 1581 return (ENODEV); 1582 tp = com->tp; 1583 s = spltty(); 1584 (*linesw[tp->t_line].l_close)(tp, flag); 1585 disc_optim(tp, &tp->t_termios, com); 1586 comstop(tp, FREAD | FWRITE); 1587 comhardclose(com); 1588 ttyclose(tp); 1589 siosettimeout(); 1590 splx(s); 1591 if (com->gone) { 1592 printf("sio%d: gone\n", com->unit); 1593 s = spltty(); 1594 if (com->ibuf != NULL) 1595 free(com->ibuf, M_DEVBUF); 1596 bzero(tp, sizeof *tp); 1597 splx(s); 1598 } 1599 return (0); 1600} 1601 1602static void 1603comhardclose(com) 1604 struct com_s *com; 1605{ 1606 int s; 1607 struct tty *tp; 1608 int unit; 1609 1610 unit = com->unit; 1611 s = spltty(); 1612 com->poll = FALSE; 1613 com->poll_output = FALSE; 1614 com->do_timestamp = FALSE; 1615 com->do_dcd_timestamp = FALSE; 1616 com->pps.ppsparam.mode = 0; 1617 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1618 tp = com->tp; 1619 1620#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1621 defined(ALT_BREAK_TO_DEBUGGER)) 1622 /* 1623 * Leave interrupts enabled and don't clear DTR if this is the 1624 * console. This allows us to detect break-to-debugger events 1625 * while the console device is closed. 1626 */ 1627 if (com->unit != comconsole) 1628#endif 1629 { 1630 sio_setreg(com, com_ier, 0); 1631 if (tp->t_cflag & HUPCL 1632 /* 1633 * XXX we will miss any carrier drop between here and the 1634 * next open. Perhaps we should watch DCD even when the 1635 * port is closed; it is not sufficient to check it at 1636 * the next open because it might go up and down while 1637 * we're not watching. 1638 */ 1639 || (!com->active_out 1640 && !(com->prev_modem_status & MSR_DCD) 1641 && !(com->it_in.c_cflag & CLOCAL)) 1642 || !(tp->t_state & TS_ISOPEN)) { 1643 (void)commctl(com, TIOCM_DTR, DMBIC); 1644 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1645 timeout(siodtrwakeup, com, com->dtr_wait); 1646 com->state |= CS_DTR_OFF; 1647 } 1648 } 1649 } 1650 if (com->hasfifo) { 1651 /* 1652 * Disable fifos so that they are off after controlled 1653 * reboots. Some BIOSes fail to detect 16550s when the 1654 * fifos are enabled. 1655 */ 1656 sio_setreg(com, com_fifo, 0); 1657 } 1658 com->active_out = FALSE; 1659 wakeup(&com->active_out); 1660 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1661 splx(s); 1662} 1663 1664static int 1665sioread(dev, uio, flag) 1666 dev_t dev; 1667 struct uio *uio; 1668 int flag; 1669{ 1670 int mynor; 1671 struct com_s *com; 1672 1673 mynor = minor(dev); 1674 if (mynor & CONTROL_MASK) 1675 return (ENODEV); 1676 com = com_addr(MINOR_TO_UNIT(mynor)); 1677 if (com == NULL || com->gone) 1678 return (ENODEV); 1679 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 1680} 1681 1682static int 1683siowrite(dev, uio, flag) 1684 dev_t dev; 1685 struct uio *uio; 1686 int flag; 1687{ 1688 int mynor; 1689 struct com_s *com; 1690 int unit; 1691 1692 mynor = minor(dev); 1693 if (mynor & CONTROL_MASK) 1694 return (ENODEV); 1695 1696 unit = MINOR_TO_UNIT(mynor); 1697 com = com_addr(unit); 1698 if (com == NULL || com->gone) 1699 return (ENODEV); 1700 /* 1701 * (XXX) We disallow virtual consoles if the physical console is 1702 * a serial port. This is in case there is a display attached that 1703 * is not the console. In that situation we don't need/want the X 1704 * server taking over the console. 1705 */ 1706 if (constty != NULL && unit == comconsole) 1707 constty = NULL; 1708 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 1709} 1710 1711static void 1712siobusycheck(chan) 1713 void *chan; 1714{ 1715 struct com_s *com; 1716 int s; 1717 1718 com = (struct com_s *)chan; 1719 1720 /* 1721 * Clear TS_BUSY if low-level output is complete. 1722 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1723 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1724 * called again. Reading the line status port outside of siointr1() 1725 * is safe because CS_BUSY is clear so there are no output interrupts 1726 * to lose. 1727 */ 1728 s = spltty(); 1729 if (com->state & CS_BUSY) 1730 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1731 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1732 == (LSR_TSRE | LSR_TXRDY)) { 1733 com->tp->t_state &= ~TS_BUSY; 1734 ttwwakeup(com->tp); 1735 com->extra_state &= ~CSE_BUSYCHECK; 1736 } else 1737 timeout(siobusycheck, com, hz / 100); 1738 splx(s); 1739} 1740 1741static void 1742siodtrwakeup(chan) 1743 void *chan; 1744{ 1745 struct com_s *com; 1746 1747 com = (struct com_s *)chan; 1748 com->state &= ~CS_DTR_OFF; 1749 wakeup(&com->dtr_wait); 1750} 1751 1752/* 1753 * Call this function with the sio_lock mutex held. It will return with the 1754 * lock still held. 1755 */ 1756static void 1757sioinput(com) 1758 struct com_s *com; 1759{ 1760 u_char *buf; 1761 int incc; 1762 u_char line_status; 1763 int recv_data; 1764 struct tty *tp; 1765 1766 buf = com->ibuf; 1767 tp = com->tp; 1768 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1769 com_events -= (com->iptr - com->ibuf); 1770 com->iptr = com->ibuf; 1771 return; 1772 } 1773 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1774 /* 1775 * Avoid the grotesquely inefficient lineswitch routine 1776 * (ttyinput) in "raw" mode. It usually takes about 450 1777 * instructions (that's without canonical processing or echo!). 1778 * slinput is reasonably fast (usually 40 instructions plus 1779 * call overhead). 1780 */ 1781 do { 1782 /* 1783 * This may look odd, but it is using save-and-enable 1784 * semantics instead of the save-and-disable semantics 1785 * that are used everywhere else. 1786 */ 1787 mtx_unlock_spin(&sio_lock); 1788 incc = com->iptr - buf; 1789 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1790 && (com->state & CS_RTS_IFLOW 1791 || tp->t_iflag & IXOFF) 1792 && !(tp->t_state & TS_TBLOCK)) 1793 ttyblock(tp); 1794 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1795 += b_to_q((char *)buf, incc, &tp->t_rawq); 1796 buf += incc; 1797 tk_nin += incc; 1798 tk_rawcc += incc; 1799 tp->t_rawcc += incc; 1800 ttwakeup(tp); 1801 if (tp->t_state & TS_TTSTOP 1802 && (tp->t_iflag & IXANY 1803 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1804 tp->t_state &= ~TS_TTSTOP; 1805 tp->t_lflag &= ~FLUSHO; 1806 comstart(tp); 1807 } 1808 mtx_lock_spin(&sio_lock); 1809 } while (buf < com->iptr); 1810 } else { 1811 do { 1812 /* 1813 * This may look odd, but it is using save-and-enable 1814 * semantics instead of the save-and-disable semantics 1815 * that are used everywhere else. 1816 */ 1817 mtx_unlock_spin(&sio_lock); 1818 line_status = buf[com->ierroff]; 1819 recv_data = *buf++; 1820 if (line_status 1821 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1822 if (line_status & LSR_BI) 1823 recv_data |= TTY_BI; 1824 if (line_status & LSR_FE) 1825 recv_data |= TTY_FE; 1826 if (line_status & LSR_OE) 1827 recv_data |= TTY_OE; 1828 if (line_status & LSR_PE) 1829 recv_data |= TTY_PE; 1830 } 1831 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1832 mtx_lock_spin(&sio_lock); 1833 } while (buf < com->iptr); 1834 } 1835 com_events -= (com->iptr - com->ibuf); 1836 com->iptr = com->ibuf; 1837 1838 /* 1839 * There is now room for another low-level buffer full of input, 1840 * so enable RTS if it is now disabled and there is room in the 1841 * high-level buffer. 1842 */ 1843 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1844 !(tp->t_state & TS_TBLOCK)) 1845 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1846} 1847 1848void 1849siointr(arg) 1850 void *arg; 1851{ 1852 struct com_s *com; 1853 1854#ifndef COM_MULTIPORT 1855 com = (struct com_s *)arg; 1856 1857 mtx_lock_spin(&sio_lock); 1858 siointr1(com); 1859 mtx_unlock_spin(&sio_lock); 1860#else /* COM_MULTIPORT */ 1861 bool_t possibly_more_intrs; 1862 int unit; 1863 1864 /* 1865 * Loop until there is no activity on any port. This is necessary 1866 * to get an interrupt edge more than to avoid another interrupt. 1867 * If the IRQ signal is just an OR of the IRQ signals from several 1868 * devices, then the edge from one may be lost because another is 1869 * on. 1870 */ 1871 mtx_lock_spin(&sio_lock); 1872 do { 1873 possibly_more_intrs = FALSE; 1874 for (unit = 0; unit < sio_numunits; ++unit) { 1875 com = com_addr(unit); 1876 /* 1877 * XXX COM_LOCK(); 1878 * would it work here, or be counter-productive? 1879 */ 1880 if (com != NULL 1881 && !com->gone 1882 && (inb(com->int_id_port) & IIR_IMASK) 1883 != IIR_NOPEND) { 1884 siointr1(com); 1885 possibly_more_intrs = TRUE; 1886 } 1887 /* XXX COM_UNLOCK(); */ 1888 } 1889 } while (possibly_more_intrs); 1890 mtx_unlock_spin(&sio_lock); 1891#endif /* COM_MULTIPORT */ 1892} 1893 1894static void 1895siointr1(com) 1896 struct com_s *com; 1897{ 1898 u_char line_status; 1899 u_char modem_status; 1900 u_char *ioptr; 1901 u_char recv_data; 1902 u_char int_ctl; 1903 u_char int_ctl_new; 1904 struct timecounter *tc; 1905 u_int count; 1906 1907 int_ctl = inb(com->intr_ctl_port); 1908 int_ctl_new = int_ctl; 1909 1910 while (!com->gone) { 1911 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1912 modem_status = inb(com->modem_status_port); 1913 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1914 tc = timecounter; 1915 count = tc->tc_get_timecount(tc); 1916 pps_event(&com->pps, tc, count, 1917 (modem_status & MSR_DCD) ? 1918 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1919 } 1920 } 1921 line_status = inb(com->line_status_port); 1922 1923 /* input event? (check first to help avoid overruns) */ 1924 while (line_status & LSR_RCV_MASK) { 1925 /* break/unnattached error bits or real input? */ 1926 if (!(line_status & LSR_RXRDY)) 1927 recv_data = 0; 1928 else 1929 recv_data = inb(com->data_port); 1930#if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 1931 /* 1932 * Solaris implements a new BREAK which is initiated 1933 * by a character sequence CR ~ ^b which is similar 1934 * to a familiar pattern used on Sun servers by the 1935 * Remote Console. 1936 */ 1937#define KEY_CRTLB 2 /* ^B */ 1938#define KEY_CR 13 /* CR '\r' */ 1939#define KEY_TILDE 126 /* ~ */ 1940 1941 if (com->unit == comconsole) { 1942 static int brk_state1 = 0, brk_state2 = 0; 1943 if (recv_data == KEY_CR) { 1944 brk_state1 = recv_data; 1945 brk_state2 = 0; 1946 } else if (brk_state1 == KEY_CR 1947 && (recv_data == KEY_TILDE 1948 || recv_data == KEY_CRTLB)) { 1949 if (recv_data == KEY_TILDE) 1950 brk_state2 = recv_data; 1951 else if (brk_state2 == KEY_TILDE 1952 && recv_data == KEY_CRTLB) { 1953 breakpoint(); 1954 brk_state1 = 0; 1955 brk_state2 = 0; 1956 goto cont; 1957 } else 1958 brk_state2 = 0; 1959 } else 1960 brk_state1 = 0; 1961 } 1962#endif 1963 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1964 /* 1965 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1966 * Otherwise, push the work to a higher level 1967 * (to handle PARMRK) if we're bypassing. 1968 * Otherwise, convert BI/FE and PE+INPCK to 0. 1969 * 1970 * This makes bypassing work right in the 1971 * usual "raw" case (IGNBRK set, and IGNPAR 1972 * and INPCK clear). 1973 * 1974 * Note: BI together with FE/PE means just BI. 1975 */ 1976 if (line_status & LSR_BI) { 1977#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 1978 if (com->unit == comconsole) { 1979 breakpoint(); 1980 goto cont; 1981 } 1982#endif 1983 if (com->tp == NULL 1984 || com->tp->t_iflag & IGNBRK) 1985 goto cont; 1986 } else { 1987 if (com->tp == NULL 1988 || com->tp->t_iflag & IGNPAR) 1989 goto cont; 1990 } 1991 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1992 && (line_status & (LSR_BI | LSR_FE) 1993 || com->tp->t_iflag & INPCK)) 1994 recv_data = 0; 1995 } 1996 ++com->bytes_in; 1997 if (com->hotchar != 0 && recv_data == com->hotchar) 1998 swi_sched(sio_fast_ih, SWI_NOSWITCH); 1999 ioptr = com->iptr; 2000 if (ioptr >= com->ibufend) 2001 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 2002 else { 2003 if (com->do_timestamp) 2004 microtime(&com->timestamp); 2005 ++com_events; 2006 swi_sched(sio_slow_ih, SWI_DELAY); 2007#if 0 /* for testing input latency vs efficiency */ 2008if (com->iptr - com->ibuf == 8) 2009 swi_sched(sio_fast_ih, SWI_NOSWITCH); 2010#endif 2011 ioptr[0] = recv_data; 2012 ioptr[com->ierroff] = line_status; 2013 com->iptr = ++ioptr; 2014 if (ioptr == com->ihighwater 2015 && com->state & CS_RTS_IFLOW) 2016 outb(com->modem_ctl_port, 2017 com->mcr_image &= ~MCR_RTS); 2018 if (line_status & LSR_OE) 2019 CE_RECORD(com, CE_OVERRUN); 2020 } 2021cont: 2022 /* 2023 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 2024 * jump from the top of the loop to here 2025 */ 2026 line_status = inb(com->line_status_port) & 0x7F; 2027 } 2028 2029 /* modem status change? (always check before doing output) */ 2030 modem_status = inb(com->modem_status_port); 2031 if (modem_status != com->last_modem_status) { 2032 if (com->do_dcd_timestamp 2033 && !(com->last_modem_status & MSR_DCD) 2034 && modem_status & MSR_DCD) 2035 microtime(&com->dcd_timestamp); 2036 2037 /* 2038 * Schedule high level to handle DCD changes. Note 2039 * that we don't use the delta bits anywhere. Some 2040 * UARTs mess them up, and it's easy to remember the 2041 * previous bits and calculate the delta. 2042 */ 2043 com->last_modem_status = modem_status; 2044 if (!(com->state & CS_CHECKMSR)) { 2045 com_events += LOTS_OF_EVENTS; 2046 com->state |= CS_CHECKMSR; 2047 swi_sched(sio_fast_ih, SWI_NOSWITCH); 2048 } 2049 2050 /* handle CTS change immediately for crisp flow ctl */ 2051 if (com->state & CS_CTS_OFLOW) { 2052 if (modem_status & MSR_CTS) 2053 com->state |= CS_ODEVREADY; 2054 else 2055 com->state &= ~CS_ODEVREADY; 2056 } 2057 } 2058 2059 /* output queued and everything ready? */ 2060 if (line_status & LSR_TXRDY 2061 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 2062 ioptr = com->obufq.l_head; 2063 if (com->tx_fifo_size > 1) { 2064 u_int ocount; 2065 2066 ocount = com->obufq.l_tail - ioptr; 2067 if (ocount > com->tx_fifo_size) 2068 ocount = com->tx_fifo_size; 2069 com->bytes_out += ocount; 2070 do 2071 outb(com->data_port, *ioptr++); 2072 while (--ocount != 0); 2073 } else { 2074 outb(com->data_port, *ioptr++); 2075 ++com->bytes_out; 2076 } 2077 com->obufq.l_head = ioptr; 2078 if (COM_IIR_TXRDYBUG(com->flags)) { 2079 int_ctl_new = int_ctl | IER_ETXRDY; 2080 } 2081 if (ioptr >= com->obufq.l_tail) { 2082 struct lbq *qp; 2083 2084 qp = com->obufq.l_next; 2085 qp->l_queued = FALSE; 2086 qp = qp->l_next; 2087 if (qp != NULL) { 2088 com->obufq.l_head = qp->l_head; 2089 com->obufq.l_tail = qp->l_tail; 2090 com->obufq.l_next = qp; 2091 } else { 2092 /* output just completed */ 2093 if (COM_IIR_TXRDYBUG(com->flags)) { 2094 int_ctl_new = int_ctl & ~IER_ETXRDY; 2095 } 2096 com->state &= ~CS_BUSY; 2097 } 2098 if (!(com->state & CS_ODONE)) { 2099 com_events += LOTS_OF_EVENTS; 2100 com->state |= CS_ODONE; 2101 /* handle at high level ASAP */ 2102 swi_sched(sio_fast_ih, SWI_NOSWITCH); 2103 } 2104 } 2105 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 2106 outb(com->intr_ctl_port, int_ctl_new); 2107 } 2108 } 2109 2110 /* finished? */ 2111#ifndef COM_MULTIPORT 2112 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 2113#endif /* COM_MULTIPORT */ 2114 return; 2115 } 2116} 2117 2118static int 2119sioioctl(dev, cmd, data, flag, td) 2120 dev_t dev; 2121 u_long cmd; 2122 caddr_t data; 2123 int flag; 2124 struct thread *td; 2125{ 2126 struct com_s *com; 2127 int error; 2128 int mynor; 2129 int s; 2130 struct tty *tp; 2131#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2132 u_long oldcmd; 2133 struct termios term; 2134#endif 2135 2136 mynor = minor(dev); 2137 com = com_addr(MINOR_TO_UNIT(mynor)); 2138 if (com == NULL || com->gone) 2139 return (ENODEV); 2140 if (mynor & CONTROL_MASK) { 2141 struct termios *ct; 2142 2143 switch (mynor & CONTROL_MASK) { 2144 case CONTROL_INIT_STATE: 2145 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 2146 break; 2147 case CONTROL_LOCK_STATE: 2148 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 2149 break; 2150 default: 2151 return (ENODEV); /* /dev/nodev */ 2152 } 2153 switch (cmd) { 2154 case TIOCSETA: 2155 error = suser_td(td); 2156 if (error != 0) 2157 return (error); 2158 *ct = *(struct termios *)data; 2159 return (0); 2160 case TIOCGETA: 2161 *(struct termios *)data = *ct; 2162 return (0); 2163 case TIOCGETD: 2164 *(int *)data = TTYDISC; 2165 return (0); 2166 case TIOCGWINSZ: 2167 bzero(data, sizeof(struct winsize)); 2168 return (0); 2169 default: 2170 return (ENOTTY); 2171 } 2172 } 2173 tp = com->tp; 2174#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2175 term = tp->t_termios; 2176 oldcmd = cmd; 2177 error = ttsetcompat(tp, &cmd, data, &term); 2178 if (error != 0) 2179 return (error); 2180 if (cmd != oldcmd) 2181 data = (caddr_t)&term; 2182#endif 2183 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2184 int cc; 2185 struct termios *dt = (struct termios *)data; 2186 struct termios *lt = mynor & CALLOUT_MASK 2187 ? &com->lt_out : &com->lt_in; 2188 2189 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2190 | (dt->c_iflag & ~lt->c_iflag); 2191 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2192 | (dt->c_oflag & ~lt->c_oflag); 2193 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2194 | (dt->c_cflag & ~lt->c_cflag); 2195 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2196 | (dt->c_lflag & ~lt->c_lflag); 2197 for (cc = 0; cc < NCCS; ++cc) 2198 if (lt->c_cc[cc] != 0) 2199 dt->c_cc[cc] = tp->t_cc[cc]; 2200 if (lt->c_ispeed != 0) 2201 dt->c_ispeed = tp->t_ispeed; 2202 if (lt->c_ospeed != 0) 2203 dt->c_ospeed = tp->t_ospeed; 2204 } 2205 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 2206 if (error != ENOIOCTL) 2207 return (error); 2208 s = spltty(); 2209 error = ttioctl(tp, cmd, data, flag); 2210 disc_optim(tp, &tp->t_termios, com); 2211 if (error != ENOIOCTL) { 2212 splx(s); 2213 return (error); 2214 } 2215 switch (cmd) { 2216 case TIOCSBRK: 2217 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2218 break; 2219 case TIOCCBRK: 2220 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2221 break; 2222 case TIOCSDTR: 2223 (void)commctl(com, TIOCM_DTR, DMBIS); 2224 break; 2225 case TIOCCDTR: 2226 (void)commctl(com, TIOCM_DTR, DMBIC); 2227 break; 2228 /* 2229 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2230 * changes get undone on the next call to comparam(). 2231 */ 2232 case TIOCMSET: 2233 (void)commctl(com, *(int *)data, DMSET); 2234 break; 2235 case TIOCMBIS: 2236 (void)commctl(com, *(int *)data, DMBIS); 2237 break; 2238 case TIOCMBIC: 2239 (void)commctl(com, *(int *)data, DMBIC); 2240 break; 2241 case TIOCMGET: 2242 *(int *)data = commctl(com, 0, DMGET); 2243 break; 2244 case TIOCMSDTRWAIT: 2245 /* must be root since the wait applies to following logins */ 2246 error = suser_td(td); 2247 if (error != 0) { 2248 splx(s); 2249 return (error); 2250 } 2251 com->dtr_wait = *(int *)data * hz / 100; 2252 break; 2253 case TIOCMGDTRWAIT: 2254 *(int *)data = com->dtr_wait * 100 / hz; 2255 break; 2256 case TIOCTIMESTAMP: 2257 com->do_timestamp = TRUE; 2258 *(struct timeval *)data = com->timestamp; 2259 break; 2260 case TIOCDCDTIMESTAMP: 2261 com->do_dcd_timestamp = TRUE; 2262 *(struct timeval *)data = com->dcd_timestamp; 2263 break; 2264 default: 2265 splx(s); 2266 error = pps_ioctl(cmd, data, &com->pps); 2267 if (error == ENODEV) 2268 error = ENOTTY; 2269 return (error); 2270 } 2271 splx(s); 2272 return (0); 2273} 2274 2275/* software interrupt handler for SWI_TTY */ 2276static void 2277siopoll(void *dummy) 2278{ 2279 int unit; 2280 2281 if (com_events == 0) 2282 return; 2283repeat: 2284 for (unit = 0; unit < sio_numunits; ++unit) { 2285 struct com_s *com; 2286 int incc; 2287 struct tty *tp; 2288 2289 com = com_addr(unit); 2290 if (com == NULL) 2291 continue; 2292 tp = com->tp; 2293 if (tp == NULL || com->gone) { 2294 /* 2295 * Discard any events related to never-opened or 2296 * going-away devices. 2297 */ 2298 mtx_lock_spin(&sio_lock); 2299 incc = com->iptr - com->ibuf; 2300 com->iptr = com->ibuf; 2301 if (com->state & CS_CHECKMSR) { 2302 incc += LOTS_OF_EVENTS; 2303 com->state &= ~CS_CHECKMSR; 2304 } 2305 com_events -= incc; 2306 mtx_unlock_spin(&sio_lock); 2307 continue; 2308 } 2309 if (com->iptr != com->ibuf) { 2310 mtx_lock_spin(&sio_lock); 2311 sioinput(com); 2312 mtx_unlock_spin(&sio_lock); 2313 } 2314 if (com->state & CS_CHECKMSR) { 2315 u_char delta_modem_status; 2316 2317 mtx_lock_spin(&sio_lock); 2318 delta_modem_status = com->last_modem_status 2319 ^ com->prev_modem_status; 2320 com->prev_modem_status = com->last_modem_status; 2321 com_events -= LOTS_OF_EVENTS; 2322 com->state &= ~CS_CHECKMSR; 2323 mtx_unlock_spin(&sio_lock); 2324 if (delta_modem_status & MSR_DCD) 2325 (*linesw[tp->t_line].l_modem) 2326 (tp, com->prev_modem_status & MSR_DCD); 2327 } 2328 if (com->state & CS_ODONE) { 2329 mtx_lock_spin(&sio_lock); 2330 com_events -= LOTS_OF_EVENTS; 2331 com->state &= ~CS_ODONE; 2332 mtx_unlock_spin(&sio_lock); 2333 if (!(com->state & CS_BUSY) 2334 && !(com->extra_state & CSE_BUSYCHECK)) { 2335 timeout(siobusycheck, com, hz / 100); 2336 com->extra_state |= CSE_BUSYCHECK; 2337 } 2338 (*linesw[tp->t_line].l_start)(tp); 2339 } 2340 if (com_events == 0) 2341 break; 2342 } 2343 if (com_events >= LOTS_OF_EVENTS) 2344 goto repeat; 2345} 2346 2347static int 2348comparam(tp, t) 2349 struct tty *tp; 2350 struct termios *t; 2351{ 2352 u_int cfcr; 2353 int cflag; 2354 struct com_s *com; 2355 int divisor; 2356 u_char dlbh; 2357 u_char dlbl; 2358 int s; 2359 int unit; 2360 2361 /* do historical conversions */ 2362 if (t->c_ispeed == 0) 2363 t->c_ispeed = t->c_ospeed; 2364 2365 /* check requested parameters */ 2366 divisor = ttspeedtab(t->c_ospeed, comspeedtab); 2367 if (divisor < 0 || (divisor > 0 && t->c_ispeed != t->c_ospeed)) 2368 return (EINVAL); 2369 2370 /* parameters are OK, convert them to the com struct and the device */ 2371 unit = DEV_TO_UNIT(tp->t_dev); 2372 com = com_addr(unit); 2373 if (com == NULL) 2374 return (ENODEV); 2375 s = spltty(); 2376 if (divisor == 0) 2377 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2378 else 2379 (void)commctl(com, TIOCM_DTR, DMBIS); 2380 cflag = t->c_cflag; 2381 switch (cflag & CSIZE) { 2382 case CS5: 2383 cfcr = CFCR_5BITS; 2384 break; 2385 case CS6: 2386 cfcr = CFCR_6BITS; 2387 break; 2388 case CS7: 2389 cfcr = CFCR_7BITS; 2390 break; 2391 default: 2392 cfcr = CFCR_8BITS; 2393 break; 2394 } 2395 if (cflag & PARENB) { 2396 cfcr |= CFCR_PENAB; 2397 if (!(cflag & PARODD)) 2398 cfcr |= CFCR_PEVEN; 2399 } 2400 if (cflag & CSTOPB) 2401 cfcr |= CFCR_STOPB; 2402 2403 if (com->hasfifo && divisor != 0) { 2404 /* 2405 * Use a fifo trigger level low enough so that the input 2406 * latency from the fifo is less than about 16 msec and 2407 * the total latency is less than about 30 msec. These 2408 * latencies are reasonable for humans. Serial comms 2409 * protocols shouldn't expect anything better since modem 2410 * latencies are larger. 2411 */ 2412 com->fifo_image = t->c_ospeed <= 4800 2413 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH; 2414#ifdef COM_ESP 2415 /* 2416 * The Hayes ESP card needs the fifo DMA mode bit set 2417 * in compatibility mode. If not, it will interrupt 2418 * for each character received. 2419 */ 2420 if (com->esp) 2421 com->fifo_image |= FIFO_DMA_MODE; 2422#endif 2423 sio_setreg(com, com_fifo, com->fifo_image); 2424 } 2425 2426 /* 2427 * This returns with interrupts disabled so that we can complete 2428 * the speed change atomically. Keeping interrupts disabled is 2429 * especially important while com_data is hidden. 2430 */ 2431 (void) siosetwater(com, t->c_ispeed); 2432 2433 if (divisor != 0) { 2434 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2435 /* 2436 * Only set the divisor registers if they would change, 2437 * since on some 16550 incompatibles (UMC8669F), setting 2438 * them while input is arriving them loses sync until 2439 * data stops arriving. 2440 */ 2441 dlbl = divisor & 0xFF; 2442 if (sio_getreg(com, com_dlbl) != dlbl) 2443 sio_setreg(com, com_dlbl, dlbl); 2444 dlbh = (u_int) divisor >> 8; 2445 if (sio_getreg(com, com_dlbh) != dlbh) 2446 sio_setreg(com, com_dlbh, dlbh); 2447 } 2448 2449 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2450 2451 if (!(tp->t_state & TS_TTSTOP)) 2452 com->state |= CS_TTGO; 2453 2454 if (cflag & CRTS_IFLOW) { 2455 if (com->st16650a) { 2456 sio_setreg(com, com_cfcr, 0xbf); 2457 sio_setreg(com, com_fifo, 2458 sio_getreg(com, com_fifo) | 0x40); 2459 } 2460 com->state |= CS_RTS_IFLOW; 2461 /* 2462 * If CS_RTS_IFLOW just changed from off to on, the change 2463 * needs to be propagated to MCR_RTS. This isn't urgent, 2464 * so do it later by calling comstart() instead of repeating 2465 * a lot of code from comstart() here. 2466 */ 2467 } else if (com->state & CS_RTS_IFLOW) { 2468 com->state &= ~CS_RTS_IFLOW; 2469 /* 2470 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2471 * on here, since comstart() won't do it later. 2472 */ 2473 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2474 if (com->st16650a) { 2475 sio_setreg(com, com_cfcr, 0xbf); 2476 sio_setreg(com, com_fifo, 2477 sio_getreg(com, com_fifo) & ~0x40); 2478 } 2479 } 2480 2481 2482 /* 2483 * Set up state to handle output flow control. 2484 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2485 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2486 */ 2487 com->state |= CS_ODEVREADY; 2488 com->state &= ~CS_CTS_OFLOW; 2489 if (cflag & CCTS_OFLOW) { 2490 com->state |= CS_CTS_OFLOW; 2491 if (!(com->last_modem_status & MSR_CTS)) 2492 com->state &= ~CS_ODEVREADY; 2493 if (com->st16650a) { 2494 sio_setreg(com, com_cfcr, 0xbf); 2495 sio_setreg(com, com_fifo, 2496 sio_getreg(com, com_fifo) | 0x80); 2497 } 2498 } else { 2499 if (com->st16650a) { 2500 sio_setreg(com, com_cfcr, 0xbf); 2501 sio_setreg(com, com_fifo, 2502 sio_getreg(com, com_fifo) & ~0x80); 2503 } 2504 } 2505 2506 sio_setreg(com, com_cfcr, com->cfcr_image); 2507 2508 /* XXX shouldn't call functions while intrs are disabled. */ 2509 disc_optim(tp, t, com); 2510 /* 2511 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2512 * unconditionally, but that defeated the careful discarding of 2513 * stale input in sioopen(). 2514 */ 2515 if (com->state >= (CS_BUSY | CS_TTGO)) 2516 siointr1(com); 2517 2518 mtx_unlock_spin(&sio_lock); 2519 splx(s); 2520 comstart(tp); 2521 if (com->ibufold != NULL) { 2522 free(com->ibufold, M_DEVBUF); 2523 com->ibufold = NULL; 2524 } 2525 return (0); 2526} 2527 2528/* 2529 * This function must be called with the sio_lock mutex released and will 2530 * return with it obtained. 2531 */ 2532static int 2533siosetwater(com, speed) 2534 struct com_s *com; 2535 speed_t speed; 2536{ 2537 int cp4ticks; 2538 u_char *ibuf; 2539 int ibufsize; 2540 struct tty *tp; 2541 2542 /* 2543 * Make the buffer size large enough to handle a softtty interrupt 2544 * latency of about 2 ticks without loss of throughput or data 2545 * (about 3 ticks if input flow control is not used or not honoured, 2546 * but a bit less for CS5-CS7 modes). 2547 */ 2548 cp4ticks = speed / 10 / hz * 4; 2549 for (ibufsize = 128; ibufsize < cp4ticks;) 2550 ibufsize <<= 1; 2551 if (ibufsize == com->ibufsize) { 2552 mtx_lock_spin(&sio_lock); 2553 return (0); 2554 } 2555 2556 /* 2557 * Allocate input buffer. The extra factor of 2 in the size is 2558 * to allow for an error byte for each input byte. 2559 */ 2560 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 2561 if (ibuf == NULL) { 2562 mtx_lock_spin(&sio_lock); 2563 return (ENOMEM); 2564 } 2565 2566 /* Initialize non-critical variables. */ 2567 com->ibufold = com->ibuf; 2568 com->ibufsize = ibufsize; 2569 tp = com->tp; 2570 if (tp != NULL) { 2571 tp->t_ififosize = 2 * ibufsize; 2572 tp->t_ispeedwat = (speed_t)-1; 2573 tp->t_ospeedwat = (speed_t)-1; 2574 } 2575 2576 /* 2577 * Read current input buffer, if any. Continue with interrupts 2578 * disabled. 2579 */ 2580 mtx_lock_spin(&sio_lock); 2581 if (com->iptr != com->ibuf) 2582 sioinput(com); 2583 2584 /*- 2585 * Initialize critical variables, including input buffer watermarks. 2586 * The external device is asked to stop sending when the buffer 2587 * exactly reaches high water, or when the high level requests it. 2588 * The high level is notified immediately (rather than at a later 2589 * clock tick) when this watermark is reached. 2590 * The buffer size is chosen so the watermark should almost never 2591 * be reached. 2592 * The low watermark is invisibly 0 since the buffer is always 2593 * emptied all at once. 2594 */ 2595 com->iptr = com->ibuf = ibuf; 2596 com->ibufend = ibuf + ibufsize; 2597 com->ierroff = ibufsize; 2598 com->ihighwater = ibuf + 3 * ibufsize / 4; 2599 return (0); 2600} 2601 2602static void 2603comstart(tp) 2604 struct tty *tp; 2605{ 2606 struct com_s *com; 2607 int s; 2608 int unit; 2609 2610 unit = DEV_TO_UNIT(tp->t_dev); 2611 com = com_addr(unit); 2612 if (com == NULL) 2613 return; 2614 s = spltty(); 2615 mtx_lock_spin(&sio_lock); 2616 if (tp->t_state & TS_TTSTOP) 2617 com->state &= ~CS_TTGO; 2618 else 2619 com->state |= CS_TTGO; 2620 if (tp->t_state & TS_TBLOCK) { 2621 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2622 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2623 } else { 2624 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2625 && com->state & CS_RTS_IFLOW) 2626 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2627 } 2628 mtx_unlock_spin(&sio_lock); 2629 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2630 ttwwakeup(tp); 2631 splx(s); 2632 return; 2633 } 2634 if (tp->t_outq.c_cc != 0) { 2635 struct lbq *qp; 2636 struct lbq *next; 2637 2638 if (!com->obufs[0].l_queued) { 2639 com->obufs[0].l_tail 2640 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2641 sizeof com->obuf1); 2642 com->obufs[0].l_next = NULL; 2643 com->obufs[0].l_queued = TRUE; 2644 mtx_lock_spin(&sio_lock); 2645 if (com->state & CS_BUSY) { 2646 qp = com->obufq.l_next; 2647 while ((next = qp->l_next) != NULL) 2648 qp = next; 2649 qp->l_next = &com->obufs[0]; 2650 } else { 2651 com->obufq.l_head = com->obufs[0].l_head; 2652 com->obufq.l_tail = com->obufs[0].l_tail; 2653 com->obufq.l_next = &com->obufs[0]; 2654 com->state |= CS_BUSY; 2655 } 2656 mtx_unlock_spin(&sio_lock); 2657 } 2658 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2659 com->obufs[1].l_tail 2660 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2661 sizeof com->obuf2); 2662 com->obufs[1].l_next = NULL; 2663 com->obufs[1].l_queued = TRUE; 2664 mtx_lock_spin(&sio_lock); 2665 if (com->state & CS_BUSY) { 2666 qp = com->obufq.l_next; 2667 while ((next = qp->l_next) != NULL) 2668 qp = next; 2669 qp->l_next = &com->obufs[1]; 2670 } else { 2671 com->obufq.l_head = com->obufs[1].l_head; 2672 com->obufq.l_tail = com->obufs[1].l_tail; 2673 com->obufq.l_next = &com->obufs[1]; 2674 com->state |= CS_BUSY; 2675 } 2676 mtx_unlock_spin(&sio_lock); 2677 } 2678 tp->t_state |= TS_BUSY; 2679 } 2680 mtx_lock_spin(&sio_lock); 2681 if (com->state >= (CS_BUSY | CS_TTGO)) 2682 siointr1(com); /* fake interrupt to start output */ 2683 mtx_unlock_spin(&sio_lock); 2684 ttwwakeup(tp); 2685 splx(s); 2686} 2687 2688static void 2689comstop(tp, rw) 2690 struct tty *tp; 2691 int rw; 2692{ 2693 struct com_s *com; 2694 2695 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2696 if (com == NULL || com->gone) 2697 return; 2698 mtx_lock_spin(&sio_lock); 2699 if (rw & FWRITE) { 2700 if (com->hasfifo) 2701#ifdef COM_ESP 2702 /* XXX avoid h/w bug. */ 2703 if (!com->esp) 2704#endif 2705 sio_setreg(com, com_fifo, 2706 FIFO_XMT_RST | com->fifo_image); 2707 com->obufs[0].l_queued = FALSE; 2708 com->obufs[1].l_queued = FALSE; 2709 if (com->state & CS_ODONE) 2710 com_events -= LOTS_OF_EVENTS; 2711 com->state &= ~(CS_ODONE | CS_BUSY); 2712 com->tp->t_state &= ~TS_BUSY; 2713 } 2714 if (rw & FREAD) { 2715 if (com->hasfifo) 2716#ifdef COM_ESP 2717 /* XXX avoid h/w bug. */ 2718 if (!com->esp) 2719#endif 2720 sio_setreg(com, com_fifo, 2721 FIFO_RCV_RST | com->fifo_image); 2722 com_events -= (com->iptr - com->ibuf); 2723 com->iptr = com->ibuf; 2724 } 2725 mtx_unlock_spin(&sio_lock); 2726 comstart(tp); 2727} 2728 2729static int 2730commctl(com, bits, how) 2731 struct com_s *com; 2732 int bits; 2733 int how; 2734{ 2735 int mcr; 2736 int msr; 2737 2738 if (how == DMGET) { 2739 bits = TIOCM_LE; /* XXX - always enabled while open */ 2740 mcr = com->mcr_image; 2741 if (mcr & MCR_DTR) 2742 bits |= TIOCM_DTR; 2743 if (mcr & MCR_RTS) 2744 bits |= TIOCM_RTS; 2745 msr = com->prev_modem_status; 2746 if (msr & MSR_CTS) 2747 bits |= TIOCM_CTS; 2748 if (msr & MSR_DCD) 2749 bits |= TIOCM_CD; 2750 if (msr & MSR_DSR) 2751 bits |= TIOCM_DSR; 2752 /* 2753 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2754 * more volatile by reading the modem status a lot. Perhaps 2755 * we should latch both bits until the status is read here. 2756 */ 2757 if (msr & (MSR_RI | MSR_TERI)) 2758 bits |= TIOCM_RI; 2759 return (bits); 2760 } 2761 mcr = 0; 2762 if (bits & TIOCM_DTR) 2763 mcr |= MCR_DTR; 2764 if (bits & TIOCM_RTS) 2765 mcr |= MCR_RTS; 2766 if (com->gone) 2767 return(0); 2768 mtx_lock_spin(&sio_lock); 2769 switch (how) { 2770 case DMSET: 2771 outb(com->modem_ctl_port, 2772 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2773 break; 2774 case DMBIS: 2775 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2776 break; 2777 case DMBIC: 2778 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2779 break; 2780 } 2781 mtx_unlock_spin(&sio_lock); 2782 return (0); 2783} 2784 2785static void 2786siosettimeout() 2787{ 2788 struct com_s *com; 2789 bool_t someopen; 2790 int unit; 2791 2792 /* 2793 * Set our timeout period to 1 second if no polled devices are open. 2794 * Otherwise set it to max(1/200, 1/hz). 2795 * Enable timeouts iff some device is open. 2796 */ 2797 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2798 sio_timeout = hz; 2799 someopen = FALSE; 2800 for (unit = 0; unit < sio_numunits; ++unit) { 2801 com = com_addr(unit); 2802 if (com != NULL && com->tp != NULL 2803 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2804 someopen = TRUE; 2805 if (com->poll || com->poll_output) { 2806 sio_timeout = hz > 200 ? hz / 200 : 1; 2807 break; 2808 } 2809 } 2810 } 2811 if (someopen) { 2812 sio_timeouts_until_log = hz / sio_timeout; 2813 sio_timeout_handle = timeout(comwakeup, (void *)NULL, 2814 sio_timeout); 2815 } else { 2816 /* Flush error messages, if any. */ 2817 sio_timeouts_until_log = 1; 2818 comwakeup((void *)NULL); 2819 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2820 } 2821} 2822 2823static void 2824comwakeup(chan) 2825 void *chan; 2826{ 2827 struct com_s *com; 2828 int unit; 2829 2830 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 2831 2832 /* 2833 * Recover from lost output interrupts. 2834 * Poll any lines that don't use interrupts. 2835 */ 2836 for (unit = 0; unit < sio_numunits; ++unit) { 2837 com = com_addr(unit); 2838 if (com != NULL && !com->gone 2839 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2840 mtx_lock_spin(&sio_lock); 2841 siointr1(com); 2842 mtx_unlock_spin(&sio_lock); 2843 } 2844 } 2845 2846 /* 2847 * Check for and log errors, but not too often. 2848 */ 2849 if (--sio_timeouts_until_log > 0) 2850 return; 2851 sio_timeouts_until_log = hz / sio_timeout; 2852 for (unit = 0; unit < sio_numunits; ++unit) { 2853 int errnum; 2854 2855 com = com_addr(unit); 2856 if (com == NULL) 2857 continue; 2858 if (com->gone) 2859 continue; 2860 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2861 u_int delta; 2862 u_long total; 2863 2864 mtx_lock_spin(&sio_lock); 2865 delta = com->delta_error_counts[errnum]; 2866 com->delta_error_counts[errnum] = 0; 2867 mtx_unlock_spin(&sio_lock); 2868 if (delta == 0) 2869 continue; 2870 total = com->error_counts[errnum] += delta; 2871 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2872 unit, delta, error_desc[errnum], 2873 delta == 1 ? "" : "s", total); 2874 } 2875 } 2876} 2877 2878static void 2879disc_optim(tp, t, com) 2880 struct tty *tp; 2881 struct termios *t; 2882 struct com_s *com; 2883{ 2884 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2885 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2886 && (!(t->c_iflag & PARMRK) 2887 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2888 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2889 && linesw[tp->t_line].l_rint == ttyinput) 2890 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2891 else 2892 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2893 com->hotchar = linesw[tp->t_line].l_hotchar; 2894} 2895 2896/* 2897 * Following are all routines needed for SIO to act as console 2898 */ 2899#include <sys/cons.h> 2900 2901struct siocnstate { 2902 u_char dlbl; 2903 u_char dlbh; 2904 u_char ier; 2905 u_char cfcr; 2906 u_char mcr; 2907}; 2908 2909#ifndef __alpha__ 2910static speed_t siocngetspeed __P((Port_t, struct speedtab *)); 2911#endif 2912static void siocnclose __P((struct siocnstate *sp, Port_t iobase)); 2913static void siocnopen __P((struct siocnstate *sp, Port_t iobase, int speed)); 2914static void siocntxwait __P((Port_t iobase)); 2915 2916#ifdef __alpha__ 2917int siocnattach __P((int port, int speed)); 2918int siogdbattach __P((int port, int speed)); 2919int siogdbgetc __P((void)); 2920void siogdbputc __P((int c)); 2921#else 2922static cn_probe_t siocnprobe; 2923static cn_init_t siocninit; 2924#endif 2925static cn_checkc_t siocncheckc; 2926static cn_getc_t siocngetc; 2927static cn_putc_t siocnputc; 2928 2929#ifdef __i386__ 2930CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, 2931 siocnputc, NULL); 2932#endif 2933 2934/* To get the GDB related variables */ 2935#if DDB > 0 2936#include <ddb/ddb.h> 2937#endif 2938 2939static void 2940siocntxwait(iobase) 2941 Port_t iobase; 2942{ 2943 int timo; 2944 2945 /* 2946 * Wait for any pending transmission to finish. Required to avoid 2947 * the UART lockup bug when the speed is changed, and for normal 2948 * transmits. 2949 */ 2950 timo = 100000; 2951 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2952 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2953 ; 2954} 2955 2956#ifndef __alpha__ 2957 2958/* 2959 * Read the serial port specified and try to figure out what speed 2960 * it's currently running at. We're assuming the serial port has 2961 * been initialized and is basicly idle. This routine is only intended 2962 * to be run at system startup. 2963 * 2964 * If the value read from the serial port doesn't make sense, return 0. 2965 */ 2966 2967static speed_t 2968siocngetspeed(iobase, table) 2969 Port_t iobase; 2970 struct speedtab *table; 2971{ 2972 int code; 2973 u_char dlbh; 2974 u_char dlbl; 2975 u_char cfcr; 2976 2977 cfcr = inb(iobase + com_cfcr); 2978 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2979 2980 dlbl = inb(iobase + com_dlbl); 2981 dlbh = inb(iobase + com_dlbh); 2982 2983 outb(iobase + com_cfcr, cfcr); 2984 2985 code = dlbh << 8 | dlbl; 2986 2987 for (; table->sp_speed != -1; table++) 2988 if (table->sp_code == code) 2989 return (table->sp_speed); 2990 2991 return (0); /* didn't match anything sane */ 2992} 2993 2994#endif 2995 2996static void 2997siocnopen(sp, iobase, speed) 2998 struct siocnstate *sp; 2999 Port_t iobase; 3000 int speed; 3001{ 3002 int divisor; 3003 u_char dlbh; 3004 u_char dlbl; 3005 3006 /* 3007 * Save all the device control registers except the fifo register 3008 * and set our default ones (cs8 -parenb speed=comdefaultrate). 3009 * We can't save the fifo register since it is read-only. 3010 */ 3011 sp->ier = inb(iobase + com_ier); 3012 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 3013 siocntxwait(iobase); 3014 sp->cfcr = inb(iobase + com_cfcr); 3015 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 3016 sp->dlbl = inb(iobase + com_dlbl); 3017 sp->dlbh = inb(iobase + com_dlbh); 3018 /* 3019 * Only set the divisor registers if they would change, since on 3020 * some 16550 incompatibles (Startech), setting them clears the 3021 * data input register. This also reduces the effects of the 3022 * UMC8669F bug. 3023 */ 3024 divisor = ttspeedtab(speed, comspeedtab); 3025 dlbl = divisor & 0xFF; 3026 if (sp->dlbl != dlbl) 3027 outb(iobase + com_dlbl, dlbl); 3028 dlbh = (u_int) divisor >> 8; 3029 if (sp->dlbh != dlbh) 3030 outb(iobase + com_dlbh, dlbh); 3031 outb(iobase + com_cfcr, CFCR_8BITS); 3032 sp->mcr = inb(iobase + com_mcr); 3033 /* 3034 * We don't want interrupts, but must be careful not to "disable" 3035 * them by clearing the MCR_IENABLE bit, since that might cause 3036 * an interrupt by floating the IRQ line. 3037 */ 3038 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 3039} 3040 3041static void 3042siocnclose(sp, iobase) 3043 struct siocnstate *sp; 3044 Port_t iobase; 3045{ 3046 /* 3047 * Restore the device control registers. 3048 */ 3049 siocntxwait(iobase); 3050 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 3051 if (sp->dlbl != inb(iobase + com_dlbl)) 3052 outb(iobase + com_dlbl, sp->dlbl); 3053 if (sp->dlbh != inb(iobase + com_dlbh)) 3054 outb(iobase + com_dlbh, sp->dlbh); 3055 outb(iobase + com_cfcr, sp->cfcr); 3056 /* 3057 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 3058 */ 3059 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 3060 outb(iobase + com_ier, sp->ier); 3061} 3062 3063#ifndef __alpha__ 3064 3065static void 3066siocnprobe(cp) 3067 struct consdev *cp; 3068{ 3069 speed_t boot_speed; 3070 u_char cfcr; 3071 int s, unit; 3072 struct siocnstate sp; 3073 3074 /* 3075 * Find our first enabled console, if any. If it is a high-level 3076 * console device, then initialize it and return successfully. 3077 * If it is a low-level console device, then initialize it and 3078 * return unsuccessfully. It must be initialized in both cases 3079 * for early use by console drivers and debuggers. Initializing 3080 * the hardware is not necessary in all cases, since the i/o 3081 * routines initialize it on the fly, but it is necessary if 3082 * input might arrive while the hardware is switched back to an 3083 * uninitialized state. We can't handle multiple console devices 3084 * yet because our low-level routines don't take a device arg. 3085 * We trust the user to set the console flags properly so that we 3086 * don't need to probe. 3087 */ 3088 cp->cn_pri = CN_DEAD; 3089 3090 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 3091 int flags; 3092 int disabled; 3093 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 3094 if (disabled) 3095 continue; 3096 } 3097 if (resource_int_value("sio", unit, "flags", &flags)) 3098 continue; 3099 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 3100 int port; 3101 Port_t iobase; 3102 3103 if (resource_int_value("sio", unit, "port", &port)) 3104 continue; 3105 iobase = port; 3106 s = spltty(); 3107 if (boothowto & RB_SERIAL) { 3108 boot_speed = siocngetspeed(iobase, comspeedtab); 3109 if (boot_speed) 3110 comdefaultrate = boot_speed; 3111 } 3112 3113 /* 3114 * Initialize the divisor latch. We can't rely on 3115 * siocnopen() to do this the first time, since it 3116 * avoids writing to the latch if the latch appears 3117 * to have the correct value. Also, if we didn't 3118 * just read the speed from the hardware, then we 3119 * need to set the speed in hardware so that 3120 * switching it later is null. 3121 */ 3122 cfcr = inb(iobase + com_cfcr); 3123 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 3124 outb(iobase + com_dlbl, 3125 COMBRD(comdefaultrate) & 0xff); 3126 outb(iobase + com_dlbh, 3127 (u_int) COMBRD(comdefaultrate) >> 8); 3128 outb(iobase + com_cfcr, cfcr); 3129 3130 siocnopen(&sp, iobase, comdefaultrate); 3131 3132 splx(s); 3133 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 3134 cp->cn_dev = makedev(CDEV_MAJOR, unit); 3135 cp->cn_pri = COM_FORCECONSOLE(flags) 3136 || boothowto & RB_SERIAL 3137 ? CN_REMOTE : CN_NORMAL; 3138 siocniobase = iobase; 3139 siocnunit = unit; 3140 } 3141 if (COM_DEBUGGER(flags)) { 3142 printf("sio%d: gdb debugging port\n", unit); 3143 siogdbiobase = iobase; 3144 siogdbunit = unit; 3145#if DDB > 0 3146 gdbdev = makedev(CDEV_MAJOR, unit); 3147 gdb_getc = siocngetc; 3148 gdb_putc = siocnputc; 3149#endif 3150 } 3151 } 3152 } 3153#ifdef __i386__ 3154#if DDB > 0 3155 /* 3156 * XXX Ugly Compatability. 3157 * If no gdb port has been specified, set it to be the console 3158 * as some configuration files don't specify the gdb port. 3159 */ 3160 if (gdbdev == NODEV && (boothowto & RB_GDB)) { 3161 printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 3162 siocnunit); 3163 printf("Set flag 0x80 on desired GDB port in your\n"); 3164 printf("configuration file (currently sio only).\n"); 3165 siogdbiobase = siocniobase; 3166 siogdbunit = siocnunit; 3167 gdbdev = makedev(CDEV_MAJOR, siocnunit); 3168 gdb_getc = siocngetc; 3169 gdb_putc = siocnputc; 3170 } 3171#endif 3172#endif 3173} 3174 3175static void 3176siocninit(cp) 3177 struct consdev *cp; 3178{ 3179 comconsole = DEV_TO_UNIT(cp->cn_dev); 3180} 3181 3182#endif 3183 3184#ifdef __alpha__ 3185 3186CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 3187 3188int 3189siocnattach(port, speed) 3190 int port; 3191 int speed; 3192{ 3193 int s; 3194 u_char cfcr; 3195 struct siocnstate sp; 3196 3197 siocniobase = port; 3198 comdefaultrate = speed; 3199 sio_consdev.cn_pri = CN_NORMAL; 3200 sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0); 3201 3202 s = spltty(); 3203 3204 /* 3205 * Initialize the divisor latch. We can't rely on 3206 * siocnopen() to do this the first time, since it 3207 * avoids writing to the latch if the latch appears 3208 * to have the correct value. Also, if we didn't 3209 * just read the speed from the hardware, then we 3210 * need to set the speed in hardware so that 3211 * switching it later is null. 3212 */ 3213 cfcr = inb(siocniobase + com_cfcr); 3214 outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 3215 outb(siocniobase + com_dlbl, 3216 COMBRD(comdefaultrate) & 0xff); 3217 outb(siocniobase + com_dlbh, 3218 (u_int) COMBRD(comdefaultrate) >> 8); 3219 outb(siocniobase + com_cfcr, cfcr); 3220 3221 siocnopen(&sp, siocniobase, comdefaultrate); 3222 splx(s); 3223 3224 cn_tab = &sio_consdev; 3225 return (0); 3226} 3227 3228int 3229siogdbattach(port, speed) 3230 int port; 3231 int speed; 3232{ 3233 int s; 3234 u_char cfcr; 3235 struct siocnstate sp; 3236 int unit = 1; /* XXX !!! */ 3237 3238 siogdbiobase = port; 3239 gdbdefaultrate = speed; 3240 3241 printf("sio%d: gdb debugging port\n", unit); 3242 siogdbunit = unit; 3243#if DDB > 0 3244 gdbdev = makedev(CDEV_MAJOR, unit); 3245 gdb_getc = siocngetc; 3246 gdb_putc = siocnputc; 3247#endif 3248 3249 s = spltty(); 3250 3251 /* 3252 * Initialize the divisor latch. We can't rely on 3253 * siocnopen() to do this the first time, since it 3254 * avoids writing to the latch if the latch appears 3255 * to have the correct value. Also, if we didn't 3256 * just read the speed from the hardware, then we 3257 * need to set the speed in hardware so that 3258 * switching it later is null. 3259 */ 3260 cfcr = inb(siogdbiobase + com_cfcr); 3261 outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 3262 outb(siogdbiobase + com_dlbl, 3263 COMBRD(gdbdefaultrate) & 0xff); 3264 outb(siogdbiobase + com_dlbh, 3265 (u_int) COMBRD(gdbdefaultrate) >> 8); 3266 outb(siogdbiobase + com_cfcr, cfcr); 3267 3268 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3269 splx(s); 3270 3271 return (0); 3272} 3273 3274#endif 3275 3276static int 3277siocncheckc(dev) 3278 dev_t dev; 3279{ 3280 int c; 3281 Port_t iobase; 3282 int s; 3283 struct siocnstate sp; 3284 3285 if (minor(dev) == siogdbunit) 3286 iobase = siogdbiobase; 3287 else 3288 iobase = siocniobase; 3289 s = spltty(); 3290 siocnopen(&sp, iobase, comdefaultrate); 3291 if (inb(iobase + com_lsr) & LSR_RXRDY) 3292 c = inb(iobase + com_data); 3293 else 3294 c = -1; 3295 siocnclose(&sp, iobase); 3296 splx(s); 3297 return (c); 3298} 3299 3300 3301int 3302siocngetc(dev) 3303 dev_t dev; 3304{ 3305 int c; 3306 Port_t iobase; 3307 int s; 3308 struct siocnstate sp; 3309 3310 if (minor(dev) == siogdbunit) 3311 iobase = siogdbiobase; 3312 else 3313 iobase = siocniobase; 3314 s = spltty(); 3315 siocnopen(&sp, iobase, comdefaultrate); 3316 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3317 ; 3318 c = inb(iobase + com_data); 3319 siocnclose(&sp, iobase); 3320 splx(s); 3321 return (c); 3322} 3323 3324void 3325siocnputc(dev, c) 3326 dev_t dev; 3327 int c; 3328{ 3329 int s; 3330 struct siocnstate sp; 3331 Port_t iobase; 3332 3333 if (minor(dev) == siogdbunit) 3334 iobase = siogdbiobase; 3335 else 3336 iobase = siocniobase; 3337 s = spltty(); 3338 siocnopen(&sp, iobase, comdefaultrate); 3339 siocntxwait(iobase); 3340 outb(iobase + com_data, c); 3341 siocnclose(&sp, iobase); 3342 splx(s); 3343} 3344 3345#ifdef __alpha__ 3346int 3347siogdbgetc() 3348{ 3349 int c; 3350 Port_t iobase; 3351 int s; 3352 struct siocnstate sp; 3353 3354 iobase = siogdbiobase; 3355 s = spltty(); 3356 siocnopen(&sp, iobase, gdbdefaultrate); 3357 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3358 ; 3359 c = inb(iobase + com_data); 3360 siocnclose(&sp, iobase); 3361 splx(s); 3362 return (c); 3363} 3364 3365void 3366siogdbputc(c) 3367 int c; 3368{ 3369 int s; 3370 struct siocnstate sp; 3371 3372 s = spltty(); 3373 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3374 siocntxwait(siogdbiobase); 3375 outb(siogdbiobase + com_data, c); 3376 siocnclose(&sp, siogdbiobase); 3377 splx(s); 3378} 3379#endif 3380 3381DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3382DRIVER_MODULE(sio, acpi, sio_isa_driver, sio_devclass, 0, 0); 3383#if NCARD > 0 3384DRIVER_MODULE(sio, pccard, sio_pccard_driver, sio_devclass, 0, 0); 3385#endif 3386#if NPCI > 0 3387DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3388DRIVER_MODULE(sio, cardbus, sio_pci_driver, sio_devclass, 0, 0); 3389#endif 3390