sio.c revision 89463
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * $FreeBSD: head/sys/dev/sio/sio.c 89463 2002-01-17 16:16:51Z imp $ 3451078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3551078Speter * from: i386/isa sio.c,v 1.234 3651078Speter */ 3751078Speter 3851078Speter#include "opt_comconsole.h" 3951078Speter#include "opt_compat.h" 4051078Speter#include "opt_ddb.h" 4151078Speter#include "opt_sio.h" 4251078Speter 4351078Speter/* 4451078Speter * Serial driver, based on 386BSD-0.1 com driver. 4551078Speter * Mostly rewritten to use pseudo-DMA. 4651078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4751078Speter * COM driver, based on HP dca driver. 4851078Speter * 4951078Speter * Changes for PC-Card integration: 5051078Speter * - Added PC-Card driver table and handlers 5151078Speter */ 5251078Speter#include <sys/param.h> 5376166Smarkm#include <sys/systm.h> 5465822Sjhb#include <sys/bus.h> 5551078Speter#include <sys/conf.h> 5651078Speter#include <sys/dkstat.h> 5751078Speter#include <sys/fcntl.h> 5851078Speter#include <sys/interrupt.h> 5951078Speter#include <sys/kernel.h> 6076166Smarkm#include <sys/lock.h> 6176166Smarkm#include <sys/malloc.h> 6276166Smarkm#include <sys/module.h> 6376166Smarkm#include <sys/mutex.h> 6476166Smarkm#include <sys/proc.h> 6576166Smarkm#include <sys/reboot.h> 6676166Smarkm#include <sys/sysctl.h> 6751078Speter#include <sys/syslog.h> 6876166Smarkm#include <sys/tty.h> 6960471Snyan#include <machine/bus_pio.h> 7051078Speter#include <machine/bus.h> 7151078Speter#include <sys/rman.h> 7258377Sphk#include <sys/timetc.h> 7351078Speter#include <sys/timepps.h> 7451078Speter 7586909Simp#include <isa/isavar.h> 7686909Simp 7751078Speter#include <machine/resource.h> 7851078Speter 7985302Simp#include <dev/sio/sioreg.h> 8085365Simp#include <dev/sio/siovar.h> 8151078Speter 8251078Speter#ifdef COM_ESP 8377726Sjoerg#include <dev/ic/esp.h> 8451078Speter#endif 8577726Sjoerg#include <dev/ic/ns16550.h> 8651078Speter 8751078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 8851078Speter 8951078Speter#define CALLOUT_MASK 0x80 9051078Speter#define CONTROL_MASK 0x60 9151078Speter#define CONTROL_INIT_STATE 0x20 9251078Speter#define CONTROL_LOCK_STATE 0x40 9351078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 9451078Speter#define MINOR_MAGIC_MASK (CALLOUT_MASK | CONTROL_MASK) 9551078Speter#define MINOR_TO_UNIT(mynor) ((mynor) & ~MINOR_MAGIC_MASK) 9651078Speter 9751078Speter#ifdef COM_MULTIPORT 9851078Speter/* checks in flags for multiport and which is multiport "master chip" 9951078Speter * for a given card 10051078Speter */ 10151078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 10251078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 10351078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 10451078Speter#endif /* COM_MULTIPORT */ 10551078Speter 10651078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 10751078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 10851078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 10951078Speter#define COM_DEBUGGER(flags) ((flags) & 0x80) 11051078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 11151078Speter#define COM_NOFIFO(flags) ((flags) & 0x02) 11251078Speter#define COM_ST16650A(flags) ((flags) & 0x20000) 11386909Simp#define COM_C_NOPROBE (0x40000) 11486909Simp#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 11551078Speter#define COM_C_IIR_TXRDYBUG (0x80000) 11651078Speter#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 11751078Speter#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 11851078Speter 11951078Speter#define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 12051078Speter 12160471Snyan#define sio_getreg(com, off) \ 12260471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 12360471Snyan#define sio_setreg(com, off, value) \ 12460471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 12560471Snyan 12651078Speter/* 12751078Speter * com state bits. 12851078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 12951078Speter * than the other bits so that they can be tested as a group without masking 13051078Speter * off the low bits. 13151078Speter * 13251078Speter * The following com and tty flags correspond closely: 13351078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 13453344Speter * comstop()) 13551078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 13651078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 13751078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 13851078Speter * TS_FLUSH is not used. 13951078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 14051078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 14151078Speter */ 14251078Speter#define CS_BUSY 0x80 /* output in progress */ 14351078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 14451078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 14551078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 14651078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 14751078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 14851078Speter#define CS_ODONE 4 /* output completed */ 14951078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 15051078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 15151078Speter 15251078Speterstatic char const * const error_desc[] = { 15351078Speter#define CE_OVERRUN 0 15451078Speter "silo overflow", 15551078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 15651078Speter "interrupt-level buffer overflow", 15751078Speter#define CE_TTY_BUF_OVERFLOW 2 15851078Speter "tty-level buffer overflow", 15951078Speter}; 16051078Speter 16186909Simp#define CE_NTYPES 3 16251078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 16351078Speter 16486909Simp/* types. XXX - should be elsewhere */ 16586909Simptypedef u_int Port_t; /* hardware port */ 16686909Simptypedef u_char bool_t; /* boolean */ 16786909Simp 16886909Simp/* queue of linear buffers */ 16986909Simpstruct lbq { 17086909Simp u_char *l_head; /* next char to process */ 17186909Simp u_char *l_tail; /* one past the last char to process */ 17286909Simp struct lbq *l_next; /* next in queue */ 17386909Simp bool_t l_queued; /* nonzero if queued */ 17486909Simp}; 17586909Simp 17686909Simp/* com device structure */ 17786909Simpstruct com_s { 17886909Simp u_int flags; /* Copy isa device flags */ 17986909Simp u_char state; /* miscellaneous flag bits */ 18086909Simp bool_t active_out; /* nonzero if the callout device is open */ 18186909Simp u_char cfcr_image; /* copy of value written to CFCR */ 18251078Speter#ifdef COM_ESP 18386909Simp bool_t esp; /* is this unit a hayes esp board? */ 18486909Simp#endif 18586909Simp u_char extra_state; /* more flag bits, separate for order trick */ 18686909Simp u_char fifo_image; /* copy of value written to FIFO */ 18786909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 18886909Simp bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 18986909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 19086909Simp u_char mcr_image; /* copy of value written to MCR */ 19186909Simp#ifdef COM_MULTIPORT 19286909Simp bool_t multiport; /* is this unit part of a multiport device? */ 19386909Simp#endif /* COM_MULTIPORT */ 19486909Simp bool_t no_irq; /* nonzero if irq is not attached */ 19586909Simp bool_t gone; /* hardware disappeared */ 19686909Simp bool_t poll; /* nonzero if polling is required */ 19786909Simp bool_t poll_output; /* nonzero if polling for output is required */ 19886909Simp int unit; /* unit number */ 19986909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 20086909Simp u_int tx_fifo_size; 20186909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 20286909Simp 20386909Simp /* 20486909Simp * The high level of the driver never reads status registers directly 20586909Simp * because there would be too many side effects to handle conveniently. 20686909Simp * Instead, it reads copies of the registers stored here by the 20786909Simp * interrupt handler. 20886909Simp */ 20986909Simp u_char last_modem_status; /* last MSR read by intr handler */ 21086909Simp u_char prev_modem_status; /* last MSR handled by high level */ 21186909Simp 21286909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 21386909Simp u_char *ibuf; /* start of input buffer */ 21486909Simp u_char *ibufend; /* end of input buffer */ 21586909Simp u_char *ibufold; /* old input buffer, to be freed */ 21686909Simp u_char *ihighwater; /* threshold in input buffer */ 21786909Simp u_char *iptr; /* next free spot in input buffer */ 21886909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 21986909Simp int ierroff; /* offset of error bytes in ibuf */ 22086909Simp 22186909Simp struct lbq obufq; /* head of queue of output buffers */ 22286909Simp struct lbq obufs[2]; /* output buffers */ 22386909Simp 22486909Simp bus_space_tag_t bst; 22586909Simp bus_space_handle_t bsh; 22686909Simp 22786909Simp Port_t data_port; /* i/o ports */ 22886909Simp#ifdef COM_ESP 22986909Simp Port_t esp_port; 23086909Simp#endif 23186909Simp Port_t int_id_port; 23286909Simp Port_t modem_ctl_port; 23386909Simp Port_t line_status_port; 23486909Simp Port_t modem_status_port; 23586909Simp Port_t intr_ctl_port; /* Ports of IIR register */ 23686909Simp 23786909Simp struct tty *tp; /* cross reference */ 23886909Simp 23986909Simp /* Initial state. */ 24086909Simp struct termios it_in; /* should be in struct tty */ 24186909Simp struct termios it_out; 24286909Simp 24386909Simp /* Lock state. */ 24486909Simp struct termios lt_in; /* should be in struct tty */ 24586909Simp struct termios lt_out; 24686909Simp 24786909Simp bool_t do_timestamp; 24886909Simp bool_t do_dcd_timestamp; 24986909Simp struct timeval timestamp; 25086909Simp struct timeval dcd_timestamp; 25186909Simp struct pps_state pps; 25286909Simp 25386909Simp u_long bytes_in; /* statistics */ 25486909Simp u_long bytes_out; 25586909Simp u_int delta_error_counts[CE_NTYPES]; 25686909Simp u_long error_counts[CE_NTYPES]; 25786909Simp 25886909Simp struct resource *irqres; 25986909Simp struct resource *ioportres; 26086909Simp void *cookie; 26186909Simp dev_t devs[6]; 26286909Simp 26386909Simp /* 26486909Simp * Data area for output buffers. Someday we should build the output 26586909Simp * buffer queue without copying data. 26686909Simp */ 26786909Simp u_char obuf1[256]; 26886909Simp u_char obuf2[256]; 26986909Simp}; 27086909Simp 27186909Simp#ifdef COM_ESP 27251078Speterstatic int espattach __P((struct com_s *com, Port_t esp_port)); 27351078Speter#endif 27451078Speter 27551078Speterstatic timeout_t siobusycheck; 27651078Speterstatic timeout_t siodtrwakeup; 27751078Speterstatic void comhardclose __P((struct com_s *com)); 27851078Speterstatic void sioinput __P((struct com_s *com)); 27951078Speterstatic void siointr1 __P((struct com_s *com)); 28051078Speterstatic void siointr __P((void *arg)); 28151078Speterstatic int commctl __P((struct com_s *com, int bits, int how)); 28251078Speterstatic int comparam __P((struct tty *tp, struct termios *t)); 28367551Sjhbstatic void siopoll __P((void *)); 28451078Speterstatic void siosettimeout __P((void)); 28565605Sjhbstatic int siosetwater __P((struct com_s *com, speed_t speed)); 28651078Speterstatic void comstart __P((struct tty *tp)); 28751654Sphkstatic void comstop __P((struct tty *tp, int rw)); 28851078Speterstatic timeout_t comwakeup; 28951078Speterstatic void disc_optim __P((struct tty *tp, struct termios *t, 29051078Speter struct com_s *com)); 29151078Speter 29285365Simpchar sio_driver_name[] = "sio"; 29370174Sjhbstatic struct mtx sio_lock; 29470174Sjhbstatic int sio_inited; 29551078Speter 29651078Speter/* table and macro for fast conversion from a unit number to its com struct */ 29785365Simpdevclass_t sio_devclass; 29851078Speter#define com_addr(unit) ((struct com_s *) \ 29986909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 30051078Speter 30151078Speterstatic d_open_t sioopen; 30251078Speterstatic d_close_t sioclose; 30351078Speterstatic d_read_t sioread; 30451078Speterstatic d_write_t siowrite; 30551078Speterstatic d_ioctl_t sioioctl; 30651078Speter 30751078Speter#define CDEV_MAJOR 28 30851078Speterstatic struct cdevsw sio_cdevsw = { 30951078Speter /* open */ sioopen, 31051078Speter /* close */ sioclose, 31151078Speter /* read */ sioread, 31251078Speter /* write */ siowrite, 31351078Speter /* ioctl */ sioioctl, 31451654Sphk /* poll */ ttypoll, 31551078Speter /* mmap */ nommap, 31651078Speter /* strategy */ nostrategy, 31785365Simp /* name */ sio_driver_name, 31851078Speter /* maj */ CDEV_MAJOR, 31951078Speter /* dump */ nodump, 32051078Speter /* psize */ nopsize, 32172521Sjlemon /* flags */ D_TTY | D_KQFILTER, 32272521Sjlemon /* kqfilter */ ttykqfilter, 32351078Speter}; 32451078Speter 32551078Speterint comconsole = -1; 32651078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 32751078Speter#ifdef __alpha__ 32851078Speterstatic volatile speed_t gdbdefaultrate = CONSPEED; 32951078Speter#endif 33051078Speterstatic u_int com_events; /* input chars + weighted output completions */ 33151078Speterstatic Port_t siocniobase; 33266230Sjhb#ifndef __alpha__ 33351078Speterstatic int siocnunit; 33466230Sjhb#endif 33551078Speterstatic Port_t siogdbiobase; 33651078Speterstatic int siogdbunit = -1; 33772238Sjhbstatic void *sio_slow_ih; 33872238Sjhbstatic void *sio_fast_ih; 33951078Speterstatic int sio_timeout; 34051078Speterstatic int sio_timeouts_until_log; 34151078Speterstatic struct callout_handle sio_timeout_handle 34251078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 34353344Speterstatic int sio_numunits; 34451078Speter 34551078Speterstatic struct speedtab comspeedtab[] = { 34651078Speter { 0, 0 }, 34751078Speter { 50, COMBRD(50) }, 34851078Speter { 75, COMBRD(75) }, 34951078Speter { 110, COMBRD(110) }, 35051078Speter { 134, COMBRD(134) }, 35151078Speter { 150, COMBRD(150) }, 35251078Speter { 200, COMBRD(200) }, 35351078Speter { 300, COMBRD(300) }, 35451078Speter { 600, COMBRD(600) }, 35551078Speter { 1200, COMBRD(1200) }, 35651078Speter { 1800, COMBRD(1800) }, 35751078Speter { 2400, COMBRD(2400) }, 35851078Speter { 4800, COMBRD(4800) }, 35951078Speter { 9600, COMBRD(9600) }, 36051078Speter { 19200, COMBRD(19200) }, 36184103Sjlemon { 28800, COMBRD(28800) }, 36251078Speter { 38400, COMBRD(38400) }, 36351078Speter { 57600, COMBRD(57600) }, 36451078Speter { 115200, COMBRD(115200) }, 36551078Speter { -1, -1 } 36651078Speter}; 36751078Speter 36851078Speter#ifdef COM_ESP 36951078Speter/* XXX configure this properly. */ 37086909Simp/* XXX quite broken for new-bus. */ 37151078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 37251078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 37351078Speter#endif 37451078Speter 37551078Speter/* 37651078Speter * handle sysctl read/write requests for console speed 37751078Speter * 37851078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 37951078Speter * also set the initial and lock values for the /dev/ttyXX device 38051078Speter * if there is one associated with the console. Finally, if the /dev/tty 38151078Speter * device has already been open, change the speed on the open running port 38251078Speter * itself. 38351078Speter */ 38451078Speter 38551078Speterstatic int 38662573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 38751078Speter{ 38851078Speter int error, s; 38951078Speter speed_t newspeed; 39051078Speter struct com_s *com; 39151078Speter struct tty *tp; 39251078Speter 39351078Speter newspeed = comdefaultrate; 39451078Speter 39551078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 39651078Speter if (error || !req->newptr) 39751078Speter return (error); 39851078Speter 39951078Speter comdefaultrate = newspeed; 40051078Speter 40151078Speter if (comconsole < 0) /* serial console not selected? */ 40251078Speter return (0); 40351078Speter 40451078Speter com = com_addr(comconsole); 40557915Simp if (com == NULL) 40651078Speter return (ENXIO); 40751078Speter 40851078Speter /* 40951078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 41051078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 41151078Speter * speed changes) 41251078Speter */ 41351078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 41451078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 41551078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 41651078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 41751078Speter 41851078Speter /* 41951078Speter * if we're open, change the running rate too 42051078Speter */ 42151078Speter tp = com->tp; 42251078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 42351078Speter tp->t_termios.c_ispeed = 42451078Speter tp->t_termios.c_ospeed = comdefaultrate; 42551078Speter s = spltty(); 42651078Speter error = comparam(tp, &tp->t_termios); 42751078Speter splx(s); 42851078Speter } 42951078Speter return error; 43051078Speter} 43151078Speter 43251078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 43351078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 43451078Speter 43586909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 43686909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 43786909Simp 43886909Simp/* 43986909Simp * Unload the driver and clear the table. 44086909Simp * XXX this is mostly wrong. 44186909Simp * XXX TODO: 44286909Simp * This is usually called when the card is ejected, but 44386909Simp * can be caused by a modunload of a controller driver. 44486909Simp * The idea is to reset the driver's view of the device 44586909Simp * and ensure that any driver entry points such as 44686909Simp * read and write do not hang. 44786909Simp */ 44885365Simpint 44985365Simpsiodetach(dev) 45052471Simp device_t dev; 45151078Speter{ 45251078Speter struct com_s *com; 45365131Sphk int i; 45451078Speter 45552471Simp com = (struct com_s *) device_get_softc(dev); 45657915Simp if (com == NULL) { 45752471Simp device_printf(dev, "NULL com in siounload\n"); 45854386Simp return (0); 45951078Speter } 46054386Simp com->gone = 1; 46165131Sphk for (i = 0 ; i < 6; i++) 46265131Sphk destroy_dev(com->devs[i]); 46354386Simp if (com->irqres) { 46454386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 46554386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 46654386Simp } 46754386Simp if (com->ioportres) 46854386Simp bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres); 46951078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 47057915Simp device_printf(dev, "still open, forcing close\n"); 47177750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 47251078Speter com->tp->t_gen++; 47351078Speter ttyclose(com->tp); 47451078Speter ttwakeup(com->tp); 47551078Speter ttwwakeup(com->tp); 47651078Speter } else { 47751078Speter if (com->ibuf != NULL) 47851078Speter free(com->ibuf, M_DEVBUF); 47986909Simp device_set_softc(dev, NULL); 48086909Simp free(com, M_DEVBUF); 48151078Speter } 48253978Simp return (0); 48351078Speter} 48451078Speter 48585365Simpint 48685365Simpsioprobe(dev, xrid, noprobe) 48758885Simp device_t dev; 48858885Simp int xrid; 48985365Simp int noprobe; 49051078Speter{ 49153344Speter#if 0 49251078Speter static bool_t already_init; 49353344Speter device_t xdev; 49453344Speter#endif 49560471Snyan struct com_s *com; 49651078Speter bool_t failures[10]; 49751078Speter int fn; 49851078Speter device_t idev; 49951078Speter Port_t iobase; 50051078Speter intrmask_t irqmap[4]; 50151078Speter intrmask_t irqs; 50251078Speter u_char mcr_image; 50351078Speter int result; 50454206Speter u_long xirq; 50551088Speter u_int flags = device_get_flags(dev); 50651078Speter int rid; 50751078Speter struct resource *port; 50851078Speter 50958885Simp rid = xrid; 51051078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 51151078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 51251078Speter if (!port) 51357915Simp return (ENXIO); 51451078Speter 51586909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 51686909Simp if (com == NULL) 51786909Simp return (ENOMEM); 51886909Simp device_set_softc(dev, com); 51960471Snyan com->bst = rman_get_bustag(port); 52060471Snyan com->bsh = rman_get_bushandle(port); 52160471Snyan 52285209Sjhb while (sio_inited != 2) 52385209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 52485365Simp mtx_init(&sio_lock, sio_driver_name, (comconsole != -1) ? 52585209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 52685209Sjhb atomic_store_rel_int(&sio_inited, 2); 52785209Sjhb } 52870174Sjhb 52953344Speter#if 0 53053344Speter /* 53153344Speter * XXX this is broken - when we are first called, there are no 53253344Speter * previously configured IO ports. We could hard code 53353344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 53453344Speter * This code has been doing nothing since the conversion since 53553344Speter * "count" is zero the first time around. 53653344Speter */ 53751078Speter if (!already_init) { 53851078Speter /* 53951078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 54051078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 54151078Speter * from any used port that shares the interrupt vector. 54251078Speter * XXX the gate enable is elsewhere for some multiports. 54351078Speter */ 54451078Speter device_t *devs; 54553344Speter int count, i, xioport; 54651078Speter 54751078Speter devclass_get_devices(sio_devclass, &devs, &count); 54851078Speter for (i = 0; i < count; i++) { 54951078Speter xdev = devs[i]; 55054194Speter if (device_is_enabled(xdev) && 55154194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 55254194Speter NULL) == 0) 55353344Speter outb(xioport + com_mcr, 0); 55451078Speter } 55551078Speter free(devs, M_TEMP); 55651078Speter already_init = TRUE; 55751078Speter } 55853344Speter#endif 55951078Speter 56051078Speter if (COM_LLCONSOLE(flags)) { 56151078Speter printf("sio%d: reserved for low-level i/o\n", 56251078Speter device_get_unit(dev)); 56356788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 56486909Simp device_set_softc(dev, NULL); 56586909Simp free(com, M_DEVBUF); 56651078Speter return (ENXIO); 56751078Speter } 56851078Speter 56951078Speter /* 57051078Speter * If the device is on a multiport card and has an AST/4 57151078Speter * compatible interrupt control register, initialize this 57251078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 57351078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 57451078Speter * Point idev to the device struct giving the correct id_irq. 57551078Speter * This is the struct for the master device if there is one. 57651078Speter */ 57751078Speter idev = dev; 57851078Speter mcr_image = MCR_IENABLE; 57951078Speter#ifdef COM_MULTIPORT 58057234Sbde if (COM_ISMULTIPORT(flags)) { 58154206Speter Port_t xiobase; 58254206Speter u_long io; 58354206Speter 58451078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 58551078Speter if (idev == NULL) { 58651078Speter printf("sio%d: master device %d not configured\n", 58751078Speter device_get_unit(dev), COM_MPMASTER(flags)); 58851078Speter idev = dev; 58951078Speter } 59057234Sbde if (!COM_NOTAST4(flags)) { 59157234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 59257234Sbde NULL) == 0) { 59357234Sbde xiobase = io; 59457234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 59557234Sbde NULL, NULL) == 0) 59657234Sbde outb(xiobase + com_scr, 0x80); 59757234Sbde else 59857234Sbde outb(xiobase + com_scr, 0); 59957234Sbde } 60057234Sbde mcr_image = 0; 60151078Speter } 60251078Speter } 60351078Speter#endif /* COM_MULTIPORT */ 60454194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 60551078Speter mcr_image = 0; 60651078Speter 60751078Speter bzero(failures, sizeof failures); 60851078Speter iobase = rman_get_start(port); 60951078Speter 61051078Speter /* 61151078Speter * We don't want to get actual interrupts, just masked ones. 61251078Speter * Interrupts from this line should already be masked in the ICU, 61351078Speter * but mask them in the processor as well in case there are some 61451078Speter * (misconfigured) shared interrupts. 61551078Speter */ 61672200Sbmilekic mtx_lock_spin(&sio_lock); 61751078Speter/* EXTRA DELAY? */ 61851078Speter 61951078Speter /* 62051078Speter * Initialize the speed and the word size and wait long enough to 62151078Speter * drain the maximum of 16 bytes of junk in device output queues. 62251078Speter * The speed is undefined after a master reset and must be set 62351078Speter * before relying on anything related to output. There may be 62451078Speter * junk after a (very fast) soft reboot and (apparently) after 62551078Speter * master reset. 62651078Speter * XXX what about the UART bug avoided by waiting in comparam()? 62751078Speter * We don't want to to wait long enough to drain at 2 bps. 62851078Speter */ 62951078Speter if (iobase == siocniobase) 63051078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 63151078Speter else { 63260471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 63360471Snyan sio_setreg(com, com_dlbl, COMBRD(SIO_TEST_SPEED) & 0xff); 63460471Snyan sio_setreg(com, com_dlbh, (u_int) COMBRD(SIO_TEST_SPEED) >> 8); 63560471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 63651078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 63751078Speter } 63851078Speter 63951078Speter /* 64051078Speter * Enable the interrupt gate and disable device interupts. This 64151078Speter * should leave the device driving the interrupt line low and 64251078Speter * guarantee an edge trigger if an interrupt can be generated. 64351078Speter */ 64451078Speter/* EXTRA DELAY? */ 64560471Snyan sio_setreg(com, com_mcr, mcr_image); 64660471Snyan sio_setreg(com, com_ier, 0); 64751078Speter DELAY(1000); /* XXX */ 64851078Speter irqmap[0] = isa_irq_pending(); 64951078Speter 65051078Speter /* 65151078Speter * Attempt to set loopback mode so that we can send a null byte 65251078Speter * without annoying any external device. 65351078Speter */ 65451078Speter/* EXTRA DELAY? */ 65560471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 65651078Speter 65751078Speter /* 65851078Speter * Attempt to generate an output interrupt. On 8250's, setting 65951078Speter * IER_ETXRDY generates an interrupt independent of the current 66051078Speter * setting and independent of whether the THR is empty. On 16450's, 66151078Speter * setting IER_ETXRDY generates an interrupt independent of the 66251078Speter * current setting. On 16550A's, setting IER_ETXRDY only 66351078Speter * generates an interrupt when IER_ETXRDY is not already set. 66451078Speter */ 66560471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 66651078Speter 66751078Speter /* 66851078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 66951078Speter * an interrupt. They'd better generate one for actually doing 67051078Speter * output. Loopback may be broken on the same incompatibles but 67151078Speter * it's unlikely to do more than allow the null byte out. 67251078Speter */ 67360471Snyan sio_setreg(com, com_data, 0); 67451078Speter DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 67551078Speter 67651078Speter /* 67751078Speter * Turn off loopback mode so that the interrupt gate works again 67851078Speter * (MCR_IENABLE was hidden). This should leave the device driving 67951078Speter * an interrupt line high. It doesn't matter if the interrupt 68051078Speter * line oscillates while we are not looking at it, since interrupts 68151078Speter * are disabled. 68251078Speter */ 68351078Speter/* EXTRA DELAY? */ 68460471Snyan sio_setreg(com, com_mcr, mcr_image); 68551078Speter 68651078Speter /* 68752471Simp * Some pcmcia cards have the "TXRDY bug", so we check everyone 68851078Speter * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 68951078Speter */ 69085365Simp if (noprobe) { 69153370Speter /* Reading IIR register twice */ 69253370Speter for (fn = 0; fn < 2; fn ++) { 69353370Speter DELAY(10000); 69460471Snyan failures[6] = sio_getreg(com, com_iir); 69553370Speter } 69653370Speter /* Check IIR_TXRDY clear ? */ 69753370Speter result = 0; 69853370Speter if (failures[6] & IIR_TXRDY) { 69953370Speter /* Nop, Double check with clearing IER */ 70060471Snyan sio_setreg(com, com_ier, 0); 70160471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 70253370Speter /* Ok. we're familia this gang */ 70353370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 70453370Speter } else { 70553370Speter /* Unknown, Just omit this chip.. XXX */ 70653370Speter result = ENXIO; 70781793Simp sio_setreg(com, com_mcr, 0); 70853370Speter } 70951078Speter } else { 71053370Speter /* OK. this is well-known guys */ 71153370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 71251078Speter } 71381793Simp sio_setreg(com, com_ier, 0); 71460471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 71572200Sbmilekic mtx_unlock_spin(&sio_lock); 71653344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 71786909Simp if (iobase == siocniobase) 71886909Simp result = 0; 71986909Simp if (result != 0) { 72086909Simp device_set_softc(dev, NULL); 72186909Simp free(com, M_DEVBUF); 72286909Simp } 72386909Simp return (result); 72453344Speter } 72553344Speter 72651078Speter /* 72751078Speter * Check that 72851078Speter * o the CFCR, IER and MCR in UART hold the values written to them 72951078Speter * (the values happen to be all distinct - this is good for 73051078Speter * avoiding false positive tests from bus echoes). 73151078Speter * o an output interrupt is generated and its vector is correct. 73251078Speter * o the interrupt goes away when the IIR in the UART is read. 73351078Speter */ 73451078Speter/* EXTRA DELAY? */ 73560471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 73660471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 73760471Snyan failures[2] = sio_getreg(com, com_mcr) - mcr_image; 73851078Speter DELAY(10000); /* Some internal modems need this time */ 73951078Speter irqmap[1] = isa_irq_pending(); 74060471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 74151078Speter DELAY(1000); /* XXX */ 74251078Speter irqmap[2] = isa_irq_pending(); 74360471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 74451078Speter 74551078Speter /* 74651078Speter * Turn off all device interrupts and check that they go off properly. 74751078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 74851078Speter * the OUT2 output of the UART to 74951078Speter * the ICU input. Closing the gate would give a floating ICU input 75051078Speter * (unless there is another device driving it) and spurious interrupts. 75151078Speter * (On the system that this was first tested on, the input floats high 75251078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 75351078Speter */ 75460471Snyan sio_setreg(com, com_ier, 0); 75560471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 75660471Snyan failures[7] = sio_getreg(com, com_ier); 75751078Speter DELAY(1000); /* XXX */ 75851078Speter irqmap[3] = isa_irq_pending(); 75960471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 76051078Speter 76172200Sbmilekic mtx_unlock_spin(&sio_lock); 76251078Speter 76351078Speter irqs = irqmap[1] & ~irqmap[0]; 76454194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 76589463Simp ((1 << xirq) & irqs) == 0) { 76651078Speter printf( 76754206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 76853344Speter device_get_unit(dev), xirq, irqs); 76989447Sbmah printf( 77089447Sbmah "sio%d: port may not be enabled in BIOS\n", 77189447Sbmah device_get_unit(dev)); 77289463Simp } 77351078Speter if (bootverbose) 77451078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 77551078Speter device_get_unit(dev), 77651078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 77751078Speter 77851078Speter result = 0; 77951078Speter for (fn = 0; fn < sizeof failures; ++fn) 78051078Speter if (failures[fn]) { 78160471Snyan sio_setreg(com, com_mcr, 0); 78251078Speter result = ENXIO; 78351078Speter if (bootverbose) { 78451078Speter printf("sio%d: probe failed test(s):", 78551078Speter device_get_unit(dev)); 78651078Speter for (fn = 0; fn < sizeof failures; ++fn) 78751078Speter if (failures[fn]) 78851078Speter printf(" %d", fn); 78951078Speter printf("\n"); 79051078Speter } 79151078Speter break; 79251078Speter } 79351078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 79486909Simp if (iobase == siocniobase) 79586909Simp result = 0; 79686909Simp if (result != 0) { 79786909Simp device_set_softc(dev, NULL); 79886909Simp free(com, M_DEVBUF); 79986909Simp } 80086909Simp return (result); 80151078Speter} 80251078Speter 80351078Speter#ifdef COM_ESP 80451078Speterstatic int 80551078Speterespattach(com, esp_port) 80651078Speter struct com_s *com; 80751078Speter Port_t esp_port; 80851078Speter{ 80951078Speter u_char dips; 81051078Speter u_char val; 81151078Speter 81251078Speter /* 81351078Speter * Check the ESP-specific I/O port to see if we're an ESP 81451078Speter * card. If not, return failure immediately. 81551078Speter */ 81651078Speter if ((inb(esp_port) & 0xf3) == 0) { 81751078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 81851078Speter return (0); 81951078Speter } 82051078Speter 82151078Speter /* 82251078Speter * We've got something that claims to be a Hayes ESP card. 82351078Speter * Let's hope so. 82451078Speter */ 82551078Speter 82651078Speter /* Get the dip-switch configuration */ 82751078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 82851078Speter dips = inb(esp_port + ESP_STATUS1); 82951078Speter 83051078Speter /* 83151078Speter * Bits 0,1 of dips say which COM port we are. 83251078Speter */ 83360471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 83451078Speter printf(" : ESP"); 83551078Speter else { 83651078Speter printf(" esp_port has com %d\n", dips & 0x03); 83751078Speter return (0); 83851078Speter } 83951078Speter 84051078Speter /* 84151078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 84251078Speter */ 84351078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 84451078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 84551078Speter val = inb(esp_port + ESP_STATUS2); 84651078Speter if ((val & 0x70) < 0x20) { 84751078Speter printf("-old (%o)", val & 0x70); 84851078Speter return (0); 84951078Speter } 85051078Speter 85151078Speter /* 85251078Speter * Check for ability to emulate 16550: bit 7 == 1 85351078Speter */ 85451078Speter if ((dips & 0x80) == 0) { 85551078Speter printf(" slave"); 85651078Speter return (0); 85751078Speter } 85851078Speter 85951078Speter /* 86051078Speter * Okay, we seem to be a Hayes ESP card. Whee. 86151078Speter */ 86251078Speter com->esp = TRUE; 86351078Speter com->esp_port = esp_port; 86451078Speter return (1); 86551078Speter} 86651078Speter#endif /* COM_ESP */ 86751078Speter 86885365Simpint 86958885Simpsioattach(dev, xrid) 87051078Speter device_t dev; 87158885Simp int xrid; 87251078Speter{ 87351078Speter struct com_s *com; 87451078Speter#ifdef COM_ESP 87551078Speter Port_t *espp; 87651078Speter#endif 87751078Speter Port_t iobase; 87851078Speter int unit; 87953344Speter u_int flags; 88051078Speter int rid; 88151078Speter struct resource *port; 88253344Speter int ret; 88351078Speter 88458885Simp rid = xrid; 88551078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 88651078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 88751078Speter if (!port) 88857915Simp return (ENXIO); 88951078Speter 89051078Speter iobase = rman_get_start(port); 89151078Speter unit = device_get_unit(dev); 89251078Speter com = device_get_softc(dev); 89353344Speter flags = device_get_flags(dev); 89451078Speter 89553344Speter if (unit >= sio_numunits) 89653344Speter sio_numunits = unit + 1; 89751078Speter /* 89851078Speter * sioprobe() has initialized the device registers as follows: 89951078Speter * o cfcr = CFCR_8BITS. 90051078Speter * It is most important that CFCR_DLAB is off, so that the 90151078Speter * data port is not hidden when we enable interrupts. 90251078Speter * o ier = 0. 90351078Speter * Interrupts are only enabled when the line is open. 90451078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 90551078Speter * interrupt control register or the config specifies no irq. 90651078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 90751078Speter * device from sending before we are ready. 90851078Speter */ 90951078Speter bzero(com, sizeof *com); 91051078Speter com->unit = unit; 91151078Speter com->ioportres = port; 91260471Snyan com->bst = rman_get_bustag(port); 91360471Snyan com->bsh = rman_get_bushandle(port); 91451078Speter com->cfcr_image = CFCR_8BITS; 91551078Speter com->dtr_wait = 3 * hz; 91651078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 91757234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 91851078Speter com->tx_fifo_size = 1; 91951078Speter com->obufs[0].l_head = com->obuf1; 92051078Speter com->obufs[1].l_head = com->obuf2; 92151078Speter 92251078Speter com->data_port = iobase + com_data; 92351078Speter com->int_id_port = iobase + com_iir; 92451078Speter com->modem_ctl_port = iobase + com_mcr; 92551078Speter com->mcr_image = inb(com->modem_ctl_port); 92651078Speter com->line_status_port = iobase + com_lsr; 92751078Speter com->modem_status_port = iobase + com_msr; 92851078Speter com->intr_ctl_port = iobase + com_ier; 92951078Speter 93051078Speter /* 93151078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 93251078Speter * are only relevant for logins. It's important to have echo off 93351078Speter * initially so that the line doesn't start blathering before the 93451078Speter * echo flag can be turned off. 93551078Speter */ 93651078Speter com->it_in.c_iflag = 0; 93751078Speter com->it_in.c_oflag = 0; 93851078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 93951078Speter com->it_in.c_lflag = 0; 94051078Speter if (unit == comconsole) { 94151078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 94251078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 94351078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 94451078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 94551078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 94651078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 94751078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 94851078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 94951078Speter } else 95051078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 95165605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 95272200Sbmilekic mtx_unlock_spin(&sio_lock); 95356788Sbde /* 95456788Sbde * Leave i/o resources allocated if this is a `cn'-level 95556788Sbde * console, so that other devices can't snarf them. 95656788Sbde */ 95756788Sbde if (iobase != siocniobase) 95856788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 95956788Sbde return (ENOMEM); 96051078Speter } 96172200Sbmilekic mtx_unlock_spin(&sio_lock); 96251078Speter termioschars(&com->it_in); 96351078Speter com->it_out = com->it_in; 96451078Speter 96551078Speter /* attempt to determine UART type */ 96651078Speter printf("sio%d: type", unit); 96751078Speter 96851078Speter 96951078Speter#ifdef COM_MULTIPORT 97051078Speter if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 97151078Speter#else 97251078Speter if (!COM_IIR_TXRDYBUG(flags)) 97351078Speter#endif 97451078Speter { 97551078Speter u_char scr; 97651078Speter u_char scr1; 97751078Speter u_char scr2; 97851078Speter 97960471Snyan scr = sio_getreg(com, com_scr); 98060471Snyan sio_setreg(com, com_scr, 0xa5); 98160471Snyan scr1 = sio_getreg(com, com_scr); 98260471Snyan sio_setreg(com, com_scr, 0x5a); 98360471Snyan scr2 = sio_getreg(com, com_scr); 98460471Snyan sio_setreg(com, com_scr, scr); 98551078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 98689447Sbmah printf(" 8250 or not responding"); 98751078Speter goto determined_type; 98851078Speter } 98951078Speter } 99060471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 99151078Speter DELAY(100); 99251078Speter com->st16650a = 0; 99351078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 99451078Speter case FIFO_RX_LOW: 99551078Speter printf(" 16450"); 99651078Speter break; 99751078Speter case FIFO_RX_MEDL: 99851078Speter printf(" 16450?"); 99951078Speter break; 100051078Speter case FIFO_RX_MEDH: 100151078Speter printf(" 16550?"); 100251078Speter break; 100351078Speter case FIFO_RX_HIGH: 100451078Speter if (COM_NOFIFO(flags)) { 100551078Speter printf(" 16550A fifo disabled"); 100651078Speter } else { 100751078Speter com->hasfifo = TRUE; 100851078Speter if (COM_ST16650A(flags)) { 100951078Speter com->st16650a = 1; 101051078Speter com->tx_fifo_size = 32; 101151078Speter printf(" ST16650A"); 101251078Speter } else { 101351078Speter com->tx_fifo_size = COM_FIFOSIZE(flags); 101451078Speter printf(" 16550A"); 101551078Speter } 101651078Speter } 101751078Speter#ifdef COM_ESP 101851078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 101951078Speter if (espattach(com, *espp)) { 102051078Speter com->tx_fifo_size = 1024; 102151078Speter break; 102251078Speter } 102351078Speter#endif 102451078Speter if (!com->st16650a) { 102551078Speter if (!com->tx_fifo_size) 102651078Speter com->tx_fifo_size = 16; 102751078Speter else 102851078Speter printf(" lookalike with %d bytes FIFO", 102951078Speter com->tx_fifo_size); 103051078Speter } 103151078Speter 103251078Speter break; 103351078Speter } 103451078Speter 103551078Speter#ifdef COM_ESP 103651078Speter if (com->esp) { 103751078Speter /* 103851078Speter * Set 16550 compatibility mode. 103951078Speter * We don't use the ESP_MODE_SCALE bit to increase the 104051078Speter * fifo trigger levels because we can't handle large 104151078Speter * bursts of input. 104251078Speter * XXX flow control should be set in comparam(), not here. 104351078Speter */ 104451078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 104551078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 104651078Speter 104751078Speter /* Set RTS/CTS flow control. */ 104851078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 104951078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 105051078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 105151078Speter 105251078Speter /* Set flow-control levels. */ 105351078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 105451078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 105551078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 105651078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 105751078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 105851078Speter } 105951078Speter#endif /* COM_ESP */ 106060471Snyan sio_setreg(com, com_fifo, 0); 106151078Speterdetermined_type: ; 106251078Speter 106351078Speter#ifdef COM_MULTIPORT 106451078Speter if (COM_ISMULTIPORT(flags)) { 106553344Speter device_t masterdev; 106653344Speter 106751078Speter com->multiport = TRUE; 106851078Speter printf(" (multiport"); 106951078Speter if (unit == COM_MPMASTER(flags)) 107051078Speter printf(" master"); 107151078Speter printf(")"); 107253344Speter masterdev = devclass_get_device(sio_devclass, 107353344Speter COM_MPMASTER(flags)); 107457234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 107557234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 107651078Speter } 107751078Speter#endif /* COM_MULTIPORT */ 107851078Speter if (unit == comconsole) 107951078Speter printf(", console"); 108053344Speter if (COM_IIR_TXRDYBUG(flags)) 108151078Speter printf(" with a bogus IIR_TXRDY register"); 108251078Speter printf("\n"); 108351078Speter 108467551Sjhb if (sio_fast_ih == NULL) { 108572238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 108672238Sjhb &sio_fast_ih); 108772238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 108872238Sjhb &sio_slow_ih); 108951078Speter } 109065131Sphk com->devs[0] = make_dev(&sio_cdevsw, unit, 109151078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 109265131Sphk com->devs[1] = make_dev(&sio_cdevsw, unit | CONTROL_INIT_STATE, 109351078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 109465131Sphk com->devs[2] = make_dev(&sio_cdevsw, unit | CONTROL_LOCK_STATE, 109551078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 109665131Sphk com->devs[3] = make_dev(&sio_cdevsw, unit | CALLOUT_MASK, 109751078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 109865131Sphk com->devs[4] = make_dev(&sio_cdevsw, 109965131Sphk unit | CALLOUT_MASK | CONTROL_INIT_STATE, 110051078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 110165131Sphk com->devs[5] = make_dev(&sio_cdevsw, 110265131Sphk unit | CALLOUT_MASK | CONTROL_LOCK_STATE, 110351078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 110451078Speter com->flags = flags; 110551078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 110651078Speter pps_init(&com->pps); 110751078Speter 110851078Speter rid = 0; 110951078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 111053344Speter RF_ACTIVE); 111153344Speter if (com->irqres) { 111253344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 111365557Sjasone INTR_TYPE_TTY | INTR_FAST, 111454386Simp siointr, com, &com->cookie); 111554194Speter if (ret) { 111654194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 111754194Speter com->irqres, INTR_TYPE_TTY, 111854386Simp siointr, com, &com->cookie); 111954194Speter if (ret == 0) 112083246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 112154194Speter } 112253344Speter if (ret) 112353344Speter device_printf(dev, "could not activate interrupt\n"); 112478504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 112578504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 112678504Siedowse /* 112778504Siedowse * Enable interrupts for early break-to-debugger support 112878504Siedowse * on the console. 112978504Siedowse */ 113078504Siedowse if (ret == 0 && unit == comconsole) 113178504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 113278504Siedowse IER_EMSC); 113378504Siedowse#endif 113453344Speter } 113551078Speter 113651078Speter return (0); 113751078Speter} 113851078Speter 113951078Speterstatic int 114083366Sjuliansioopen(dev, flag, mode, td) 114151078Speter dev_t dev; 114251078Speter int flag; 114351078Speter int mode; 114483366Sjulian struct thread *td; 114551078Speter{ 114651078Speter struct com_s *com; 114751078Speter int error; 114851078Speter int mynor; 114951078Speter int s; 115051078Speter struct tty *tp; 115151078Speter int unit; 115251078Speter 115351078Speter mynor = minor(dev); 115451078Speter unit = MINOR_TO_UNIT(mynor); 115553344Speter com = com_addr(unit); 115653344Speter if (com == NULL) 115751078Speter return (ENXIO); 115851078Speter if (com->gone) 115951078Speter return (ENXIO); 116051078Speter if (mynor & CONTROL_MASK) 116151078Speter return (0); 116251078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 116351078Speter s = spltty(); 116451078Speter /* 116551078Speter * We jump to this label after all non-interrupted sleeps to pick 116651078Speter * up any changes of the device state. 116751078Speter */ 116851078Speteropen_top: 116951078Speter while (com->state & CS_DTR_OFF) { 117051078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 117151078Speter if (com_addr(unit) == NULL) 117251078Speter return (ENXIO); 117351078Speter if (error != 0 || com->gone) 117451078Speter goto out; 117551078Speter } 117651078Speter if (tp->t_state & TS_ISOPEN) { 117751078Speter /* 117851078Speter * The device is open, so everything has been initialized. 117951078Speter * Handle conflicts. 118051078Speter */ 118151078Speter if (mynor & CALLOUT_MASK) { 118251078Speter if (!com->active_out) { 118351078Speter error = EBUSY; 118451078Speter goto out; 118551078Speter } 118651078Speter } else { 118751078Speter if (com->active_out) { 118851078Speter if (flag & O_NONBLOCK) { 118951078Speter error = EBUSY; 119051078Speter goto out; 119151078Speter } 119251078Speter error = tsleep(&com->active_out, 119351078Speter TTIPRI | PCATCH, "siobi", 0); 119451078Speter if (com_addr(unit) == NULL) 119551078Speter return (ENXIO); 119651078Speter if (error != 0 || com->gone) 119751078Speter goto out; 119851078Speter goto open_top; 119951078Speter } 120051078Speter } 120151078Speter if (tp->t_state & TS_XCLUDE && 120283366Sjulian suser_td(td)) { 120351078Speter error = EBUSY; 120451078Speter goto out; 120551078Speter } 120651078Speter } else { 120751078Speter /* 120851078Speter * The device isn't open, so there are no conflicts. 120951078Speter * Initialize it. Initialization is done twice in many 121051078Speter * cases: to preempt sleeping callin opens if we are 121151078Speter * callout, and to complete a callin open after DCD rises. 121251078Speter */ 121351078Speter tp->t_oproc = comstart; 121451078Speter tp->t_param = comparam; 121551654Sphk tp->t_stop = comstop; 121651078Speter tp->t_dev = dev; 121751078Speter tp->t_termios = mynor & CALLOUT_MASK 121851078Speter ? com->it_out : com->it_in; 121951078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 122051078Speter com->poll = com->no_irq; 122151078Speter com->poll_output = com->loses_outints; 122251078Speter ++com->wopeners; 122351078Speter error = comparam(tp, &tp->t_termios); 122451078Speter --com->wopeners; 122551078Speter if (error != 0) 122651078Speter goto out; 122751078Speter /* 122851078Speter * XXX we should goto open_top if comparam() slept. 122951078Speter */ 123051078Speter if (com->hasfifo) { 123151078Speter /* 123251078Speter * (Re)enable and drain fifos. 123351078Speter * 123451078Speter * Certain SMC chips cause problems if the fifos 123551078Speter * are enabled while input is ready. Turn off the 123651078Speter * fifo if necessary to clear the input. We test 123751078Speter * the input ready bit after enabling the fifos 123851078Speter * since we've already enabled them in comparam() 123951078Speter * and to handle races between enabling and fresh 124051078Speter * input. 124151078Speter */ 124251078Speter while (TRUE) { 124360471Snyan sio_setreg(com, com_fifo, 124460471Snyan FIFO_RCV_RST | FIFO_XMT_RST 124560471Snyan | com->fifo_image); 124651078Speter /* 124751078Speter * XXX the delays are for superstitious 124851078Speter * historical reasons. It must be less than 124951078Speter * the character time at the maximum 125051078Speter * supported speed (87 usec at 115200 bps 125151078Speter * 8N1). Otherwise we might loop endlessly 125251078Speter * if data is streaming in. We used to use 125351078Speter * delays of 100. That usually worked 125451078Speter * because DELAY(100) used to usually delay 125551078Speter * for about 85 usec instead of 100. 125651078Speter */ 125751078Speter DELAY(50); 125851078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 125951078Speter break; 126060471Snyan sio_setreg(com, com_fifo, 0); 126151078Speter DELAY(50); 126251078Speter (void) inb(com->data_port); 126351078Speter } 126451078Speter } 126551078Speter 126672200Sbmilekic mtx_lock_spin(&sio_lock); 126751078Speter (void) inb(com->line_status_port); 126851078Speter (void) inb(com->data_port); 126951078Speter com->prev_modem_status = com->last_modem_status 127051078Speter = inb(com->modem_status_port); 127151078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 127251078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 127351078Speter | IER_EMSC); 127451078Speter } else { 127551078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 127651078Speter | IER_ERLS | IER_EMSC); 127751078Speter } 127872200Sbmilekic mtx_unlock_spin(&sio_lock); 127951078Speter /* 128051078Speter * Handle initial DCD. Callout devices get a fake initial 128151078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 128251078Speter * callin opens get woken up and resume sleeping on "siobi" 128351078Speter * instead of "siodcd". 128451078Speter */ 128551078Speter /* 128651078Speter * XXX `mynor & CALLOUT_MASK' should be 128751078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 128851078Speter * TRAPDOOR_CARRIER is the default initial state for callout 128951078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 129051078Speter * the true carrier. 129151078Speter */ 129251078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 129351078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 129451078Speter } 129551078Speter /* 129651078Speter * Wait for DCD if necessary. 129751078Speter */ 129851078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 129951078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 130051078Speter ++com->wopeners; 130151078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 130251078Speter if (com_addr(unit) == NULL) 130351078Speter return (ENXIO); 130451078Speter --com->wopeners; 130551078Speter if (error != 0 || com->gone) 130651078Speter goto out; 130751078Speter goto open_top; 130851078Speter } 130951078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 131051078Speter disc_optim(tp, &tp->t_termios, com); 131151078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 131251078Speter com->active_out = TRUE; 131351078Speter siosettimeout(); 131451078Speterout: 131551078Speter splx(s); 131651078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 131751078Speter comhardclose(com); 131851078Speter return (error); 131951078Speter} 132051078Speter 132151078Speterstatic int 132283366Sjuliansioclose(dev, flag, mode, td) 132351078Speter dev_t dev; 132451078Speter int flag; 132551078Speter int mode; 132683366Sjulian struct thread *td; 132751078Speter{ 132851078Speter struct com_s *com; 132951078Speter int mynor; 133051078Speter int s; 133151078Speter struct tty *tp; 133251078Speter 133351078Speter mynor = minor(dev); 133451078Speter if (mynor & CONTROL_MASK) 133551078Speter return (0); 133651078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 133757915Simp if (com == NULL) 133857915Simp return (ENODEV); 133951078Speter tp = com->tp; 134051078Speter s = spltty(); 134151078Speter (*linesw[tp->t_line].l_close)(tp, flag); 134251078Speter disc_optim(tp, &tp->t_termios, com); 134351654Sphk comstop(tp, FREAD | FWRITE); 134451078Speter comhardclose(com); 134551078Speter ttyclose(tp); 134651078Speter siosettimeout(); 134751078Speter splx(s); 134851078Speter if (com->gone) { 134951078Speter printf("sio%d: gone\n", com->unit); 135051078Speter s = spltty(); 135151078Speter if (com->ibuf != NULL) 135251078Speter free(com->ibuf, M_DEVBUF); 135351078Speter bzero(tp, sizeof *tp); 135451078Speter splx(s); 135551078Speter } 135651078Speter return (0); 135751078Speter} 135851078Speter 135951078Speterstatic void 136051078Spetercomhardclose(com) 136151078Speter struct com_s *com; 136251078Speter{ 136351078Speter int s; 136451078Speter struct tty *tp; 136551078Speter int unit; 136651078Speter 136751078Speter unit = com->unit; 136851078Speter s = spltty(); 136951078Speter com->poll = FALSE; 137051078Speter com->poll_output = FALSE; 137151078Speter com->do_timestamp = FALSE; 137251078Speter com->do_dcd_timestamp = FALSE; 137351078Speter com->pps.ppsparam.mode = 0; 137460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 137578504Siedowse tp = com->tp; 137678504Siedowse 137778504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 137878504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 137978504Siedowse /* 138078504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 138178504Siedowse * console. This allows us to detect break-to-debugger events 138278504Siedowse * while the console device is closed. 138378504Siedowse */ 138478504Siedowse if (com->unit != comconsole) 138578504Siedowse#endif 138651078Speter { 138760471Snyan sio_setreg(com, com_ier, 0); 138851078Speter if (tp->t_cflag & HUPCL 138951078Speter /* 139051078Speter * XXX we will miss any carrier drop between here and the 139151078Speter * next open. Perhaps we should watch DCD even when the 139251078Speter * port is closed; it is not sufficient to check it at 139351078Speter * the next open because it might go up and down while 139451078Speter * we're not watching. 139551078Speter */ 139651078Speter || (!com->active_out 139751078Speter && !(com->prev_modem_status & MSR_DCD) 139851078Speter && !(com->it_in.c_cflag & CLOCAL)) 139951078Speter || !(tp->t_state & TS_ISOPEN)) { 140051078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 140151078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 140251078Speter timeout(siodtrwakeup, com, com->dtr_wait); 140351078Speter com->state |= CS_DTR_OFF; 140451078Speter } 140551078Speter } 140651078Speter } 140751078Speter if (com->hasfifo) { 140851078Speter /* 140951078Speter * Disable fifos so that they are off after controlled 141051078Speter * reboots. Some BIOSes fail to detect 16550s when the 141151078Speter * fifos are enabled. 141251078Speter */ 141360471Snyan sio_setreg(com, com_fifo, 0); 141451078Speter } 141551078Speter com->active_out = FALSE; 141651078Speter wakeup(&com->active_out); 141751078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 141851078Speter splx(s); 141951078Speter} 142051078Speter 142151078Speterstatic int 142251078Spetersioread(dev, uio, flag) 142351078Speter dev_t dev; 142451078Speter struct uio *uio; 142551078Speter int flag; 142651078Speter{ 142751078Speter int mynor; 142851078Speter struct com_s *com; 142951078Speter 143051078Speter mynor = minor(dev); 143151078Speter if (mynor & CONTROL_MASK) 143251078Speter return (ENODEV); 143351078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 143457915Simp if (com == NULL || com->gone) 143551078Speter return (ENODEV); 143651078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 143751078Speter} 143851078Speter 143951078Speterstatic int 144051078Spetersiowrite(dev, uio, flag) 144151078Speter dev_t dev; 144251078Speter struct uio *uio; 144351078Speter int flag; 144451078Speter{ 144551078Speter int mynor; 144651078Speter struct com_s *com; 144751078Speter int unit; 144851078Speter 144951078Speter mynor = minor(dev); 145051078Speter if (mynor & CONTROL_MASK) 145151078Speter return (ENODEV); 145251078Speter 145351078Speter unit = MINOR_TO_UNIT(mynor); 145451078Speter com = com_addr(unit); 145557915Simp if (com == NULL || com->gone) 145651078Speter return (ENODEV); 145751078Speter /* 145851078Speter * (XXX) We disallow virtual consoles if the physical console is 145951078Speter * a serial port. This is in case there is a display attached that 146051078Speter * is not the console. In that situation we don't need/want the X 146151078Speter * server taking over the console. 146251078Speter */ 146351078Speter if (constty != NULL && unit == comconsole) 146451078Speter constty = NULL; 146551078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 146651078Speter} 146751078Speter 146851078Speterstatic void 146951078Spetersiobusycheck(chan) 147051078Speter void *chan; 147151078Speter{ 147251078Speter struct com_s *com; 147351078Speter int s; 147451078Speter 147551078Speter com = (struct com_s *)chan; 147651078Speter 147751078Speter /* 147851078Speter * Clear TS_BUSY if low-level output is complete. 147951078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 148051078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 148151078Speter * called again. Reading the line status port outside of siointr1() 148251078Speter * is safe because CS_BUSY is clear so there are no output interrupts 148351078Speter * to lose. 148451078Speter */ 148551078Speter s = spltty(); 148651078Speter if (com->state & CS_BUSY) 148751078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 148851078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 148951078Speter == (LSR_TSRE | LSR_TXRDY)) { 149051078Speter com->tp->t_state &= ~TS_BUSY; 149151078Speter ttwwakeup(com->tp); 149251078Speter com->extra_state &= ~CSE_BUSYCHECK; 149351078Speter } else 149451078Speter timeout(siobusycheck, com, hz / 100); 149551078Speter splx(s); 149651078Speter} 149751078Speter 149851078Speterstatic void 149951078Spetersiodtrwakeup(chan) 150051078Speter void *chan; 150151078Speter{ 150251078Speter struct com_s *com; 150351078Speter 150451078Speter com = (struct com_s *)chan; 150551078Speter com->state &= ~CS_DTR_OFF; 150651078Speter wakeup(&com->dtr_wait); 150751078Speter} 150851078Speter 150965557Sjasone/* 151070174Sjhb * Call this function with the sio_lock mutex held. It will return with the 151170174Sjhb * lock still held. 151265557Sjasone */ 151351078Speterstatic void 151451078Spetersioinput(com) 151551078Speter struct com_s *com; 151651078Speter{ 151751078Speter u_char *buf; 151851078Speter int incc; 151951078Speter u_char line_status; 152051078Speter int recv_data; 152151078Speter struct tty *tp; 152251078Speter 152351078Speter buf = com->ibuf; 152451078Speter tp = com->tp; 152551078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 152651078Speter com_events -= (com->iptr - com->ibuf); 152751078Speter com->iptr = com->ibuf; 152851078Speter return; 152951078Speter } 153051078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 153151078Speter /* 153251078Speter * Avoid the grotesquely inefficient lineswitch routine 153351078Speter * (ttyinput) in "raw" mode. It usually takes about 450 153451078Speter * instructions (that's without canonical processing or echo!). 153551078Speter * slinput is reasonably fast (usually 40 instructions plus 153651078Speter * call overhead). 153751078Speter */ 153851078Speter do { 153965557Sjasone /* 154065557Sjasone * This may look odd, but it is using save-and-enable 154165557Sjasone * semantics instead of the save-and-disable semantics 154265557Sjasone * that are used everywhere else. 154365557Sjasone */ 154472200Sbmilekic mtx_unlock_spin(&sio_lock); 154551078Speter incc = com->iptr - buf; 154651078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 154751078Speter && (com->state & CS_RTS_IFLOW 154851078Speter || tp->t_iflag & IXOFF) 154951078Speter && !(tp->t_state & TS_TBLOCK)) 155051078Speter ttyblock(tp); 155151078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 155251078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 155351078Speter buf += incc; 155451078Speter tk_nin += incc; 155551078Speter tk_rawcc += incc; 155651078Speter tp->t_rawcc += incc; 155751078Speter ttwakeup(tp); 155851078Speter if (tp->t_state & TS_TTSTOP 155951078Speter && (tp->t_iflag & IXANY 156051078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 156151078Speter tp->t_state &= ~TS_TTSTOP; 156251078Speter tp->t_lflag &= ~FLUSHO; 156351078Speter comstart(tp); 156451078Speter } 156572200Sbmilekic mtx_lock_spin(&sio_lock); 156651078Speter } while (buf < com->iptr); 156751078Speter } else { 156851078Speter do { 156965557Sjasone /* 157065557Sjasone * This may look odd, but it is using save-and-enable 157165557Sjasone * semantics instead of the save-and-disable semantics 157265557Sjasone * that are used everywhere else. 157365557Sjasone */ 157472200Sbmilekic mtx_unlock_spin(&sio_lock); 157551078Speter line_status = buf[com->ierroff]; 157651078Speter recv_data = *buf++; 157751078Speter if (line_status 157851078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 157951078Speter if (line_status & LSR_BI) 158051078Speter recv_data |= TTY_BI; 158151078Speter if (line_status & LSR_FE) 158251078Speter recv_data |= TTY_FE; 158351078Speter if (line_status & LSR_OE) 158451078Speter recv_data |= TTY_OE; 158551078Speter if (line_status & LSR_PE) 158651078Speter recv_data |= TTY_PE; 158751078Speter } 158851078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 158972200Sbmilekic mtx_lock_spin(&sio_lock); 159051078Speter } while (buf < com->iptr); 159151078Speter } 159251078Speter com_events -= (com->iptr - com->ibuf); 159351078Speter com->iptr = com->ibuf; 159451078Speter 159551078Speter /* 159651078Speter * There is now room for another low-level buffer full of input, 159751078Speter * so enable RTS if it is now disabled and there is room in the 159851078Speter * high-level buffer. 159951078Speter */ 160051078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 160151078Speter !(tp->t_state & TS_TBLOCK)) 160251078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 160351078Speter} 160451078Speter 160551078Spetervoid 160651078Spetersiointr(arg) 160751078Speter void *arg; 160851078Speter{ 160970174Sjhb struct com_s *com; 161070174Sjhb 161151078Speter#ifndef COM_MULTIPORT 161270174Sjhb com = (struct com_s *)arg; 161370174Sjhb 161472200Sbmilekic mtx_lock_spin(&sio_lock); 161570174Sjhb siointr1(com); 161672200Sbmilekic mtx_unlock_spin(&sio_lock); 161751078Speter#else /* COM_MULTIPORT */ 161851078Speter bool_t possibly_more_intrs; 161951078Speter int unit; 162051078Speter 162151078Speter /* 162251078Speter * Loop until there is no activity on any port. This is necessary 162351078Speter * to get an interrupt edge more than to avoid another interrupt. 162451078Speter * If the IRQ signal is just an OR of the IRQ signals from several 162551078Speter * devices, then the edge from one may be lost because another is 162651078Speter * on. 162751078Speter */ 162872200Sbmilekic mtx_lock_spin(&sio_lock); 162951078Speter do { 163051078Speter possibly_more_intrs = FALSE; 163153344Speter for (unit = 0; unit < sio_numunits; ++unit) { 163251078Speter com = com_addr(unit); 163351078Speter /* 163451078Speter * XXX COM_LOCK(); 163551078Speter * would it work here, or be counter-productive? 163651078Speter */ 163751078Speter if (com != NULL 163851078Speter && !com->gone 163951078Speter && (inb(com->int_id_port) & IIR_IMASK) 164051078Speter != IIR_NOPEND) { 164151078Speter siointr1(com); 164251078Speter possibly_more_intrs = TRUE; 164351078Speter } 164451078Speter /* XXX COM_UNLOCK(); */ 164551078Speter } 164651078Speter } while (possibly_more_intrs); 164772200Sbmilekic mtx_unlock_spin(&sio_lock); 164851078Speter#endif /* COM_MULTIPORT */ 164951078Speter} 165051078Speter 165151078Speterstatic void 165251078Spetersiointr1(com) 165351078Speter struct com_s *com; 165451078Speter{ 165551078Speter u_char line_status; 165651078Speter u_char modem_status; 165751078Speter u_char *ioptr; 165851078Speter u_char recv_data; 165951078Speter u_char int_ctl; 166051078Speter u_char int_ctl_new; 166151078Speter struct timecounter *tc; 166251078Speter u_int count; 166351078Speter 166451078Speter int_ctl = inb(com->intr_ctl_port); 166551078Speter int_ctl_new = int_ctl; 166651078Speter 166751078Speter while (!com->gone) { 166851078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 166951078Speter modem_status = inb(com->modem_status_port); 167051078Speter if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 167151078Speter tc = timecounter; 167251078Speter count = tc->tc_get_timecount(tc); 167351078Speter pps_event(&com->pps, tc, count, 167451078Speter (modem_status & MSR_DCD) ? 167551078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 167651078Speter } 167751078Speter } 167851078Speter line_status = inb(com->line_status_port); 167951078Speter 168051078Speter /* input event? (check first to help avoid overruns) */ 168151078Speter while (line_status & LSR_RCV_MASK) { 168251078Speter /* break/unnattached error bits or real input? */ 168351078Speter if (!(line_status & LSR_RXRDY)) 168451078Speter recv_data = 0; 168551078Speter else 168651078Speter recv_data = inb(com->data_port); 168761649Sps#if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 168861649Sps /* 168961649Sps * Solaris implements a new BREAK which is initiated 169061649Sps * by a character sequence CR ~ ^b which is similar 169161649Sps * to a familiar pattern used on Sun servers by the 169261649Sps * Remote Console. 169361649Sps */ 169461649Sps#define KEY_CRTLB 2 /* ^B */ 169561649Sps#define KEY_CR 13 /* CR '\r' */ 169661649Sps#define KEY_TILDE 126 /* ~ */ 169761649Sps 169861649Sps if (com->unit == comconsole) { 169961649Sps static int brk_state1 = 0, brk_state2 = 0; 170061649Sps if (recv_data == KEY_CR) { 170161649Sps brk_state1 = recv_data; 170261649Sps brk_state2 = 0; 170365557Sjasone } else if (brk_state1 == KEY_CR 170465557Sjasone && (recv_data == KEY_TILDE 170565557Sjasone || recv_data == KEY_CRTLB)) { 170661649Sps if (recv_data == KEY_TILDE) 170761649Sps brk_state2 = recv_data; 170865557Sjasone else if (brk_state2 == KEY_TILDE 170965557Sjasone && recv_data == KEY_CRTLB) { 171061649Sps breakpoint(); 171165557Sjasone brk_state1 = 0; 171265557Sjasone brk_state2 = 0; 171361649Sps goto cont; 171461649Sps } else 171561649Sps brk_state2 = 0; 171661649Sps } else 171761649Sps brk_state1 = 0; 171861649Sps } 171961649Sps#endif 172051078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 172151078Speter /* 172251078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 172351078Speter * Otherwise, push the work to a higher level 172451078Speter * (to handle PARMRK) if we're bypassing. 172551078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 172651078Speter * 172751078Speter * This makes bypassing work right in the 172851078Speter * usual "raw" case (IGNBRK set, and IGNPAR 172951078Speter * and INPCK clear). 173051078Speter * 173151078Speter * Note: BI together with FE/PE means just BI. 173251078Speter */ 173351078Speter if (line_status & LSR_BI) { 173451078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 173551078Speter if (com->unit == comconsole) { 173651078Speter breakpoint(); 173751078Speter goto cont; 173851078Speter } 173951078Speter#endif 174051078Speter if (com->tp == NULL 174151078Speter || com->tp->t_iflag & IGNBRK) 174251078Speter goto cont; 174351078Speter } else { 174451078Speter if (com->tp == NULL 174551078Speter || com->tp->t_iflag & IGNPAR) 174651078Speter goto cont; 174751078Speter } 174851078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 174951078Speter && (line_status & (LSR_BI | LSR_FE) 175051078Speter || com->tp->t_iflag & INPCK)) 175151078Speter recv_data = 0; 175251078Speter } 175351078Speter ++com->bytes_in; 175451078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 175588900Sjhb swi_sched(sio_fast_ih, 0); 175651078Speter ioptr = com->iptr; 175751078Speter if (ioptr >= com->ibufend) 175851078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 175951078Speter else { 176051078Speter if (com->do_timestamp) 176151078Speter microtime(&com->timestamp); 176251078Speter ++com_events; 176372238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 176451078Speter#if 0 /* for testing input latency vs efficiency */ 176551078Speterif (com->iptr - com->ibuf == 8) 176688900Sjhb swi_sched(sio_fast_ih, 0); 176751078Speter#endif 176851078Speter ioptr[0] = recv_data; 176951078Speter ioptr[com->ierroff] = line_status; 177051078Speter com->iptr = ++ioptr; 177151078Speter if (ioptr == com->ihighwater 177251078Speter && com->state & CS_RTS_IFLOW) 177351078Speter outb(com->modem_ctl_port, 177451078Speter com->mcr_image &= ~MCR_RTS); 177551078Speter if (line_status & LSR_OE) 177651078Speter CE_RECORD(com, CE_OVERRUN); 177751078Speter } 177851078Spetercont: 177951078Speter /* 178051078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 178151078Speter * jump from the top of the loop to here 178251078Speter */ 178351078Speter line_status = inb(com->line_status_port) & 0x7F; 178451078Speter } 178551078Speter 178651078Speter /* modem status change? (always check before doing output) */ 178751078Speter modem_status = inb(com->modem_status_port); 178851078Speter if (modem_status != com->last_modem_status) { 178951078Speter if (com->do_dcd_timestamp 179051078Speter && !(com->last_modem_status & MSR_DCD) 179151078Speter && modem_status & MSR_DCD) 179251078Speter microtime(&com->dcd_timestamp); 179351078Speter 179451078Speter /* 179551078Speter * Schedule high level to handle DCD changes. Note 179651078Speter * that we don't use the delta bits anywhere. Some 179751078Speter * UARTs mess them up, and it's easy to remember the 179851078Speter * previous bits and calculate the delta. 179951078Speter */ 180051078Speter com->last_modem_status = modem_status; 180151078Speter if (!(com->state & CS_CHECKMSR)) { 180251078Speter com_events += LOTS_OF_EVENTS; 180351078Speter com->state |= CS_CHECKMSR; 180488900Sjhb swi_sched(sio_fast_ih, 0); 180551078Speter } 180651078Speter 180751078Speter /* handle CTS change immediately for crisp flow ctl */ 180851078Speter if (com->state & CS_CTS_OFLOW) { 180951078Speter if (modem_status & MSR_CTS) 181051078Speter com->state |= CS_ODEVREADY; 181151078Speter else 181251078Speter com->state &= ~CS_ODEVREADY; 181351078Speter } 181451078Speter } 181551078Speter 181651078Speter /* output queued and everything ready? */ 181751078Speter if (line_status & LSR_TXRDY 181851078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 181951078Speter ioptr = com->obufq.l_head; 182051078Speter if (com->tx_fifo_size > 1) { 182151078Speter u_int ocount; 182251078Speter 182351078Speter ocount = com->obufq.l_tail - ioptr; 182451078Speter if (ocount > com->tx_fifo_size) 182551078Speter ocount = com->tx_fifo_size; 182651078Speter com->bytes_out += ocount; 182751078Speter do 182851078Speter outb(com->data_port, *ioptr++); 182951078Speter while (--ocount != 0); 183051078Speter } else { 183151078Speter outb(com->data_port, *ioptr++); 183251078Speter ++com->bytes_out; 183351078Speter } 183451078Speter com->obufq.l_head = ioptr; 183551078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 183651078Speter int_ctl_new = int_ctl | IER_ETXRDY; 183751078Speter } 183851078Speter if (ioptr >= com->obufq.l_tail) { 183951078Speter struct lbq *qp; 184051078Speter 184151078Speter qp = com->obufq.l_next; 184251078Speter qp->l_queued = FALSE; 184351078Speter qp = qp->l_next; 184451078Speter if (qp != NULL) { 184551078Speter com->obufq.l_head = qp->l_head; 184651078Speter com->obufq.l_tail = qp->l_tail; 184751078Speter com->obufq.l_next = qp; 184851078Speter } else { 184951078Speter /* output just completed */ 185053344Speter if (COM_IIR_TXRDYBUG(com->flags)) { 185151078Speter int_ctl_new = int_ctl & ~IER_ETXRDY; 185251078Speter } 185351078Speter com->state &= ~CS_BUSY; 185451078Speter } 185551078Speter if (!(com->state & CS_ODONE)) { 185651078Speter com_events += LOTS_OF_EVENTS; 185751078Speter com->state |= CS_ODONE; 185867551Sjhb /* handle at high level ASAP */ 185988900Sjhb swi_sched(sio_fast_ih, 0); 186051078Speter } 186151078Speter } 186253344Speter if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 186351078Speter outb(com->intr_ctl_port, int_ctl_new); 186451078Speter } 186551078Speter } 186651078Speter 186751078Speter /* finished? */ 186851078Speter#ifndef COM_MULTIPORT 186951078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 187051078Speter#endif /* COM_MULTIPORT */ 187151078Speter return; 187251078Speter } 187351078Speter} 187451078Speter 187551078Speterstatic int 187683366Sjuliansioioctl(dev, cmd, data, flag, td) 187751078Speter dev_t dev; 187851078Speter u_long cmd; 187951078Speter caddr_t data; 188051078Speter int flag; 188183366Sjulian struct thread *td; 188251078Speter{ 188351078Speter struct com_s *com; 188451078Speter int error; 188551078Speter int mynor; 188651078Speter int s; 188751078Speter struct tty *tp; 188851078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 188951078Speter u_long oldcmd; 189051078Speter struct termios term; 189151078Speter#endif 189251078Speter 189351078Speter mynor = minor(dev); 189451078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 189557915Simp if (com == NULL || com->gone) 189651078Speter return (ENODEV); 189751078Speter if (mynor & CONTROL_MASK) { 189851078Speter struct termios *ct; 189951078Speter 190051078Speter switch (mynor & CONTROL_MASK) { 190151078Speter case CONTROL_INIT_STATE: 190251078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 190351078Speter break; 190451078Speter case CONTROL_LOCK_STATE: 190551078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 190651078Speter break; 190751078Speter default: 190851078Speter return (ENODEV); /* /dev/nodev */ 190951078Speter } 191051078Speter switch (cmd) { 191151078Speter case TIOCSETA: 191283366Sjulian error = suser_td(td); 191351078Speter if (error != 0) 191451078Speter return (error); 191551078Speter *ct = *(struct termios *)data; 191651078Speter return (0); 191751078Speter case TIOCGETA: 191851078Speter *(struct termios *)data = *ct; 191951078Speter return (0); 192051078Speter case TIOCGETD: 192151078Speter *(int *)data = TTYDISC; 192251078Speter return (0); 192351078Speter case TIOCGWINSZ: 192451078Speter bzero(data, sizeof(struct winsize)); 192551078Speter return (0); 192651078Speter default: 192751078Speter return (ENOTTY); 192851078Speter } 192951078Speter } 193051078Speter tp = com->tp; 193151078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 193251078Speter term = tp->t_termios; 193351078Speter oldcmd = cmd; 193451078Speter error = ttsetcompat(tp, &cmd, data, &term); 193551078Speter if (error != 0) 193651078Speter return (error); 193751078Speter if (cmd != oldcmd) 193851078Speter data = (caddr_t)&term; 193951078Speter#endif 194051078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 194151078Speter int cc; 194251078Speter struct termios *dt = (struct termios *)data; 194351078Speter struct termios *lt = mynor & CALLOUT_MASK 194451078Speter ? &com->lt_out : &com->lt_in; 194551078Speter 194651078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 194751078Speter | (dt->c_iflag & ~lt->c_iflag); 194851078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 194951078Speter | (dt->c_oflag & ~lt->c_oflag); 195051078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 195151078Speter | (dt->c_cflag & ~lt->c_cflag); 195251078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 195351078Speter | (dt->c_lflag & ~lt->c_lflag); 195451078Speter for (cc = 0; cc < NCCS; ++cc) 195551078Speter if (lt->c_cc[cc] != 0) 195651078Speter dt->c_cc[cc] = tp->t_cc[cc]; 195751078Speter if (lt->c_ispeed != 0) 195851078Speter dt->c_ispeed = tp->t_ispeed; 195951078Speter if (lt->c_ospeed != 0) 196051078Speter dt->c_ospeed = tp->t_ospeed; 196151078Speter } 196283366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 196351078Speter if (error != ENOIOCTL) 196451078Speter return (error); 196551078Speter s = spltty(); 196651078Speter error = ttioctl(tp, cmd, data, flag); 196751078Speter disc_optim(tp, &tp->t_termios, com); 196851078Speter if (error != ENOIOCTL) { 196951078Speter splx(s); 197051078Speter return (error); 197151078Speter } 197251078Speter switch (cmd) { 197351078Speter case TIOCSBRK: 197460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 197551078Speter break; 197651078Speter case TIOCCBRK: 197760471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 197851078Speter break; 197951078Speter case TIOCSDTR: 198051078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 198151078Speter break; 198251078Speter case TIOCCDTR: 198351078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 198451078Speter break; 198551078Speter /* 198651078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 198751078Speter * changes get undone on the next call to comparam(). 198851078Speter */ 198951078Speter case TIOCMSET: 199051078Speter (void)commctl(com, *(int *)data, DMSET); 199151078Speter break; 199251078Speter case TIOCMBIS: 199351078Speter (void)commctl(com, *(int *)data, DMBIS); 199451078Speter break; 199551078Speter case TIOCMBIC: 199651078Speter (void)commctl(com, *(int *)data, DMBIC); 199751078Speter break; 199851078Speter case TIOCMGET: 199951078Speter *(int *)data = commctl(com, 0, DMGET); 200051078Speter break; 200151078Speter case TIOCMSDTRWAIT: 200251078Speter /* must be root since the wait applies to following logins */ 200383366Sjulian error = suser_td(td); 200451078Speter if (error != 0) { 200551078Speter splx(s); 200651078Speter return (error); 200751078Speter } 200851078Speter com->dtr_wait = *(int *)data * hz / 100; 200951078Speter break; 201051078Speter case TIOCMGDTRWAIT: 201151078Speter *(int *)data = com->dtr_wait * 100 / hz; 201251078Speter break; 201351078Speter case TIOCTIMESTAMP: 201451078Speter com->do_timestamp = TRUE; 201551078Speter *(struct timeval *)data = com->timestamp; 201651078Speter break; 201751078Speter case TIOCDCDTIMESTAMP: 201851078Speter com->do_dcd_timestamp = TRUE; 201951078Speter *(struct timeval *)data = com->dcd_timestamp; 202051078Speter break; 202151078Speter default: 202251078Speter splx(s); 202351078Speter error = pps_ioctl(cmd, data, &com->pps); 202451078Speter if (error == ENODEV) 202551078Speter error = ENOTTY; 202651078Speter return (error); 202751078Speter } 202851078Speter splx(s); 202951078Speter return (0); 203051078Speter} 203151078Speter 203265557Sjasone/* software interrupt handler for SWI_TTY */ 203351078Speterstatic void 203467551Sjhbsiopoll(void *dummy) 203551078Speter{ 203651078Speter int unit; 203751078Speter 203851078Speter if (com_events == 0) 203951078Speter return; 204051078Speterrepeat: 204153344Speter for (unit = 0; unit < sio_numunits; ++unit) { 204251078Speter struct com_s *com; 204351078Speter int incc; 204451078Speter struct tty *tp; 204551078Speter 204651078Speter com = com_addr(unit); 204751078Speter if (com == NULL) 204851078Speter continue; 204951078Speter tp = com->tp; 205051078Speter if (tp == NULL || com->gone) { 205151078Speter /* 205251078Speter * Discard any events related to never-opened or 205351078Speter * going-away devices. 205451078Speter */ 205572200Sbmilekic mtx_lock_spin(&sio_lock); 205651078Speter incc = com->iptr - com->ibuf; 205751078Speter com->iptr = com->ibuf; 205851078Speter if (com->state & CS_CHECKMSR) { 205951078Speter incc += LOTS_OF_EVENTS; 206051078Speter com->state &= ~CS_CHECKMSR; 206151078Speter } 206251078Speter com_events -= incc; 206372200Sbmilekic mtx_unlock_spin(&sio_lock); 206451078Speter continue; 206551078Speter } 206651078Speter if (com->iptr != com->ibuf) { 206772200Sbmilekic mtx_lock_spin(&sio_lock); 206851078Speter sioinput(com); 206972200Sbmilekic mtx_unlock_spin(&sio_lock); 207051078Speter } 207151078Speter if (com->state & CS_CHECKMSR) { 207251078Speter u_char delta_modem_status; 207351078Speter 207472200Sbmilekic mtx_lock_spin(&sio_lock); 207551078Speter delta_modem_status = com->last_modem_status 207651078Speter ^ com->prev_modem_status; 207751078Speter com->prev_modem_status = com->last_modem_status; 207851078Speter com_events -= LOTS_OF_EVENTS; 207951078Speter com->state &= ~CS_CHECKMSR; 208072200Sbmilekic mtx_unlock_spin(&sio_lock); 208151078Speter if (delta_modem_status & MSR_DCD) 208251078Speter (*linesw[tp->t_line].l_modem) 208351078Speter (tp, com->prev_modem_status & MSR_DCD); 208451078Speter } 208551078Speter if (com->state & CS_ODONE) { 208672200Sbmilekic mtx_lock_spin(&sio_lock); 208751078Speter com_events -= LOTS_OF_EVENTS; 208851078Speter com->state &= ~CS_ODONE; 208972200Sbmilekic mtx_unlock_spin(&sio_lock); 209051078Speter if (!(com->state & CS_BUSY) 209151078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 209251078Speter timeout(siobusycheck, com, hz / 100); 209351078Speter com->extra_state |= CSE_BUSYCHECK; 209451078Speter } 209551078Speter (*linesw[tp->t_line].l_start)(tp); 209651078Speter } 209751078Speter if (com_events == 0) 209851078Speter break; 209951078Speter } 210051078Speter if (com_events >= LOTS_OF_EVENTS) 210151078Speter goto repeat; 210251078Speter} 210351078Speter 210451078Speterstatic int 210551078Spetercomparam(tp, t) 210651078Speter struct tty *tp; 210751078Speter struct termios *t; 210851078Speter{ 210951078Speter u_int cfcr; 211051078Speter int cflag; 211151078Speter struct com_s *com; 211251078Speter int divisor; 211351078Speter u_char dlbh; 211451078Speter u_char dlbl; 211551078Speter int s; 211651078Speter int unit; 211751078Speter 211851078Speter /* do historical conversions */ 211951078Speter if (t->c_ispeed == 0) 212051078Speter t->c_ispeed = t->c_ospeed; 212151078Speter 212251078Speter /* check requested parameters */ 212351078Speter divisor = ttspeedtab(t->c_ospeed, comspeedtab); 212451078Speter if (divisor < 0 || (divisor > 0 && t->c_ispeed != t->c_ospeed)) 212551078Speter return (EINVAL); 212651078Speter 212751078Speter /* parameters are OK, convert them to the com struct and the device */ 212851078Speter unit = DEV_TO_UNIT(tp->t_dev); 212951078Speter com = com_addr(unit); 213057915Simp if (com == NULL) 213157915Simp return (ENODEV); 213251078Speter s = spltty(); 213351078Speter if (divisor == 0) 213451078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 213551078Speter else 213651078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 213751078Speter cflag = t->c_cflag; 213851078Speter switch (cflag & CSIZE) { 213951078Speter case CS5: 214051078Speter cfcr = CFCR_5BITS; 214151078Speter break; 214251078Speter case CS6: 214351078Speter cfcr = CFCR_6BITS; 214451078Speter break; 214551078Speter case CS7: 214651078Speter cfcr = CFCR_7BITS; 214751078Speter break; 214851078Speter default: 214951078Speter cfcr = CFCR_8BITS; 215051078Speter break; 215151078Speter } 215251078Speter if (cflag & PARENB) { 215351078Speter cfcr |= CFCR_PENAB; 215451078Speter if (!(cflag & PARODD)) 215551078Speter cfcr |= CFCR_PEVEN; 215651078Speter } 215751078Speter if (cflag & CSTOPB) 215851078Speter cfcr |= CFCR_STOPB; 215951078Speter 216051078Speter if (com->hasfifo && divisor != 0) { 216151078Speter /* 216251078Speter * Use a fifo trigger level low enough so that the input 216351078Speter * latency from the fifo is less than about 16 msec and 216451078Speter * the total latency is less than about 30 msec. These 216551078Speter * latencies are reasonable for humans. Serial comms 216651078Speter * protocols shouldn't expect anything better since modem 216751078Speter * latencies are larger. 216888433Sdillon * 216988433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 217088433Sdillon * speed connections without further work on reducing 217188433Sdillon * interrupt disablement times in other parts of the system, 217288433Sdillon * without producing silo overflow errors. 217351078Speter */ 217451078Speter com->fifo_image = t->c_ospeed <= 4800 217588451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 217651078Speter#ifdef COM_ESP 217751078Speter /* 217851078Speter * The Hayes ESP card needs the fifo DMA mode bit set 217951078Speter * in compatibility mode. If not, it will interrupt 218051078Speter * for each character received. 218151078Speter */ 218251078Speter if (com->esp) 218351078Speter com->fifo_image |= FIFO_DMA_MODE; 218451078Speter#endif 218560471Snyan sio_setreg(com, com_fifo, com->fifo_image); 218651078Speter } 218751078Speter 218865605Sjhb /* 218965605Sjhb * This returns with interrupts disabled so that we can complete 219065605Sjhb * the speed change atomically. Keeping interrupts disabled is 219165605Sjhb * especially important while com_data is hidden. 219265605Sjhb */ 219365605Sjhb (void) siosetwater(com, t->c_ispeed); 219465557Sjasone 219551078Speter if (divisor != 0) { 219660471Snyan sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 219751078Speter /* 219851078Speter * Only set the divisor registers if they would change, 219951078Speter * since on some 16550 incompatibles (UMC8669F), setting 220051078Speter * them while input is arriving them loses sync until 220151078Speter * data stops arriving. 220251078Speter */ 220351078Speter dlbl = divisor & 0xFF; 220460471Snyan if (sio_getreg(com, com_dlbl) != dlbl) 220560471Snyan sio_setreg(com, com_dlbl, dlbl); 220651078Speter dlbh = (u_int) divisor >> 8; 220760471Snyan if (sio_getreg(com, com_dlbh) != dlbh) 220860471Snyan sio_setreg(com, com_dlbh, dlbh); 220951078Speter } 221051078Speter 221160471Snyan sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 221251078Speter 221351078Speter if (!(tp->t_state & TS_TTSTOP)) 221451078Speter com->state |= CS_TTGO; 221551078Speter 221651078Speter if (cflag & CRTS_IFLOW) { 221751078Speter if (com->st16650a) { 221860471Snyan sio_setreg(com, com_cfcr, 0xbf); 221960471Snyan sio_setreg(com, com_fifo, 222060471Snyan sio_getreg(com, com_fifo) | 0x40); 222151078Speter } 222251078Speter com->state |= CS_RTS_IFLOW; 222351078Speter /* 222451078Speter * If CS_RTS_IFLOW just changed from off to on, the change 222551078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 222651078Speter * so do it later by calling comstart() instead of repeating 222751078Speter * a lot of code from comstart() here. 222851078Speter */ 222951078Speter } else if (com->state & CS_RTS_IFLOW) { 223051078Speter com->state &= ~CS_RTS_IFLOW; 223151078Speter /* 223251078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 223351078Speter * on here, since comstart() won't do it later. 223451078Speter */ 223551078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 223651078Speter if (com->st16650a) { 223760471Snyan sio_setreg(com, com_cfcr, 0xbf); 223860471Snyan sio_setreg(com, com_fifo, 223960471Snyan sio_getreg(com, com_fifo) & ~0x40); 224051078Speter } 224151078Speter } 224251078Speter 224351078Speter 224451078Speter /* 224551078Speter * Set up state to handle output flow control. 224651078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 224751078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 224851078Speter */ 224951078Speter com->state |= CS_ODEVREADY; 225051078Speter com->state &= ~CS_CTS_OFLOW; 225151078Speter if (cflag & CCTS_OFLOW) { 225251078Speter com->state |= CS_CTS_OFLOW; 225351078Speter if (!(com->last_modem_status & MSR_CTS)) 225451078Speter com->state &= ~CS_ODEVREADY; 225551078Speter if (com->st16650a) { 225660471Snyan sio_setreg(com, com_cfcr, 0xbf); 225760471Snyan sio_setreg(com, com_fifo, 225860471Snyan sio_getreg(com, com_fifo) | 0x80); 225951078Speter } 226051078Speter } else { 226151078Speter if (com->st16650a) { 226260471Snyan sio_setreg(com, com_cfcr, 0xbf); 226360471Snyan sio_setreg(com, com_fifo, 226460471Snyan sio_getreg(com, com_fifo) & ~0x80); 226551078Speter } 226651078Speter } 226751078Speter 226860471Snyan sio_setreg(com, com_cfcr, com->cfcr_image); 226951078Speter 227051078Speter /* XXX shouldn't call functions while intrs are disabled. */ 227151078Speter disc_optim(tp, t, com); 227251078Speter /* 227351078Speter * Recover from fiddling with CS_TTGO. We used to call siointr1() 227451078Speter * unconditionally, but that defeated the careful discarding of 227551078Speter * stale input in sioopen(). 227651078Speter */ 227751078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 227851078Speter siointr1(com); 227951078Speter 228072200Sbmilekic mtx_unlock_spin(&sio_lock); 228151078Speter splx(s); 228251078Speter comstart(tp); 228351078Speter if (com->ibufold != NULL) { 228451078Speter free(com->ibufold, M_DEVBUF); 228551078Speter com->ibufold = NULL; 228651078Speter } 228751078Speter return (0); 228851078Speter} 228951078Speter 229065605Sjhb/* 229170174Sjhb * This function must be called with the sio_lock mutex released and will 229270174Sjhb * return with it obtained. 229365605Sjhb */ 229451078Speterstatic int 229565605Sjhbsiosetwater(com, speed) 229651078Speter struct com_s *com; 229751078Speter speed_t speed; 229851078Speter{ 229951078Speter int cp4ticks; 230051078Speter u_char *ibuf; 230151078Speter int ibufsize; 230251078Speter struct tty *tp; 230351078Speter 230451078Speter /* 230551078Speter * Make the buffer size large enough to handle a softtty interrupt 230651078Speter * latency of about 2 ticks without loss of throughput or data 230751078Speter * (about 3 ticks if input flow control is not used or not honoured, 230851078Speter * but a bit less for CS5-CS7 modes). 230951078Speter */ 231051078Speter cp4ticks = speed / 10 / hz * 4; 231151078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 231251078Speter ibufsize <<= 1; 231365605Sjhb if (ibufsize == com->ibufsize) { 231472200Sbmilekic mtx_lock_spin(&sio_lock); 231551078Speter return (0); 231665605Sjhb } 231751078Speter 231851078Speter /* 231951078Speter * Allocate input buffer. The extra factor of 2 in the size is 232051078Speter * to allow for an error byte for each input byte. 232151078Speter */ 232251078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 232365605Sjhb if (ibuf == NULL) { 232472200Sbmilekic mtx_lock_spin(&sio_lock); 232551078Speter return (ENOMEM); 232665605Sjhb } 232751078Speter 232851078Speter /* Initialize non-critical variables. */ 232951078Speter com->ibufold = com->ibuf; 233051078Speter com->ibufsize = ibufsize; 233151078Speter tp = com->tp; 233251078Speter if (tp != NULL) { 233351078Speter tp->t_ififosize = 2 * ibufsize; 233451078Speter tp->t_ispeedwat = (speed_t)-1; 233551078Speter tp->t_ospeedwat = (speed_t)-1; 233651078Speter } 233751078Speter 233851078Speter /* 233951078Speter * Read current input buffer, if any. Continue with interrupts 234051078Speter * disabled. 234151078Speter */ 234272200Sbmilekic mtx_lock_spin(&sio_lock); 234351078Speter if (com->iptr != com->ibuf) 234451078Speter sioinput(com); 234551078Speter 234651078Speter /*- 234751078Speter * Initialize critical variables, including input buffer watermarks. 234851078Speter * The external device is asked to stop sending when the buffer 234951078Speter * exactly reaches high water, or when the high level requests it. 235051078Speter * The high level is notified immediately (rather than at a later 235151078Speter * clock tick) when this watermark is reached. 235251078Speter * The buffer size is chosen so the watermark should almost never 235351078Speter * be reached. 235451078Speter * The low watermark is invisibly 0 since the buffer is always 235551078Speter * emptied all at once. 235651078Speter */ 235751078Speter com->iptr = com->ibuf = ibuf; 235851078Speter com->ibufend = ibuf + ibufsize; 235951078Speter com->ierroff = ibufsize; 236051078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 236151078Speter return (0); 236251078Speter} 236351078Speter 236451078Speterstatic void 236551078Spetercomstart(tp) 236651078Speter struct tty *tp; 236751078Speter{ 236851078Speter struct com_s *com; 236951078Speter int s; 237051078Speter int unit; 237151078Speter 237251078Speter unit = DEV_TO_UNIT(tp->t_dev); 237351078Speter com = com_addr(unit); 237457915Simp if (com == NULL) 237557915Simp return; 237651078Speter s = spltty(); 237772200Sbmilekic mtx_lock_spin(&sio_lock); 237851078Speter if (tp->t_state & TS_TTSTOP) 237951078Speter com->state &= ~CS_TTGO; 238051078Speter else 238151078Speter com->state |= CS_TTGO; 238251078Speter if (tp->t_state & TS_TBLOCK) { 238351078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 238451078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 238551078Speter } else { 238651078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 238751078Speter && com->state & CS_RTS_IFLOW) 238851078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 238951078Speter } 239072200Sbmilekic mtx_unlock_spin(&sio_lock); 239151078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 239251078Speter ttwwakeup(tp); 239351078Speter splx(s); 239451078Speter return; 239551078Speter } 239651078Speter if (tp->t_outq.c_cc != 0) { 239751078Speter struct lbq *qp; 239851078Speter struct lbq *next; 239951078Speter 240051078Speter if (!com->obufs[0].l_queued) { 240151078Speter com->obufs[0].l_tail 240251078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 240351078Speter sizeof com->obuf1); 240451078Speter com->obufs[0].l_next = NULL; 240551078Speter com->obufs[0].l_queued = TRUE; 240672200Sbmilekic mtx_lock_spin(&sio_lock); 240751078Speter if (com->state & CS_BUSY) { 240851078Speter qp = com->obufq.l_next; 240951078Speter while ((next = qp->l_next) != NULL) 241051078Speter qp = next; 241151078Speter qp->l_next = &com->obufs[0]; 241251078Speter } else { 241351078Speter com->obufq.l_head = com->obufs[0].l_head; 241451078Speter com->obufq.l_tail = com->obufs[0].l_tail; 241551078Speter com->obufq.l_next = &com->obufs[0]; 241651078Speter com->state |= CS_BUSY; 241751078Speter } 241872200Sbmilekic mtx_unlock_spin(&sio_lock); 241951078Speter } 242051078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 242151078Speter com->obufs[1].l_tail 242251078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 242351078Speter sizeof com->obuf2); 242451078Speter com->obufs[1].l_next = NULL; 242551078Speter com->obufs[1].l_queued = TRUE; 242672200Sbmilekic mtx_lock_spin(&sio_lock); 242751078Speter if (com->state & CS_BUSY) { 242851078Speter qp = com->obufq.l_next; 242951078Speter while ((next = qp->l_next) != NULL) 243051078Speter qp = next; 243151078Speter qp->l_next = &com->obufs[1]; 243251078Speter } else { 243351078Speter com->obufq.l_head = com->obufs[1].l_head; 243451078Speter com->obufq.l_tail = com->obufs[1].l_tail; 243551078Speter com->obufq.l_next = &com->obufs[1]; 243651078Speter com->state |= CS_BUSY; 243751078Speter } 243872200Sbmilekic mtx_unlock_spin(&sio_lock); 243951078Speter } 244051078Speter tp->t_state |= TS_BUSY; 244151078Speter } 244272200Sbmilekic mtx_lock_spin(&sio_lock); 244351078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 244451078Speter siointr1(com); /* fake interrupt to start output */ 244572200Sbmilekic mtx_unlock_spin(&sio_lock); 244651078Speter ttwwakeup(tp); 244751078Speter splx(s); 244851078Speter} 244951078Speter 245051078Speterstatic void 245151654Sphkcomstop(tp, rw) 245251078Speter struct tty *tp; 245351078Speter int rw; 245451078Speter{ 245551078Speter struct com_s *com; 245651078Speter 245751078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 245857915Simp if (com == NULL || com->gone) 245951078Speter return; 246072200Sbmilekic mtx_lock_spin(&sio_lock); 246151078Speter if (rw & FWRITE) { 246251078Speter if (com->hasfifo) 246351078Speter#ifdef COM_ESP 246451078Speter /* XXX avoid h/w bug. */ 246551078Speter if (!com->esp) 246651078Speter#endif 246760471Snyan sio_setreg(com, com_fifo, 246860471Snyan FIFO_XMT_RST | com->fifo_image); 246951078Speter com->obufs[0].l_queued = FALSE; 247051078Speter com->obufs[1].l_queued = FALSE; 247151078Speter if (com->state & CS_ODONE) 247251078Speter com_events -= LOTS_OF_EVENTS; 247351078Speter com->state &= ~(CS_ODONE | CS_BUSY); 247451078Speter com->tp->t_state &= ~TS_BUSY; 247551078Speter } 247651078Speter if (rw & FREAD) { 247751078Speter if (com->hasfifo) 247851078Speter#ifdef COM_ESP 247951078Speter /* XXX avoid h/w bug. */ 248051078Speter if (!com->esp) 248151078Speter#endif 248260471Snyan sio_setreg(com, com_fifo, 248360471Snyan FIFO_RCV_RST | com->fifo_image); 248451078Speter com_events -= (com->iptr - com->ibuf); 248551078Speter com->iptr = com->ibuf; 248651078Speter } 248772200Sbmilekic mtx_unlock_spin(&sio_lock); 248851078Speter comstart(tp); 248951078Speter} 249051078Speter 249151078Speterstatic int 249251078Spetercommctl(com, bits, how) 249351078Speter struct com_s *com; 249451078Speter int bits; 249551078Speter int how; 249651078Speter{ 249751078Speter int mcr; 249851078Speter int msr; 249951078Speter 250051078Speter if (how == DMGET) { 250151078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 250251078Speter mcr = com->mcr_image; 250351078Speter if (mcr & MCR_DTR) 250451078Speter bits |= TIOCM_DTR; 250551078Speter if (mcr & MCR_RTS) 250651078Speter bits |= TIOCM_RTS; 250751078Speter msr = com->prev_modem_status; 250851078Speter if (msr & MSR_CTS) 250951078Speter bits |= TIOCM_CTS; 251051078Speter if (msr & MSR_DCD) 251151078Speter bits |= TIOCM_CD; 251251078Speter if (msr & MSR_DSR) 251351078Speter bits |= TIOCM_DSR; 251451078Speter /* 251551078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 251651078Speter * more volatile by reading the modem status a lot. Perhaps 251751078Speter * we should latch both bits until the status is read here. 251851078Speter */ 251951078Speter if (msr & (MSR_RI | MSR_TERI)) 252051078Speter bits |= TIOCM_RI; 252151078Speter return (bits); 252251078Speter } 252351078Speter mcr = 0; 252451078Speter if (bits & TIOCM_DTR) 252551078Speter mcr |= MCR_DTR; 252651078Speter if (bits & TIOCM_RTS) 252751078Speter mcr |= MCR_RTS; 252851078Speter if (com->gone) 252951078Speter return(0); 253072200Sbmilekic mtx_lock_spin(&sio_lock); 253151078Speter switch (how) { 253251078Speter case DMSET: 253351078Speter outb(com->modem_ctl_port, 253451078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 253551078Speter break; 253651078Speter case DMBIS: 253751078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 253851078Speter break; 253951078Speter case DMBIC: 254051078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 254151078Speter break; 254251078Speter } 254372200Sbmilekic mtx_unlock_spin(&sio_lock); 254451078Speter return (0); 254551078Speter} 254651078Speter 254751078Speterstatic void 254851078Spetersiosettimeout() 254951078Speter{ 255051078Speter struct com_s *com; 255151078Speter bool_t someopen; 255251078Speter int unit; 255351078Speter 255451078Speter /* 255551078Speter * Set our timeout period to 1 second if no polled devices are open. 255651078Speter * Otherwise set it to max(1/200, 1/hz). 255751078Speter * Enable timeouts iff some device is open. 255851078Speter */ 255951078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 256051078Speter sio_timeout = hz; 256151078Speter someopen = FALSE; 256253344Speter for (unit = 0; unit < sio_numunits; ++unit) { 256351078Speter com = com_addr(unit); 256451078Speter if (com != NULL && com->tp != NULL 256551078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 256651078Speter someopen = TRUE; 256751078Speter if (com->poll || com->poll_output) { 256851078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 256951078Speter break; 257051078Speter } 257151078Speter } 257251078Speter } 257351078Speter if (someopen) { 257451078Speter sio_timeouts_until_log = hz / sio_timeout; 257551078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 257651078Speter sio_timeout); 257751078Speter } else { 257851078Speter /* Flush error messages, if any. */ 257951078Speter sio_timeouts_until_log = 1; 258051078Speter comwakeup((void *)NULL); 258151078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 258251078Speter } 258351078Speter} 258451078Speter 258551078Speterstatic void 258651078Spetercomwakeup(chan) 258751078Speter void *chan; 258851078Speter{ 258951078Speter struct com_s *com; 259051078Speter int unit; 259151078Speter 259251078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 259351078Speter 259451078Speter /* 259551078Speter * Recover from lost output interrupts. 259651078Speter * Poll any lines that don't use interrupts. 259751078Speter */ 259853344Speter for (unit = 0; unit < sio_numunits; ++unit) { 259951078Speter com = com_addr(unit); 260051078Speter if (com != NULL && !com->gone 260151078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 260272200Sbmilekic mtx_lock_spin(&sio_lock); 260351078Speter siointr1(com); 260472200Sbmilekic mtx_unlock_spin(&sio_lock); 260551078Speter } 260651078Speter } 260751078Speter 260851078Speter /* 260951078Speter * Check for and log errors, but not too often. 261051078Speter */ 261151078Speter if (--sio_timeouts_until_log > 0) 261251078Speter return; 261351078Speter sio_timeouts_until_log = hz / sio_timeout; 261453344Speter for (unit = 0; unit < sio_numunits; ++unit) { 261551078Speter int errnum; 261651078Speter 261751078Speter com = com_addr(unit); 261851078Speter if (com == NULL) 261951078Speter continue; 262051078Speter if (com->gone) 262151078Speter continue; 262251078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 262351078Speter u_int delta; 262451078Speter u_long total; 262551078Speter 262672200Sbmilekic mtx_lock_spin(&sio_lock); 262751078Speter delta = com->delta_error_counts[errnum]; 262851078Speter com->delta_error_counts[errnum] = 0; 262972200Sbmilekic mtx_unlock_spin(&sio_lock); 263051078Speter if (delta == 0) 263151078Speter continue; 263251078Speter total = com->error_counts[errnum] += delta; 263351078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 263451078Speter unit, delta, error_desc[errnum], 263551078Speter delta == 1 ? "" : "s", total); 263651078Speter } 263751078Speter } 263851078Speter} 263951078Speter 264051078Speterstatic void 264151078Speterdisc_optim(tp, t, com) 264251078Speter struct tty *tp; 264351078Speter struct termios *t; 264451078Speter struct com_s *com; 264551078Speter{ 264651078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 264751078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 264851078Speter && (!(t->c_iflag & PARMRK) 264951078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 265051078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 265151078Speter && linesw[tp->t_line].l_rint == ttyinput) 265251078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 265351078Speter else 265451078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 265551078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 265651078Speter} 265751078Speter 265851078Speter/* 265951078Speter * Following are all routines needed for SIO to act as console 266051078Speter */ 266151078Speter#include <sys/cons.h> 266251078Speter 266351078Speterstruct siocnstate { 266451078Speter u_char dlbl; 266551078Speter u_char dlbh; 266651078Speter u_char ier; 266751078Speter u_char cfcr; 266851078Speter u_char mcr; 266951078Speter}; 267051078Speter 267166230Sjhb#ifndef __alpha__ 267251078Speterstatic speed_t siocngetspeed __P((Port_t, struct speedtab *)); 267366230Sjhb#endif 267451078Speterstatic void siocnclose __P((struct siocnstate *sp, Port_t iobase)); 267551078Speterstatic void siocnopen __P((struct siocnstate *sp, Port_t iobase, int speed)); 267651078Speterstatic void siocntxwait __P((Port_t iobase)); 267751078Speter 267866230Sjhb#ifdef __alpha__ 267966230Sjhbint siocnattach __P((int port, int speed)); 268066230Sjhbint siogdbattach __P((int port, int speed)); 268166230Sjhbint siogdbgetc __P((void)); 268266230Sjhbvoid siogdbputc __P((int c)); 268366230Sjhb#else 268451078Speterstatic cn_probe_t siocnprobe; 268551078Speterstatic cn_init_t siocninit; 268685371Sjlemonstatic cn_term_t siocnterm; 268766230Sjhb#endif 268851078Speterstatic cn_checkc_t siocncheckc; 268951078Speterstatic cn_getc_t siocngetc; 269051078Speterstatic cn_putc_t siocnputc; 269151078Speter 269283832Sdfr#ifndef __alpha__ 269385371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 269455823Syokota siocnputc, NULL); 269551078Speter#endif 269651078Speter 269751078Speter/* To get the GDB related variables */ 269851078Speter#if DDB > 0 269951078Speter#include <ddb/ddb.h> 270051078Speter#endif 270151078Speter 270251078Speterstatic void 270351078Spetersiocntxwait(iobase) 270451078Speter Port_t iobase; 270551078Speter{ 270651078Speter int timo; 270751078Speter 270851078Speter /* 270951078Speter * Wait for any pending transmission to finish. Required to avoid 271051078Speter * the UART lockup bug when the speed is changed, and for normal 271151078Speter * transmits. 271251078Speter */ 271351078Speter timo = 100000; 271451078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 271551078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 271651078Speter ; 271751078Speter} 271851078Speter 271966230Sjhb#ifndef __alpha__ 272066230Sjhb 272151078Speter/* 272251078Speter * Read the serial port specified and try to figure out what speed 272351078Speter * it's currently running at. We're assuming the serial port has 272451078Speter * been initialized and is basicly idle. This routine is only intended 272551078Speter * to be run at system startup. 272651078Speter * 272751078Speter * If the value read from the serial port doesn't make sense, return 0. 272851078Speter */ 272951078Speter 273051078Speterstatic speed_t 273151078Spetersiocngetspeed(iobase, table) 273251078Speter Port_t iobase; 273351078Speter struct speedtab *table; 273451078Speter{ 273551078Speter int code; 273651078Speter u_char dlbh; 273751078Speter u_char dlbl; 273851078Speter u_char cfcr; 273951078Speter 274051078Speter cfcr = inb(iobase + com_cfcr); 274151078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 274251078Speter 274351078Speter dlbl = inb(iobase + com_dlbl); 274451078Speter dlbh = inb(iobase + com_dlbh); 274551078Speter 274651078Speter outb(iobase + com_cfcr, cfcr); 274751078Speter 274851078Speter code = dlbh << 8 | dlbl; 274951078Speter 275053344Speter for (; table->sp_speed != -1; table++) 275151078Speter if (table->sp_code == code) 275251078Speter return (table->sp_speed); 275351078Speter 275458885Simp return (0); /* didn't match anything sane */ 275551078Speter} 275651078Speter 275766230Sjhb#endif 275866230Sjhb 275951078Speterstatic void 276051078Spetersiocnopen(sp, iobase, speed) 276151078Speter struct siocnstate *sp; 276251078Speter Port_t iobase; 276351078Speter int speed; 276451078Speter{ 276551078Speter int divisor; 276651078Speter u_char dlbh; 276751078Speter u_char dlbl; 276851078Speter 276951078Speter /* 277051078Speter * Save all the device control registers except the fifo register 277151078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 277251078Speter * We can't save the fifo register since it is read-only. 277351078Speter */ 277451078Speter sp->ier = inb(iobase + com_ier); 277551078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 277651078Speter siocntxwait(iobase); 277751078Speter sp->cfcr = inb(iobase + com_cfcr); 277851078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 277951078Speter sp->dlbl = inb(iobase + com_dlbl); 278051078Speter sp->dlbh = inb(iobase + com_dlbh); 278151078Speter /* 278251078Speter * Only set the divisor registers if they would change, since on 278351078Speter * some 16550 incompatibles (Startech), setting them clears the 278451078Speter * data input register. This also reduces the effects of the 278551078Speter * UMC8669F bug. 278651078Speter */ 278751078Speter divisor = ttspeedtab(speed, comspeedtab); 278851078Speter dlbl = divisor & 0xFF; 278951078Speter if (sp->dlbl != dlbl) 279051078Speter outb(iobase + com_dlbl, dlbl); 279151078Speter dlbh = (u_int) divisor >> 8; 279251078Speter if (sp->dlbh != dlbh) 279351078Speter outb(iobase + com_dlbh, dlbh); 279451078Speter outb(iobase + com_cfcr, CFCR_8BITS); 279551078Speter sp->mcr = inb(iobase + com_mcr); 279651078Speter /* 279751078Speter * We don't want interrupts, but must be careful not to "disable" 279851078Speter * them by clearing the MCR_IENABLE bit, since that might cause 279951078Speter * an interrupt by floating the IRQ line. 280051078Speter */ 280151078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 280251078Speter} 280351078Speter 280451078Speterstatic void 280551078Spetersiocnclose(sp, iobase) 280651078Speter struct siocnstate *sp; 280751078Speter Port_t iobase; 280851078Speter{ 280951078Speter /* 281051078Speter * Restore the device control registers. 281151078Speter */ 281251078Speter siocntxwait(iobase); 281351078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 281451078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 281551078Speter outb(iobase + com_dlbl, sp->dlbl); 281651078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 281751078Speter outb(iobase + com_dlbh, sp->dlbh); 281851078Speter outb(iobase + com_cfcr, sp->cfcr); 281951078Speter /* 282051078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 282151078Speter */ 282251078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 282351078Speter outb(iobase + com_ier, sp->ier); 282451078Speter} 282551078Speter 282666230Sjhb#ifndef __alpha__ 282766230Sjhb 282851078Speterstatic void 282951078Spetersiocnprobe(cp) 283051078Speter struct consdev *cp; 283151078Speter{ 283251078Speter speed_t boot_speed; 283351078Speter u_char cfcr; 283451078Speter int s, unit; 283551078Speter struct siocnstate sp; 283651078Speter 283751078Speter /* 283851078Speter * Find our first enabled console, if any. If it is a high-level 283951078Speter * console device, then initialize it and return successfully. 284051078Speter * If it is a low-level console device, then initialize it and 284151078Speter * return unsuccessfully. It must be initialized in both cases 284251078Speter * for early use by console drivers and debuggers. Initializing 284351078Speter * the hardware is not necessary in all cases, since the i/o 284451078Speter * routines initialize it on the fly, but it is necessary if 284551078Speter * input might arrive while the hardware is switched back to an 284651078Speter * uninitialized state. We can't handle multiple console devices 284751078Speter * yet because our low-level routines don't take a device arg. 284851078Speter * We trust the user to set the console flags properly so that we 284951078Speter * don't need to probe. 285051078Speter */ 285151078Speter cp->cn_pri = CN_DEAD; 285251078Speter 285351078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 285451078Speter int flags; 285551078Speter int disabled; 285651078Speter if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 285751078Speter if (disabled) 285851078Speter continue; 285951078Speter } 286051078Speter if (resource_int_value("sio", unit, "flags", &flags)) 286151078Speter continue; 286251078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 286351078Speter int port; 286451078Speter Port_t iobase; 286551078Speter 286651078Speter if (resource_int_value("sio", unit, "port", &port)) 286751078Speter continue; 286851078Speter iobase = port; 286951078Speter s = spltty(); 287051078Speter if (boothowto & RB_SERIAL) { 287151078Speter boot_speed = siocngetspeed(iobase, comspeedtab); 287251078Speter if (boot_speed) 287351078Speter comdefaultrate = boot_speed; 287451078Speter } 287551078Speter 287651078Speter /* 287751078Speter * Initialize the divisor latch. We can't rely on 287851078Speter * siocnopen() to do this the first time, since it 287951078Speter * avoids writing to the latch if the latch appears 288051078Speter * to have the correct value. Also, if we didn't 288151078Speter * just read the speed from the hardware, then we 288251078Speter * need to set the speed in hardware so that 288351078Speter * switching it later is null. 288451078Speter */ 288551078Speter cfcr = inb(iobase + com_cfcr); 288651078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 288751078Speter outb(iobase + com_dlbl, 288851078Speter COMBRD(comdefaultrate) & 0xff); 288951078Speter outb(iobase + com_dlbh, 289051078Speter (u_int) COMBRD(comdefaultrate) >> 8); 289151078Speter outb(iobase + com_cfcr, cfcr); 289251078Speter 289351078Speter siocnopen(&sp, iobase, comdefaultrate); 289451078Speter 289551078Speter splx(s); 289651078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 289751078Speter cp->cn_dev = makedev(CDEV_MAJOR, unit); 289851078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 289951078Speter || boothowto & RB_SERIAL 290051078Speter ? CN_REMOTE : CN_NORMAL; 290151078Speter siocniobase = iobase; 290251078Speter siocnunit = unit; 290351078Speter } 290451078Speter if (COM_DEBUGGER(flags)) { 290551078Speter printf("sio%d: gdb debugging port\n", unit); 290651078Speter siogdbiobase = iobase; 290751078Speter siogdbunit = unit; 290851078Speter#if DDB > 0 290951078Speter gdbdev = makedev(CDEV_MAJOR, unit); 291051078Speter gdb_getc = siocngetc; 291151078Speter gdb_putc = siocnputc; 291251078Speter#endif 291351078Speter } 291451078Speter } 291551078Speter } 291651078Speter#ifdef __i386__ 291751078Speter#if DDB > 0 291851078Speter /* 291951078Speter * XXX Ugly Compatability. 292051078Speter * If no gdb port has been specified, set it to be the console 292151078Speter * as some configuration files don't specify the gdb port. 292251078Speter */ 292351078Speter if (gdbdev == NODEV && (boothowto & RB_GDB)) { 292451078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 292551078Speter siocnunit); 292651078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 292751078Speter printf("configuration file (currently sio only).\n"); 292851078Speter siogdbiobase = siocniobase; 292951078Speter siogdbunit = siocnunit; 293051078Speter gdbdev = makedev(CDEV_MAJOR, siocnunit); 293151078Speter gdb_getc = siocngetc; 293251078Speter gdb_putc = siocnputc; 293351078Speter } 293451078Speter#endif 293551078Speter#endif 293651078Speter} 293751078Speter 293866230Sjhbstatic void 293966230Sjhbsiocninit(cp) 294066230Sjhb struct consdev *cp; 294166230Sjhb{ 294266230Sjhb comconsole = DEV_TO_UNIT(cp->cn_dev); 294366230Sjhb} 294466230Sjhb 294585371Sjlemonstatic void 294685371Sjlemonsiocnterm(cp) 294785371Sjlemon struct consdev *cp; 294885371Sjlemon{ 294985371Sjlemon comconsole = -1; 295085371Sjlemon} 295185371Sjlemon 295266230Sjhb#endif 295366230Sjhb 295451078Speter#ifdef __alpha__ 295551078Speter 295655868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 295751078Speter 295851078Speterint 295951078Spetersiocnattach(port, speed) 296051078Speter int port; 296151078Speter int speed; 296251078Speter{ 296351078Speter int s; 296451078Speter u_char cfcr; 296551078Speter struct siocnstate sp; 296651078Speter 296751078Speter siocniobase = port; 296851078Speter comdefaultrate = speed; 296951078Speter sio_consdev.cn_pri = CN_NORMAL; 297051078Speter sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0); 297151078Speter 297251078Speter s = spltty(); 297351078Speter 297451078Speter /* 297551078Speter * Initialize the divisor latch. We can't rely on 297651078Speter * siocnopen() to do this the first time, since it 297751078Speter * avoids writing to the latch if the latch appears 297851078Speter * to have the correct value. Also, if we didn't 297951078Speter * just read the speed from the hardware, then we 298051078Speter * need to set the speed in hardware so that 298151078Speter * switching it later is null. 298251078Speter */ 298351078Speter cfcr = inb(siocniobase + com_cfcr); 298451078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 298551078Speter outb(siocniobase + com_dlbl, 298651078Speter COMBRD(comdefaultrate) & 0xff); 298751078Speter outb(siocniobase + com_dlbh, 298851078Speter (u_int) COMBRD(comdefaultrate) >> 8); 298951078Speter outb(siocniobase + com_cfcr, cfcr); 299051078Speter 299151078Speter siocnopen(&sp, siocniobase, comdefaultrate); 299251078Speter splx(s); 299351078Speter 299485426Sjlemon cnadd(&sio_consdev); 299558885Simp return (0); 299651078Speter} 299751078Speter 299851078Speterint 299951078Spetersiogdbattach(port, speed) 300051078Speter int port; 300151078Speter int speed; 300251078Speter{ 300351078Speter int s; 300451078Speter u_char cfcr; 300551078Speter struct siocnstate sp; 300665714Sjhb int unit = 1; /* XXX !!! */ 300751078Speter 300851078Speter siogdbiobase = port; 300951078Speter gdbdefaultrate = speed; 301051078Speter 301165714Sjhb printf("sio%d: gdb debugging port\n", unit); 301265714Sjhb siogdbunit = unit; 301365714Sjhb#if DDB > 0 301465714Sjhb gdbdev = makedev(CDEV_MAJOR, unit); 301565714Sjhb gdb_getc = siocngetc; 301665714Sjhb gdb_putc = siocnputc; 301765714Sjhb#endif 301865714Sjhb 301951078Speter s = spltty(); 302051078Speter 302151078Speter /* 302251078Speter * Initialize the divisor latch. We can't rely on 302351078Speter * siocnopen() to do this the first time, since it 302451078Speter * avoids writing to the latch if the latch appears 302551078Speter * to have the correct value. Also, if we didn't 302651078Speter * just read the speed from the hardware, then we 302751078Speter * need to set the speed in hardware so that 302851078Speter * switching it later is null. 302951078Speter */ 303051078Speter cfcr = inb(siogdbiobase + com_cfcr); 303151078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 303251078Speter outb(siogdbiobase + com_dlbl, 303351078Speter COMBRD(gdbdefaultrate) & 0xff); 303451078Speter outb(siogdbiobase + com_dlbh, 303551078Speter (u_int) COMBRD(gdbdefaultrate) >> 8); 303651078Speter outb(siogdbiobase + com_cfcr, cfcr); 303751078Speter 303851078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 303951078Speter splx(s); 304051078Speter 304158885Simp return (0); 304251078Speter} 304351078Speter 304451078Speter#endif 304551078Speter 304651078Speterstatic int 304751078Spetersiocncheckc(dev) 304851078Speter dev_t dev; 304951078Speter{ 305051078Speter int c; 305151078Speter Port_t iobase; 305251078Speter int s; 305351078Speter struct siocnstate sp; 305451078Speter 305551078Speter if (minor(dev) == siogdbunit) 305651078Speter iobase = siogdbiobase; 305751078Speter else 305851078Speter iobase = siocniobase; 305951078Speter s = spltty(); 306051078Speter siocnopen(&sp, iobase, comdefaultrate); 306151078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 306251078Speter c = inb(iobase + com_data); 306351078Speter else 306451078Speter c = -1; 306551078Speter siocnclose(&sp, iobase); 306651078Speter splx(s); 306751078Speter return (c); 306851078Speter} 306951078Speter 307051078Speter 307151078Speterint 307251078Spetersiocngetc(dev) 307351078Speter dev_t dev; 307451078Speter{ 307551078Speter int c; 307651078Speter Port_t iobase; 307751078Speter int s; 307851078Speter struct siocnstate sp; 307951078Speter 308051078Speter if (minor(dev) == siogdbunit) 308151078Speter iobase = siogdbiobase; 308251078Speter else 308351078Speter iobase = siocniobase; 308451078Speter s = spltty(); 308551078Speter siocnopen(&sp, iobase, comdefaultrate); 308651078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 308751078Speter ; 308851078Speter c = inb(iobase + com_data); 308951078Speter siocnclose(&sp, iobase); 309051078Speter splx(s); 309151078Speter return (c); 309251078Speter} 309351078Speter 309451078Spetervoid 309551078Spetersiocnputc(dev, c) 309651078Speter dev_t dev; 309751078Speter int c; 309851078Speter{ 309988582Sbde int need_unlock; 310051078Speter int s; 310151078Speter struct siocnstate sp; 310251078Speter Port_t iobase; 310351078Speter 310451078Speter if (minor(dev) == siogdbunit) 310551078Speter iobase = siogdbiobase; 310651078Speter else 310751078Speter iobase = siocniobase; 310851078Speter s = spltty(); 310988582Sbde need_unlock = 0; 311088582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 311184029Sjlemon mtx_lock_spin(&sio_lock); 311288582Sbde need_unlock = 1; 311388582Sbde } 311451078Speter siocnopen(&sp, iobase, comdefaultrate); 311551078Speter siocntxwait(iobase); 311651078Speter outb(iobase + com_data, c); 311751078Speter siocnclose(&sp, iobase); 311888582Sbde if (need_unlock) 311984029Sjlemon mtx_unlock_spin(&sio_lock); 312051078Speter splx(s); 312151078Speter} 312251078Speter 312351078Speter#ifdef __alpha__ 312451078Speterint 312551078Spetersiogdbgetc() 312651078Speter{ 312751078Speter int c; 312851078Speter Port_t iobase; 312951078Speter int s; 313051078Speter struct siocnstate sp; 313151078Speter 313251078Speter iobase = siogdbiobase; 313351078Speter s = spltty(); 313451078Speter siocnopen(&sp, iobase, gdbdefaultrate); 313551078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 313651078Speter ; 313751078Speter c = inb(iobase + com_data); 313851078Speter siocnclose(&sp, iobase); 313951078Speter splx(s); 314051078Speter return (c); 314151078Speter} 314251078Speter 314351078Spetervoid 314451078Spetersiogdbputc(c) 314551078Speter int c; 314651078Speter{ 314751078Speter int s; 314851078Speter struct siocnstate sp; 314951078Speter 315051078Speter s = spltty(); 315151078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 315251078Speter siocntxwait(siogdbiobase); 315351078Speter outb(siogdbiobase + com_data, c); 315451078Speter siocnclose(&sp, siogdbiobase); 315551078Speter splx(s); 315651078Speter} 315751078Speter#endif 3158