sio.c revision 84103
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by the University of
16 *	California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/dev/sio/sio.c 84103 2001-09-29 04:49:11Z jlemon $
34 *	from: @(#)com.c	7.5 (Berkeley) 5/16/91
35 *	from: i386/isa sio.c,v 1.234
36 */
37
38#include "opt_comconsole.h"
39#include "opt_compat.h"
40#include "opt_ddb.h"
41#include "opt_sio.h"
42#include "card.h"
43#include "pci.h"
44
45/*
46 * Serial driver, based on 386BSD-0.1 com driver.
47 * Mostly rewritten to use pseudo-DMA.
48 * Works for National Semiconductor NS8250-NS16550AF UARTs.
49 * COM driver, based on HP dca driver.
50 *
51 * Changes for PC-Card integration:
52 *	- Added PC-Card driver table and handlers
53 */
54#include <sys/param.h>
55#include <sys/systm.h>
56#include <sys/bus.h>
57#include <sys/bus.h>
58#include <sys/conf.h>
59#include <sys/dkstat.h>
60#include <sys/fcntl.h>
61#include <sys/interrupt.h>
62#include <sys/kernel.h>
63#include <sys/lock.h>
64#include <sys/malloc.h>
65#include <sys/module.h>
66#include <sys/mutex.h>
67#include <sys/proc.h>
68#include <sys/reboot.h>
69#include <sys/sysctl.h>
70#include <sys/syslog.h>
71#include <sys/tty.h>
72#include <machine/bus_pio.h>
73#include <machine/bus.h>
74#include <sys/rman.h>
75#include <sys/timetc.h>
76#include <sys/timepps.h>
77
78#include <isa/isareg.h>
79#include <isa/isavar.h>
80#if NPCI > 0
81#include <pci/pcireg.h>
82#include <pci/pcivar.h>
83#endif
84
85#include <machine/clock.h>
86#include <machine/resource.h>
87
88#include <isa/sioreg.h>
89
90#ifdef COM_ESP
91#include <dev/ic/esp.h>
92#endif
93#include <dev/ic/ns16550.h>
94
95#define	LOTS_OF_EVENTS	64	/* helps separate urgent events from input */
96
97#define	CALLOUT_MASK		0x80
98#define	CONTROL_MASK		0x60
99#define	CONTROL_INIT_STATE	0x20
100#define	CONTROL_LOCK_STATE	0x40
101#define	DEV_TO_UNIT(dev)	(MINOR_TO_UNIT(minor(dev)))
102#define	MINOR_MAGIC_MASK	(CALLOUT_MASK | CONTROL_MASK)
103#define	MINOR_TO_UNIT(mynor)	((mynor) & ~MINOR_MAGIC_MASK)
104
105#ifdef COM_MULTIPORT
106/* checks in flags for multiport and which is multiport "master chip"
107 * for a given card
108 */
109#define	COM_ISMULTIPORT(flags)	((flags) & 0x01)
110#define	COM_MPMASTER(flags)	(((flags) >> 8) & 0x0ff)
111#define	COM_NOTAST4(flags)	((flags) & 0x04)
112#endif /* COM_MULTIPORT */
113
114#define	COM_CONSOLE(flags)	((flags) & 0x10)
115#define	COM_FORCECONSOLE(flags)	((flags) & 0x20)
116#define	COM_LLCONSOLE(flags)	((flags) & 0x40)
117#define	COM_DEBUGGER(flags)	((flags) & 0x80)
118#define	COM_LOSESOUTINTS(flags)	((flags) & 0x08)
119#define	COM_NOFIFO(flags)		((flags) & 0x02)
120#define COM_ST16650A(flags)	((flags) & 0x20000)
121#define COM_C_NOPROBE		(0x40000)
122#define COM_NOPROBE(flags)	((flags) & COM_C_NOPROBE)
123#define COM_C_IIR_TXRDYBUG	(0x80000)
124#define COM_IIR_TXRDYBUG(flags)	((flags) & COM_C_IIR_TXRDYBUG)
125#define	COM_FIFOSIZE(flags)	(((flags) & 0xff000000) >> 24)
126
127#define	com_scr		7	/* scratch register for 16450-16550 (R/W) */
128
129#define	sio_getreg(com, off) \
130	(bus_space_read_1((com)->bst, (com)->bsh, (off)))
131#define	sio_setreg(com, off, value) \
132	(bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
133
134/*
135 * com state bits.
136 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
137 * than the other bits so that they can be tested as a group without masking
138 * off the low bits.
139 *
140 * The following com and tty flags correspond closely:
141 *	CS_BUSY		= TS_BUSY (maintained by comstart(), siopoll() and
142 *				   comstop())
143 *	CS_TTGO		= ~TS_TTSTOP (maintained by comparam() and comstart())
144 *	CS_CTS_OFLOW	= CCTS_OFLOW (maintained by comparam())
145 *	CS_RTS_IFLOW	= CRTS_IFLOW (maintained by comparam())
146 * TS_FLUSH is not used.
147 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
148 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
149 */
150#define	CS_BUSY		0x80	/* output in progress */
151#define	CS_TTGO		0x40	/* output not stopped by XOFF */
152#define	CS_ODEVREADY	0x20	/* external device h/w ready (CTS) */
153#define	CS_CHECKMSR	1	/* check of MSR scheduled */
154#define	CS_CTS_OFLOW	2	/* use CTS output flow control */
155#define	CS_DTR_OFF	0x10	/* DTR held off */
156#define	CS_ODONE	4	/* output completed */
157#define	CS_RTS_IFLOW	8	/* use RTS input flow control */
158#define	CSE_BUSYCHECK	1	/* siobusycheck() scheduled */
159
160static	char const * const	error_desc[] = {
161#define	CE_OVERRUN			0
162	"silo overflow",
163#define	CE_INTERRUPT_BUF_OVERFLOW	1
164	"interrupt-level buffer overflow",
165#define	CE_TTY_BUF_OVERFLOW		2
166	"tty-level buffer overflow",
167};
168
169#define	CE_NTYPES			3
170#define	CE_RECORD(com, errnum)		(++(com)->delta_error_counts[errnum])
171
172/* types.  XXX - should be elsewhere */
173typedef u_int	Port_t;		/* hardware port */
174typedef u_char	bool_t;		/* boolean */
175
176/* queue of linear buffers */
177struct lbq {
178	u_char	*l_head;	/* next char to process */
179	u_char	*l_tail;	/* one past the last char to process */
180	struct lbq *l_next;	/* next in queue */
181	bool_t	l_queued;	/* nonzero if queued */
182};
183
184/* com device structure */
185struct com_s {
186	u_int	flags;		/* Copy isa device flags */
187	u_char	state;		/* miscellaneous flag bits */
188	bool_t  active_out;	/* nonzero if the callout device is open */
189	u_char	cfcr_image;	/* copy of value written to CFCR */
190#ifdef COM_ESP
191	bool_t	esp;		/* is this unit a hayes esp board? */
192#endif
193	u_char	extra_state;	/* more flag bits, separate for order trick */
194	u_char	fifo_image;	/* copy of value written to FIFO */
195	bool_t	hasfifo;	/* nonzero for 16550 UARTs */
196	bool_t	st16650a;	/* Is a Startech 16650A or RTS/CTS compat */
197	bool_t	loses_outints;	/* nonzero if device loses output interrupts */
198	u_char	mcr_image;	/* copy of value written to MCR */
199#ifdef COM_MULTIPORT
200	bool_t	multiport;	/* is this unit part of a multiport device? */
201#endif /* COM_MULTIPORT */
202	bool_t	no_irq;		/* nonzero if irq is not attached */
203	bool_t  gone;		/* hardware disappeared */
204	bool_t	poll;		/* nonzero if polling is required */
205	bool_t	poll_output;	/* nonzero if polling for output is required */
206	int	unit;		/* unit	number */
207	int	dtr_wait;	/* time to hold DTR down on close (* 1/hz) */
208	u_int	tx_fifo_size;
209	u_int	wopeners;	/* # processes waiting for DCD in open() */
210
211	/*
212	 * The high level of the driver never reads status registers directly
213	 * because there would be too many side effects to handle conveniently.
214	 * Instead, it reads copies of the registers stored here by the
215	 * interrupt handler.
216	 */
217	u_char	last_modem_status;	/* last MSR read by intr handler */
218	u_char	prev_modem_status;	/* last MSR handled by high level */
219
220	u_char	hotchar;	/* ldisc-specific char to be handled ASAP */
221	u_char	*ibuf;		/* start of input buffer */
222	u_char	*ibufend;	/* end of input buffer */
223	u_char	*ibufold;	/* old input buffer, to be freed */
224	u_char	*ihighwater;	/* threshold in input buffer */
225	u_char	*iptr;		/* next free spot in input buffer */
226	int	ibufsize;	/* size of ibuf (not include error bytes) */
227	int	ierroff;	/* offset of error bytes in ibuf */
228
229	struct lbq	obufq;	/* head of queue of output buffers */
230	struct lbq	obufs[2];	/* output buffers */
231
232	bus_space_tag_t		bst;
233	bus_space_handle_t	bsh;
234
235	Port_t	data_port;	/* i/o ports */
236#ifdef COM_ESP
237	Port_t	esp_port;
238#endif
239	Port_t	int_id_port;
240	Port_t	modem_ctl_port;
241	Port_t	line_status_port;
242	Port_t	modem_status_port;
243	Port_t	intr_ctl_port;	/* Ports of IIR register */
244
245	struct tty	*tp;	/* cross reference */
246
247	/* Initial state. */
248	struct termios	it_in;	/* should be in struct tty */
249	struct termios	it_out;
250
251	/* Lock state. */
252	struct termios	lt_in;	/* should be in struct tty */
253	struct termios	lt_out;
254
255	bool_t	do_timestamp;
256	bool_t	do_dcd_timestamp;
257	struct timeval	timestamp;
258	struct timeval	dcd_timestamp;
259	struct	pps_state pps;
260
261	u_long	bytes_in;	/* statistics */
262	u_long	bytes_out;
263	u_int	delta_error_counts[CE_NTYPES];
264	u_long	error_counts[CE_NTYPES];
265
266	struct resource *irqres;
267	struct resource *ioportres;
268	void *cookie;
269	dev_t devs[6];
270
271	/*
272	 * Data area for output buffers.  Someday we should build the output
273	 * buffer queue without copying data.
274	 */
275	u_char	obuf1[256];
276	u_char	obuf2[256];
277};
278
279#ifdef COM_ESP
280static	int	espattach	__P((struct com_s *com, Port_t esp_port));
281#endif
282static	int	sioattach	__P((device_t dev, int rid));
283static	int	sio_isa_attach	__P((device_t dev));
284
285static	timeout_t siobusycheck;
286static	timeout_t siodtrwakeup;
287static	void	comhardclose	__P((struct com_s *com));
288static	void	sioinput	__P((struct com_s *com));
289static	void	siointr1	__P((struct com_s *com));
290static	void	siointr		__P((void *arg));
291static	int	commctl		__P((struct com_s *com, int bits, int how));
292static	int	comparam	__P((struct tty *tp, struct termios *t));
293static	void	siopoll		__P((void *));
294static	int	sioprobe	__P((device_t dev, int xrid));
295static	int	sio_isa_probe	__P((device_t dev));
296static	void	siosettimeout	__P((void));
297static	int	siosetwater	__P((struct com_s *com, speed_t speed));
298static	void	comstart	__P((struct tty *tp));
299static	void	comstop		__P((struct tty *tp, int rw));
300static	timeout_t comwakeup;
301static	void	disc_optim	__P((struct tty	*tp, struct termios *t,
302				     struct com_s *com));
303
304#if NCARD > 0
305static	int	sio_pccard_attach __P((device_t dev));
306static	int	sio_pccard_detach __P((device_t dev));
307static	int	sio_pccard_probe __P((device_t dev));
308#endif /* NCARD > 0 */
309
310#if NPCI > 0
311static	int	sio_pci_attach __P((device_t dev));
312static	void	sio_pci_kludge_unit __P((device_t dev));
313static	int	sio_pci_probe __P((device_t dev));
314#endif /* NPCI > 0 */
315
316static char	driver_name[] = "sio";
317static struct	mtx sio_lock;
318static int	sio_inited;
319
320/* table and macro for fast conversion from a unit number to its com struct */
321static	devclass_t	sio_devclass;
322#define	com_addr(unit)	((struct com_s *) \
323			 devclass_get_softc(sio_devclass, unit))
324
325static device_method_t sio_isa_methods[] = {
326	/* Device interface */
327	DEVMETHOD(device_probe,		sio_isa_probe),
328	DEVMETHOD(device_attach,	sio_isa_attach),
329
330	{ 0, 0 }
331};
332
333static driver_t sio_isa_driver = {
334	driver_name,
335	sio_isa_methods,
336	sizeof(struct com_s),
337};
338
339#if NCARD > 0
340static device_method_t sio_pccard_methods[] = {
341	/* Device interface */
342	DEVMETHOD(device_probe,		sio_pccard_probe),
343	DEVMETHOD(device_attach,	sio_pccard_attach),
344	DEVMETHOD(device_detach,	sio_pccard_detach),
345
346	{ 0, 0 }
347};
348
349static driver_t sio_pccard_driver = {
350	driver_name,
351	sio_pccard_methods,
352	sizeof(struct com_s),
353};
354#endif /* NCARD > 0 */
355
356#if NPCI > 0
357static device_method_t sio_pci_methods[] = {
358	/* Device interface */
359	DEVMETHOD(device_probe,		sio_pci_probe),
360	DEVMETHOD(device_attach,	sio_pci_attach),
361
362	{ 0, 0 }
363};
364
365static driver_t sio_pci_driver = {
366	driver_name,
367	sio_pci_methods,
368	sizeof(struct com_s),
369};
370#endif /* NPCI > 0 */
371
372static	d_open_t	sioopen;
373static	d_close_t	sioclose;
374static	d_read_t	sioread;
375static	d_write_t	siowrite;
376static	d_ioctl_t	sioioctl;
377
378#define	CDEV_MAJOR	28
379static struct cdevsw sio_cdevsw = {
380	/* open */	sioopen,
381	/* close */	sioclose,
382	/* read */	sioread,
383	/* write */	siowrite,
384	/* ioctl */	sioioctl,
385	/* poll */	ttypoll,
386	/* mmap */	nommap,
387	/* strategy */	nostrategy,
388	/* name */	driver_name,
389	/* maj */	CDEV_MAJOR,
390	/* dump */	nodump,
391	/* psize */	nopsize,
392	/* flags */	D_TTY | D_KQFILTER,
393	/* kqfilter */	ttykqfilter,
394};
395
396int	comconsole = -1;
397static	volatile speed_t	comdefaultrate = CONSPEED;
398#ifdef __alpha__
399static	volatile speed_t	gdbdefaultrate = CONSPEED;
400#endif
401static	u_int	com_events;	/* input chars + weighted output completions */
402static	Port_t	siocniobase;
403#ifndef __alpha__
404static	int	siocnunit;
405#endif
406static	Port_t	siogdbiobase;
407static	int	siogdbunit = -1;
408static	void	*sio_slow_ih;
409static	void	*sio_fast_ih;
410static	int	sio_timeout;
411static	int	sio_timeouts_until_log;
412static	struct	callout_handle sio_timeout_handle
413    = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
414static	int	sio_numunits;
415
416static	struct speedtab comspeedtab[] = {
417	{ 0,		0 },
418	{ 50,		COMBRD(50) },
419	{ 75,		COMBRD(75) },
420	{ 110,		COMBRD(110) },
421	{ 134,		COMBRD(134) },
422	{ 150,		COMBRD(150) },
423	{ 200,		COMBRD(200) },
424	{ 300,		COMBRD(300) },
425	{ 600,		COMBRD(600) },
426	{ 1200,		COMBRD(1200) },
427	{ 1800,		COMBRD(1800) },
428	{ 2400,		COMBRD(2400) },
429	{ 4800,		COMBRD(4800) },
430	{ 9600,		COMBRD(9600) },
431	{ 19200,	COMBRD(19200) },
432	{ 28800,	COMBRD(28800) },
433	{ 38400,	COMBRD(38400) },
434	{ 57600,	COMBRD(57600) },
435	{ 115200,	COMBRD(115200) },
436	{ -1,		-1 }
437};
438
439#ifdef COM_ESP
440/* XXX configure this properly. */
441static	Port_t	likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
442static	Port_t	likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
443#endif
444
445/*
446 * handle sysctl read/write requests for console speed
447 *
448 * In addition to setting comdefaultrate for I/O through /dev/console,
449 * also set the initial and lock values for the /dev/ttyXX device
450 * if there is one associated with the console.  Finally, if the /dev/tty
451 * device has already been open, change the speed on the open running port
452 * itself.
453 */
454
455static int
456sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
457{
458	int error, s;
459	speed_t newspeed;
460	struct com_s *com;
461	struct tty *tp;
462
463	newspeed = comdefaultrate;
464
465	error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
466	if (error || !req->newptr)
467		return (error);
468
469	comdefaultrate = newspeed;
470
471	if (comconsole < 0)		/* serial console not selected? */
472		return (0);
473
474	com = com_addr(comconsole);
475	if (com == NULL)
476		return (ENXIO);
477
478	/*
479	 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
480	 * (note, the lock rates really are boolean -- if non-zero, disallow
481	 *  speed changes)
482	 */
483	com->it_in.c_ispeed  = com->it_in.c_ospeed =
484	com->lt_in.c_ispeed  = com->lt_in.c_ospeed =
485	com->it_out.c_ispeed = com->it_out.c_ospeed =
486	com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate;
487
488	/*
489	 * if we're open, change the running rate too
490	 */
491	tp = com->tp;
492	if (tp && (tp->t_state & TS_ISOPEN)) {
493		tp->t_termios.c_ispeed =
494		tp->t_termios.c_ospeed = comdefaultrate;
495		s = spltty();
496		error = comparam(tp, &tp->t_termios);
497		splx(s);
498	}
499	return error;
500}
501
502SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
503	    0, 0, sysctl_machdep_comdefaultrate, "I", "");
504
505#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit))
506#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit))
507
508#if NCARD > 0
509static int
510sio_pccard_probe(dev)
511	device_t	dev;
512{
513	/* Do not probe IRQ - pccard doesn't turn on the interrupt line */
514	/* until bus_setup_intr */
515	SET_FLAG(dev, COM_C_NOPROBE);
516
517	return (sioprobe(dev, 0));
518}
519
520static int
521sio_pccard_attach(dev)
522	device_t	dev;
523{
524	return (sioattach(dev, 0));
525}
526
527/*
528 *	sio_detach - unload the driver and clear the table.
529 *	XXX TODO:
530 *	This is usually called when the card is ejected, but
531 *	can be caused by a modunload of a controller driver.
532 *	The idea is to reset the driver's view of the device
533 *	and ensure that any driver entry points such as
534 *	read and write do not hang.
535 */
536static int
537sio_pccard_detach(dev)
538	device_t	dev;
539{
540	struct com_s	*com;
541	int i;
542
543	com = (struct com_s *) device_get_softc(dev);
544	if (com == NULL) {
545		device_printf(dev, "NULL com in siounload\n");
546		return (0);
547	}
548	com->gone = 1;
549	for (i = 0 ; i < 6; i++)
550		destroy_dev(com->devs[i]);
551	if (com->irqres) {
552		bus_teardown_intr(dev, com->irqres, com->cookie);
553		bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres);
554	}
555	if (com->ioportres)
556		bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres);
557	if (com->tp && (com->tp->t_state & TS_ISOPEN)) {
558		device_printf(dev, "still open, forcing close\n");
559		(*linesw[com->tp->t_line].l_close)(com->tp, 0);
560		com->tp->t_gen++;
561		ttyclose(com->tp);
562		ttwakeup(com->tp);
563		ttwwakeup(com->tp);
564	} else {
565		if (com->ibuf != NULL)
566			free(com->ibuf, M_DEVBUF);
567	}
568	device_printf(dev, "unloaded\n");
569	return (0);
570}
571#endif /* NCARD > 0 */
572
573#if NPCI > 0
574struct pci_ids {
575	u_int32_t	type;
576	const char	*desc;
577	int		rid;
578};
579
580static struct pci_ids pci_ids[] = {
581	{ 0x100812b9, "3COM PCI FaxModem", 0x10 },
582	{ 0x2000131f, "CyberSerial (1-port) 16550", 0x10 },
583	{ 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
584	{ 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
585	{ 0x048011c1, "Lucent kermit based PCI Modem", 0x14 },
586	{ 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 },
587	{ 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 },
588	/* { 0xXXXXXXXX, "Xircom Cardbus modem", 0x10 }, */
589	{ 0x00000000, NULL, 0 }
590};
591
592static int
593sio_pci_attach(dev)
594	device_t	dev;
595{
596	u_int32_t	type;
597	struct pci_ids	*id;
598
599	type = pci_get_devid(dev);
600	id = pci_ids;
601	while (id->type && id->type != type)
602		id++;
603	if (id->desc == NULL)
604		return (ENXIO);
605	sio_pci_kludge_unit(dev);
606	return (sioattach(dev, id->rid));
607}
608
609/*
610 * Don't cut and paste this to other drivers.  It is a horrible kludge
611 * which will fail to work and also be unnecessary in future versions.
612 */
613static void
614sio_pci_kludge_unit(dev)
615	device_t dev;
616{
617	devclass_t	dc;
618	int		err;
619	int		start;
620	int		unit;
621
622	unit = 0;
623	start = 0;
624	while (resource_int_value("sio", unit, "port", &start) == 0 &&
625	    start > 0)
626		unit++;
627	if (device_get_unit(dev) < unit) {
628		dc = device_get_devclass(dev);
629		while (devclass_get_device(dc, unit))
630			unit++;
631		device_printf(dev, "moving to sio%d\n", unit);
632		err = device_set_unit(dev, unit);	/* EVIL DO NOT COPY */
633		if (err)
634			device_printf(dev, "error moving device %d\n", err);
635	}
636}
637
638static int
639sio_pci_probe(dev)
640	device_t	dev;
641{
642	u_int32_t	type;
643	struct pci_ids	*id;
644
645	type = pci_get_devid(dev);
646	id = pci_ids;
647	while (id->type && id->type != type)
648		id++;
649	if (id->desc == NULL)
650		return (ENXIO);
651	device_set_desc(dev, id->desc);
652	return (sioprobe(dev, id->rid));
653}
654#endif /* NPCI > 0 */
655
656static struct isa_pnp_id sio_ids[] = {
657	{0x0005d041, "Standard PC COM port"},	/* PNP0500 */
658	{0x0105d041, "16550A-compatible COM port"},	/* PNP0501 */
659	{0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */
660	{0x1005d041, "Generic IRDA-compatible device"},	/* PNP0510 */
661	{0x1105d041, "Generic IRDA-compatible device"},	/* PNP0511 */
662	/* Devices that do not have a compatid */
663	{0x12206804, NULL},     /* ACH2012 - 5634BTS 56K Video Ready Modem */
664	{0x7602a904, NULL},	/* AEI0276 - 56K v.90 Fax Modem (LKT) */
665	{0x00007905, NULL},	/* AKY0000 - 56K Plug&Play Modem */
666	{0x01405407, NULL},	/* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */
667	{0x56039008, NULL},	/* BDP0356 - Best Data 56x2 */
668	{0x56159008, NULL},	/* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/
669	{0x36339008, NULL},	/* BDP3336 - Best Data Prods. 336F */
670	{0x0014490a, NULL},	/* BRI1400 - Boca 33.6 PnP */
671	{0x0015490a, NULL},	/* BRI1500 - Internal Fax Data */
672	{0x0034490a, NULL},	/* BRI3400 - Internal ACF Modem */
673	{0x0094490a, NULL},	/* BRI9400 - Boca K56Flex PnP */
674	{0x00b4490a, NULL},	/* BRIB400 - Boca 56k PnP */
675	{0x0030320d, NULL},	/* CIR3000 - Cirrus Logic V43 */
676	{0x0100440e, NULL},	/* CRD0001 - Cardinal MVP288IV ? */
677	{0x36033610, NULL},     /* DAV0336 - DAVICOM 336PNP MODEM */
678	{0x0000aa1a, NULL},	/* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */
679	{0x1200c31e, NULL},	/* GVC0012 - VF1128HV-R9 (win modem?) */
680	{0x0303c31e, NULL},	/* GVC0303 - MaxTech 33.6 PnP D/F/V */
681	{0x0505c31e, NULL},	/* GVC0505 - GVC 56k Faxmodem */
682	{0x0116c31e, NULL},	/* GVC1601 - Rockwell V.34 Plug & Play Modem */
683	{0x0050c31e, NULL},	/* GVC5000 - some GVC modem */
684	{0x3800f91e, NULL},	/* GWY0038 - Telepath with v.90 */
685	{0x9062f91e, NULL},	/* GWY6290 - Telepath with x2 Technology */
686	{0x8100e425, NULL},	/* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */
687	{0x21002534, NULL},	/* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/
688	{0x0000f435, NULL},	/* MOT0000 - Motorola ModemSURFR 33.6 Intern */
689	{0x5015f435, NULL},	/* MOT1550 - Motorola ModemSURFR 56K Modem */
690	{0xf015f435, NULL},	/* MOT15F0 - Motorola VoiceSURFR 56K Modem */
691	{0x6045f435, NULL},	/* MOT4560 - Motorola ? */
692	{0x61e7a338, NULL},	/* NECE761 - 33.6Modem */
693 	{0x08804f3f, NULL},	/* OZO8008 - Zoom  (33.6k Modem) */
694	{0x0f804f3f, NULL},	/* OZO800f - Zoom 2812 (56k Modem) */
695	{0x39804f3f, NULL},	/* OZO8039 - Zoom 56k flex */
696	{0x00914f3f, NULL},	/* OZO9100 - Zoom 2919 (K56 Faxmodem) */
697	{0x3024a341, NULL},	/* PMC2430 - Pace 56 Voice Internal Modem */
698	{0x1000eb49, NULL},	/* ROK0010 - Rockwell ? */
699	{0x1200b23d, NULL},     /* RSS0012 - OMRON ME5614ISA */
700	{0x5002734a, NULL},	/* RSS0250 - 5614Jx3(G) Internal Modem */
701	{0x6202734a, NULL},	/* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */
702	{0xc100ad4d, NULL},	/* SMM00C1 - Leopard 56k PnP */
703	{0x9012b04e, NULL},	/* SUP1290 - Supra ? */
704	{0x1013b04e, NULL},	/* SUP1310 - SupraExpress 336i PnP */
705	{0x8013b04e, NULL},	/* SUP1380 - SupraExpress 288i PnP Voice */
706	{0x8113b04e, NULL},	/* SUP1381 - SupraExpress 336i PnP Voice */
707	{0x5016b04e, NULL},	/* SUP1650 - Supra 336i Sp Intl */
708	{0x7016b04e, NULL},	/* SUP1670 - Supra 336i V+ Intl */
709	{0x7420b04e, NULL},	/* SUP2070 - Supra ? */
710	{0x8020b04e, NULL},	/* SUP2080 - Supra ? */
711	{0x8420b04e, NULL},	/* SUP2084 - SupraExpress 56i PnP */
712	{0x7121b04e, NULL},	/* SUP2171 - SupraExpress 56i Sp? */
713	{0x8024b04e, NULL},	/* SUP2480 - Supra ? */
714	{0x01007256, NULL},	/* USR0001 - U.S. Robotics Inc., Sportster W */
715	{0x02007256, NULL},	/* USR0002 - U.S. Robotics Inc. Sportster 33. */
716	{0x04007256, NULL},	/* USR0004 - USR Sportster 14.4k */
717	{0x06007256, NULL},	/* USR0006 - USR Sportster 33.6k */
718	{0x11007256, NULL},	/* USR0011 - USR ? */
719	{0x01017256, NULL},	/* USR0101 - USR ? */
720	{0x30207256, NULL},	/* USR2030 - U.S.Robotics Inc. Sportster 560 */
721	{0x50207256, NULL},	/* USR2050 - U.S.Robotics Inc. Sportster 33. */
722	{0x70207256, NULL},	/* USR2070 - U.S.Robotics Inc. Sportster 560 */
723	{0x30307256, NULL},	/* USR3030 - U.S. Robotics 56K FAX INT */
724	{0x31307256, NULL},	/* USR3031 - U.S. Robotics 56K FAX INT */
725	{0x50307256, NULL},	/* USR3050 - U.S. Robotics 56K FAX INT */
726	{0x70307256, NULL},	/* USR3070 - U.S. Robotics 56K Voice INT */
727	{0x90307256, NULL},	/* USR3090 - USR ? */
728	{0x70917256, NULL},	/* USR9170 - U.S. Robotics 56K FAX INT */
729	{0x90917256, NULL},	/* USR9190 - USR 56k Voice INT */
730	{0x0300695c, NULL},	/* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */
731	{0x01a0896a, NULL},	/* ZTIA001 - Zoom Internal V90 Faxmodem */
732	{0x61f7896a, NULL},	/* ZTIF761 - Zoom ComStar 33.6 */
733	{0}
734};
735
736
737
738static int
739sio_isa_probe(dev)
740	device_t	dev;
741{
742	/* Check isapnp ids */
743	if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO)
744		return (ENXIO);
745	return (sioprobe(dev, 0));
746}
747
748static int
749sioprobe(dev, xrid)
750	device_t	dev;
751	int		xrid;
752{
753#if 0
754	static bool_t	already_init;
755	device_t	xdev;
756#endif
757	struct com_s	*com;
758	bool_t		failures[10];
759	int		fn;
760	device_t	idev;
761	Port_t		iobase;
762	intrmask_t	irqmap[4];
763	intrmask_t	irqs;
764	u_char		mcr_image;
765	int		result;
766	u_long		xirq;
767	u_int		flags = device_get_flags(dev);
768	int		rid;
769	struct resource *port;
770
771	rid = xrid;
772	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
773				  0, ~0, IO_COMSIZE, RF_ACTIVE);
774	if (!port)
775		return (ENXIO);
776
777	com = device_get_softc(dev);
778	com->bst = rman_get_bustag(port);
779	com->bsh = rman_get_bushandle(port);
780
781	if (atomic_cmpset_int(&sio_inited, 0, 1))
782		mtx_init(&sio_lock, driver_name, MTX_SPIN);
783
784#if 0
785	/*
786	 * XXX this is broken - when we are first called, there are no
787	 * previously configured IO ports.  We could hard code
788	 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
789	 * This code has been doing nothing since the conversion since
790	 * "count" is zero the first time around.
791	 */
792	if (!already_init) {
793		/*
794		 * Turn off MCR_IENABLE for all likely serial ports.  An unused
795		 * port with its MCR_IENABLE gate open will inhibit interrupts
796		 * from any used port that shares the interrupt vector.
797		 * XXX the gate enable is elsewhere for some multiports.
798		 */
799		device_t *devs;
800		int count, i, xioport;
801
802		devclass_get_devices(sio_devclass, &devs, &count);
803		for (i = 0; i < count; i++) {
804			xdev = devs[i];
805			if (device_is_enabled(xdev) &&
806			    bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
807					     NULL) == 0)
808				outb(xioport + com_mcr, 0);
809		}
810		free(devs, M_TEMP);
811		already_init = TRUE;
812	}
813#endif
814
815	if (COM_LLCONSOLE(flags)) {
816		printf("sio%d: reserved for low-level i/o\n",
817		       device_get_unit(dev));
818		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
819		return (ENXIO);
820	}
821
822	/*
823	 * If the device is on a multiport card and has an AST/4
824	 * compatible interrupt control register, initialize this
825	 * register and prepare to leave MCR_IENABLE clear in the mcr.
826	 * Otherwise, prepare to set MCR_IENABLE in the mcr.
827	 * Point idev to the device struct giving the correct id_irq.
828	 * This is the struct for the master device if there is one.
829	 */
830	idev = dev;
831	mcr_image = MCR_IENABLE;
832#ifdef COM_MULTIPORT
833	if (COM_ISMULTIPORT(flags)) {
834		Port_t xiobase;
835		u_long io;
836
837		idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
838		if (idev == NULL) {
839			printf("sio%d: master device %d not configured\n",
840			       device_get_unit(dev), COM_MPMASTER(flags));
841			idev = dev;
842		}
843		if (!COM_NOTAST4(flags)) {
844			if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
845					     NULL) == 0) {
846				xiobase = io;
847				if (bus_get_resource(idev, SYS_RES_IRQ, 0,
848				    NULL, NULL) == 0)
849					outb(xiobase + com_scr, 0x80);
850				else
851					outb(xiobase + com_scr, 0);
852			}
853			mcr_image = 0;
854		}
855	}
856#endif /* COM_MULTIPORT */
857	if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
858		mcr_image = 0;
859
860	bzero(failures, sizeof failures);
861	iobase = rman_get_start(port);
862
863	/*
864	 * We don't want to get actual interrupts, just masked ones.
865	 * Interrupts from this line should already be masked in the ICU,
866	 * but mask them in the processor as well in case there are some
867	 * (misconfigured) shared interrupts.
868	 */
869	mtx_lock_spin(&sio_lock);
870/* EXTRA DELAY? */
871
872	/*
873	 * Initialize the speed and the word size and wait long enough to
874	 * drain the maximum of 16 bytes of junk in device output queues.
875	 * The speed is undefined after a master reset and must be set
876	 * before relying on anything related to output.  There may be
877	 * junk after a (very fast) soft reboot and (apparently) after
878	 * master reset.
879	 * XXX what about the UART bug avoided by waiting in comparam()?
880	 * We don't want to to wait long enough to drain at 2 bps.
881	 */
882	if (iobase == siocniobase)
883		DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
884	else {
885		sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
886		sio_setreg(com, com_dlbl, COMBRD(SIO_TEST_SPEED) & 0xff);
887		sio_setreg(com, com_dlbh, (u_int) COMBRD(SIO_TEST_SPEED) >> 8);
888		sio_setreg(com, com_cfcr, CFCR_8BITS);
889		DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
890	}
891
892	/*
893	 * Enable the interrupt gate and disable device interupts.  This
894	 * should leave the device driving the interrupt line low and
895	 * guarantee an edge trigger if an interrupt can be generated.
896	 */
897/* EXTRA DELAY? */
898	sio_setreg(com, com_mcr, mcr_image);
899	sio_setreg(com, com_ier, 0);
900	DELAY(1000);		/* XXX */
901	irqmap[0] = isa_irq_pending();
902
903	/*
904	 * Attempt to set loopback mode so that we can send a null byte
905	 * without annoying any external device.
906	 */
907/* EXTRA DELAY? */
908	sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
909
910	/*
911	 * Attempt to generate an output interrupt.  On 8250's, setting
912	 * IER_ETXRDY generates an interrupt independent of the current
913	 * setting and independent of whether the THR is empty.  On 16450's,
914	 * setting IER_ETXRDY generates an interrupt independent of the
915	 * current setting.  On 16550A's, setting IER_ETXRDY only
916	 * generates an interrupt when IER_ETXRDY is not already set.
917	 */
918	sio_setreg(com, com_ier, IER_ETXRDY);
919
920	/*
921	 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
922	 * an interrupt.  They'd better generate one for actually doing
923	 * output.  Loopback may be broken on the same incompatibles but
924	 * it's unlikely to do more than allow the null byte out.
925	 */
926	sio_setreg(com, com_data, 0);
927	DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
928
929	/*
930	 * Turn off loopback mode so that the interrupt gate works again
931	 * (MCR_IENABLE was hidden).  This should leave the device driving
932	 * an interrupt line high.  It doesn't matter if the interrupt
933	 * line oscillates while we are not looking at it, since interrupts
934	 * are disabled.
935	 */
936/* EXTRA DELAY? */
937	sio_setreg(com, com_mcr, mcr_image);
938
939	/*
940	 * Some pcmcia cards have the "TXRDY bug", so we check everyone
941	 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... )
942	 */
943	if (COM_NOPROBE(flags)) {
944		/* Reading IIR register twice */
945		for (fn = 0; fn < 2; fn ++) {
946			DELAY(10000);
947			failures[6] = sio_getreg(com, com_iir);
948		}
949		/* Check IIR_TXRDY clear ? */
950		result = 0;
951		if (failures[6] & IIR_TXRDY) {
952			/* Nop, Double check with clearing IER */
953			sio_setreg(com, com_ier, 0);
954			if (sio_getreg(com, com_iir) & IIR_NOPEND) {
955				/* Ok. we're familia this gang */
956				SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
957			} else {
958				/* Unknown, Just omit this chip.. XXX */
959				result = ENXIO;
960				sio_setreg(com, com_mcr, 0);
961			}
962		} else {
963			/* OK. this is well-known guys */
964			CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
965		}
966		sio_setreg(com, com_ier, 0);
967		sio_setreg(com, com_cfcr, CFCR_8BITS);
968		mtx_unlock_spin(&sio_lock);
969		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
970		return (iobase == siocniobase ? 0 : result);
971	}
972
973	/*
974	 * Check that
975	 *	o the CFCR, IER and MCR in UART hold the values written to them
976	 *	  (the values happen to be all distinct - this is good for
977	 *	  avoiding false positive tests from bus echoes).
978	 *	o an output interrupt is generated and its vector is correct.
979	 *	o the interrupt goes away when the IIR in the UART is read.
980	 */
981/* EXTRA DELAY? */
982	failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
983	failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
984	failures[2] = sio_getreg(com, com_mcr) - mcr_image;
985	DELAY(10000);		/* Some internal modems need this time */
986	irqmap[1] = isa_irq_pending();
987	failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
988	DELAY(1000);		/* XXX */
989	irqmap[2] = isa_irq_pending();
990	failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
991
992	/*
993	 * Turn off all device interrupts and check that they go off properly.
994	 * Leave MCR_IENABLE alone.  For ports without a master port, it gates
995	 * the OUT2 output of the UART to
996	 * the ICU input.  Closing the gate would give a floating ICU input
997	 * (unless there is another device driving it) and spurious interrupts.
998	 * (On the system that this was first tested on, the input floats high
999	 * and gives a (masked) interrupt as soon as the gate is closed.)
1000	 */
1001	sio_setreg(com, com_ier, 0);
1002	sio_setreg(com, com_cfcr, CFCR_8BITS);	/* dummy to avoid bus echo */
1003	failures[7] = sio_getreg(com, com_ier);
1004	DELAY(1000);		/* XXX */
1005	irqmap[3] = isa_irq_pending();
1006	failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
1007
1008	mtx_unlock_spin(&sio_lock);
1009
1010	irqs = irqmap[1] & ~irqmap[0];
1011	if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
1012	    ((1 << xirq) & irqs) == 0)
1013		printf(
1014		"sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
1015		    device_get_unit(dev), xirq, irqs);
1016	if (bootverbose)
1017		printf("sio%d: irq maps: %#x %#x %#x %#x\n",
1018		    device_get_unit(dev),
1019		    irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
1020
1021	result = 0;
1022	for (fn = 0; fn < sizeof failures; ++fn)
1023		if (failures[fn]) {
1024			sio_setreg(com, com_mcr, 0);
1025			result = ENXIO;
1026			if (bootverbose) {
1027				printf("sio%d: probe failed test(s):",
1028				    device_get_unit(dev));
1029				for (fn = 0; fn < sizeof failures; ++fn)
1030					if (failures[fn])
1031						printf(" %d", fn);
1032				printf("\n");
1033			}
1034			break;
1035		}
1036	bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1037	return (iobase == siocniobase ? 0 : result);
1038}
1039
1040#ifdef COM_ESP
1041static int
1042espattach(com, esp_port)
1043	struct com_s		*com;
1044	Port_t			esp_port;
1045{
1046	u_char	dips;
1047	u_char	val;
1048
1049	/*
1050	 * Check the ESP-specific I/O port to see if we're an ESP
1051	 * card.  If not, return failure immediately.
1052	 */
1053	if ((inb(esp_port) & 0xf3) == 0) {
1054		printf(" port 0x%x is not an ESP board?\n", esp_port);
1055		return (0);
1056	}
1057
1058	/*
1059	 * We've got something that claims to be a Hayes ESP card.
1060	 * Let's hope so.
1061	 */
1062
1063	/* Get the dip-switch configuration */
1064	outb(esp_port + ESP_CMD1, ESP_GETDIPS);
1065	dips = inb(esp_port + ESP_STATUS1);
1066
1067	/*
1068	 * Bits 0,1 of dips say which COM port we are.
1069	 */
1070	if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
1071		printf(" : ESP");
1072	else {
1073		printf(" esp_port has com %d\n", dips & 0x03);
1074		return (0);
1075	}
1076
1077	/*
1078	 * Check for ESP version 2.0 or later:  bits 4,5,6 = 010.
1079	 */
1080	outb(esp_port + ESP_CMD1, ESP_GETTEST);
1081	val = inb(esp_port + ESP_STATUS1);	/* clear reg 1 */
1082	val = inb(esp_port + ESP_STATUS2);
1083	if ((val & 0x70) < 0x20) {
1084		printf("-old (%o)", val & 0x70);
1085		return (0);
1086	}
1087
1088	/*
1089	 * Check for ability to emulate 16550:  bit 7 == 1
1090	 */
1091	if ((dips & 0x80) == 0) {
1092		printf(" slave");
1093		return (0);
1094	}
1095
1096	/*
1097	 * Okay, we seem to be a Hayes ESP card.  Whee.
1098	 */
1099	com->esp = TRUE;
1100	com->esp_port = esp_port;
1101	return (1);
1102}
1103#endif /* COM_ESP */
1104
1105static int
1106sio_isa_attach(dev)
1107	device_t	dev;
1108{
1109	return (sioattach(dev, 0));
1110}
1111
1112static int
1113sioattach(dev, xrid)
1114	device_t	dev;
1115	int		xrid;
1116{
1117	struct com_s	*com;
1118#ifdef COM_ESP
1119	Port_t		*espp;
1120#endif
1121	Port_t		iobase;
1122	int		unit;
1123	u_int		flags;
1124	int		rid;
1125	struct resource *port;
1126	int		ret;
1127
1128	rid = xrid;
1129	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
1130				  0, ~0, IO_COMSIZE, RF_ACTIVE);
1131	if (!port)
1132		return (ENXIO);
1133
1134	iobase = rman_get_start(port);
1135	unit = device_get_unit(dev);
1136	com = device_get_softc(dev);
1137	flags = device_get_flags(dev);
1138
1139	if (unit >= sio_numunits)
1140		sio_numunits = unit + 1;
1141	/*
1142	 * sioprobe() has initialized the device registers as follows:
1143	 *	o cfcr = CFCR_8BITS.
1144	 *	  It is most important that CFCR_DLAB is off, so that the
1145	 *	  data port is not hidden when we enable interrupts.
1146	 *	o ier = 0.
1147	 *	  Interrupts are only enabled when the line is open.
1148	 *	o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
1149	 *	  interrupt control register or the config specifies no irq.
1150	 *	  Keeping MCR_DTR and MCR_RTS off might stop the external
1151	 *	  device from sending before we are ready.
1152	 */
1153	bzero(com, sizeof *com);
1154	com->unit = unit;
1155	com->ioportres = port;
1156	com->bst = rman_get_bustag(port);
1157	com->bsh = rman_get_bushandle(port);
1158	com->cfcr_image = CFCR_8BITS;
1159	com->dtr_wait = 3 * hz;
1160	com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
1161	com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
1162	com->tx_fifo_size = 1;
1163	com->obufs[0].l_head = com->obuf1;
1164	com->obufs[1].l_head = com->obuf2;
1165
1166	com->data_port = iobase + com_data;
1167	com->int_id_port = iobase + com_iir;
1168	com->modem_ctl_port = iobase + com_mcr;
1169	com->mcr_image = inb(com->modem_ctl_port);
1170	com->line_status_port = iobase + com_lsr;
1171	com->modem_status_port = iobase + com_msr;
1172	com->intr_ctl_port = iobase + com_ier;
1173
1174	/*
1175	 * We don't use all the flags from <sys/ttydefaults.h> since they
1176	 * are only relevant for logins.  It's important to have echo off
1177	 * initially so that the line doesn't start blathering before the
1178	 * echo flag can be turned off.
1179	 */
1180	com->it_in.c_iflag = 0;
1181	com->it_in.c_oflag = 0;
1182	com->it_in.c_cflag = TTYDEF_CFLAG;
1183	com->it_in.c_lflag = 0;
1184	if (unit == comconsole) {
1185		com->it_in.c_iflag = TTYDEF_IFLAG;
1186		com->it_in.c_oflag = TTYDEF_OFLAG;
1187		com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
1188		com->it_in.c_lflag = TTYDEF_LFLAG;
1189		com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
1190		com->lt_out.c_ispeed = com->lt_out.c_ospeed =
1191		com->lt_in.c_ispeed = com->lt_in.c_ospeed =
1192		com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
1193	} else
1194		com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED;
1195	if (siosetwater(com, com->it_in.c_ispeed) != 0) {
1196		mtx_unlock_spin(&sio_lock);
1197		/*
1198		 * Leave i/o resources allocated if this is a `cn'-level
1199		 * console, so that other devices can't snarf them.
1200		 */
1201		if (iobase != siocniobase)
1202			bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1203		return (ENOMEM);
1204	}
1205	mtx_unlock_spin(&sio_lock);
1206	termioschars(&com->it_in);
1207	com->it_out = com->it_in;
1208
1209	/* attempt to determine UART type */
1210	printf("sio%d: type", unit);
1211
1212
1213#ifdef COM_MULTIPORT
1214	if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags))
1215#else
1216	if (!COM_IIR_TXRDYBUG(flags))
1217#endif
1218	{
1219		u_char	scr;
1220		u_char	scr1;
1221		u_char	scr2;
1222
1223		scr = sio_getreg(com, com_scr);
1224		sio_setreg(com, com_scr, 0xa5);
1225		scr1 = sio_getreg(com, com_scr);
1226		sio_setreg(com, com_scr, 0x5a);
1227		scr2 = sio_getreg(com, com_scr);
1228		sio_setreg(com, com_scr, scr);
1229		if (scr1 != 0xa5 || scr2 != 0x5a) {
1230			printf(" 8250");
1231			goto determined_type;
1232		}
1233	}
1234	sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1235	DELAY(100);
1236	com->st16650a = 0;
1237	switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1238	case FIFO_RX_LOW:
1239		printf(" 16450");
1240		break;
1241	case FIFO_RX_MEDL:
1242		printf(" 16450?");
1243		break;
1244	case FIFO_RX_MEDH:
1245		printf(" 16550?");
1246		break;
1247	case FIFO_RX_HIGH:
1248		if (COM_NOFIFO(flags)) {
1249			printf(" 16550A fifo disabled");
1250		} else {
1251			com->hasfifo = TRUE;
1252			if (COM_ST16650A(flags)) {
1253				com->st16650a = 1;
1254				com->tx_fifo_size = 32;
1255				printf(" ST16650A");
1256			} else {
1257				com->tx_fifo_size = COM_FIFOSIZE(flags);
1258				printf(" 16550A");
1259			}
1260		}
1261#ifdef COM_ESP
1262		for (espp = likely_esp_ports; *espp != 0; espp++)
1263			if (espattach(com, *espp)) {
1264				com->tx_fifo_size = 1024;
1265				break;
1266			}
1267#endif
1268		if (!com->st16650a) {
1269			if (!com->tx_fifo_size)
1270				com->tx_fifo_size = 16;
1271			else
1272				printf(" lookalike with %d bytes FIFO",
1273				    com->tx_fifo_size);
1274		}
1275
1276		break;
1277	}
1278
1279#ifdef COM_ESP
1280	if (com->esp) {
1281		/*
1282		 * Set 16550 compatibility mode.
1283		 * We don't use the ESP_MODE_SCALE bit to increase the
1284		 * fifo trigger levels because we can't handle large
1285		 * bursts of input.
1286		 * XXX flow control should be set in comparam(), not here.
1287		 */
1288		outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1289		outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1290
1291		/* Set RTS/CTS flow control. */
1292		outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1293		outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1294		outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1295
1296		/* Set flow-control levels. */
1297		outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1298		outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1299		outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1300		outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1301		outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1302	}
1303#endif /* COM_ESP */
1304	sio_setreg(com, com_fifo, 0);
1305determined_type: ;
1306
1307#ifdef COM_MULTIPORT
1308	if (COM_ISMULTIPORT(flags)) {
1309		device_t masterdev;
1310
1311		com->multiport = TRUE;
1312		printf(" (multiport");
1313		if (unit == COM_MPMASTER(flags))
1314			printf(" master");
1315		printf(")");
1316		masterdev = devclass_get_device(sio_devclass,
1317		    COM_MPMASTER(flags));
1318		com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1319		    SYS_RES_IRQ, 0, NULL, NULL) != 0);
1320	 }
1321#endif /* COM_MULTIPORT */
1322	if (unit == comconsole)
1323		printf(", console");
1324	if (COM_IIR_TXRDYBUG(flags))
1325		printf(" with a bogus IIR_TXRDY register");
1326	printf("\n");
1327
1328	if (sio_fast_ih == NULL) {
1329		swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0,
1330		    &sio_fast_ih);
1331		swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0,
1332		    &sio_slow_ih);
1333	}
1334	com->devs[0] = make_dev(&sio_cdevsw, unit,
1335	    UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1336	com->devs[1] = make_dev(&sio_cdevsw, unit | CONTROL_INIT_STATE,
1337	    UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1338	com->devs[2] = make_dev(&sio_cdevsw, unit | CONTROL_LOCK_STATE,
1339	    UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1340	com->devs[3] = make_dev(&sio_cdevsw, unit | CALLOUT_MASK,
1341	    UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1342	com->devs[4] = make_dev(&sio_cdevsw,
1343	    unit | CALLOUT_MASK | CONTROL_INIT_STATE,
1344	    UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1345	com->devs[5] = make_dev(&sio_cdevsw,
1346	    unit | CALLOUT_MASK | CONTROL_LOCK_STATE,
1347	    UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1348	com->flags = flags;
1349	com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1350	pps_init(&com->pps);
1351
1352	rid = 0;
1353	com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1,
1354	    RF_ACTIVE);
1355	if (com->irqres) {
1356		ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1357				     INTR_TYPE_TTY | INTR_FAST,
1358				     siointr, com, &com->cookie);
1359		if (ret) {
1360			ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1361					     com->irqres, INTR_TYPE_TTY,
1362					     siointr, com, &com->cookie);
1363			if (ret == 0)
1364				device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1365		}
1366		if (ret)
1367			device_printf(dev, "could not activate interrupt\n");
1368#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1369    defined(ALT_BREAK_TO_DEBUGGER))
1370		/*
1371		 * Enable interrupts for early break-to-debugger support
1372		 * on the console.
1373		 */
1374		if (ret == 0 && unit == comconsole)
1375			outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1376			    IER_EMSC);
1377#endif
1378	}
1379
1380	return (0);
1381}
1382
1383static int
1384sioopen(dev, flag, mode, td)
1385	dev_t		dev;
1386	int		flag;
1387	int		mode;
1388	struct thread	*td;
1389{
1390	struct com_s	*com;
1391	int		error;
1392	int		mynor;
1393	int		s;
1394	struct tty	*tp;
1395	int		unit;
1396
1397	mynor = minor(dev);
1398	unit = MINOR_TO_UNIT(mynor);
1399	com = com_addr(unit);
1400	if (com == NULL)
1401		return (ENXIO);
1402	if (com->gone)
1403		return (ENXIO);
1404	if (mynor & CONTROL_MASK)
1405		return (0);
1406	tp = dev->si_tty = com->tp = ttymalloc(com->tp);
1407	s = spltty();
1408	/*
1409	 * We jump to this label after all non-interrupted sleeps to pick
1410	 * up any changes of the device state.
1411	 */
1412open_top:
1413	while (com->state & CS_DTR_OFF) {
1414		error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0);
1415		if (com_addr(unit) == NULL)
1416			return (ENXIO);
1417		if (error != 0 || com->gone)
1418			goto out;
1419	}
1420	if (tp->t_state & TS_ISOPEN) {
1421		/*
1422		 * The device is open, so everything has been initialized.
1423		 * Handle conflicts.
1424		 */
1425		if (mynor & CALLOUT_MASK) {
1426			if (!com->active_out) {
1427				error = EBUSY;
1428				goto out;
1429			}
1430		} else {
1431			if (com->active_out) {
1432				if (flag & O_NONBLOCK) {
1433					error = EBUSY;
1434					goto out;
1435				}
1436				error =	tsleep(&com->active_out,
1437					       TTIPRI | PCATCH, "siobi", 0);
1438				if (com_addr(unit) == NULL)
1439					return (ENXIO);
1440				if (error != 0 || com->gone)
1441					goto out;
1442				goto open_top;
1443			}
1444		}
1445		if (tp->t_state & TS_XCLUDE &&
1446		    suser_td(td)) {
1447			error = EBUSY;
1448			goto out;
1449		}
1450	} else {
1451		/*
1452		 * The device isn't open, so there are no conflicts.
1453		 * Initialize it.  Initialization is done twice in many
1454		 * cases: to preempt sleeping callin opens if we are
1455		 * callout, and to complete a callin open after DCD rises.
1456		 */
1457		tp->t_oproc = comstart;
1458		tp->t_param = comparam;
1459		tp->t_stop = comstop;
1460		tp->t_dev = dev;
1461		tp->t_termios = mynor & CALLOUT_MASK
1462				? com->it_out : com->it_in;
1463		(void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
1464		com->poll = com->no_irq;
1465		com->poll_output = com->loses_outints;
1466		++com->wopeners;
1467		error = comparam(tp, &tp->t_termios);
1468		--com->wopeners;
1469		if (error != 0)
1470			goto out;
1471		/*
1472		 * XXX we should goto open_top if comparam() slept.
1473		 */
1474		if (com->hasfifo) {
1475			/*
1476			 * (Re)enable and drain fifos.
1477			 *
1478			 * Certain SMC chips cause problems if the fifos
1479			 * are enabled while input is ready.  Turn off the
1480			 * fifo if necessary to clear the input.  We test
1481			 * the input ready bit after enabling the fifos
1482			 * since we've already enabled them in comparam()
1483			 * and to handle races between enabling and fresh
1484			 * input.
1485			 */
1486			while (TRUE) {
1487				sio_setreg(com, com_fifo,
1488					   FIFO_RCV_RST | FIFO_XMT_RST
1489					   | com->fifo_image);
1490				/*
1491				 * XXX the delays are for superstitious
1492				 * historical reasons.  It must be less than
1493				 * the character time at the maximum
1494				 * supported speed (87 usec at 115200 bps
1495				 * 8N1).  Otherwise we might loop endlessly
1496				 * if data is streaming in.  We used to use
1497				 * delays of 100.  That usually worked
1498				 * because DELAY(100) used to usually delay
1499				 * for about 85 usec instead of 100.
1500				 */
1501				DELAY(50);
1502				if (!(inb(com->line_status_port) & LSR_RXRDY))
1503					break;
1504				sio_setreg(com, com_fifo, 0);
1505				DELAY(50);
1506				(void) inb(com->data_port);
1507			}
1508		}
1509
1510		mtx_lock_spin(&sio_lock);
1511		(void) inb(com->line_status_port);
1512		(void) inb(com->data_port);
1513		com->prev_modem_status = com->last_modem_status
1514		    = inb(com->modem_status_port);
1515		if (COM_IIR_TXRDYBUG(com->flags)) {
1516			outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS
1517						| IER_EMSC);
1518		} else {
1519			outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY
1520						| IER_ERLS | IER_EMSC);
1521		}
1522		mtx_unlock_spin(&sio_lock);
1523		/*
1524		 * Handle initial DCD.  Callout devices get a fake initial
1525		 * DCD (trapdoor DCD).  If we are callout, then any sleeping
1526		 * callin opens get woken up and resume sleeping on "siobi"
1527		 * instead of "siodcd".
1528		 */
1529		/*
1530		 * XXX `mynor & CALLOUT_MASK' should be
1531		 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1532		 * TRAPDOOR_CARRIER is the default initial state for callout
1533		 * devices and SOFT_CARRIER is like CLOCAL except it hides
1534		 * the true carrier.
1535		 */
1536		if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1537			(*linesw[tp->t_line].l_modem)(tp, 1);
1538	}
1539	/*
1540	 * Wait for DCD if necessary.
1541	 */
1542	if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1543	    && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
1544		++com->wopeners;
1545		error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0);
1546		if (com_addr(unit) == NULL)
1547			return (ENXIO);
1548		--com->wopeners;
1549		if (error != 0 || com->gone)
1550			goto out;
1551		goto open_top;
1552	}
1553	error =	(*linesw[tp->t_line].l_open)(dev, tp);
1554	disc_optim(tp, &tp->t_termios, com);
1555	if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1556		com->active_out = TRUE;
1557	siosettimeout();
1558out:
1559	splx(s);
1560	if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1561		comhardclose(com);
1562	return (error);
1563}
1564
1565static int
1566sioclose(dev, flag, mode, td)
1567	dev_t		dev;
1568	int		flag;
1569	int		mode;
1570	struct thread	*td;
1571{
1572	struct com_s	*com;
1573	int		mynor;
1574	int		s;
1575	struct tty	*tp;
1576
1577	mynor = minor(dev);
1578	if (mynor & CONTROL_MASK)
1579		return (0);
1580	com = com_addr(MINOR_TO_UNIT(mynor));
1581	if (com == NULL)
1582		return (ENODEV);
1583	tp = com->tp;
1584	s = spltty();
1585	(*linesw[tp->t_line].l_close)(tp, flag);
1586	disc_optim(tp, &tp->t_termios, com);
1587	comstop(tp, FREAD | FWRITE);
1588	comhardclose(com);
1589	ttyclose(tp);
1590	siosettimeout();
1591	splx(s);
1592	if (com->gone) {
1593		printf("sio%d: gone\n", com->unit);
1594		s = spltty();
1595		if (com->ibuf != NULL)
1596			free(com->ibuf, M_DEVBUF);
1597		bzero(tp, sizeof *tp);
1598		splx(s);
1599	}
1600	return (0);
1601}
1602
1603static void
1604comhardclose(com)
1605	struct com_s	*com;
1606{
1607	int		s;
1608	struct tty	*tp;
1609	int		unit;
1610
1611	unit = com->unit;
1612	s = spltty();
1613	com->poll = FALSE;
1614	com->poll_output = FALSE;
1615	com->do_timestamp = FALSE;
1616	com->do_dcd_timestamp = FALSE;
1617	com->pps.ppsparam.mode = 0;
1618	sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1619	tp = com->tp;
1620
1621#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1622    defined(ALT_BREAK_TO_DEBUGGER))
1623	/*
1624	 * Leave interrupts enabled and don't clear DTR if this is the
1625	 * console. This allows us to detect break-to-debugger events
1626	 * while the console device is closed.
1627	 */
1628	if (com->unit != comconsole)
1629#endif
1630	{
1631		sio_setreg(com, com_ier, 0);
1632		if (tp->t_cflag & HUPCL
1633		    /*
1634		     * XXX we will miss any carrier drop between here and the
1635		     * next open.  Perhaps we should watch DCD even when the
1636		     * port is closed; it is not sufficient to check it at
1637		     * the next open because it might go up and down while
1638		     * we're not watching.
1639		     */
1640		    || (!com->active_out
1641		        && !(com->prev_modem_status & MSR_DCD)
1642		        && !(com->it_in.c_cflag & CLOCAL))
1643		    || !(tp->t_state & TS_ISOPEN)) {
1644			(void)commctl(com, TIOCM_DTR, DMBIC);
1645			if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
1646				timeout(siodtrwakeup, com, com->dtr_wait);
1647				com->state |= CS_DTR_OFF;
1648			}
1649		}
1650	}
1651	if (com->hasfifo) {
1652		/*
1653		 * Disable fifos so that they are off after controlled
1654		 * reboots.  Some BIOSes fail to detect 16550s when the
1655		 * fifos are enabled.
1656		 */
1657		sio_setreg(com, com_fifo, 0);
1658	}
1659	com->active_out = FALSE;
1660	wakeup(&com->active_out);
1661	wakeup(TSA_CARR_ON(tp));	/* restart any wopeners */
1662	splx(s);
1663}
1664
1665static int
1666sioread(dev, uio, flag)
1667	dev_t		dev;
1668	struct uio	*uio;
1669	int		flag;
1670{
1671	int		mynor;
1672	struct com_s	*com;
1673
1674	mynor = minor(dev);
1675	if (mynor & CONTROL_MASK)
1676		return (ENODEV);
1677	com = com_addr(MINOR_TO_UNIT(mynor));
1678	if (com == NULL || com->gone)
1679		return (ENODEV);
1680	return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag));
1681}
1682
1683static int
1684siowrite(dev, uio, flag)
1685	dev_t		dev;
1686	struct uio	*uio;
1687	int		flag;
1688{
1689	int		mynor;
1690	struct com_s	*com;
1691	int		unit;
1692
1693	mynor = minor(dev);
1694	if (mynor & CONTROL_MASK)
1695		return (ENODEV);
1696
1697	unit = MINOR_TO_UNIT(mynor);
1698	com = com_addr(unit);
1699	if (com == NULL || com->gone)
1700		return (ENODEV);
1701	/*
1702	 * (XXX) We disallow virtual consoles if the physical console is
1703	 * a serial port.  This is in case there is a display attached that
1704	 * is not the console.  In that situation we don't need/want the X
1705	 * server taking over the console.
1706	 */
1707	if (constty != NULL && unit == comconsole)
1708		constty = NULL;
1709	return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag));
1710}
1711
1712static void
1713siobusycheck(chan)
1714	void	*chan;
1715{
1716	struct com_s	*com;
1717	int		s;
1718
1719	com = (struct com_s *)chan;
1720
1721	/*
1722	 * Clear TS_BUSY if low-level output is complete.
1723	 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1724	 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1725	 * called again.  Reading the line status port outside of siointr1()
1726	 * is safe because CS_BUSY is clear so there are no output interrupts
1727	 * to lose.
1728	 */
1729	s = spltty();
1730	if (com->state & CS_BUSY)
1731		com->extra_state &= ~CSE_BUSYCHECK;	/* False alarm. */
1732	else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1733	    == (LSR_TSRE | LSR_TXRDY)) {
1734		com->tp->t_state &= ~TS_BUSY;
1735		ttwwakeup(com->tp);
1736		com->extra_state &= ~CSE_BUSYCHECK;
1737	} else
1738		timeout(siobusycheck, com, hz / 100);
1739	splx(s);
1740}
1741
1742static void
1743siodtrwakeup(chan)
1744	void	*chan;
1745{
1746	struct com_s	*com;
1747
1748	com = (struct com_s *)chan;
1749	com->state &= ~CS_DTR_OFF;
1750	wakeup(&com->dtr_wait);
1751}
1752
1753/*
1754 * Call this function with the sio_lock mutex held.  It will return with the
1755 * lock still held.
1756 */
1757static void
1758sioinput(com)
1759	struct com_s	*com;
1760{
1761	u_char		*buf;
1762	int		incc;
1763	u_char		line_status;
1764	int		recv_data;
1765	struct tty	*tp;
1766
1767	buf = com->ibuf;
1768	tp = com->tp;
1769	if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1770		com_events -= (com->iptr - com->ibuf);
1771		com->iptr = com->ibuf;
1772		return;
1773	}
1774	if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1775		/*
1776		 * Avoid the grotesquely inefficient lineswitch routine
1777		 * (ttyinput) in "raw" mode.  It usually takes about 450
1778		 * instructions (that's without canonical processing or echo!).
1779		 * slinput is reasonably fast (usually 40 instructions plus
1780		 * call overhead).
1781		 */
1782		do {
1783			/*
1784			 * This may look odd, but it is using save-and-enable
1785			 * semantics instead of the save-and-disable semantics
1786			 * that are used everywhere else.
1787			 */
1788			mtx_unlock_spin(&sio_lock);
1789			incc = com->iptr - buf;
1790			if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1791			    && (com->state & CS_RTS_IFLOW
1792				|| tp->t_iflag & IXOFF)
1793			    && !(tp->t_state & TS_TBLOCK))
1794				ttyblock(tp);
1795			com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1796				+= b_to_q((char *)buf, incc, &tp->t_rawq);
1797			buf += incc;
1798			tk_nin += incc;
1799			tk_rawcc += incc;
1800			tp->t_rawcc += incc;
1801			ttwakeup(tp);
1802			if (tp->t_state & TS_TTSTOP
1803			    && (tp->t_iflag & IXANY
1804				|| tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1805				tp->t_state &= ~TS_TTSTOP;
1806				tp->t_lflag &= ~FLUSHO;
1807				comstart(tp);
1808			}
1809			mtx_lock_spin(&sio_lock);
1810		} while (buf < com->iptr);
1811	} else {
1812		do {
1813			/*
1814			 * This may look odd, but it is using save-and-enable
1815			 * semantics instead of the save-and-disable semantics
1816			 * that are used everywhere else.
1817			 */
1818			mtx_unlock_spin(&sio_lock);
1819			line_status = buf[com->ierroff];
1820			recv_data = *buf++;
1821			if (line_status
1822			    & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1823				if (line_status & LSR_BI)
1824					recv_data |= TTY_BI;
1825				if (line_status & LSR_FE)
1826					recv_data |= TTY_FE;
1827				if (line_status & LSR_OE)
1828					recv_data |= TTY_OE;
1829				if (line_status & LSR_PE)
1830					recv_data |= TTY_PE;
1831			}
1832			(*linesw[tp->t_line].l_rint)(recv_data, tp);
1833			mtx_lock_spin(&sio_lock);
1834		} while (buf < com->iptr);
1835	}
1836	com_events -= (com->iptr - com->ibuf);
1837	com->iptr = com->ibuf;
1838
1839	/*
1840	 * There is now room for another low-level buffer full of input,
1841	 * so enable RTS if it is now disabled and there is room in the
1842	 * high-level buffer.
1843	 */
1844	if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1845	    !(tp->t_state & TS_TBLOCK))
1846		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1847}
1848
1849void
1850siointr(arg)
1851	void		*arg;
1852{
1853	struct com_s	*com;
1854
1855#ifndef COM_MULTIPORT
1856	com = (struct com_s *)arg;
1857
1858	mtx_lock_spin(&sio_lock);
1859	siointr1(com);
1860	mtx_unlock_spin(&sio_lock);
1861#else /* COM_MULTIPORT */
1862	bool_t		possibly_more_intrs;
1863	int		unit;
1864
1865	/*
1866	 * Loop until there is no activity on any port.  This is necessary
1867	 * to get an interrupt edge more than to avoid another interrupt.
1868	 * If the IRQ signal is just an OR of the IRQ signals from several
1869	 * devices, then the edge from one may be lost because another is
1870	 * on.
1871	 */
1872	mtx_lock_spin(&sio_lock);
1873	do {
1874		possibly_more_intrs = FALSE;
1875		for (unit = 0; unit < sio_numunits; ++unit) {
1876			com = com_addr(unit);
1877			/*
1878			 * XXX COM_LOCK();
1879			 * would it work here, or be counter-productive?
1880			 */
1881			if (com != NULL
1882			    && !com->gone
1883			    && (inb(com->int_id_port) & IIR_IMASK)
1884			       != IIR_NOPEND) {
1885				siointr1(com);
1886				possibly_more_intrs = TRUE;
1887			}
1888			/* XXX COM_UNLOCK(); */
1889		}
1890	} while (possibly_more_intrs);
1891	mtx_unlock_spin(&sio_lock);
1892#endif /* COM_MULTIPORT */
1893}
1894
1895static void
1896siointr1(com)
1897	struct com_s	*com;
1898{
1899	u_char	line_status;
1900	u_char	modem_status;
1901	u_char	*ioptr;
1902	u_char	recv_data;
1903	u_char	int_ctl;
1904	u_char	int_ctl_new;
1905	struct	timecounter *tc;
1906	u_int	count;
1907
1908	int_ctl = inb(com->intr_ctl_port);
1909	int_ctl_new = int_ctl;
1910
1911	while (!com->gone) {
1912		if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1913			modem_status = inb(com->modem_status_port);
1914		        if ((modem_status ^ com->last_modem_status) & MSR_DCD) {
1915				tc = timecounter;
1916				count = tc->tc_get_timecount(tc);
1917				pps_event(&com->pps, tc, count,
1918				    (modem_status & MSR_DCD) ?
1919				    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1920			}
1921		}
1922		line_status = inb(com->line_status_port);
1923
1924		/* input event? (check first to help avoid overruns) */
1925		while (line_status & LSR_RCV_MASK) {
1926			/* break/unnattached error bits or real input? */
1927			if (!(line_status & LSR_RXRDY))
1928				recv_data = 0;
1929			else
1930				recv_data = inb(com->data_port);
1931#if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER)
1932			/*
1933			 * Solaris implements a new BREAK which is initiated
1934			 * by a character sequence CR ~ ^b which is similar
1935			 * to a familiar pattern used on Sun servers by the
1936			 * Remote Console.
1937			 */
1938#define	KEY_CRTLB	2	/* ^B */
1939#define	KEY_CR		13	/* CR '\r' */
1940#define	KEY_TILDE	126	/* ~ */
1941
1942			if (com->unit == comconsole) {
1943				static int brk_state1 = 0, brk_state2 = 0;
1944				if (recv_data == KEY_CR) {
1945					brk_state1 = recv_data;
1946					brk_state2 = 0;
1947				} else if (brk_state1 == KEY_CR
1948					   && (recv_data == KEY_TILDE
1949					       || recv_data == KEY_CRTLB)) {
1950					if (recv_data == KEY_TILDE)
1951						brk_state2 = recv_data;
1952					else if (brk_state2 == KEY_TILDE
1953						 && recv_data == KEY_CRTLB) {
1954							breakpoint();
1955							brk_state1 = 0;
1956							brk_state2 = 0;
1957							goto cont;
1958					} else
1959						brk_state2 = 0;
1960				} else
1961					brk_state1 = 0;
1962			}
1963#endif
1964			if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1965				/*
1966				 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1967				 * Otherwise, push the work to a higher level
1968				 * (to handle PARMRK) if we're bypassing.
1969				 * Otherwise, convert BI/FE and PE+INPCK to 0.
1970				 *
1971				 * This makes bypassing work right in the
1972				 * usual "raw" case (IGNBRK set, and IGNPAR
1973				 * and INPCK clear).
1974				 *
1975				 * Note: BI together with FE/PE means just BI.
1976				 */
1977				if (line_status & LSR_BI) {
1978#if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1979					if (com->unit == comconsole) {
1980						breakpoint();
1981						goto cont;
1982					}
1983#endif
1984					if (com->tp == NULL
1985					    || com->tp->t_iflag & IGNBRK)
1986						goto cont;
1987				} else {
1988					if (com->tp == NULL
1989					    || com->tp->t_iflag & IGNPAR)
1990						goto cont;
1991				}
1992				if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1993				    && (line_status & (LSR_BI | LSR_FE)
1994					|| com->tp->t_iflag & INPCK))
1995					recv_data = 0;
1996			}
1997			++com->bytes_in;
1998			if (com->hotchar != 0 && recv_data == com->hotchar)
1999				swi_sched(sio_fast_ih, SWI_NOSWITCH);
2000			ioptr = com->iptr;
2001			if (ioptr >= com->ibufend)
2002				CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
2003			else {
2004				if (com->do_timestamp)
2005					microtime(&com->timestamp);
2006				++com_events;
2007				swi_sched(sio_slow_ih, SWI_DELAY);
2008#if 0 /* for testing input latency vs efficiency */
2009if (com->iptr - com->ibuf == 8)
2010	swi_sched(sio_fast_ih, SWI_NOSWITCH);
2011#endif
2012				ioptr[0] = recv_data;
2013				ioptr[com->ierroff] = line_status;
2014				com->iptr = ++ioptr;
2015				if (ioptr == com->ihighwater
2016				    && com->state & CS_RTS_IFLOW)
2017					outb(com->modem_ctl_port,
2018					     com->mcr_image &= ~MCR_RTS);
2019				if (line_status & LSR_OE)
2020					CE_RECORD(com, CE_OVERRUN);
2021			}
2022cont:
2023			/*
2024			 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
2025			 * jump from the top of the loop to here
2026			 */
2027			line_status = inb(com->line_status_port) & 0x7F;
2028		}
2029
2030		/* modem status change? (always check before doing output) */
2031		modem_status = inb(com->modem_status_port);
2032		if (modem_status != com->last_modem_status) {
2033			if (com->do_dcd_timestamp
2034			    && !(com->last_modem_status & MSR_DCD)
2035			    && modem_status & MSR_DCD)
2036				microtime(&com->dcd_timestamp);
2037
2038			/*
2039			 * Schedule high level to handle DCD changes.  Note
2040			 * that we don't use the delta bits anywhere.  Some
2041			 * UARTs mess them up, and it's easy to remember the
2042			 * previous bits and calculate the delta.
2043			 */
2044			com->last_modem_status = modem_status;
2045			if (!(com->state & CS_CHECKMSR)) {
2046				com_events += LOTS_OF_EVENTS;
2047				com->state |= CS_CHECKMSR;
2048				swi_sched(sio_fast_ih, SWI_NOSWITCH);
2049			}
2050
2051			/* handle CTS change immediately for crisp flow ctl */
2052			if (com->state & CS_CTS_OFLOW) {
2053				if (modem_status & MSR_CTS)
2054					com->state |= CS_ODEVREADY;
2055				else
2056					com->state &= ~CS_ODEVREADY;
2057			}
2058		}
2059
2060		/* output queued and everything ready? */
2061		if (line_status & LSR_TXRDY
2062		    && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
2063			ioptr = com->obufq.l_head;
2064			if (com->tx_fifo_size > 1) {
2065				u_int	ocount;
2066
2067				ocount = com->obufq.l_tail - ioptr;
2068				if (ocount > com->tx_fifo_size)
2069					ocount = com->tx_fifo_size;
2070				com->bytes_out += ocount;
2071				do
2072					outb(com->data_port, *ioptr++);
2073				while (--ocount != 0);
2074			} else {
2075				outb(com->data_port, *ioptr++);
2076				++com->bytes_out;
2077			}
2078			com->obufq.l_head = ioptr;
2079			if (COM_IIR_TXRDYBUG(com->flags)) {
2080				int_ctl_new = int_ctl | IER_ETXRDY;
2081			}
2082			if (ioptr >= com->obufq.l_tail) {
2083				struct lbq	*qp;
2084
2085				qp = com->obufq.l_next;
2086				qp->l_queued = FALSE;
2087				qp = qp->l_next;
2088				if (qp != NULL) {
2089					com->obufq.l_head = qp->l_head;
2090					com->obufq.l_tail = qp->l_tail;
2091					com->obufq.l_next = qp;
2092				} else {
2093					/* output just completed */
2094					if (COM_IIR_TXRDYBUG(com->flags)) {
2095						int_ctl_new = int_ctl & ~IER_ETXRDY;
2096					}
2097					com->state &= ~CS_BUSY;
2098				}
2099				if (!(com->state & CS_ODONE)) {
2100					com_events += LOTS_OF_EVENTS;
2101					com->state |= CS_ODONE;
2102					/* handle at high level ASAP */
2103					swi_sched(sio_fast_ih, SWI_NOSWITCH);
2104				}
2105			}
2106			if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) {
2107				outb(com->intr_ctl_port, int_ctl_new);
2108			}
2109		}
2110
2111		/* finished? */
2112#ifndef COM_MULTIPORT
2113		if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
2114#endif /* COM_MULTIPORT */
2115			return;
2116	}
2117}
2118
2119static int
2120sioioctl(dev, cmd, data, flag, td)
2121	dev_t		dev;
2122	u_long		cmd;
2123	caddr_t		data;
2124	int		flag;
2125	struct thread	*td;
2126{
2127	struct com_s	*com;
2128	int		error;
2129	int		mynor;
2130	int		s;
2131	struct tty	*tp;
2132#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2133	u_long		oldcmd;
2134	struct termios	term;
2135#endif
2136
2137	mynor = minor(dev);
2138	com = com_addr(MINOR_TO_UNIT(mynor));
2139	if (com == NULL || com->gone)
2140		return (ENODEV);
2141	if (mynor & CONTROL_MASK) {
2142		struct termios	*ct;
2143
2144		switch (mynor & CONTROL_MASK) {
2145		case CONTROL_INIT_STATE:
2146			ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
2147			break;
2148		case CONTROL_LOCK_STATE:
2149			ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
2150			break;
2151		default:
2152			return (ENODEV);	/* /dev/nodev */
2153		}
2154		switch (cmd) {
2155		case TIOCSETA:
2156			error = suser_td(td);
2157			if (error != 0)
2158				return (error);
2159			*ct = *(struct termios *)data;
2160			return (0);
2161		case TIOCGETA:
2162			*(struct termios *)data = *ct;
2163			return (0);
2164		case TIOCGETD:
2165			*(int *)data = TTYDISC;
2166			return (0);
2167		case TIOCGWINSZ:
2168			bzero(data, sizeof(struct winsize));
2169			return (0);
2170		default:
2171			return (ENOTTY);
2172		}
2173	}
2174	tp = com->tp;
2175#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2176	term = tp->t_termios;
2177	oldcmd = cmd;
2178	error = ttsetcompat(tp, &cmd, data, &term);
2179	if (error != 0)
2180		return (error);
2181	if (cmd != oldcmd)
2182		data = (caddr_t)&term;
2183#endif
2184	if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
2185		int	cc;
2186		struct termios *dt = (struct termios *)data;
2187		struct termios *lt = mynor & CALLOUT_MASK
2188				     ? &com->lt_out : &com->lt_in;
2189
2190		dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2191			      | (dt->c_iflag & ~lt->c_iflag);
2192		dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2193			      | (dt->c_oflag & ~lt->c_oflag);
2194		dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2195			      | (dt->c_cflag & ~lt->c_cflag);
2196		dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2197			      | (dt->c_lflag & ~lt->c_lflag);
2198		for (cc = 0; cc < NCCS; ++cc)
2199			if (lt->c_cc[cc] != 0)
2200				dt->c_cc[cc] = tp->t_cc[cc];
2201		if (lt->c_ispeed != 0)
2202			dt->c_ispeed = tp->t_ispeed;
2203		if (lt->c_ospeed != 0)
2204			dt->c_ospeed = tp->t_ospeed;
2205	}
2206	error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td);
2207	if (error != ENOIOCTL)
2208		return (error);
2209	s = spltty();
2210	error = ttioctl(tp, cmd, data, flag);
2211	disc_optim(tp, &tp->t_termios, com);
2212	if (error != ENOIOCTL) {
2213		splx(s);
2214		return (error);
2215	}
2216	switch (cmd) {
2217	case TIOCSBRK:
2218		sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2219		break;
2220	case TIOCCBRK:
2221		sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2222		break;
2223	case TIOCSDTR:
2224		(void)commctl(com, TIOCM_DTR, DMBIS);
2225		break;
2226	case TIOCCDTR:
2227		(void)commctl(com, TIOCM_DTR, DMBIC);
2228		break;
2229	/*
2230	 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set.  The
2231	 * changes get undone on the next call to comparam().
2232	 */
2233	case TIOCMSET:
2234		(void)commctl(com, *(int *)data, DMSET);
2235		break;
2236	case TIOCMBIS:
2237		(void)commctl(com, *(int *)data, DMBIS);
2238		break;
2239	case TIOCMBIC:
2240		(void)commctl(com, *(int *)data, DMBIC);
2241		break;
2242	case TIOCMGET:
2243		*(int *)data = commctl(com, 0, DMGET);
2244		break;
2245	case TIOCMSDTRWAIT:
2246		/* must be root since the wait applies to following logins */
2247		error = suser_td(td);
2248		if (error != 0) {
2249			splx(s);
2250			return (error);
2251		}
2252		com->dtr_wait = *(int *)data * hz / 100;
2253		break;
2254	case TIOCMGDTRWAIT:
2255		*(int *)data = com->dtr_wait * 100 / hz;
2256		break;
2257	case TIOCTIMESTAMP:
2258		com->do_timestamp = TRUE;
2259		*(struct timeval *)data = com->timestamp;
2260		break;
2261	case TIOCDCDTIMESTAMP:
2262		com->do_dcd_timestamp = TRUE;
2263		*(struct timeval *)data = com->dcd_timestamp;
2264		break;
2265	default:
2266		splx(s);
2267		error = pps_ioctl(cmd, data, &com->pps);
2268		if (error == ENODEV)
2269			error = ENOTTY;
2270		return (error);
2271	}
2272	splx(s);
2273	return (0);
2274}
2275
2276/* software interrupt handler for SWI_TTY */
2277static void
2278siopoll(void *dummy)
2279{
2280	int		unit;
2281
2282	if (com_events == 0)
2283		return;
2284repeat:
2285	for (unit = 0; unit < sio_numunits; ++unit) {
2286		struct com_s	*com;
2287		int		incc;
2288		struct tty	*tp;
2289
2290		com = com_addr(unit);
2291		if (com == NULL)
2292			continue;
2293		tp = com->tp;
2294		if (tp == NULL || com->gone) {
2295			/*
2296			 * Discard any events related to never-opened or
2297			 * going-away devices.
2298			 */
2299			mtx_lock_spin(&sio_lock);
2300			incc = com->iptr - com->ibuf;
2301			com->iptr = com->ibuf;
2302			if (com->state & CS_CHECKMSR) {
2303				incc += LOTS_OF_EVENTS;
2304				com->state &= ~CS_CHECKMSR;
2305			}
2306			com_events -= incc;
2307			mtx_unlock_spin(&sio_lock);
2308			continue;
2309		}
2310		if (com->iptr != com->ibuf) {
2311			mtx_lock_spin(&sio_lock);
2312			sioinput(com);
2313			mtx_unlock_spin(&sio_lock);
2314		}
2315		if (com->state & CS_CHECKMSR) {
2316			u_char	delta_modem_status;
2317
2318			mtx_lock_spin(&sio_lock);
2319			delta_modem_status = com->last_modem_status
2320					     ^ com->prev_modem_status;
2321			com->prev_modem_status = com->last_modem_status;
2322			com_events -= LOTS_OF_EVENTS;
2323			com->state &= ~CS_CHECKMSR;
2324			mtx_unlock_spin(&sio_lock);
2325			if (delta_modem_status & MSR_DCD)
2326				(*linesw[tp->t_line].l_modem)
2327					(tp, com->prev_modem_status & MSR_DCD);
2328		}
2329		if (com->state & CS_ODONE) {
2330			mtx_lock_spin(&sio_lock);
2331			com_events -= LOTS_OF_EVENTS;
2332			com->state &= ~CS_ODONE;
2333			mtx_unlock_spin(&sio_lock);
2334			if (!(com->state & CS_BUSY)
2335			    && !(com->extra_state & CSE_BUSYCHECK)) {
2336				timeout(siobusycheck, com, hz / 100);
2337				com->extra_state |= CSE_BUSYCHECK;
2338			}
2339			(*linesw[tp->t_line].l_start)(tp);
2340		}
2341		if (com_events == 0)
2342			break;
2343	}
2344	if (com_events >= LOTS_OF_EVENTS)
2345		goto repeat;
2346}
2347
2348static int
2349comparam(tp, t)
2350	struct tty	*tp;
2351	struct termios	*t;
2352{
2353	u_int		cfcr;
2354	int		cflag;
2355	struct com_s	*com;
2356	int		divisor;
2357	u_char		dlbh;
2358	u_char		dlbl;
2359	int		s;
2360	int		unit;
2361
2362	/* do historical conversions */
2363	if (t->c_ispeed == 0)
2364		t->c_ispeed = t->c_ospeed;
2365
2366	/* check requested parameters */
2367	divisor = ttspeedtab(t->c_ospeed, comspeedtab);
2368	if (divisor < 0 || (divisor > 0 && t->c_ispeed != t->c_ospeed))
2369		return (EINVAL);
2370
2371	/* parameters are OK, convert them to the com struct and the device */
2372	unit = DEV_TO_UNIT(tp->t_dev);
2373	com = com_addr(unit);
2374	if (com == NULL)
2375		return (ENODEV);
2376	s = spltty();
2377	if (divisor == 0)
2378		(void)commctl(com, TIOCM_DTR, DMBIC);	/* hang up line */
2379	else
2380		(void)commctl(com, TIOCM_DTR, DMBIS);
2381	cflag = t->c_cflag;
2382	switch (cflag & CSIZE) {
2383	case CS5:
2384		cfcr = CFCR_5BITS;
2385		break;
2386	case CS6:
2387		cfcr = CFCR_6BITS;
2388		break;
2389	case CS7:
2390		cfcr = CFCR_7BITS;
2391		break;
2392	default:
2393		cfcr = CFCR_8BITS;
2394		break;
2395	}
2396	if (cflag & PARENB) {
2397		cfcr |= CFCR_PENAB;
2398		if (!(cflag & PARODD))
2399			cfcr |= CFCR_PEVEN;
2400	}
2401	if (cflag & CSTOPB)
2402		cfcr |= CFCR_STOPB;
2403
2404	if (com->hasfifo && divisor != 0) {
2405		/*
2406		 * Use a fifo trigger level low enough so that the input
2407		 * latency from the fifo is less than about 16 msec and
2408		 * the total latency is less than about 30 msec.  These
2409		 * latencies are reasonable for humans.  Serial comms
2410		 * protocols shouldn't expect anything better since modem
2411		 * latencies are larger.
2412		 */
2413		com->fifo_image = t->c_ospeed <= 4800
2414				  ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH;
2415#ifdef COM_ESP
2416		/*
2417		 * The Hayes ESP card needs the fifo DMA mode bit set
2418		 * in compatibility mode.  If not, it will interrupt
2419		 * for each character received.
2420		 */
2421		if (com->esp)
2422			com->fifo_image |= FIFO_DMA_MODE;
2423#endif
2424		sio_setreg(com, com_fifo, com->fifo_image);
2425	}
2426
2427	/*
2428	 * This returns with interrupts disabled so that we can complete
2429	 * the speed change atomically.  Keeping interrupts disabled is
2430	 * especially important while com_data is hidden.
2431	 */
2432	(void) siosetwater(com, t->c_ispeed);
2433
2434	if (divisor != 0) {
2435		sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2436		/*
2437		 * Only set the divisor registers if they would change,
2438		 * since on some 16550 incompatibles (UMC8669F), setting
2439		 * them while input is arriving them loses sync until
2440		 * data stops arriving.
2441		 */
2442		dlbl = divisor & 0xFF;
2443		if (sio_getreg(com, com_dlbl) != dlbl)
2444			sio_setreg(com, com_dlbl, dlbl);
2445		dlbh = (u_int) divisor >> 8;
2446		if (sio_getreg(com, com_dlbh) != dlbh)
2447			sio_setreg(com, com_dlbh, dlbh);
2448	}
2449
2450	sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2451
2452	if (!(tp->t_state & TS_TTSTOP))
2453		com->state |= CS_TTGO;
2454
2455	if (cflag & CRTS_IFLOW) {
2456		if (com->st16650a) {
2457			sio_setreg(com, com_cfcr, 0xbf);
2458			sio_setreg(com, com_fifo,
2459				   sio_getreg(com, com_fifo) | 0x40);
2460		}
2461		com->state |= CS_RTS_IFLOW;
2462		/*
2463		 * If CS_RTS_IFLOW just changed from off to on, the change
2464		 * needs to be propagated to MCR_RTS.  This isn't urgent,
2465		 * so do it later by calling comstart() instead of repeating
2466		 * a lot of code from comstart() here.
2467		 */
2468	} else if (com->state & CS_RTS_IFLOW) {
2469		com->state &= ~CS_RTS_IFLOW;
2470		/*
2471		 * CS_RTS_IFLOW just changed from on to off.  Force MCR_RTS
2472		 * on here, since comstart() won't do it later.
2473		 */
2474		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2475		if (com->st16650a) {
2476			sio_setreg(com, com_cfcr, 0xbf);
2477			sio_setreg(com, com_fifo,
2478				   sio_getreg(com, com_fifo) & ~0x40);
2479		}
2480	}
2481
2482
2483	/*
2484	 * Set up state to handle output flow control.
2485	 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2486	 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2487	 */
2488	com->state |= CS_ODEVREADY;
2489	com->state &= ~CS_CTS_OFLOW;
2490	if (cflag & CCTS_OFLOW) {
2491		com->state |= CS_CTS_OFLOW;
2492		if (!(com->last_modem_status & MSR_CTS))
2493			com->state &= ~CS_ODEVREADY;
2494		if (com->st16650a) {
2495			sio_setreg(com, com_cfcr, 0xbf);
2496			sio_setreg(com, com_fifo,
2497				   sio_getreg(com, com_fifo) | 0x80);
2498		}
2499	} else {
2500		if (com->st16650a) {
2501			sio_setreg(com, com_cfcr, 0xbf);
2502			sio_setreg(com, com_fifo,
2503				   sio_getreg(com, com_fifo) & ~0x80);
2504		}
2505	}
2506
2507	sio_setreg(com, com_cfcr, com->cfcr_image);
2508
2509	/* XXX shouldn't call functions while intrs are disabled. */
2510	disc_optim(tp, t, com);
2511	/*
2512	 * Recover from fiddling with CS_TTGO.  We used to call siointr1()
2513	 * unconditionally, but that defeated the careful discarding of
2514	 * stale input in sioopen().
2515	 */
2516	if (com->state >= (CS_BUSY | CS_TTGO))
2517		siointr1(com);
2518
2519	mtx_unlock_spin(&sio_lock);
2520	splx(s);
2521	comstart(tp);
2522	if (com->ibufold != NULL) {
2523		free(com->ibufold, M_DEVBUF);
2524		com->ibufold = NULL;
2525	}
2526	return (0);
2527}
2528
2529/*
2530 * This function must be called with the sio_lock mutex released and will
2531 * return with it obtained.
2532 */
2533static int
2534siosetwater(com, speed)
2535	struct com_s	*com;
2536	speed_t		speed;
2537{
2538	int		cp4ticks;
2539	u_char		*ibuf;
2540	int		ibufsize;
2541	struct tty	*tp;
2542
2543	/*
2544	 * Make the buffer size large enough to handle a softtty interrupt
2545	 * latency of about 2 ticks without loss of throughput or data
2546	 * (about 3 ticks if input flow control is not used or not honoured,
2547	 * but a bit less for CS5-CS7 modes).
2548	 */
2549	cp4ticks = speed / 10 / hz * 4;
2550	for (ibufsize = 128; ibufsize < cp4ticks;)
2551		ibufsize <<= 1;
2552	if (ibufsize == com->ibufsize) {
2553		mtx_lock_spin(&sio_lock);
2554		return (0);
2555	}
2556
2557	/*
2558	 * Allocate input buffer.  The extra factor of 2 in the size is
2559	 * to allow for an error byte for each input byte.
2560	 */
2561	ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2562	if (ibuf == NULL) {
2563		mtx_lock_spin(&sio_lock);
2564		return (ENOMEM);
2565	}
2566
2567	/* Initialize non-critical variables. */
2568	com->ibufold = com->ibuf;
2569	com->ibufsize = ibufsize;
2570	tp = com->tp;
2571	if (tp != NULL) {
2572		tp->t_ififosize = 2 * ibufsize;
2573		tp->t_ispeedwat = (speed_t)-1;
2574		tp->t_ospeedwat = (speed_t)-1;
2575	}
2576
2577	/*
2578	 * Read current input buffer, if any.  Continue with interrupts
2579	 * disabled.
2580	 */
2581	mtx_lock_spin(&sio_lock);
2582	if (com->iptr != com->ibuf)
2583		sioinput(com);
2584
2585	/*-
2586	 * Initialize critical variables, including input buffer watermarks.
2587	 * The external device is asked to stop sending when the buffer
2588	 * exactly reaches high water, or when the high level requests it.
2589	 * The high level is notified immediately (rather than at a later
2590	 * clock tick) when this watermark is reached.
2591	 * The buffer size is chosen so the watermark should almost never
2592	 * be reached.
2593	 * The low watermark is invisibly 0 since the buffer is always
2594	 * emptied all at once.
2595	 */
2596	com->iptr = com->ibuf = ibuf;
2597	com->ibufend = ibuf + ibufsize;
2598	com->ierroff = ibufsize;
2599	com->ihighwater = ibuf + 3 * ibufsize / 4;
2600	return (0);
2601}
2602
2603static void
2604comstart(tp)
2605	struct tty	*tp;
2606{
2607	struct com_s	*com;
2608	int		s;
2609	int		unit;
2610
2611	unit = DEV_TO_UNIT(tp->t_dev);
2612	com = com_addr(unit);
2613	if (com == NULL)
2614		return;
2615	s = spltty();
2616	mtx_lock_spin(&sio_lock);
2617	if (tp->t_state & TS_TTSTOP)
2618		com->state &= ~CS_TTGO;
2619	else
2620		com->state |= CS_TTGO;
2621	if (tp->t_state & TS_TBLOCK) {
2622		if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2623			outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2624	} else {
2625		if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2626		    && com->state & CS_RTS_IFLOW)
2627			outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2628	}
2629	mtx_unlock_spin(&sio_lock);
2630	if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2631		ttwwakeup(tp);
2632		splx(s);
2633		return;
2634	}
2635	if (tp->t_outq.c_cc != 0) {
2636		struct lbq	*qp;
2637		struct lbq	*next;
2638
2639		if (!com->obufs[0].l_queued) {
2640			com->obufs[0].l_tail
2641			    = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2642						  sizeof com->obuf1);
2643			com->obufs[0].l_next = NULL;
2644			com->obufs[0].l_queued = TRUE;
2645			mtx_lock_spin(&sio_lock);
2646			if (com->state & CS_BUSY) {
2647				qp = com->obufq.l_next;
2648				while ((next = qp->l_next) != NULL)
2649					qp = next;
2650				qp->l_next = &com->obufs[0];
2651			} else {
2652				com->obufq.l_head = com->obufs[0].l_head;
2653				com->obufq.l_tail = com->obufs[0].l_tail;
2654				com->obufq.l_next = &com->obufs[0];
2655				com->state |= CS_BUSY;
2656			}
2657			mtx_unlock_spin(&sio_lock);
2658		}
2659		if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2660			com->obufs[1].l_tail
2661			    = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2662						  sizeof com->obuf2);
2663			com->obufs[1].l_next = NULL;
2664			com->obufs[1].l_queued = TRUE;
2665			mtx_lock_spin(&sio_lock);
2666			if (com->state & CS_BUSY) {
2667				qp = com->obufq.l_next;
2668				while ((next = qp->l_next) != NULL)
2669					qp = next;
2670				qp->l_next = &com->obufs[1];
2671			} else {
2672				com->obufq.l_head = com->obufs[1].l_head;
2673				com->obufq.l_tail = com->obufs[1].l_tail;
2674				com->obufq.l_next = &com->obufs[1];
2675				com->state |= CS_BUSY;
2676			}
2677			mtx_unlock_spin(&sio_lock);
2678		}
2679		tp->t_state |= TS_BUSY;
2680	}
2681	mtx_lock_spin(&sio_lock);
2682	if (com->state >= (CS_BUSY | CS_TTGO))
2683		siointr1(com);	/* fake interrupt to start output */
2684	mtx_unlock_spin(&sio_lock);
2685	ttwwakeup(tp);
2686	splx(s);
2687}
2688
2689static void
2690comstop(tp, rw)
2691	struct tty	*tp;
2692	int		rw;
2693{
2694	struct com_s	*com;
2695
2696	com = com_addr(DEV_TO_UNIT(tp->t_dev));
2697	if (com == NULL || com->gone)
2698		return;
2699	mtx_lock_spin(&sio_lock);
2700	if (rw & FWRITE) {
2701		if (com->hasfifo)
2702#ifdef COM_ESP
2703		    /* XXX avoid h/w bug. */
2704		    if (!com->esp)
2705#endif
2706			sio_setreg(com, com_fifo,
2707				   FIFO_XMT_RST | com->fifo_image);
2708		com->obufs[0].l_queued = FALSE;
2709		com->obufs[1].l_queued = FALSE;
2710		if (com->state & CS_ODONE)
2711			com_events -= LOTS_OF_EVENTS;
2712		com->state &= ~(CS_ODONE | CS_BUSY);
2713		com->tp->t_state &= ~TS_BUSY;
2714	}
2715	if (rw & FREAD) {
2716		if (com->hasfifo)
2717#ifdef COM_ESP
2718		    /* XXX avoid h/w bug. */
2719		    if (!com->esp)
2720#endif
2721			sio_setreg(com, com_fifo,
2722				   FIFO_RCV_RST | com->fifo_image);
2723		com_events -= (com->iptr - com->ibuf);
2724		com->iptr = com->ibuf;
2725	}
2726	mtx_unlock_spin(&sio_lock);
2727	comstart(tp);
2728}
2729
2730static int
2731commctl(com, bits, how)
2732	struct com_s	*com;
2733	int		bits;
2734	int		how;
2735{
2736	int	mcr;
2737	int	msr;
2738
2739	if (how == DMGET) {
2740		bits = TIOCM_LE;	/* XXX - always enabled while open */
2741		mcr = com->mcr_image;
2742		if (mcr & MCR_DTR)
2743			bits |= TIOCM_DTR;
2744		if (mcr & MCR_RTS)
2745			bits |= TIOCM_RTS;
2746		msr = com->prev_modem_status;
2747		if (msr & MSR_CTS)
2748			bits |= TIOCM_CTS;
2749		if (msr & MSR_DCD)
2750			bits |= TIOCM_CD;
2751		if (msr & MSR_DSR)
2752			bits |= TIOCM_DSR;
2753		/*
2754		 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2755		 * more volatile by reading the modem status a lot.  Perhaps
2756		 * we should latch both bits until the status is read here.
2757		 */
2758		if (msr & (MSR_RI | MSR_TERI))
2759			bits |= TIOCM_RI;
2760		return (bits);
2761	}
2762	mcr = 0;
2763	if (bits & TIOCM_DTR)
2764		mcr |= MCR_DTR;
2765	if (bits & TIOCM_RTS)
2766		mcr |= MCR_RTS;
2767	if (com->gone)
2768		return(0);
2769	mtx_lock_spin(&sio_lock);
2770	switch (how) {
2771	case DMSET:
2772		outb(com->modem_ctl_port,
2773		     com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE));
2774		break;
2775	case DMBIS:
2776		outb(com->modem_ctl_port, com->mcr_image |= mcr);
2777		break;
2778	case DMBIC:
2779		outb(com->modem_ctl_port, com->mcr_image &= ~mcr);
2780		break;
2781	}
2782	mtx_unlock_spin(&sio_lock);
2783	return (0);
2784}
2785
2786static void
2787siosettimeout()
2788{
2789	struct com_s	*com;
2790	bool_t		someopen;
2791	int		unit;
2792
2793	/*
2794	 * Set our timeout period to 1 second if no polled devices are open.
2795	 * Otherwise set it to max(1/200, 1/hz).
2796	 * Enable timeouts iff some device is open.
2797	 */
2798	untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2799	sio_timeout = hz;
2800	someopen = FALSE;
2801	for (unit = 0; unit < sio_numunits; ++unit) {
2802		com = com_addr(unit);
2803		if (com != NULL && com->tp != NULL
2804		    && com->tp->t_state & TS_ISOPEN && !com->gone) {
2805			someopen = TRUE;
2806			if (com->poll || com->poll_output) {
2807				sio_timeout = hz > 200 ? hz / 200 : 1;
2808				break;
2809			}
2810		}
2811	}
2812	if (someopen) {
2813		sio_timeouts_until_log = hz / sio_timeout;
2814		sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2815					     sio_timeout);
2816	} else {
2817		/* Flush error messages, if any. */
2818		sio_timeouts_until_log = 1;
2819		comwakeup((void *)NULL);
2820		untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2821	}
2822}
2823
2824static void
2825comwakeup(chan)
2826	void	*chan;
2827{
2828	struct com_s	*com;
2829	int		unit;
2830
2831	sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2832
2833	/*
2834	 * Recover from lost output interrupts.
2835	 * Poll any lines that don't use interrupts.
2836	 */
2837	for (unit = 0; unit < sio_numunits; ++unit) {
2838		com = com_addr(unit);
2839		if (com != NULL && !com->gone
2840		    && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2841			mtx_lock_spin(&sio_lock);
2842			siointr1(com);
2843			mtx_unlock_spin(&sio_lock);
2844		}
2845	}
2846
2847	/*
2848	 * Check for and log errors, but not too often.
2849	 */
2850	if (--sio_timeouts_until_log > 0)
2851		return;
2852	sio_timeouts_until_log = hz / sio_timeout;
2853	for (unit = 0; unit < sio_numunits; ++unit) {
2854		int	errnum;
2855
2856		com = com_addr(unit);
2857		if (com == NULL)
2858			continue;
2859		if (com->gone)
2860			continue;
2861		for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2862			u_int	delta;
2863			u_long	total;
2864
2865			mtx_lock_spin(&sio_lock);
2866			delta = com->delta_error_counts[errnum];
2867			com->delta_error_counts[errnum] = 0;
2868			mtx_unlock_spin(&sio_lock);
2869			if (delta == 0)
2870				continue;
2871			total = com->error_counts[errnum] += delta;
2872			log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2873			    unit, delta, error_desc[errnum],
2874			    delta == 1 ? "" : "s", total);
2875		}
2876	}
2877}
2878
2879static void
2880disc_optim(tp, t, com)
2881	struct tty	*tp;
2882	struct termios	*t;
2883	struct com_s	*com;
2884{
2885	if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2886	    && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2887	    && (!(t->c_iflag & PARMRK)
2888		|| (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2889	    && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2890	    && linesw[tp->t_line].l_rint == ttyinput)
2891		tp->t_state |= TS_CAN_BYPASS_L_RINT;
2892	else
2893		tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2894	com->hotchar = linesw[tp->t_line].l_hotchar;
2895}
2896
2897/*
2898 * Following are all routines needed for SIO to act as console
2899 */
2900#include <sys/cons.h>
2901
2902struct siocnstate {
2903	u_char	dlbl;
2904	u_char	dlbh;
2905	u_char	ier;
2906	u_char	cfcr;
2907	u_char	mcr;
2908};
2909
2910#ifndef __alpha__
2911static speed_t siocngetspeed __P((Port_t, struct speedtab *));
2912#endif
2913static void siocnclose	__P((struct siocnstate *sp, Port_t iobase));
2914static void siocnopen	__P((struct siocnstate *sp, Port_t iobase, int speed));
2915static void siocntxwait	__P((Port_t iobase));
2916
2917#ifdef __alpha__
2918int siocnattach __P((int port, int speed));
2919int siogdbattach __P((int port, int speed));
2920int siogdbgetc __P((void));
2921void siogdbputc __P((int c));
2922#else
2923static cn_probe_t siocnprobe;
2924static cn_init_t siocninit;
2925#endif
2926static cn_checkc_t siocncheckc;
2927static cn_getc_t siocngetc;
2928static cn_putc_t siocnputc;
2929
2930#ifndef __alpha__
2931CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc,
2932	    siocnputc, NULL);
2933#endif
2934
2935/* To get the GDB related variables */
2936#if DDB > 0
2937#include <ddb/ddb.h>
2938#endif
2939
2940static void
2941siocntxwait(iobase)
2942	Port_t	iobase;
2943{
2944	int	timo;
2945
2946	/*
2947	 * Wait for any pending transmission to finish.  Required to avoid
2948	 * the UART lockup bug when the speed is changed, and for normal
2949	 * transmits.
2950	 */
2951	timo = 100000;
2952	while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2953	       != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2954		;
2955}
2956
2957#ifndef __alpha__
2958
2959/*
2960 * Read the serial port specified and try to figure out what speed
2961 * it's currently running at.  We're assuming the serial port has
2962 * been initialized and is basicly idle.  This routine is only intended
2963 * to be run at system startup.
2964 *
2965 * If the value read from the serial port doesn't make sense, return 0.
2966 */
2967
2968static speed_t
2969siocngetspeed(iobase, table)
2970	Port_t iobase;
2971	struct speedtab *table;
2972{
2973	int	code;
2974	u_char	dlbh;
2975	u_char	dlbl;
2976	u_char  cfcr;
2977
2978	cfcr = inb(iobase + com_cfcr);
2979	outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2980
2981	dlbl = inb(iobase + com_dlbl);
2982	dlbh = inb(iobase + com_dlbh);
2983
2984	outb(iobase + com_cfcr, cfcr);
2985
2986	code = dlbh << 8 | dlbl;
2987
2988	for (; table->sp_speed != -1; table++)
2989		if (table->sp_code == code)
2990			return (table->sp_speed);
2991
2992	return (0);	/* didn't match anything sane */
2993}
2994
2995#endif
2996
2997static void
2998siocnopen(sp, iobase, speed)
2999	struct siocnstate	*sp;
3000	Port_t			iobase;
3001	int			speed;
3002{
3003	int	divisor;
3004	u_char	dlbh;
3005	u_char	dlbl;
3006
3007	/*
3008	 * Save all the device control registers except the fifo register
3009	 * and set our default ones (cs8 -parenb speed=comdefaultrate).
3010	 * We can't save the fifo register since it is read-only.
3011	 */
3012	sp->ier = inb(iobase + com_ier);
3013	outb(iobase + com_ier, 0);	/* spltty() doesn't stop siointr() */
3014	siocntxwait(iobase);
3015	sp->cfcr = inb(iobase + com_cfcr);
3016	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
3017	sp->dlbl = inb(iobase + com_dlbl);
3018	sp->dlbh = inb(iobase + com_dlbh);
3019	/*
3020	 * Only set the divisor registers if they would change, since on
3021	 * some 16550 incompatibles (Startech), setting them clears the
3022	 * data input register.  This also reduces the effects of the
3023	 * UMC8669F bug.
3024	 */
3025	divisor = ttspeedtab(speed, comspeedtab);
3026	dlbl = divisor & 0xFF;
3027	if (sp->dlbl != dlbl)
3028		outb(iobase + com_dlbl, dlbl);
3029	dlbh = (u_int) divisor >> 8;
3030	if (sp->dlbh != dlbh)
3031		outb(iobase + com_dlbh, dlbh);
3032	outb(iobase + com_cfcr, CFCR_8BITS);
3033	sp->mcr = inb(iobase + com_mcr);
3034	/*
3035	 * We don't want interrupts, but must be careful not to "disable"
3036	 * them by clearing the MCR_IENABLE bit, since that might cause
3037	 * an interrupt by floating the IRQ line.
3038	 */
3039	outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
3040}
3041
3042static void
3043siocnclose(sp, iobase)
3044	struct siocnstate	*sp;
3045	Port_t			iobase;
3046{
3047	/*
3048	 * Restore the device control registers.
3049	 */
3050	siocntxwait(iobase);
3051	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
3052	if (sp->dlbl != inb(iobase + com_dlbl))
3053		outb(iobase + com_dlbl, sp->dlbl);
3054	if (sp->dlbh != inb(iobase + com_dlbh))
3055		outb(iobase + com_dlbh, sp->dlbh);
3056	outb(iobase + com_cfcr, sp->cfcr);
3057	/*
3058	 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
3059	 */
3060	outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
3061	outb(iobase + com_ier, sp->ier);
3062}
3063
3064#ifndef __alpha__
3065
3066static void
3067siocnprobe(cp)
3068	struct consdev	*cp;
3069{
3070	speed_t			boot_speed;
3071	u_char			cfcr;
3072	int			s, unit;
3073	struct siocnstate	sp;
3074
3075	/*
3076	 * Find our first enabled console, if any.  If it is a high-level
3077	 * console device, then initialize it and return successfully.
3078	 * If it is a low-level console device, then initialize it and
3079	 * return unsuccessfully.  It must be initialized in both cases
3080	 * for early use by console drivers and debuggers.  Initializing
3081	 * the hardware is not necessary in all cases, since the i/o
3082	 * routines initialize it on the fly, but it is necessary if
3083	 * input might arrive while the hardware is switched back to an
3084	 * uninitialized state.  We can't handle multiple console devices
3085	 * yet because our low-level routines don't take a device arg.
3086	 * We trust the user to set the console flags properly so that we
3087	 * don't need to probe.
3088	 */
3089	cp->cn_pri = CN_DEAD;
3090
3091	for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
3092		int flags;
3093		int disabled;
3094		if (resource_int_value("sio", unit, "disabled", &disabled) == 0) {
3095			if (disabled)
3096				continue;
3097		}
3098		if (resource_int_value("sio", unit, "flags", &flags))
3099			continue;
3100		if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
3101			int port;
3102			Port_t iobase;
3103
3104			if (resource_int_value("sio", unit, "port", &port))
3105				continue;
3106			iobase = port;
3107			s = spltty();
3108			if (boothowto & RB_SERIAL) {
3109				boot_speed = siocngetspeed(iobase, comspeedtab);
3110				if (boot_speed)
3111					comdefaultrate = boot_speed;
3112			}
3113
3114			/*
3115			 * Initialize the divisor latch.  We can't rely on
3116			 * siocnopen() to do this the first time, since it
3117			 * avoids writing to the latch if the latch appears
3118			 * to have the correct value.  Also, if we didn't
3119			 * just read the speed from the hardware, then we
3120			 * need to set the speed in hardware so that
3121			 * switching it later is null.
3122			 */
3123			cfcr = inb(iobase + com_cfcr);
3124			outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
3125			outb(iobase + com_dlbl,
3126			     COMBRD(comdefaultrate) & 0xff);
3127			outb(iobase + com_dlbh,
3128			     (u_int) COMBRD(comdefaultrate) >> 8);
3129			outb(iobase + com_cfcr, cfcr);
3130
3131			siocnopen(&sp, iobase, comdefaultrate);
3132
3133			splx(s);
3134			if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
3135				cp->cn_dev = makedev(CDEV_MAJOR, unit);
3136				cp->cn_pri = COM_FORCECONSOLE(flags)
3137					     || boothowto & RB_SERIAL
3138					     ? CN_REMOTE : CN_NORMAL;
3139				siocniobase = iobase;
3140				siocnunit = unit;
3141			}
3142			if (COM_DEBUGGER(flags)) {
3143				printf("sio%d: gdb debugging port\n", unit);
3144				siogdbiobase = iobase;
3145				siogdbunit = unit;
3146#if DDB > 0
3147				gdbdev = makedev(CDEV_MAJOR, unit);
3148				gdb_getc = siocngetc;
3149				gdb_putc = siocnputc;
3150#endif
3151			}
3152		}
3153	}
3154#ifdef	__i386__
3155#if DDB > 0
3156	/*
3157	 * XXX Ugly Compatability.
3158	 * If no gdb port has been specified, set it to be the console
3159	 * as some configuration files don't specify the gdb port.
3160	 */
3161	if (gdbdev == NODEV && (boothowto & RB_GDB)) {
3162		printf("Warning: no GDB port specified. Defaulting to sio%d.\n",
3163			siocnunit);
3164		printf("Set flag 0x80 on desired GDB port in your\n");
3165		printf("configuration file (currently sio only).\n");
3166		siogdbiobase = siocniobase;
3167		siogdbunit = siocnunit;
3168		gdbdev = makedev(CDEV_MAJOR, siocnunit);
3169		gdb_getc = siocngetc;
3170		gdb_putc = siocnputc;
3171	}
3172#endif
3173#endif
3174}
3175
3176static void
3177siocninit(cp)
3178	struct consdev	*cp;
3179{
3180	comconsole = DEV_TO_UNIT(cp->cn_dev);
3181}
3182
3183#endif
3184
3185#ifdef __alpha__
3186
3187CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL);
3188
3189int
3190siocnattach(port, speed)
3191	int port;
3192	int speed;
3193{
3194	int			s;
3195	u_char			cfcr;
3196	struct siocnstate	sp;
3197
3198	siocniobase = port;
3199	comdefaultrate = speed;
3200	sio_consdev.cn_pri = CN_NORMAL;
3201	sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0);
3202
3203	s = spltty();
3204
3205	/*
3206	 * Initialize the divisor latch.  We can't rely on
3207	 * siocnopen() to do this the first time, since it
3208	 * avoids writing to the latch if the latch appears
3209	 * to have the correct value.  Also, if we didn't
3210	 * just read the speed from the hardware, then we
3211	 * need to set the speed in hardware so that
3212	 * switching it later is null.
3213	 */
3214	cfcr = inb(siocniobase + com_cfcr);
3215	outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr);
3216	outb(siocniobase + com_dlbl,
3217	     COMBRD(comdefaultrate) & 0xff);
3218	outb(siocniobase + com_dlbh,
3219	     (u_int) COMBRD(comdefaultrate) >> 8);
3220	outb(siocniobase + com_cfcr, cfcr);
3221
3222	siocnopen(&sp, siocniobase, comdefaultrate);
3223	splx(s);
3224
3225	cn_tab = &sio_consdev;
3226	return (0);
3227}
3228
3229int
3230siogdbattach(port, speed)
3231	int port;
3232	int speed;
3233{
3234	int			s;
3235	u_char			cfcr;
3236	struct siocnstate	sp;
3237	int			unit = 1;	/* XXX !!! */
3238
3239	siogdbiobase = port;
3240	gdbdefaultrate = speed;
3241
3242	printf("sio%d: gdb debugging port\n", unit);
3243	siogdbunit = unit;
3244#if DDB > 0
3245	gdbdev = makedev(CDEV_MAJOR, unit);
3246	gdb_getc = siocngetc;
3247	gdb_putc = siocnputc;
3248#endif
3249
3250	s = spltty();
3251
3252	/*
3253	 * Initialize the divisor latch.  We can't rely on
3254	 * siocnopen() to do this the first time, since it
3255	 * avoids writing to the latch if the latch appears
3256	 * to have the correct value.  Also, if we didn't
3257	 * just read the speed from the hardware, then we
3258	 * need to set the speed in hardware so that
3259	 * switching it later is null.
3260	 */
3261	cfcr = inb(siogdbiobase + com_cfcr);
3262	outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr);
3263	outb(siogdbiobase + com_dlbl,
3264	     COMBRD(gdbdefaultrate) & 0xff);
3265	outb(siogdbiobase + com_dlbh,
3266	     (u_int) COMBRD(gdbdefaultrate) >> 8);
3267	outb(siogdbiobase + com_cfcr, cfcr);
3268
3269	siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3270	splx(s);
3271
3272	return (0);
3273}
3274
3275#endif
3276
3277static int
3278siocncheckc(dev)
3279	dev_t	dev;
3280{
3281	int	c;
3282	Port_t	iobase;
3283	int	s;
3284	struct siocnstate	sp;
3285
3286	if (minor(dev) == siogdbunit)
3287		iobase = siogdbiobase;
3288	else
3289		iobase = siocniobase;
3290	s = spltty();
3291	siocnopen(&sp, iobase, comdefaultrate);
3292	if (inb(iobase + com_lsr) & LSR_RXRDY)
3293		c = inb(iobase + com_data);
3294	else
3295		c = -1;
3296	siocnclose(&sp, iobase);
3297	splx(s);
3298	return (c);
3299}
3300
3301
3302int
3303siocngetc(dev)
3304	dev_t	dev;
3305{
3306	int	c;
3307	Port_t	iobase;
3308	int	s;
3309	struct siocnstate	sp;
3310
3311	if (minor(dev) == siogdbunit)
3312		iobase = siogdbiobase;
3313	else
3314		iobase = siocniobase;
3315	s = spltty();
3316	siocnopen(&sp, iobase, comdefaultrate);
3317	while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3318		;
3319	c = inb(iobase + com_data);
3320	siocnclose(&sp, iobase);
3321	splx(s);
3322	return (c);
3323}
3324
3325void
3326siocnputc(dev, c)
3327	dev_t	dev;
3328	int	c;
3329{
3330	int	s;
3331	struct siocnstate	sp;
3332	Port_t	iobase;
3333
3334	if (minor(dev) == siogdbunit)
3335		iobase = siogdbiobase;
3336	else
3337		iobase = siocniobase;
3338	s = spltty();
3339	if (sio_inited)
3340		mtx_lock_spin(&sio_lock);
3341	siocnopen(&sp, iobase, comdefaultrate);
3342	siocntxwait(iobase);
3343	outb(iobase + com_data, c);
3344	siocnclose(&sp, iobase);
3345	if (sio_inited)
3346		mtx_unlock_spin(&sio_lock);
3347	splx(s);
3348}
3349
3350#ifdef __alpha__
3351int
3352siogdbgetc()
3353{
3354	int	c;
3355	Port_t	iobase;
3356	int	s;
3357	struct siocnstate	sp;
3358
3359	iobase = siogdbiobase;
3360	s = spltty();
3361	siocnopen(&sp, iobase, gdbdefaultrate);
3362	while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3363		;
3364	c = inb(iobase + com_data);
3365	siocnclose(&sp, iobase);
3366	splx(s);
3367	return (c);
3368}
3369
3370void
3371siogdbputc(c)
3372	int	c;
3373{
3374	int	s;
3375	struct siocnstate	sp;
3376
3377	s = spltty();
3378	siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3379	siocntxwait(siogdbiobase);
3380	outb(siogdbiobase + com_data, c);
3381	siocnclose(&sp, siogdbiobase);
3382	splx(s);
3383}
3384#endif
3385
3386DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0);
3387DRIVER_MODULE(sio, acpi, sio_isa_driver, sio_devclass, 0, 0);
3388#if NCARD > 0
3389DRIVER_MODULE(sio, pccard, sio_pccard_driver, sio_devclass, 0, 0);
3390#endif
3391#if NPCI > 0
3392DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0);
3393DRIVER_MODULE(sio, cardbus, sio_pci_driver, sio_devclass, 0, 0);
3394#endif
3395