sio.c revision 60708
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by the University of
16 *	California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/dev/sio/sio.c 60708 2000-05-19 10:02:15Z tanimura $
34 *	from: @(#)com.c	7.5 (Berkeley) 5/16/91
35 *	from: i386/isa sio.c,v 1.234
36 */
37
38#include "opt_comconsole.h"
39#include "opt_compat.h"
40#include "opt_ddb.h"
41#include "opt_sio.h"
42#include "card.h"
43#include "pci.h"
44#include "sio.h"
45
46/*
47 * Serial driver, based on 386BSD-0.1 com driver.
48 * Mostly rewritten to use pseudo-DMA.
49 * Works for National Semiconductor NS8250-NS16550AF UARTs.
50 * COM driver, based on HP dca driver.
51 *
52 * Changes for PC-Card integration:
53 *	- Added PC-Card driver table and handlers
54 */
55#include <sys/param.h>
56#include <sys/systm.h>
57#include <sys/reboot.h>
58#include <sys/malloc.h>
59#include <sys/tty.h>
60#include <sys/proc.h>
61#include <sys/module.h>
62#include <sys/conf.h>
63#include <sys/dkstat.h>
64#include <sys/fcntl.h>
65#include <sys/interrupt.h>
66#include <sys/kernel.h>
67#include <sys/syslog.h>
68#include <sys/sysctl.h>
69#include <sys/bus.h>
70#include <machine/bus_pio.h>
71#include <machine/bus.h>
72#include <sys/rman.h>
73#include <sys/timetc.h>
74#include <sys/timepps.h>
75
76#include <isa/isareg.h>
77#include <isa/isavar.h>
78#if NPCI > 0
79#include <pci/pcireg.h>
80#include <pci/pcivar.h>
81#endif
82#include <machine/lock.h>
83
84#include <machine/clock.h>
85#include <machine/ipl.h>
86#ifndef SMP
87#include <machine/lock.h>
88#endif
89#include <machine/resource.h>
90
91#include <isa/sioreg.h>
92
93#ifdef COM_ESP
94#include <isa/ic/esp.h>
95#endif
96#include <isa/ic/ns16550.h>
97
98#ifndef __i386__
99#define disable_intr()
100#define enable_intr()
101#endif
102
103#ifdef SMP
104#define disable_intr()	COM_DISABLE_INTR()
105#define enable_intr()	COM_ENABLE_INTR()
106#endif /* SMP */
107
108#define	LOTS_OF_EVENTS	64	/* helps separate urgent events from input */
109
110#define	CALLOUT_MASK		0x80
111#define	CONTROL_MASK		0x60
112#define	CONTROL_INIT_STATE	0x20
113#define	CONTROL_LOCK_STATE	0x40
114#define	DEV_TO_UNIT(dev)	(MINOR_TO_UNIT(minor(dev)))
115#define	MINOR_MAGIC_MASK	(CALLOUT_MASK | CONTROL_MASK)
116#define	MINOR_TO_UNIT(mynor)	((mynor) & ~MINOR_MAGIC_MASK)
117
118#ifdef COM_MULTIPORT
119/* checks in flags for multiport and which is multiport "master chip"
120 * for a given card
121 */
122#define	COM_ISMULTIPORT(flags)	((flags) & 0x01)
123#define	COM_MPMASTER(flags)	(((flags) >> 8) & 0x0ff)
124#define	COM_NOTAST4(flags)	((flags) & 0x04)
125#endif /* COM_MULTIPORT */
126
127#define	COM_CONSOLE(flags)	((flags) & 0x10)
128#define	COM_FORCECONSOLE(flags)	((flags) & 0x20)
129#define	COM_LLCONSOLE(flags)	((flags) & 0x40)
130#define	COM_DEBUGGER(flags)	((flags) & 0x80)
131#define	COM_LOSESOUTINTS(flags)	((flags) & 0x08)
132#define	COM_NOFIFO(flags)		((flags) & 0x02)
133#define COM_ST16650A(flags)	((flags) & 0x20000)
134#define COM_C_NOPROBE		(0x40000)
135#define COM_NOPROBE(flags)	((flags) & COM_C_NOPROBE)
136#define COM_C_IIR_TXRDYBUG	(0x80000)
137#define COM_IIR_TXRDYBUG(flags)	((flags) & COM_C_IIR_TXRDYBUG)
138#define	COM_FIFOSIZE(flags)	(((flags) & 0xff000000) >> 24)
139
140#define	com_scr		7	/* scratch register for 16450-16550 (R/W) */
141
142#define	sio_getreg(com, off) \
143	(bus_space_read_1((com)->bst, (com)->bsh, (off)))
144#define	sio_setreg(com, off, value) \
145	(bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
146
147/*
148 * com state bits.
149 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
150 * than the other bits so that they can be tested as a group without masking
151 * off the low bits.
152 *
153 * The following com and tty flags correspond closely:
154 *	CS_BUSY		= TS_BUSY (maintained by comstart(), siopoll() and
155 *				   comstop())
156 *	CS_TTGO		= ~TS_TTSTOP (maintained by comparam() and comstart())
157 *	CS_CTS_OFLOW	= CCTS_OFLOW (maintained by comparam())
158 *	CS_RTS_IFLOW	= CRTS_IFLOW (maintained by comparam())
159 * TS_FLUSH is not used.
160 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
161 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
162 */
163#define	CS_BUSY		0x80	/* output in progress */
164#define	CS_TTGO		0x40	/* output not stopped by XOFF */
165#define	CS_ODEVREADY	0x20	/* external device h/w ready (CTS) */
166#define	CS_CHECKMSR	1	/* check of MSR scheduled */
167#define	CS_CTS_OFLOW	2	/* use CTS output flow control */
168#define	CS_DTR_OFF	0x10	/* DTR held off */
169#define	CS_ODONE	4	/* output completed */
170#define	CS_RTS_IFLOW	8	/* use RTS input flow control */
171#define	CSE_BUSYCHECK	1	/* siobusycheck() scheduled */
172
173static	char const * const	error_desc[] = {
174#define	CE_OVERRUN			0
175	"silo overflow",
176#define	CE_INTERRUPT_BUF_OVERFLOW	1
177	"interrupt-level buffer overflow",
178#define	CE_TTY_BUF_OVERFLOW		2
179	"tty-level buffer overflow",
180};
181
182#define	CE_NTYPES			3
183#define	CE_RECORD(com, errnum)		(++(com)->delta_error_counts[errnum])
184
185/* types.  XXX - should be elsewhere */
186typedef u_int	Port_t;		/* hardware port */
187typedef u_char	bool_t;		/* boolean */
188
189/* queue of linear buffers */
190struct lbq {
191	u_char	*l_head;	/* next char to process */
192	u_char	*l_tail;	/* one past the last char to process */
193	struct lbq *l_next;	/* next in queue */
194	bool_t	l_queued;	/* nonzero if queued */
195};
196
197/* com device structure */
198struct com_s {
199	u_int	flags;		/* Copy isa device flags */
200	u_char	state;		/* miscellaneous flag bits */
201	bool_t  active_out;	/* nonzero if the callout device is open */
202	u_char	cfcr_image;	/* copy of value written to CFCR */
203#ifdef COM_ESP
204	bool_t	esp;		/* is this unit a hayes esp board? */
205#endif
206	u_char	extra_state;	/* more flag bits, separate for order trick */
207	u_char	fifo_image;	/* copy of value written to FIFO */
208	bool_t	hasfifo;	/* nonzero for 16550 UARTs */
209	bool_t	st16650a;	/* Is a Startech 16650A or RTS/CTS compat */
210	bool_t	loses_outints;	/* nonzero if device loses output interrupts */
211	u_char	mcr_image;	/* copy of value written to MCR */
212#ifdef COM_MULTIPORT
213	bool_t	multiport;	/* is this unit part of a multiport device? */
214#endif /* COM_MULTIPORT */
215	bool_t	no_irq;		/* nonzero if irq is not attached */
216	bool_t  gone;		/* hardware disappeared */
217	bool_t	poll;		/* nonzero if polling is required */
218	bool_t	poll_output;	/* nonzero if polling for output is required */
219	int	unit;		/* unit	number */
220	int	dtr_wait;	/* time to hold DTR down on close (* 1/hz) */
221	u_int	tx_fifo_size;
222	u_int	wopeners;	/* # processes waiting for DCD in open() */
223
224	/*
225	 * The high level of the driver never reads status registers directly
226	 * because there would be too many side effects to handle conveniently.
227	 * Instead, it reads copies of the registers stored here by the
228	 * interrupt handler.
229	 */
230	u_char	last_modem_status;	/* last MSR read by intr handler */
231	u_char	prev_modem_status;	/* last MSR handled by high level */
232
233	u_char	hotchar;	/* ldisc-specific char to be handled ASAP */
234	u_char	*ibuf;		/* start of input buffer */
235	u_char	*ibufend;	/* end of input buffer */
236	u_char	*ibufold;	/* old input buffer, to be freed */
237	u_char	*ihighwater;	/* threshold in input buffer */
238	u_char	*iptr;		/* next free spot in input buffer */
239	int	ibufsize;	/* size of ibuf (not include error bytes) */
240	int	ierroff;	/* offset of error bytes in ibuf */
241
242	struct lbq	obufq;	/* head of queue of output buffers */
243	struct lbq	obufs[2];	/* output buffers */
244
245	bus_space_tag_t		bst;
246	bus_space_handle_t	bsh;
247
248	Port_t	data_port;	/* i/o ports */
249#ifdef COM_ESP
250	Port_t	esp_port;
251#endif
252	Port_t	int_id_port;
253	Port_t	modem_ctl_port;
254	Port_t	line_status_port;
255	Port_t	modem_status_port;
256	Port_t	intr_ctl_port;	/* Ports of IIR register */
257
258	struct tty	*tp;	/* cross reference */
259
260	/* Initial state. */
261	struct termios	it_in;	/* should be in struct tty */
262	struct termios	it_out;
263
264	/* Lock state. */
265	struct termios	lt_in;	/* should be in struct tty */
266	struct termios	lt_out;
267
268	bool_t	do_timestamp;
269	bool_t	do_dcd_timestamp;
270	struct timeval	timestamp;
271	struct timeval	dcd_timestamp;
272	struct	pps_state pps;
273
274	u_long	bytes_in;	/* statistics */
275	u_long	bytes_out;
276	u_int	delta_error_counts[CE_NTYPES];
277	u_long	error_counts[CE_NTYPES];
278
279	struct resource *irqres;
280	struct resource *ioportres;
281	void *cookie;
282
283	/*
284	 * Data area for output buffers.  Someday we should build the output
285	 * buffer queue without copying data.
286	 */
287	u_char	obuf1[256];
288	u_char	obuf2[256];
289};
290
291#ifdef COM_ESP
292static	int	espattach	__P((struct com_s *com, Port_t esp_port));
293#endif
294static	int	sioattach	__P((device_t dev, int rid));
295static	int	sio_isa_attach	__P((device_t dev));
296
297static	timeout_t siobusycheck;
298static	timeout_t siodtrwakeup;
299static	void	comhardclose	__P((struct com_s *com));
300static	void	sioinput	__P((struct com_s *com));
301static	void	siointr1	__P((struct com_s *com));
302static	void	siointr		__P((void *arg));
303static	int	commctl		__P((struct com_s *com, int bits, int how));
304static	int	comparam	__P((struct tty *tp, struct termios *t));
305static	swihand_t siopoll;
306static	int	sioprobe	__P((device_t dev, int xrid));
307static	int	sio_isa_probe	__P((device_t dev));
308static	void	siosettimeout	__P((void));
309static	int	siosetwater	__P((struct com_s *com, speed_t speed));
310static	void	comstart	__P((struct tty *tp));
311static	void	comstop		__P((struct tty *tp, int rw));
312static	timeout_t comwakeup;
313static	void	disc_optim	__P((struct tty	*tp, struct termios *t,
314				     struct com_s *com));
315
316#if NCARD > 0
317static	int	sio_pccard_attach __P((device_t dev));
318static	int	sio_pccard_detach __P((device_t dev));
319static	int	sio_pccard_probe __P((device_t dev));
320#endif /* NCARD > 0 */
321
322#if NPCI > 0
323static	int	sio_pci_attach __P((device_t dev));
324static	void	sio_pci_kludge_unit __P((device_t dev));
325static	int	sio_pci_probe __P((device_t dev));
326#endif /* NPCI > 0 */
327
328static char driver_name[] = "sio";
329
330/* table and macro for fast conversion from a unit number to its com struct */
331static	devclass_t	sio_devclass;
332#define	com_addr(unit)	((struct com_s *) \
333			 devclass_get_softc(sio_devclass, unit))
334
335static device_method_t sio_isa_methods[] = {
336	/* Device interface */
337	DEVMETHOD(device_probe,		sio_isa_probe),
338	DEVMETHOD(device_attach,	sio_isa_attach),
339
340	{ 0, 0 }
341};
342
343static driver_t sio_isa_driver = {
344	driver_name,
345	sio_isa_methods,
346	sizeof(struct com_s),
347};
348
349#if NCARD > 0
350static device_method_t sio_pccard_methods[] = {
351	/* Device interface */
352	DEVMETHOD(device_probe,		sio_pccard_probe),
353	DEVMETHOD(device_attach,	sio_pccard_attach),
354	DEVMETHOD(device_detach,	sio_pccard_detach),
355
356	{ 0, 0 }
357};
358
359static driver_t sio_pccard_driver = {
360	driver_name,
361	sio_pccard_methods,
362	sizeof(struct com_s),
363};
364#endif /* NCARD > 0 */
365
366#if NPCI > 0
367static device_method_t sio_pci_methods[] = {
368	/* Device interface */
369	DEVMETHOD(device_probe,		sio_pci_probe),
370	DEVMETHOD(device_attach,	sio_pci_attach),
371
372	{ 0, 0 }
373};
374
375static driver_t sio_pci_driver = {
376	driver_name,
377	sio_pci_methods,
378	sizeof(struct com_s),
379};
380#endif /* NPCI > 0 */
381
382static	d_open_t	sioopen;
383static	d_close_t	sioclose;
384static	d_read_t	sioread;
385static	d_write_t	siowrite;
386static	d_ioctl_t	sioioctl;
387
388#define	CDEV_MAJOR	28
389static struct cdevsw sio_cdevsw = {
390	/* open */	sioopen,
391	/* close */	sioclose,
392	/* read */	sioread,
393	/* write */	siowrite,
394	/* ioctl */	sioioctl,
395	/* poll */	ttypoll,
396	/* mmap */	nommap,
397	/* strategy */	nostrategy,
398	/* name */	driver_name,
399	/* maj */	CDEV_MAJOR,
400	/* dump */	nodump,
401	/* psize */	nopsize,
402	/* flags */	D_TTY,
403	/* bmaj */	-1
404};
405
406int	comconsole = -1;
407static	volatile speed_t	comdefaultrate = CONSPEED;
408#ifdef __alpha__
409static	volatile speed_t	gdbdefaultrate = CONSPEED;
410#endif
411static	u_int	com_events;	/* input chars + weighted output completions */
412static	Port_t	siocniobase;
413static	int	siocnunit;
414static	Port_t	siogdbiobase;
415static	int	siogdbunit = -1;
416static	bool_t	sio_registered;
417static	int	sio_timeout;
418static	int	sio_timeouts_until_log;
419static	struct	callout_handle sio_timeout_handle
420    = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
421static	int	sio_numunits;
422
423static	struct speedtab comspeedtab[] = {
424	{ 0,		0 },
425	{ 50,		COMBRD(50) },
426	{ 75,		COMBRD(75) },
427	{ 110,		COMBRD(110) },
428	{ 134,		COMBRD(134) },
429	{ 150,		COMBRD(150) },
430	{ 200,		COMBRD(200) },
431	{ 300,		COMBRD(300) },
432	{ 600,		COMBRD(600) },
433	{ 1200,		COMBRD(1200) },
434	{ 1800,		COMBRD(1800) },
435	{ 2400,		COMBRD(2400) },
436	{ 4800,		COMBRD(4800) },
437	{ 9600,		COMBRD(9600) },
438	{ 19200,	COMBRD(19200) },
439	{ 38400,	COMBRD(38400) },
440	{ 57600,	COMBRD(57600) },
441	{ 115200,	COMBRD(115200) },
442	{ -1,		-1 }
443};
444
445#ifdef COM_ESP
446/* XXX configure this properly. */
447static	Port_t	likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
448static	Port_t	likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
449#endif
450
451/*
452 * handle sysctl read/write requests for console speed
453 *
454 * In addition to setting comdefaultrate for I/O through /dev/console,
455 * also set the initial and lock values for the /dev/ttyXX device
456 * if there is one associated with the console.  Finally, if the /dev/tty
457 * device has already been open, change the speed on the open running port
458 * itself.
459 */
460
461static int
462sysctl_machdep_comdefaultrate SYSCTL_HANDLER_ARGS
463{
464	int error, s;
465	speed_t newspeed;
466	struct com_s *com;
467	struct tty *tp;
468
469	newspeed = comdefaultrate;
470
471	error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
472	if (error || !req->newptr)
473		return (error);
474
475	comdefaultrate = newspeed;
476
477	if (comconsole < 0)		/* serial console not selected? */
478		return (0);
479
480	com = com_addr(comconsole);
481	if (com == NULL)
482		return (ENXIO);
483
484	/*
485	 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
486	 * (note, the lock rates really are boolean -- if non-zero, disallow
487	 *  speed changes)
488	 */
489	com->it_in.c_ispeed  = com->it_in.c_ospeed =
490	com->lt_in.c_ispeed  = com->lt_in.c_ospeed =
491	com->it_out.c_ispeed = com->it_out.c_ospeed =
492	com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate;
493
494	/*
495	 * if we're open, change the running rate too
496	 */
497	tp = com->tp;
498	if (tp && (tp->t_state & TS_ISOPEN)) {
499		tp->t_termios.c_ispeed =
500		tp->t_termios.c_ospeed = comdefaultrate;
501		s = spltty();
502		error = comparam(tp, &tp->t_termios);
503		splx(s);
504	}
505	return error;
506}
507
508SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
509	    0, 0, sysctl_machdep_comdefaultrate, "I", "");
510
511#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit))
512#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit))
513
514#if NCARD > 0
515static int
516sio_pccard_probe(dev)
517	device_t	dev;
518{
519	/* Do not probe IRQ - pccard doesn't turn on the interrupt line */
520	/* until bus_setup_intr */
521	SET_FLAG(dev, COM_C_NOPROBE);
522
523	return (sioprobe(dev, 0));
524}
525
526static int
527sio_pccard_attach(dev)
528	device_t	dev;
529{
530	return (sioattach(dev, 0));
531}
532
533/*
534 *	sio_detach - unload the driver and clear the table.
535 *	XXX TODO:
536 *	This is usually called when the card is ejected, but
537 *	can be caused by a modunload of a controller driver.
538 *	The idea is to reset the driver's view of the device
539 *	and ensure that any driver entry points such as
540 *	read and write do not hang.
541 */
542static int
543sio_pccard_detach(dev)
544	device_t	dev;
545{
546	struct com_s	*com;
547
548	com = (struct com_s *) device_get_softc(dev);
549	if (com == NULL) {
550		device_printf(dev, "NULL com in siounload\n");
551		return (0);
552	}
553	com->gone = 1;
554	if (com->irqres) {
555		bus_teardown_intr(dev, com->irqres, com->cookie);
556		bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres);
557	}
558	if (com->ioportres)
559		bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres);
560	if (com->tp && (com->tp->t_state & TS_ISOPEN)) {
561		device_printf(dev, "still open, forcing close\n");
562		com->tp->t_gen++;
563		ttyclose(com->tp);
564		ttwakeup(com->tp);
565		ttwwakeup(com->tp);
566	} else {
567		if (com->ibuf != NULL)
568			free(com->ibuf, M_DEVBUF);
569	}
570	device_printf(dev, "unloaded\n");
571	return (0);
572}
573#endif /* NCARD > 0 */
574
575#if NPCI > 0
576struct pci_ids {
577	u_int32_t	type;
578	const char	*desc;
579	int		rid;
580};
581
582static struct pci_ids pci_ids[] = {
583	{ 0x100812b9, "3COM PCI FaxModem", 0x10 },
584	{ 0x048011c1, "ActionTec 56k FAX PCI Modem", 0x14 },
585	{ 0x00000000, NULL, 0 }
586};
587
588static int
589sio_pci_attach(dev)
590	device_t	dev;
591{
592	u_int32_t	type;
593	struct pci_ids	*id;
594
595	type = pci_get_devid(dev);
596	id = pci_ids;
597	while (id->type && id->type != type)
598		id++;
599	if (id->desc == NULL)
600		return (ENXIO);
601	sio_pci_kludge_unit(dev);
602	return (sioattach(dev, id->rid));
603}
604
605/*
606 * Don't cut and paste this to other drivers.  It is a horrible kludge
607 * which will fail to work and also be unnecessary in future versions.
608 */
609static void
610sio_pci_kludge_unit(dev)
611	device_t dev;
612{
613	devclass_t	dc;
614	int		err;
615	int		start;
616	int		unit;
617
618	unit = 0;
619	start = 0;
620	while (resource_int_value("sio", unit, "port", &start) == 0 &&
621	    start > 0)
622		unit++;
623	if (device_get_unit(dev) < unit) {
624		dc = device_get_devclass(dev);
625		while (devclass_get_device(dc, unit))
626			unit++;
627		device_printf(dev, "moving to sio%d\n", unit);
628		err = device_set_unit(dev, unit);	/* EVIL DO NOT COPY */
629		if (err)
630			device_printf(dev, "error moving device %d\n", err);
631	}
632}
633
634static int
635sio_pci_probe(dev)
636	device_t	dev;
637{
638	u_int32_t	type;
639	struct pci_ids	*id;
640
641	type = pci_get_devid(dev);
642	id = pci_ids;
643	while (id->type && id->type != type)
644		id++;
645	if (id->desc == NULL)
646		return (ENXIO);
647	device_set_desc(dev, id->desc);
648	return (sioprobe(dev, id->rid));
649}
650#endif /* NPCI > 0 */
651
652static struct isa_pnp_id sio_ids[] = {
653	{0x0005d041, "Standard PC COM port"},	/* PNP0500 */
654	{0x0105d041, "16550A-compatible COM port"},	/* PNP0501 */
655	{0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */
656	{0x1005d041, "Generic IRDA-compatible device"},	/* PNP0510 */
657	{0x1105d041, "Generic IRDA-compatible device"},	/* PNP0511 */
658	/* Devices that do not have a compatid */
659	{0x12206804, NULL},     /* ACH2012 - 5634BTS 56K Video Ready Modem */
660	{0x7602a904, NULL},	/* AEI0276 - 56K v.90 Fax Modem (LKT) */
661	{0x00007905, NULL},	/* AKY0000 - 56K Plug&Play Modem */
662	{0x01405407, NULL},	/* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */
663	{0x56039008, NULL},	/* BDP0356 - Best Data 56x2 */
664	{0x36339008, NULL},	/* BDP3336 - Best Data Prods. 336F */
665	{0x0014490a, NULL},	/* BRI1400 - Boca 33.6 PnP */
666	{0x0015490a, NULL},	/* BRI1500 - Internal Fax Data */
667	{0x0034490a, NULL},	/* BRI3400 - Internal ACF Modem */
668	{0x00b4490a, NULL},	/* BRIB400 - Boca 56k PnP */
669	{0x0030320d, NULL},	/* CIR3000 - Cirrus Logic V43 */
670	{0x0100440e, NULL},	/* CRD0001 - Cardinal MVP288IV ? */
671	{0x36033610, NULL},     /* DAV0336 - DAVICOM 336PNP MODEM */
672	{0x0000aa1a, NULL},	/* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */
673	{0x1200c31e, NULL},	/* GVC0012 - VF1128HV-R9 (win modem?) */
674	{0x0303c31e, NULL},	/* GVC0303 - MaxTech 33.6 PnP D/F/V */
675	{0x0505c31e, NULL},	/* GVC0505 - GVC 56k Faxmodem */
676	{0x0050c31e, NULL},	/* GVC5000 - some GVC modem */
677	{0x3800f91e, NULL},	/* GWY0038 - Telepath with v.90 */
678	{0x9062f91e, NULL},	/* GWY6290 - Telepath with x2 Technology */
679	{0x0000f435, NULL},	/* MOT0000 - Motorola ModemSURFR 33.6 Intern */
680	{0x5015f435, NULL},	/* MOT1550 - Motorola ModemSURFR 56K Modem */
681	{0xf015f435, NULL},	/* MOT15F0 - Motorola VoiceSURFR 56K Modem */
682	{0x6045f435, NULL},	/* MOT4560 - Motorola ? */
683	{0x61e7a338, NULL},	/* NECE761 - 33.6Modem */
684	{0x0f804f3f, NULL},	/* OZO800f - Zoom 2812 (56k Modem) */
685	{0x39804f3f, NULL},	/* OZO8039 - Zoom 56k flex */
686	{0x3024a341, NULL},	/* PMC2430 - Pace 56 Voice Internal Modem */
687	{0x1000eb49, NULL},	/* ROK0010 - Rockwell ? */
688	{0x5002734a, NULL},	/* RSS0250 - 5614Jx3(G) Internal Modem */
689	{0x6202734a, NULL},	/* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */
690	{0xc100ad4d, NULL},	/* SMM00C1 - Leopard 56k PnP */
691	{0x9012b04e, NULL},	/* SUP1290 - Supra ? */
692	{0x1013b04e, NULL},	/* SUP1310 - SupraExpress 336i PnP */
693	{0x8013b04e, NULL},	/* SUP1380 - SupraExpress 288i PnP Voice */
694	{0x8113b04e, NULL},	/* SUP1381 - SupraExpress 336i PnP Voice */
695	{0x5016b04e, NULL},	/* SUP1650 - Supra 336i Sp Intl */
696	{0x7420b04e, NULL},	/* SUP2070 - Supra ? */
697	{0x8020b04e, NULL},	/* SUP2080 - Supra ? */
698	{0x8420b04e, NULL},	/* SUP2084 - SupraExpress 56i PnP */
699	{0x7121b04e, NULL},	/* SUP2171 - SupraExpress 56i Sp? */
700	{0x8024b04e, NULL},	/* SUP2480 - Supra ? */
701	{0x01007256, NULL},	/* USR0001 - U.S. Robotics Inc., Sportster W */
702	{0x02007256, NULL},	/* USR0002 - U.S. Robotics Inc. Sportster 33. */
703	{0x04007256, NULL},	/* USR0004 - USR Sportster 14.4k */
704	{0x06007256, NULL},	/* USR0006 - USR Sportster 33.6k */
705	{0x11007256, NULL},	/* USR0011 - USR ? */
706	{0x01017256, NULL},	/* USR0101 - USR ? */
707	{0x30207256, NULL},	/* USR2030 - U.S.Robotics Inc. Sportster 560 */
708	{0x50207256, NULL},	/* USR2050 - U.S.Robotics Inc. Sportster 33. */
709	{0x70207256, NULL},	/* USR2070 - U.S.Robotics Inc. Sportster 560 */
710	{0x30307256, NULL},	/* USR3030 - U.S. Robotics 56K FAX INT */
711	{0x31307256, NULL},	/* USR3031 - U.S. Robotics 56K FAX INT */
712	{0x50307256, NULL},	/* USR3050 - U.S. Robotics 56K FAX INT */
713	{0x70307256, NULL},	/* USR3070 - U.S. Robotics 56K Voice INT */
714	{0x90307256, NULL},	/* USR3090 - USR ? */
715	{0x90917256, NULL},	/* USR9190 - USR 56k Voice INT */
716	{0x0300695c, NULL},	/* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */
717	{0x61f7896a, NULL},	/* ZTIF761 - Zoom ComStar 33.6 */
718	{0}
719};
720
721
722
723static int
724sio_isa_probe(dev)
725	device_t	dev;
726{
727	/* Check isapnp ids */
728	if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO)
729		return (ENXIO);
730	return (sioprobe(dev, 0));
731}
732
733static int
734sioprobe(dev, xrid)
735	device_t	dev;
736	int		xrid;
737{
738#if 0
739	static bool_t	already_init;
740	device_t	xdev;
741#endif
742	struct com_s	*com;
743	bool_t		failures[10];
744	int		fn;
745	device_t	idev;
746	Port_t		iobase;
747	intrmask_t	irqmap[4];
748	intrmask_t	irqs;
749	u_char		mcr_image;
750	int		result;
751	u_long		xirq;
752	u_int		flags = device_get_flags(dev);
753	int		rid;
754	struct resource *port;
755
756	rid = xrid;
757	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
758				  0, ~0, IO_COMSIZE, RF_ACTIVE);
759	if (!port)
760		return (ENXIO);
761
762	com = device_get_softc(dev);
763	com->bst = rman_get_bustag(port);
764	com->bsh = rman_get_bushandle(port);
765
766#if 0
767	/*
768	 * XXX this is broken - when we are first called, there are no
769	 * previously configured IO ports.  We could hard code
770	 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
771	 * This code has been doing nothing since the conversion since
772	 * "count" is zero the first time around.
773	 */
774	if (!already_init) {
775		/*
776		 * Turn off MCR_IENABLE for all likely serial ports.  An unused
777		 * port with its MCR_IENABLE gate open will inhibit interrupts
778		 * from any used port that shares the interrupt vector.
779		 * XXX the gate enable is elsewhere for some multiports.
780		 */
781		device_t *devs;
782		int count, i, xioport;
783
784		devclass_get_devices(sio_devclass, &devs, &count);
785		for (i = 0; i < count; i++) {
786			xdev = devs[i];
787			if (device_is_enabled(xdev) &&
788			    bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
789					     NULL) == 0)
790				outb(xioport + com_mcr, 0);
791		}
792		free(devs, M_TEMP);
793		already_init = TRUE;
794	}
795#endif
796
797	if (COM_LLCONSOLE(flags)) {
798		printf("sio%d: reserved for low-level i/o\n",
799		       device_get_unit(dev));
800		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
801		return (ENXIO);
802	}
803
804	/*
805	 * If the device is on a multiport card and has an AST/4
806	 * compatible interrupt control register, initialize this
807	 * register and prepare to leave MCR_IENABLE clear in the mcr.
808	 * Otherwise, prepare to set MCR_IENABLE in the mcr.
809	 * Point idev to the device struct giving the correct id_irq.
810	 * This is the struct for the master device if there is one.
811	 */
812	idev = dev;
813	mcr_image = MCR_IENABLE;
814#ifdef COM_MULTIPORT
815	if (COM_ISMULTIPORT(flags)) {
816		Port_t xiobase;
817		u_long io;
818
819		idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
820		if (idev == NULL) {
821			printf("sio%d: master device %d not configured\n",
822			       device_get_unit(dev), COM_MPMASTER(flags));
823			idev = dev;
824		}
825		if (!COM_NOTAST4(flags)) {
826			if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
827					     NULL) == 0) {
828				xiobase = io;
829				if (bus_get_resource(idev, SYS_RES_IRQ, 0,
830				    NULL, NULL) == 0)
831					outb(xiobase + com_scr, 0x80);
832				else
833					outb(xiobase + com_scr, 0);
834			}
835			mcr_image = 0;
836		}
837	}
838#endif /* COM_MULTIPORT */
839	if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
840		mcr_image = 0;
841
842	bzero(failures, sizeof failures);
843	iobase = rman_get_start(port);
844
845	/*
846	 * We don't want to get actual interrupts, just masked ones.
847	 * Interrupts from this line should already be masked in the ICU,
848	 * but mask them in the processor as well in case there are some
849	 * (misconfigured) shared interrupts.
850	 */
851	disable_intr();
852/* EXTRA DELAY? */
853
854	/*
855	 * Initialize the speed and the word size and wait long enough to
856	 * drain the maximum of 16 bytes of junk in device output queues.
857	 * The speed is undefined after a master reset and must be set
858	 * before relying on anything related to output.  There may be
859	 * junk after a (very fast) soft reboot and (apparently) after
860	 * master reset.
861	 * XXX what about the UART bug avoided by waiting in comparam()?
862	 * We don't want to to wait long enough to drain at 2 bps.
863	 */
864	if (iobase == siocniobase)
865		DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
866	else {
867		sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
868		sio_setreg(com, com_dlbl, COMBRD(SIO_TEST_SPEED) & 0xff);
869		sio_setreg(com, com_dlbh, (u_int) COMBRD(SIO_TEST_SPEED) >> 8);
870		sio_setreg(com, com_cfcr, CFCR_8BITS);
871		DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
872	}
873
874	/*
875	 * Enable the interrupt gate and disable device interupts.  This
876	 * should leave the device driving the interrupt line low and
877	 * guarantee an edge trigger if an interrupt can be generated.
878	 */
879/* EXTRA DELAY? */
880	sio_setreg(com, com_mcr, mcr_image);
881	sio_setreg(com, com_ier, 0);
882	DELAY(1000);		/* XXX */
883	irqmap[0] = isa_irq_pending();
884
885	/*
886	 * Attempt to set loopback mode so that we can send a null byte
887	 * without annoying any external device.
888	 */
889/* EXTRA DELAY? */
890	sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
891
892	/*
893	 * Attempt to generate an output interrupt.  On 8250's, setting
894	 * IER_ETXRDY generates an interrupt independent of the current
895	 * setting and independent of whether the THR is empty.  On 16450's,
896	 * setting IER_ETXRDY generates an interrupt independent of the
897	 * current setting.  On 16550A's, setting IER_ETXRDY only
898	 * generates an interrupt when IER_ETXRDY is not already set.
899	 */
900	sio_setreg(com, com_ier, IER_ETXRDY);
901
902	/*
903	 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
904	 * an interrupt.  They'd better generate one for actually doing
905	 * output.  Loopback may be broken on the same incompatibles but
906	 * it's unlikely to do more than allow the null byte out.
907	 */
908	sio_setreg(com, com_data, 0);
909	DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
910
911	/*
912	 * Turn off loopback mode so that the interrupt gate works again
913	 * (MCR_IENABLE was hidden).  This should leave the device driving
914	 * an interrupt line high.  It doesn't matter if the interrupt
915	 * line oscillates while we are not looking at it, since interrupts
916	 * are disabled.
917	 */
918/* EXTRA DELAY? */
919	sio_setreg(com, com_mcr, mcr_image);
920
921	/*
922	 * Some pcmcia cards have the "TXRDY bug", so we check everyone
923	 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... )
924	 */
925	if (COM_NOPROBE(flags)) {
926		/* Reading IIR register twice */
927		for (fn = 0; fn < 2; fn ++) {
928			DELAY(10000);
929			failures[6] = sio_getreg(com, com_iir);
930		}
931		/* Check IIR_TXRDY clear ? */
932		result = 0;
933		if (failures[6] & IIR_TXRDY) {
934			/* Nop, Double check with clearing IER */
935			sio_setreg(com, com_ier, 0);
936			if (sio_getreg(com, com_iir) & IIR_NOPEND) {
937				/* Ok. we're familia this gang */
938				SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
939			} else {
940				/* Unknown, Just omit this chip.. XXX */
941				result = ENXIO;
942			}
943		} else {
944			/* OK. this is well-known guys */
945			CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
946		}
947		sio_setreg(com, com_cfcr, CFCR_8BITS);
948		enable_intr();
949		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
950		return (iobase == siocniobase ? 0 : result);
951	}
952
953	/*
954	 * Check that
955	 *	o the CFCR, IER and MCR in UART hold the values written to them
956	 *	  (the values happen to be all distinct - this is good for
957	 *	  avoiding false positive tests from bus echoes).
958	 *	o an output interrupt is generated and its vector is correct.
959	 *	o the interrupt goes away when the IIR in the UART is read.
960	 */
961/* EXTRA DELAY? */
962	failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
963	failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
964	failures[2] = sio_getreg(com, com_mcr) - mcr_image;
965	DELAY(10000);		/* Some internal modems need this time */
966	irqmap[1] = isa_irq_pending();
967	failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
968	DELAY(1000);		/* XXX */
969	irqmap[2] = isa_irq_pending();
970	failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
971
972	/*
973	 * Turn off all device interrupts and check that they go off properly.
974	 * Leave MCR_IENABLE alone.  For ports without a master port, it gates
975	 * the OUT2 output of the UART to
976	 * the ICU input.  Closing the gate would give a floating ICU input
977	 * (unless there is another device driving it) and spurious interrupts.
978	 * (On the system that this was first tested on, the input floats high
979	 * and gives a (masked) interrupt as soon as the gate is closed.)
980	 */
981	sio_setreg(com, com_ier, 0);
982	sio_setreg(com, com_cfcr, CFCR_8BITS);	/* dummy to avoid bus echo */
983	failures[7] = sio_getreg(com, com_ier);
984	DELAY(1000);		/* XXX */
985	irqmap[3] = isa_irq_pending();
986	failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
987
988	enable_intr();
989
990	irqs = irqmap[1] & ~irqmap[0];
991	if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
992	    ((1 << xirq) & irqs) == 0)
993		printf(
994		"sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
995		    device_get_unit(dev), xirq, irqs);
996	if (bootverbose)
997		printf("sio%d: irq maps: %#x %#x %#x %#x\n",
998		    device_get_unit(dev),
999		    irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
1000
1001	result = 0;
1002	for (fn = 0; fn < sizeof failures; ++fn)
1003		if (failures[fn]) {
1004			sio_setreg(com, com_mcr, 0);
1005			result = ENXIO;
1006			if (bootverbose) {
1007				printf("sio%d: probe failed test(s):",
1008				    device_get_unit(dev));
1009				for (fn = 0; fn < sizeof failures; ++fn)
1010					if (failures[fn])
1011						printf(" %d", fn);
1012				printf("\n");
1013			}
1014			break;
1015		}
1016	bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1017	return (iobase == siocniobase ? 0 : result);
1018}
1019
1020#ifdef COM_ESP
1021static int
1022espattach(com, esp_port)
1023	struct com_s		*com;
1024	Port_t			esp_port;
1025{
1026	u_char	dips;
1027	u_char	val;
1028
1029	/*
1030	 * Check the ESP-specific I/O port to see if we're an ESP
1031	 * card.  If not, return failure immediately.
1032	 */
1033	if ((inb(esp_port) & 0xf3) == 0) {
1034		printf(" port 0x%x is not an ESP board?\n", esp_port);
1035		return (0);
1036	}
1037
1038	/*
1039	 * We've got something that claims to be a Hayes ESP card.
1040	 * Let's hope so.
1041	 */
1042
1043	/* Get the dip-switch configuration */
1044	outb(esp_port + ESP_CMD1, ESP_GETDIPS);
1045	dips = inb(esp_port + ESP_STATUS1);
1046
1047	/*
1048	 * Bits 0,1 of dips say which COM port we are.
1049	 */
1050	if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
1051		printf(" : ESP");
1052	else {
1053		printf(" esp_port has com %d\n", dips & 0x03);
1054		return (0);
1055	}
1056
1057	/*
1058	 * Check for ESP version 2.0 or later:  bits 4,5,6 = 010.
1059	 */
1060	outb(esp_port + ESP_CMD1, ESP_GETTEST);
1061	val = inb(esp_port + ESP_STATUS1);	/* clear reg 1 */
1062	val = inb(esp_port + ESP_STATUS2);
1063	if ((val & 0x70) < 0x20) {
1064		printf("-old (%o)", val & 0x70);
1065		return (0);
1066	}
1067
1068	/*
1069	 * Check for ability to emulate 16550:  bit 7 == 1
1070	 */
1071	if ((dips & 0x80) == 0) {
1072		printf(" slave");
1073		return (0);
1074	}
1075
1076	/*
1077	 * Okay, we seem to be a Hayes ESP card.  Whee.
1078	 */
1079	com->esp = TRUE;
1080	com->esp_port = esp_port;
1081	return (1);
1082}
1083#endif /* COM_ESP */
1084
1085static int
1086sio_isa_attach(dev)
1087	device_t	dev;
1088{
1089	return (sioattach(dev, 0));
1090}
1091
1092static int
1093sioattach(dev, xrid)
1094	device_t	dev;
1095	int		xrid;
1096{
1097	struct com_s	*com;
1098#ifdef COM_ESP
1099	Port_t		*espp;
1100#endif
1101	Port_t		iobase;
1102	int		unit;
1103	u_int		flags;
1104	int		rid;
1105	struct resource *port;
1106	int		ret;
1107
1108	rid = xrid;
1109	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
1110				  0, ~0, IO_COMSIZE, RF_ACTIVE);
1111	if (!port)
1112		return (ENXIO);
1113
1114	iobase = rman_get_start(port);
1115	unit = device_get_unit(dev);
1116	com = device_get_softc(dev);
1117	flags = device_get_flags(dev);
1118
1119	if (unit >= sio_numunits)
1120		sio_numunits = unit + 1;
1121	/*
1122	 * sioprobe() has initialized the device registers as follows:
1123	 *	o cfcr = CFCR_8BITS.
1124	 *	  It is most important that CFCR_DLAB is off, so that the
1125	 *	  data port is not hidden when we enable interrupts.
1126	 *	o ier = 0.
1127	 *	  Interrupts are only enabled when the line is open.
1128	 *	o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
1129	 *	  interrupt control register or the config specifies no irq.
1130	 *	  Keeping MCR_DTR and MCR_RTS off might stop the external
1131	 *	  device from sending before we are ready.
1132	 */
1133	bzero(com, sizeof *com);
1134	com->unit = unit;
1135	com->ioportres = port;
1136	com->bst = rman_get_bustag(port);
1137	com->bsh = rman_get_bushandle(port);
1138	com->cfcr_image = CFCR_8BITS;
1139	com->dtr_wait = 3 * hz;
1140	com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
1141	com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
1142	com->tx_fifo_size = 1;
1143	com->obufs[0].l_head = com->obuf1;
1144	com->obufs[1].l_head = com->obuf2;
1145
1146	com->data_port = iobase + com_data;
1147	com->int_id_port = iobase + com_iir;
1148	com->modem_ctl_port = iobase + com_mcr;
1149	com->mcr_image = inb(com->modem_ctl_port);
1150	com->line_status_port = iobase + com_lsr;
1151	com->modem_status_port = iobase + com_msr;
1152	com->intr_ctl_port = iobase + com_ier;
1153
1154	/*
1155	 * We don't use all the flags from <sys/ttydefaults.h> since they
1156	 * are only relevant for logins.  It's important to have echo off
1157	 * initially so that the line doesn't start blathering before the
1158	 * echo flag can be turned off.
1159	 */
1160	com->it_in.c_iflag = 0;
1161	com->it_in.c_oflag = 0;
1162	com->it_in.c_cflag = TTYDEF_CFLAG;
1163	com->it_in.c_lflag = 0;
1164	if (unit == comconsole) {
1165		com->it_in.c_iflag = TTYDEF_IFLAG;
1166		com->it_in.c_oflag = TTYDEF_OFLAG;
1167		com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
1168		com->it_in.c_lflag = TTYDEF_LFLAG;
1169		com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
1170		com->lt_out.c_ispeed = com->lt_out.c_ospeed =
1171		com->lt_in.c_ispeed = com->lt_in.c_ospeed =
1172		com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
1173	} else
1174		com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED;
1175	if (siosetwater(com, com->it_in.c_ispeed) != 0) {
1176		enable_intr();
1177		/*
1178		 * Leave i/o resources allocated if this is a `cn'-level
1179		 * console, so that other devices can't snarf them.
1180		 */
1181		if (iobase != siocniobase)
1182			bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1183		return (ENOMEM);
1184	}
1185	enable_intr();
1186	termioschars(&com->it_in);
1187	com->it_out = com->it_in;
1188
1189	/* attempt to determine UART type */
1190	printf("sio%d: type", unit);
1191
1192
1193#ifdef COM_MULTIPORT
1194	if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags))
1195#else
1196	if (!COM_IIR_TXRDYBUG(flags))
1197#endif
1198	{
1199		u_char	scr;
1200		u_char	scr1;
1201		u_char	scr2;
1202
1203		scr = sio_getreg(com, com_scr);
1204		sio_setreg(com, com_scr, 0xa5);
1205		scr1 = sio_getreg(com, com_scr);
1206		sio_setreg(com, com_scr, 0x5a);
1207		scr2 = sio_getreg(com, com_scr);
1208		sio_setreg(com, com_scr, scr);
1209		if (scr1 != 0xa5 || scr2 != 0x5a) {
1210			printf(" 8250");
1211			goto determined_type;
1212		}
1213	}
1214	sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1215	DELAY(100);
1216	com->st16650a = 0;
1217	switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1218	case FIFO_RX_LOW:
1219		printf(" 16450");
1220		break;
1221	case FIFO_RX_MEDL:
1222		printf(" 16450?");
1223		break;
1224	case FIFO_RX_MEDH:
1225		printf(" 16550?");
1226		break;
1227	case FIFO_RX_HIGH:
1228		if (COM_NOFIFO(flags)) {
1229			printf(" 16550A fifo disabled");
1230		} else {
1231			com->hasfifo = TRUE;
1232			if (COM_ST16650A(flags)) {
1233				com->st16650a = 1;
1234				com->tx_fifo_size = 32;
1235				printf(" ST16650A");
1236			} else {
1237				com->tx_fifo_size = COM_FIFOSIZE(flags);
1238				printf(" 16550A");
1239			}
1240		}
1241#ifdef COM_ESP
1242		for (espp = likely_esp_ports; *espp != 0; espp++)
1243			if (espattach(com, *espp)) {
1244				com->tx_fifo_size = 1024;
1245				break;
1246			}
1247#endif
1248		if (!com->st16650a) {
1249			if (!com->tx_fifo_size)
1250				com->tx_fifo_size = 16;
1251			else
1252				printf(" lookalike with %d bytes FIFO",
1253				    com->tx_fifo_size);
1254		}
1255
1256		break;
1257	}
1258
1259#ifdef COM_ESP
1260	if (com->esp) {
1261		/*
1262		 * Set 16550 compatibility mode.
1263		 * We don't use the ESP_MODE_SCALE bit to increase the
1264		 * fifo trigger levels because we can't handle large
1265		 * bursts of input.
1266		 * XXX flow control should be set in comparam(), not here.
1267		 */
1268		outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1269		outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1270
1271		/* Set RTS/CTS flow control. */
1272		outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1273		outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1274		outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1275
1276		/* Set flow-control levels. */
1277		outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1278		outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1279		outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1280		outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1281		outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1282	}
1283#endif /* COM_ESP */
1284	sio_setreg(com, com_fifo, 0);
1285determined_type: ;
1286
1287#ifdef COM_MULTIPORT
1288	if (COM_ISMULTIPORT(flags)) {
1289		device_t masterdev;
1290
1291		com->multiport = TRUE;
1292		printf(" (multiport");
1293		if (unit == COM_MPMASTER(flags))
1294			printf(" master");
1295		printf(")");
1296		masterdev = devclass_get_device(sio_devclass,
1297		    COM_MPMASTER(flags));
1298		com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1299		    SYS_RES_IRQ, 0, NULL, NULL) != 0);
1300	 }
1301#endif /* COM_MULTIPORT */
1302	if (unit == comconsole)
1303		printf(", console");
1304	if (COM_IIR_TXRDYBUG(flags))
1305		printf(" with a bogus IIR_TXRDY register");
1306	printf("\n");
1307
1308	if (!sio_registered) {
1309		register_swi(SWI_TTY, siopoll);
1310		sio_registered = TRUE;
1311	}
1312	make_dev(&sio_cdevsw, unit,
1313	    UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1314	make_dev(&sio_cdevsw, unit | CONTROL_INIT_STATE,
1315	    UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1316	make_dev(&sio_cdevsw, unit | CONTROL_LOCK_STATE,
1317	    UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1318	make_dev(&sio_cdevsw, unit | CALLOUT_MASK,
1319	    UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1320	make_dev(&sio_cdevsw, unit | CALLOUT_MASK | CONTROL_INIT_STATE,
1321	    UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1322	make_dev(&sio_cdevsw, unit | CALLOUT_MASK | CONTROL_LOCK_STATE,
1323	    UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1324	com->flags = flags;
1325	com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1326	pps_init(&com->pps);
1327
1328	rid = 0;
1329	com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1,
1330	    RF_ACTIVE);
1331	if (com->irqres) {
1332		ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1333				     INTR_TYPE_TTY | INTR_TYPE_FAST,
1334				     siointr, com, &com->cookie);
1335		if (ret) {
1336			ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1337					     com->irqres, INTR_TYPE_TTY,
1338					     siointr, com, &com->cookie);
1339			if (ret == 0)
1340				device_printf(dev, "unable to activate interrupt in fast mode - using normal mode");
1341		}
1342		if (ret)
1343			device_printf(dev, "could not activate interrupt\n");
1344	}
1345
1346	return (0);
1347}
1348
1349static int
1350sioopen(dev, flag, mode, p)
1351	dev_t		dev;
1352	int		flag;
1353	int		mode;
1354	struct proc	*p;
1355{
1356	struct com_s	*com;
1357	int		error;
1358	int		mynor;
1359	int		s;
1360	struct tty	*tp;
1361	int		unit;
1362
1363	mynor = minor(dev);
1364	unit = MINOR_TO_UNIT(mynor);
1365	com = com_addr(unit);
1366	if (com == NULL)
1367		return (ENXIO);
1368	if (com->gone)
1369		return (ENXIO);
1370	if (mynor & CONTROL_MASK)
1371		return (0);
1372	tp = dev->si_tty = com->tp = ttymalloc(com->tp);
1373	s = spltty();
1374	/*
1375	 * We jump to this label after all non-interrupted sleeps to pick
1376	 * up any changes of the device state.
1377	 */
1378open_top:
1379	while (com->state & CS_DTR_OFF) {
1380		error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0);
1381		if (com_addr(unit) == NULL)
1382			return (ENXIO);
1383		if (error != 0 || com->gone)
1384			goto out;
1385	}
1386	if (tp->t_state & TS_ISOPEN) {
1387		/*
1388		 * The device is open, so everything has been initialized.
1389		 * Handle conflicts.
1390		 */
1391		if (mynor & CALLOUT_MASK) {
1392			if (!com->active_out) {
1393				error = EBUSY;
1394				goto out;
1395			}
1396		} else {
1397			if (com->active_out) {
1398				if (flag & O_NONBLOCK) {
1399					error = EBUSY;
1400					goto out;
1401				}
1402				error =	tsleep(&com->active_out,
1403					       TTIPRI | PCATCH, "siobi", 0);
1404				if (com_addr(unit) == NULL)
1405					return (ENXIO);
1406				if (error != 0 || com->gone)
1407					goto out;
1408				goto open_top;
1409			}
1410		}
1411		if (tp->t_state & TS_XCLUDE &&
1412		    suser(p)) {
1413			error = EBUSY;
1414			goto out;
1415		}
1416	} else {
1417		/*
1418		 * The device isn't open, so there are no conflicts.
1419		 * Initialize it.  Initialization is done twice in many
1420		 * cases: to preempt sleeping callin opens if we are
1421		 * callout, and to complete a callin open after DCD rises.
1422		 */
1423		tp->t_oproc = comstart;
1424		tp->t_param = comparam;
1425		tp->t_stop = comstop;
1426		tp->t_dev = dev;
1427		tp->t_termios = mynor & CALLOUT_MASK
1428				? com->it_out : com->it_in;
1429		(void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
1430		com->poll = com->no_irq;
1431		com->poll_output = com->loses_outints;
1432		++com->wopeners;
1433		error = comparam(tp, &tp->t_termios);
1434		--com->wopeners;
1435		if (error != 0)
1436			goto out;
1437		/*
1438		 * XXX we should goto open_top if comparam() slept.
1439		 */
1440		if (com->hasfifo) {
1441			/*
1442			 * (Re)enable and drain fifos.
1443			 *
1444			 * Certain SMC chips cause problems if the fifos
1445			 * are enabled while input is ready.  Turn off the
1446			 * fifo if necessary to clear the input.  We test
1447			 * the input ready bit after enabling the fifos
1448			 * since we've already enabled them in comparam()
1449			 * and to handle races between enabling and fresh
1450			 * input.
1451			 */
1452			while (TRUE) {
1453				sio_setreg(com, com_fifo,
1454					   FIFO_RCV_RST | FIFO_XMT_RST
1455					   | com->fifo_image);
1456				/*
1457				 * XXX the delays are for superstitious
1458				 * historical reasons.  It must be less than
1459				 * the character time at the maximum
1460				 * supported speed (87 usec at 115200 bps
1461				 * 8N1).  Otherwise we might loop endlessly
1462				 * if data is streaming in.  We used to use
1463				 * delays of 100.  That usually worked
1464				 * because DELAY(100) used to usually delay
1465				 * for about 85 usec instead of 100.
1466				 */
1467				DELAY(50);
1468				if (!(inb(com->line_status_port) & LSR_RXRDY))
1469					break;
1470				sio_setreg(com, com_fifo, 0);
1471				DELAY(50);
1472				(void) inb(com->data_port);
1473			}
1474		}
1475
1476		disable_intr();
1477		(void) inb(com->line_status_port);
1478		(void) inb(com->data_port);
1479		com->prev_modem_status = com->last_modem_status
1480		    = inb(com->modem_status_port);
1481		if (COM_IIR_TXRDYBUG(com->flags)) {
1482			outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS
1483						| IER_EMSC);
1484		} else {
1485			outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY
1486						| IER_ERLS | IER_EMSC);
1487		}
1488		enable_intr();
1489		/*
1490		 * Handle initial DCD.  Callout devices get a fake initial
1491		 * DCD (trapdoor DCD).  If we are callout, then any sleeping
1492		 * callin opens get woken up and resume sleeping on "siobi"
1493		 * instead of "siodcd".
1494		 */
1495		/*
1496		 * XXX `mynor & CALLOUT_MASK' should be
1497		 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1498		 * TRAPDOOR_CARRIER is the default initial state for callout
1499		 * devices and SOFT_CARRIER is like CLOCAL except it hides
1500		 * the true carrier.
1501		 */
1502		if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1503			(*linesw[tp->t_line].l_modem)(tp, 1);
1504	}
1505	/*
1506	 * Wait for DCD if necessary.
1507	 */
1508	if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1509	    && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
1510		++com->wopeners;
1511		error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0);
1512		if (com_addr(unit) == NULL)
1513			return (ENXIO);
1514		--com->wopeners;
1515		if (error != 0 || com->gone)
1516			goto out;
1517		goto open_top;
1518	}
1519	error =	(*linesw[tp->t_line].l_open)(dev, tp);
1520	disc_optim(tp, &tp->t_termios, com);
1521	if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1522		com->active_out = TRUE;
1523	siosettimeout();
1524out:
1525	splx(s);
1526	if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1527		comhardclose(com);
1528	return (error);
1529}
1530
1531static int
1532sioclose(dev, flag, mode, p)
1533	dev_t		dev;
1534	int		flag;
1535	int		mode;
1536	struct proc	*p;
1537{
1538	struct com_s	*com;
1539	int		mynor;
1540	int		s;
1541	struct tty	*tp;
1542
1543	mynor = minor(dev);
1544	if (mynor & CONTROL_MASK)
1545		return (0);
1546	com = com_addr(MINOR_TO_UNIT(mynor));
1547	if (com == NULL)
1548		return (ENODEV);
1549	tp = com->tp;
1550	s = spltty();
1551	(*linesw[tp->t_line].l_close)(tp, flag);
1552	disc_optim(tp, &tp->t_termios, com);
1553	comstop(tp, FREAD | FWRITE);
1554	comhardclose(com);
1555	ttyclose(tp);
1556	siosettimeout();
1557	splx(s);
1558	if (com->gone) {
1559		printf("sio%d: gone\n", com->unit);
1560		s = spltty();
1561		if (com->ibuf != NULL)
1562			free(com->ibuf, M_DEVBUF);
1563		bzero(tp, sizeof *tp);
1564		splx(s);
1565	}
1566	return (0);
1567}
1568
1569static void
1570comhardclose(com)
1571	struct com_s	*com;
1572{
1573	int		s;
1574	struct tty	*tp;
1575	int		unit;
1576
1577	unit = com->unit;
1578	s = spltty();
1579	com->poll = FALSE;
1580	com->poll_output = FALSE;
1581	com->do_timestamp = FALSE;
1582	com->do_dcd_timestamp = FALSE;
1583	com->pps.ppsparam.mode = 0;
1584	sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1585	{
1586		sio_setreg(com, com_ier, 0);
1587		tp = com->tp;
1588		if (tp->t_cflag & HUPCL
1589		    /*
1590		     * XXX we will miss any carrier drop between here and the
1591		     * next open.  Perhaps we should watch DCD even when the
1592		     * port is closed; it is not sufficient to check it at
1593		     * the next open because it might go up and down while
1594		     * we're not watching.
1595		     */
1596		    || (!com->active_out
1597		        && !(com->prev_modem_status & MSR_DCD)
1598		        && !(com->it_in.c_cflag & CLOCAL))
1599		    || !(tp->t_state & TS_ISOPEN)) {
1600			(void)commctl(com, TIOCM_DTR, DMBIC);
1601			if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
1602				timeout(siodtrwakeup, com, com->dtr_wait);
1603				com->state |= CS_DTR_OFF;
1604			}
1605		}
1606	}
1607	if (com->hasfifo) {
1608		/*
1609		 * Disable fifos so that they are off after controlled
1610		 * reboots.  Some BIOSes fail to detect 16550s when the
1611		 * fifos are enabled.
1612		 */
1613		sio_setreg(com, com_fifo, 0);
1614	}
1615	com->active_out = FALSE;
1616	wakeup(&com->active_out);
1617	wakeup(TSA_CARR_ON(tp));	/* restart any wopeners */
1618	splx(s);
1619}
1620
1621static int
1622sioread(dev, uio, flag)
1623	dev_t		dev;
1624	struct uio	*uio;
1625	int		flag;
1626{
1627	int		mynor;
1628	struct com_s	*com;
1629
1630	mynor = minor(dev);
1631	if (mynor & CONTROL_MASK)
1632		return (ENODEV);
1633	com = com_addr(MINOR_TO_UNIT(mynor));
1634	if (com == NULL || com->gone)
1635		return (ENODEV);
1636	return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag));
1637}
1638
1639static int
1640siowrite(dev, uio, flag)
1641	dev_t		dev;
1642	struct uio	*uio;
1643	int		flag;
1644{
1645	int		mynor;
1646	struct com_s	*com;
1647	int		unit;
1648
1649	mynor = minor(dev);
1650	if (mynor & CONTROL_MASK)
1651		return (ENODEV);
1652
1653	unit = MINOR_TO_UNIT(mynor);
1654	com = com_addr(unit);
1655	if (com == NULL || com->gone)
1656		return (ENODEV);
1657	/*
1658	 * (XXX) We disallow virtual consoles if the physical console is
1659	 * a serial port.  This is in case there is a display attached that
1660	 * is not the console.  In that situation we don't need/want the X
1661	 * server taking over the console.
1662	 */
1663	if (constty != NULL && unit == comconsole)
1664		constty = NULL;
1665	return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag));
1666}
1667
1668static void
1669siobusycheck(chan)
1670	void	*chan;
1671{
1672	struct com_s	*com;
1673	int		s;
1674
1675	com = (struct com_s *)chan;
1676
1677	/*
1678	 * Clear TS_BUSY if low-level output is complete.
1679	 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1680	 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1681	 * called again.  Reading the line status port outside of siointr1()
1682	 * is safe because CS_BUSY is clear so there are no output interrupts
1683	 * to lose.
1684	 */
1685	s = spltty();
1686	if (com->state & CS_BUSY)
1687		com->extra_state &= ~CSE_BUSYCHECK;	/* False alarm. */
1688	else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1689	    == (LSR_TSRE | LSR_TXRDY)) {
1690		com->tp->t_state &= ~TS_BUSY;
1691		ttwwakeup(com->tp);
1692		com->extra_state &= ~CSE_BUSYCHECK;
1693	} else
1694		timeout(siobusycheck, com, hz / 100);
1695	splx(s);
1696}
1697
1698static void
1699siodtrwakeup(chan)
1700	void	*chan;
1701{
1702	struct com_s	*com;
1703
1704	com = (struct com_s *)chan;
1705	com->state &= ~CS_DTR_OFF;
1706	wakeup(&com->dtr_wait);
1707}
1708
1709static void
1710sioinput(com)
1711	struct com_s	*com;
1712{
1713	u_char		*buf;
1714	int		incc;
1715	u_char		line_status;
1716	int		recv_data;
1717	struct tty	*tp;
1718
1719	buf = com->ibuf;
1720	tp = com->tp;
1721	if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1722		com_events -= (com->iptr - com->ibuf);
1723		com->iptr = com->ibuf;
1724		return;
1725	}
1726	if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1727		/*
1728		 * Avoid the grotesquely inefficient lineswitch routine
1729		 * (ttyinput) in "raw" mode.  It usually takes about 450
1730		 * instructions (that's without canonical processing or echo!).
1731		 * slinput is reasonably fast (usually 40 instructions plus
1732		 * call overhead).
1733		 */
1734		do {
1735			enable_intr();
1736			incc = com->iptr - buf;
1737			if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1738			    && (com->state & CS_RTS_IFLOW
1739				|| tp->t_iflag & IXOFF)
1740			    && !(tp->t_state & TS_TBLOCK))
1741				ttyblock(tp);
1742			com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1743				+= b_to_q((char *)buf, incc, &tp->t_rawq);
1744			buf += incc;
1745			tk_nin += incc;
1746			tk_rawcc += incc;
1747			tp->t_rawcc += incc;
1748			ttwakeup(tp);
1749			if (tp->t_state & TS_TTSTOP
1750			    && (tp->t_iflag & IXANY
1751				|| tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1752				tp->t_state &= ~TS_TTSTOP;
1753				tp->t_lflag &= ~FLUSHO;
1754				comstart(tp);
1755			}
1756			disable_intr();
1757		} while (buf < com->iptr);
1758	} else {
1759		do {
1760			enable_intr();
1761			line_status = buf[com->ierroff];
1762			recv_data = *buf++;
1763			if (line_status
1764			    & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1765				if (line_status & LSR_BI)
1766					recv_data |= TTY_BI;
1767				if (line_status & LSR_FE)
1768					recv_data |= TTY_FE;
1769				if (line_status & LSR_OE)
1770					recv_data |= TTY_OE;
1771				if (line_status & LSR_PE)
1772					recv_data |= TTY_PE;
1773			}
1774			(*linesw[tp->t_line].l_rint)(recv_data, tp);
1775			disable_intr();
1776		} while (buf < com->iptr);
1777	}
1778	com_events -= (com->iptr - com->ibuf);
1779	com->iptr = com->ibuf;
1780
1781	/*
1782	 * There is now room for another low-level buffer full of input,
1783	 * so enable RTS if it is now disabled and there is room in the
1784	 * high-level buffer.
1785	 */
1786	if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1787	    !(tp->t_state & TS_TBLOCK))
1788		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1789}
1790
1791void
1792siointr(arg)
1793	void		*arg;
1794{
1795#ifndef COM_MULTIPORT
1796	COM_LOCK();
1797	siointr1((struct com_s *) arg);
1798	COM_UNLOCK();
1799#else /* COM_MULTIPORT */
1800	bool_t		possibly_more_intrs;
1801	int		unit;
1802	struct com_s	*com;
1803
1804	/*
1805	 * Loop until there is no activity on any port.  This is necessary
1806	 * to get an interrupt edge more than to avoid another interrupt.
1807	 * If the IRQ signal is just an OR of the IRQ signals from several
1808	 * devices, then the edge from one may be lost because another is
1809	 * on.
1810	 */
1811	COM_LOCK();
1812	do {
1813		possibly_more_intrs = FALSE;
1814		for (unit = 0; unit < sio_numunits; ++unit) {
1815			com = com_addr(unit);
1816			/*
1817			 * XXX COM_LOCK();
1818			 * would it work here, or be counter-productive?
1819			 */
1820			if (com != NULL
1821			    && !com->gone
1822			    && (inb(com->int_id_port) & IIR_IMASK)
1823			       != IIR_NOPEND) {
1824				siointr1(com);
1825				possibly_more_intrs = TRUE;
1826			}
1827			/* XXX COM_UNLOCK(); */
1828		}
1829	} while (possibly_more_intrs);
1830	COM_UNLOCK();
1831#endif /* COM_MULTIPORT */
1832}
1833
1834static void
1835siointr1(com)
1836	struct com_s	*com;
1837{
1838	u_char	line_status;
1839	u_char	modem_status;
1840	u_char	*ioptr;
1841	u_char	recv_data;
1842	u_char	int_ctl;
1843	u_char	int_ctl_new;
1844	struct	timecounter *tc;
1845	u_int	count;
1846
1847	int_ctl = inb(com->intr_ctl_port);
1848	int_ctl_new = int_ctl;
1849
1850	while (!com->gone) {
1851		if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1852			modem_status = inb(com->modem_status_port);
1853		        if ((modem_status ^ com->last_modem_status) & MSR_DCD) {
1854				tc = timecounter;
1855				count = tc->tc_get_timecount(tc);
1856				pps_event(&com->pps, tc, count,
1857				    (modem_status & MSR_DCD) ?
1858				    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1859			}
1860		}
1861		line_status = inb(com->line_status_port);
1862
1863		/* input event? (check first to help avoid overruns) */
1864		while (line_status & LSR_RCV_MASK) {
1865			/* break/unnattached error bits or real input? */
1866			if (!(line_status & LSR_RXRDY))
1867				recv_data = 0;
1868			else
1869				recv_data = inb(com->data_port);
1870			if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1871				/*
1872				 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1873				 * Otherwise, push the work to a higher level
1874				 * (to handle PARMRK) if we're bypassing.
1875				 * Otherwise, convert BI/FE and PE+INPCK to 0.
1876				 *
1877				 * This makes bypassing work right in the
1878				 * usual "raw" case (IGNBRK set, and IGNPAR
1879				 * and INPCK clear).
1880				 *
1881				 * Note: BI together with FE/PE means just BI.
1882				 */
1883				if (line_status & LSR_BI) {
1884#if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1885					if (com->unit == comconsole) {
1886						breakpoint();
1887						goto cont;
1888					}
1889#endif
1890					if (com->tp == NULL
1891					    || com->tp->t_iflag & IGNBRK)
1892						goto cont;
1893				} else {
1894					if (com->tp == NULL
1895					    || com->tp->t_iflag & IGNPAR)
1896						goto cont;
1897				}
1898				if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1899				    && (line_status & (LSR_BI | LSR_FE)
1900					|| com->tp->t_iflag & INPCK))
1901					recv_data = 0;
1902			}
1903			++com->bytes_in;
1904			if (com->hotchar != 0 && recv_data == com->hotchar)
1905				setsofttty();
1906			ioptr = com->iptr;
1907			if (ioptr >= com->ibufend)
1908				CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1909			else {
1910				if (com->do_timestamp)
1911					microtime(&com->timestamp);
1912				++com_events;
1913				schedsofttty();
1914#if 0 /* for testing input latency vs efficiency */
1915if (com->iptr - com->ibuf == 8)
1916	setsofttty();
1917#endif
1918				ioptr[0] = recv_data;
1919				ioptr[com->ierroff] = line_status;
1920				com->iptr = ++ioptr;
1921				if (ioptr == com->ihighwater
1922				    && com->state & CS_RTS_IFLOW)
1923					outb(com->modem_ctl_port,
1924					     com->mcr_image &= ~MCR_RTS);
1925				if (line_status & LSR_OE)
1926					CE_RECORD(com, CE_OVERRUN);
1927			}
1928cont:
1929			/*
1930			 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1931			 * jump from the top of the loop to here
1932			 */
1933			line_status = inb(com->line_status_port) & 0x7F;
1934		}
1935
1936		/* modem status change? (always check before doing output) */
1937		modem_status = inb(com->modem_status_port);
1938		if (modem_status != com->last_modem_status) {
1939			if (com->do_dcd_timestamp
1940			    && !(com->last_modem_status & MSR_DCD)
1941			    && modem_status & MSR_DCD)
1942				microtime(&com->dcd_timestamp);
1943
1944			/*
1945			 * Schedule high level to handle DCD changes.  Note
1946			 * that we don't use the delta bits anywhere.  Some
1947			 * UARTs mess them up, and it's easy to remember the
1948			 * previous bits and calculate the delta.
1949			 */
1950			com->last_modem_status = modem_status;
1951			if (!(com->state & CS_CHECKMSR)) {
1952				com_events += LOTS_OF_EVENTS;
1953				com->state |= CS_CHECKMSR;
1954				setsofttty();
1955			}
1956
1957			/* handle CTS change immediately for crisp flow ctl */
1958			if (com->state & CS_CTS_OFLOW) {
1959				if (modem_status & MSR_CTS)
1960					com->state |= CS_ODEVREADY;
1961				else
1962					com->state &= ~CS_ODEVREADY;
1963			}
1964		}
1965
1966		/* output queued and everything ready? */
1967		if (line_status & LSR_TXRDY
1968		    && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1969			ioptr = com->obufq.l_head;
1970			if (com->tx_fifo_size > 1) {
1971				u_int	ocount;
1972
1973				ocount = com->obufq.l_tail - ioptr;
1974				if (ocount > com->tx_fifo_size)
1975					ocount = com->tx_fifo_size;
1976				com->bytes_out += ocount;
1977				do
1978					outb(com->data_port, *ioptr++);
1979				while (--ocount != 0);
1980			} else {
1981				outb(com->data_port, *ioptr++);
1982				++com->bytes_out;
1983			}
1984			com->obufq.l_head = ioptr;
1985			if (COM_IIR_TXRDYBUG(com->flags)) {
1986				int_ctl_new = int_ctl | IER_ETXRDY;
1987			}
1988			if (ioptr >= com->obufq.l_tail) {
1989				struct lbq	*qp;
1990
1991				qp = com->obufq.l_next;
1992				qp->l_queued = FALSE;
1993				qp = qp->l_next;
1994				if (qp != NULL) {
1995					com->obufq.l_head = qp->l_head;
1996					com->obufq.l_tail = qp->l_tail;
1997					com->obufq.l_next = qp;
1998				} else {
1999					/* output just completed */
2000					if (COM_IIR_TXRDYBUG(com->flags)) {
2001						int_ctl_new = int_ctl & ~IER_ETXRDY;
2002					}
2003					com->state &= ~CS_BUSY;
2004				}
2005				if (!(com->state & CS_ODONE)) {
2006					com_events += LOTS_OF_EVENTS;
2007					com->state |= CS_ODONE;
2008					setsofttty();	/* handle at high level ASAP */
2009				}
2010			}
2011			if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) {
2012				outb(com->intr_ctl_port, int_ctl_new);
2013			}
2014		}
2015
2016		/* finished? */
2017#ifndef COM_MULTIPORT
2018		if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
2019#endif /* COM_MULTIPORT */
2020			return;
2021	}
2022}
2023
2024static int
2025sioioctl(dev, cmd, data, flag, p)
2026	dev_t		dev;
2027	u_long		cmd;
2028	caddr_t		data;
2029	int		flag;
2030	struct proc	*p;
2031{
2032	struct com_s	*com;
2033	int		error;
2034	int		mynor;
2035	int		s;
2036	struct tty	*tp;
2037#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2038	u_long		oldcmd;
2039	struct termios	term;
2040#endif
2041
2042	mynor = minor(dev);
2043	com = com_addr(MINOR_TO_UNIT(mynor));
2044	if (com == NULL || com->gone)
2045		return (ENODEV);
2046	if (mynor & CONTROL_MASK) {
2047		struct termios	*ct;
2048
2049		switch (mynor & CONTROL_MASK) {
2050		case CONTROL_INIT_STATE:
2051			ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
2052			break;
2053		case CONTROL_LOCK_STATE:
2054			ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
2055			break;
2056		default:
2057			return (ENODEV);	/* /dev/nodev */
2058		}
2059		switch (cmd) {
2060		case TIOCSETA:
2061			error = suser(p);
2062			if (error != 0)
2063				return (error);
2064			*ct = *(struct termios *)data;
2065			return (0);
2066		case TIOCGETA:
2067			*(struct termios *)data = *ct;
2068			return (0);
2069		case TIOCGETD:
2070			*(int *)data = TTYDISC;
2071			return (0);
2072		case TIOCGWINSZ:
2073			bzero(data, sizeof(struct winsize));
2074			return (0);
2075		default:
2076			return (ENOTTY);
2077		}
2078	}
2079	tp = com->tp;
2080#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2081	term = tp->t_termios;
2082	oldcmd = cmd;
2083	error = ttsetcompat(tp, &cmd, data, &term);
2084	if (error != 0)
2085		return (error);
2086	if (cmd != oldcmd)
2087		data = (caddr_t)&term;
2088#endif
2089	if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
2090		int	cc;
2091		struct termios *dt = (struct termios *)data;
2092		struct termios *lt = mynor & CALLOUT_MASK
2093				     ? &com->lt_out : &com->lt_in;
2094
2095		dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2096			      | (dt->c_iflag & ~lt->c_iflag);
2097		dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2098			      | (dt->c_oflag & ~lt->c_oflag);
2099		dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2100			      | (dt->c_cflag & ~lt->c_cflag);
2101		dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2102			      | (dt->c_lflag & ~lt->c_lflag);
2103		for (cc = 0; cc < NCCS; ++cc)
2104			if (lt->c_cc[cc] != 0)
2105				dt->c_cc[cc] = tp->t_cc[cc];
2106		if (lt->c_ispeed != 0)
2107			dt->c_ispeed = tp->t_ispeed;
2108		if (lt->c_ospeed != 0)
2109			dt->c_ospeed = tp->t_ospeed;
2110	}
2111	error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
2112	if (error != ENOIOCTL)
2113		return (error);
2114	s = spltty();
2115	error = ttioctl(tp, cmd, data, flag);
2116	disc_optim(tp, &tp->t_termios, com);
2117	if (error != ENOIOCTL) {
2118		splx(s);
2119		return (error);
2120	}
2121	switch (cmd) {
2122	case TIOCSBRK:
2123		sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2124		break;
2125	case TIOCCBRK:
2126		sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2127		break;
2128	case TIOCSDTR:
2129		(void)commctl(com, TIOCM_DTR, DMBIS);
2130		break;
2131	case TIOCCDTR:
2132		(void)commctl(com, TIOCM_DTR, DMBIC);
2133		break;
2134	/*
2135	 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set.  The
2136	 * changes get undone on the next call to comparam().
2137	 */
2138	case TIOCMSET:
2139		(void)commctl(com, *(int *)data, DMSET);
2140		break;
2141	case TIOCMBIS:
2142		(void)commctl(com, *(int *)data, DMBIS);
2143		break;
2144	case TIOCMBIC:
2145		(void)commctl(com, *(int *)data, DMBIC);
2146		break;
2147	case TIOCMGET:
2148		*(int *)data = commctl(com, 0, DMGET);
2149		break;
2150	case TIOCMSDTRWAIT:
2151		/* must be root since the wait applies to following logins */
2152		error = suser(p);
2153		if (error != 0) {
2154			splx(s);
2155			return (error);
2156		}
2157		com->dtr_wait = *(int *)data * hz / 100;
2158		break;
2159	case TIOCMGDTRWAIT:
2160		*(int *)data = com->dtr_wait * 100 / hz;
2161		break;
2162	case TIOCTIMESTAMP:
2163		com->do_timestamp = TRUE;
2164		*(struct timeval *)data = com->timestamp;
2165		break;
2166	case TIOCDCDTIMESTAMP:
2167		com->do_dcd_timestamp = TRUE;
2168		*(struct timeval *)data = com->dcd_timestamp;
2169		break;
2170	default:
2171		splx(s);
2172		error = pps_ioctl(cmd, data, &com->pps);
2173		if (error == ENODEV)
2174			error = ENOTTY;
2175		return (error);
2176	}
2177	splx(s);
2178	return (0);
2179}
2180
2181static void
2182siopoll()
2183{
2184	int		unit;
2185
2186	if (com_events == 0)
2187		return;
2188repeat:
2189	for (unit = 0; unit < sio_numunits; ++unit) {
2190		struct com_s	*com;
2191		int		incc;
2192		struct tty	*tp;
2193
2194		com = com_addr(unit);
2195		if (com == NULL)
2196			continue;
2197		tp = com->tp;
2198		if (tp == NULL || com->gone) {
2199			/*
2200			 * Discard any events related to never-opened or
2201			 * going-away devices.
2202			 */
2203			disable_intr();
2204			incc = com->iptr - com->ibuf;
2205			com->iptr = com->ibuf;
2206			if (com->state & CS_CHECKMSR) {
2207				incc += LOTS_OF_EVENTS;
2208				com->state &= ~CS_CHECKMSR;
2209			}
2210			com_events -= incc;
2211			enable_intr();
2212			continue;
2213		}
2214		if (com->iptr != com->ibuf) {
2215			disable_intr();
2216			sioinput(com);
2217			enable_intr();
2218		}
2219		if (com->state & CS_CHECKMSR) {
2220			u_char	delta_modem_status;
2221
2222			disable_intr();
2223			delta_modem_status = com->last_modem_status
2224					     ^ com->prev_modem_status;
2225			com->prev_modem_status = com->last_modem_status;
2226			com_events -= LOTS_OF_EVENTS;
2227			com->state &= ~CS_CHECKMSR;
2228			enable_intr();
2229			if (delta_modem_status & MSR_DCD)
2230				(*linesw[tp->t_line].l_modem)
2231					(tp, com->prev_modem_status & MSR_DCD);
2232		}
2233		if (com->state & CS_ODONE) {
2234			disable_intr();
2235			com_events -= LOTS_OF_EVENTS;
2236			com->state &= ~CS_ODONE;
2237			enable_intr();
2238			if (!(com->state & CS_BUSY)
2239			    && !(com->extra_state & CSE_BUSYCHECK)) {
2240				timeout(siobusycheck, com, hz / 100);
2241				com->extra_state |= CSE_BUSYCHECK;
2242			}
2243			(*linesw[tp->t_line].l_start)(tp);
2244		}
2245		if (com_events == 0)
2246			break;
2247	}
2248	if (com_events >= LOTS_OF_EVENTS)
2249		goto repeat;
2250}
2251
2252static int
2253comparam(tp, t)
2254	struct tty	*tp;
2255	struct termios	*t;
2256{
2257	u_int		cfcr;
2258	int		cflag;
2259	struct com_s	*com;
2260	int		divisor;
2261	u_char		dlbh;
2262	u_char		dlbl;
2263	int		s;
2264	int		unit;
2265
2266	/* do historical conversions */
2267	if (t->c_ispeed == 0)
2268		t->c_ispeed = t->c_ospeed;
2269
2270	/* check requested parameters */
2271	divisor = ttspeedtab(t->c_ospeed, comspeedtab);
2272	if (divisor < 0 || (divisor > 0 && t->c_ispeed != t->c_ospeed))
2273		return (EINVAL);
2274
2275	/* parameters are OK, convert them to the com struct and the device */
2276	unit = DEV_TO_UNIT(tp->t_dev);
2277	com = com_addr(unit);
2278	if (com == NULL)
2279		return (ENODEV);
2280	s = spltty();
2281	if (divisor == 0)
2282		(void)commctl(com, TIOCM_DTR, DMBIC);	/* hang up line */
2283	else
2284		(void)commctl(com, TIOCM_DTR, DMBIS);
2285	cflag = t->c_cflag;
2286	switch (cflag & CSIZE) {
2287	case CS5:
2288		cfcr = CFCR_5BITS;
2289		break;
2290	case CS6:
2291		cfcr = CFCR_6BITS;
2292		break;
2293	case CS7:
2294		cfcr = CFCR_7BITS;
2295		break;
2296	default:
2297		cfcr = CFCR_8BITS;
2298		break;
2299	}
2300	if (cflag & PARENB) {
2301		cfcr |= CFCR_PENAB;
2302		if (!(cflag & PARODD))
2303			cfcr |= CFCR_PEVEN;
2304	}
2305	if (cflag & CSTOPB)
2306		cfcr |= CFCR_STOPB;
2307
2308	if (com->hasfifo && divisor != 0) {
2309		/*
2310		 * Use a fifo trigger level low enough so that the input
2311		 * latency from the fifo is less than about 16 msec and
2312		 * the total latency is less than about 30 msec.  These
2313		 * latencies are reasonable for humans.  Serial comms
2314		 * protocols shouldn't expect anything better since modem
2315		 * latencies are larger.
2316		 */
2317		com->fifo_image = t->c_ospeed <= 4800
2318				  ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH;
2319#ifdef COM_ESP
2320		/*
2321		 * The Hayes ESP card needs the fifo DMA mode bit set
2322		 * in compatibility mode.  If not, it will interrupt
2323		 * for each character received.
2324		 */
2325		if (com->esp)
2326			com->fifo_image |= FIFO_DMA_MODE;
2327#endif
2328		sio_setreg(com, com_fifo, com->fifo_image);
2329	}
2330
2331	/*
2332	 * This returns with interrupts disabled so that we can complete
2333	 * the speed change atomically.  Keeping interrupts disabled is
2334	 * especially important while com_data is hidden.
2335	 */
2336	(void) siosetwater(com, t->c_ispeed);
2337
2338	if (divisor != 0) {
2339		sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2340		/*
2341		 * Only set the divisor registers if they would change,
2342		 * since on some 16550 incompatibles (UMC8669F), setting
2343		 * them while input is arriving them loses sync until
2344		 * data stops arriving.
2345		 */
2346		dlbl = divisor & 0xFF;
2347		if (sio_getreg(com, com_dlbl) != dlbl)
2348			sio_setreg(com, com_dlbl, dlbl);
2349		dlbh = (u_int) divisor >> 8;
2350		if (sio_getreg(com, com_dlbh) != dlbh)
2351			sio_setreg(com, com_dlbh, dlbh);
2352	}
2353
2354	sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2355
2356	if (!(tp->t_state & TS_TTSTOP))
2357		com->state |= CS_TTGO;
2358
2359	if (cflag & CRTS_IFLOW) {
2360		if (com->st16650a) {
2361			sio_setreg(com, com_cfcr, 0xbf);
2362			sio_setreg(com, com_fifo,
2363				   sio_getreg(com, com_fifo) | 0x40);
2364		}
2365		com->state |= CS_RTS_IFLOW;
2366		/*
2367		 * If CS_RTS_IFLOW just changed from off to on, the change
2368		 * needs to be propagated to MCR_RTS.  This isn't urgent,
2369		 * so do it later by calling comstart() instead of repeating
2370		 * a lot of code from comstart() here.
2371		 */
2372	} else if (com->state & CS_RTS_IFLOW) {
2373		com->state &= ~CS_RTS_IFLOW;
2374		/*
2375		 * CS_RTS_IFLOW just changed from on to off.  Force MCR_RTS
2376		 * on here, since comstart() won't do it later.
2377		 */
2378		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2379		if (com->st16650a) {
2380			sio_setreg(com, com_cfcr, 0xbf);
2381			sio_setreg(com, com_fifo,
2382				   sio_getreg(com, com_fifo) & ~0x40);
2383		}
2384	}
2385
2386
2387	/*
2388	 * Set up state to handle output flow control.
2389	 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2390	 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2391	 */
2392	com->state |= CS_ODEVREADY;
2393	com->state &= ~CS_CTS_OFLOW;
2394	if (cflag & CCTS_OFLOW) {
2395		com->state |= CS_CTS_OFLOW;
2396		if (!(com->last_modem_status & MSR_CTS))
2397			com->state &= ~CS_ODEVREADY;
2398		if (com->st16650a) {
2399			sio_setreg(com, com_cfcr, 0xbf);
2400			sio_setreg(com, com_fifo,
2401				   sio_getreg(com, com_fifo) | 0x80);
2402		}
2403	} else {
2404		if (com->st16650a) {
2405			sio_setreg(com, com_cfcr, 0xbf);
2406			sio_setreg(com, com_fifo,
2407				   sio_getreg(com, com_fifo) & ~0x80);
2408		}
2409	}
2410
2411	sio_setreg(com, com_cfcr, com->cfcr_image);
2412
2413	/* XXX shouldn't call functions while intrs are disabled. */
2414	disc_optim(tp, t, com);
2415	/*
2416	 * Recover from fiddling with CS_TTGO.  We used to call siointr1()
2417	 * unconditionally, but that defeated the careful discarding of
2418	 * stale input in sioopen().
2419	 */
2420	if (com->state >= (CS_BUSY | CS_TTGO))
2421		siointr1(com);
2422
2423	enable_intr();
2424	splx(s);
2425	comstart(tp);
2426	if (com->ibufold != NULL) {
2427		free(com->ibufold, M_DEVBUF);
2428		com->ibufold = NULL;
2429	}
2430	return (0);
2431}
2432
2433static int
2434siosetwater(com, speed)
2435	struct com_s	*com;
2436	speed_t		speed;
2437{
2438	int		cp4ticks;
2439	u_char		*ibuf;
2440	int		ibufsize;
2441	struct tty	*tp;
2442
2443	/*
2444	 * Make the buffer size large enough to handle a softtty interrupt
2445	 * latency of about 2 ticks without loss of throughput or data
2446	 * (about 3 ticks if input flow control is not used or not honoured,
2447	 * but a bit less for CS5-CS7 modes).
2448	 */
2449	cp4ticks = speed / 10 / hz * 4;
2450	for (ibufsize = 128; ibufsize < cp4ticks;)
2451		ibufsize <<= 1;
2452	if (ibufsize == com->ibufsize) {
2453		disable_intr();
2454		return (0);
2455	}
2456
2457	/*
2458	 * Allocate input buffer.  The extra factor of 2 in the size is
2459	 * to allow for an error byte for each input byte.
2460	 */
2461	ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2462	if (ibuf == NULL) {
2463		disable_intr();
2464		return (ENOMEM);
2465	}
2466
2467	/* Initialize non-critical variables. */
2468	com->ibufold = com->ibuf;
2469	com->ibufsize = ibufsize;
2470	tp = com->tp;
2471	if (tp != NULL) {
2472		tp->t_ififosize = 2 * ibufsize;
2473		tp->t_ispeedwat = (speed_t)-1;
2474		tp->t_ospeedwat = (speed_t)-1;
2475	}
2476
2477	/*
2478	 * Read current input buffer, if any.  Continue with interrupts
2479	 * disabled.
2480	 */
2481	disable_intr();
2482	if (com->iptr != com->ibuf)
2483		sioinput(com);
2484
2485	/*-
2486	 * Initialize critical variables, including input buffer watermarks.
2487	 * The external device is asked to stop sending when the buffer
2488	 * exactly reaches high water, or when the high level requests it.
2489	 * The high level is notified immediately (rather than at a later
2490	 * clock tick) when this watermark is reached.
2491	 * The buffer size is chosen so the watermark should almost never
2492	 * be reached.
2493	 * The low watermark is invisibly 0 since the buffer is always
2494	 * emptied all at once.
2495	 */
2496	com->iptr = com->ibuf = ibuf;
2497	com->ibufend = ibuf + ibufsize;
2498	com->ierroff = ibufsize;
2499	com->ihighwater = ibuf + 3 * ibufsize / 4;
2500	return (0);
2501}
2502
2503static void
2504comstart(tp)
2505	struct tty	*tp;
2506{
2507	struct com_s	*com;
2508	int		s;
2509	int		unit;
2510
2511	unit = DEV_TO_UNIT(tp->t_dev);
2512	com = com_addr(unit);
2513	if (com == NULL)
2514		return;
2515	s = spltty();
2516	disable_intr();
2517	if (tp->t_state & TS_TTSTOP)
2518		com->state &= ~CS_TTGO;
2519	else
2520		com->state |= CS_TTGO;
2521	if (tp->t_state & TS_TBLOCK) {
2522		if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2523			outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2524	} else {
2525		if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2526		    && com->state & CS_RTS_IFLOW)
2527			outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2528	}
2529	enable_intr();
2530	if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2531		ttwwakeup(tp);
2532		splx(s);
2533		return;
2534	}
2535	if (tp->t_outq.c_cc != 0) {
2536		struct lbq	*qp;
2537		struct lbq	*next;
2538
2539		if (!com->obufs[0].l_queued) {
2540			com->obufs[0].l_tail
2541			    = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2542						  sizeof com->obuf1);
2543			com->obufs[0].l_next = NULL;
2544			com->obufs[0].l_queued = TRUE;
2545			disable_intr();
2546			if (com->state & CS_BUSY) {
2547				qp = com->obufq.l_next;
2548				while ((next = qp->l_next) != NULL)
2549					qp = next;
2550				qp->l_next = &com->obufs[0];
2551			} else {
2552				com->obufq.l_head = com->obufs[0].l_head;
2553				com->obufq.l_tail = com->obufs[0].l_tail;
2554				com->obufq.l_next = &com->obufs[0];
2555				com->state |= CS_BUSY;
2556			}
2557			enable_intr();
2558		}
2559		if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2560			com->obufs[1].l_tail
2561			    = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2562						  sizeof com->obuf2);
2563			com->obufs[1].l_next = NULL;
2564			com->obufs[1].l_queued = TRUE;
2565			disable_intr();
2566			if (com->state & CS_BUSY) {
2567				qp = com->obufq.l_next;
2568				while ((next = qp->l_next) != NULL)
2569					qp = next;
2570				qp->l_next = &com->obufs[1];
2571			} else {
2572				com->obufq.l_head = com->obufs[1].l_head;
2573				com->obufq.l_tail = com->obufs[1].l_tail;
2574				com->obufq.l_next = &com->obufs[1];
2575				com->state |= CS_BUSY;
2576			}
2577			enable_intr();
2578		}
2579		tp->t_state |= TS_BUSY;
2580	}
2581	disable_intr();
2582	if (com->state >= (CS_BUSY | CS_TTGO))
2583		siointr1(com);	/* fake interrupt to start output */
2584	enable_intr();
2585	ttwwakeup(tp);
2586	splx(s);
2587}
2588
2589static void
2590comstop(tp, rw)
2591	struct tty	*tp;
2592	int		rw;
2593{
2594	struct com_s	*com;
2595
2596	com = com_addr(DEV_TO_UNIT(tp->t_dev));
2597	if (com == NULL || com->gone)
2598		return;
2599	disable_intr();
2600	if (rw & FWRITE) {
2601		if (com->hasfifo)
2602#ifdef COM_ESP
2603		    /* XXX avoid h/w bug. */
2604		    if (!com->esp)
2605#endif
2606			sio_setreg(com, com_fifo,
2607				   FIFO_XMT_RST | com->fifo_image);
2608		com->obufs[0].l_queued = FALSE;
2609		com->obufs[1].l_queued = FALSE;
2610		if (com->state & CS_ODONE)
2611			com_events -= LOTS_OF_EVENTS;
2612		com->state &= ~(CS_ODONE | CS_BUSY);
2613		com->tp->t_state &= ~TS_BUSY;
2614	}
2615	if (rw & FREAD) {
2616		if (com->hasfifo)
2617#ifdef COM_ESP
2618		    /* XXX avoid h/w bug. */
2619		    if (!com->esp)
2620#endif
2621			sio_setreg(com, com_fifo,
2622				   FIFO_RCV_RST | com->fifo_image);
2623		com_events -= (com->iptr - com->ibuf);
2624		com->iptr = com->ibuf;
2625	}
2626	enable_intr();
2627	comstart(tp);
2628}
2629
2630static int
2631commctl(com, bits, how)
2632	struct com_s	*com;
2633	int		bits;
2634	int		how;
2635{
2636	int	mcr;
2637	int	msr;
2638
2639	if (how == DMGET) {
2640		bits = TIOCM_LE;	/* XXX - always enabled while open */
2641		mcr = com->mcr_image;
2642		if (mcr & MCR_DTR)
2643			bits |= TIOCM_DTR;
2644		if (mcr & MCR_RTS)
2645			bits |= TIOCM_RTS;
2646		msr = com->prev_modem_status;
2647		if (msr & MSR_CTS)
2648			bits |= TIOCM_CTS;
2649		if (msr & MSR_DCD)
2650			bits |= TIOCM_CD;
2651		if (msr & MSR_DSR)
2652			bits |= TIOCM_DSR;
2653		/*
2654		 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2655		 * more volatile by reading the modem status a lot.  Perhaps
2656		 * we should latch both bits until the status is read here.
2657		 */
2658		if (msr & (MSR_RI | MSR_TERI))
2659			bits |= TIOCM_RI;
2660		return (bits);
2661	}
2662	mcr = 0;
2663	if (bits & TIOCM_DTR)
2664		mcr |= MCR_DTR;
2665	if (bits & TIOCM_RTS)
2666		mcr |= MCR_RTS;
2667	if (com->gone)
2668		return(0);
2669	disable_intr();
2670	switch (how) {
2671	case DMSET:
2672		outb(com->modem_ctl_port,
2673		     com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE));
2674		break;
2675	case DMBIS:
2676		outb(com->modem_ctl_port, com->mcr_image |= mcr);
2677		break;
2678	case DMBIC:
2679		outb(com->modem_ctl_port, com->mcr_image &= ~mcr);
2680		break;
2681	}
2682	enable_intr();
2683	return (0);
2684}
2685
2686static void
2687siosettimeout()
2688{
2689	struct com_s	*com;
2690	bool_t		someopen;
2691	int		unit;
2692
2693	/*
2694	 * Set our timeout period to 1 second if no polled devices are open.
2695	 * Otherwise set it to max(1/200, 1/hz).
2696	 * Enable timeouts iff some device is open.
2697	 */
2698	untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2699	sio_timeout = hz;
2700	someopen = FALSE;
2701	for (unit = 0; unit < sio_numunits; ++unit) {
2702		com = com_addr(unit);
2703		if (com != NULL && com->tp != NULL
2704		    && com->tp->t_state & TS_ISOPEN && !com->gone) {
2705			someopen = TRUE;
2706			if (com->poll || com->poll_output) {
2707				sio_timeout = hz > 200 ? hz / 200 : 1;
2708				break;
2709			}
2710		}
2711	}
2712	if (someopen) {
2713		sio_timeouts_until_log = hz / sio_timeout;
2714		sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2715					     sio_timeout);
2716	} else {
2717		/* Flush error messages, if any. */
2718		sio_timeouts_until_log = 1;
2719		comwakeup((void *)NULL);
2720		untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2721	}
2722}
2723
2724static void
2725comwakeup(chan)
2726	void	*chan;
2727{
2728	struct com_s	*com;
2729	int		unit;
2730
2731	sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2732
2733	/*
2734	 * Recover from lost output interrupts.
2735	 * Poll any lines that don't use interrupts.
2736	 */
2737	for (unit = 0; unit < sio_numunits; ++unit) {
2738		com = com_addr(unit);
2739		if (com != NULL && !com->gone
2740		    && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2741			disable_intr();
2742			siointr1(com);
2743			enable_intr();
2744		}
2745	}
2746
2747	/*
2748	 * Check for and log errors, but not too often.
2749	 */
2750	if (--sio_timeouts_until_log > 0)
2751		return;
2752	sio_timeouts_until_log = hz / sio_timeout;
2753	for (unit = 0; unit < sio_numunits; ++unit) {
2754		int	errnum;
2755
2756		com = com_addr(unit);
2757		if (com == NULL)
2758			continue;
2759		if (com->gone)
2760			continue;
2761		for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2762			u_int	delta;
2763			u_long	total;
2764
2765			disable_intr();
2766			delta = com->delta_error_counts[errnum];
2767			com->delta_error_counts[errnum] = 0;
2768			enable_intr();
2769			if (delta == 0)
2770				continue;
2771			total = com->error_counts[errnum] += delta;
2772			log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2773			    unit, delta, error_desc[errnum],
2774			    delta == 1 ? "" : "s", total);
2775		}
2776	}
2777}
2778
2779static void
2780disc_optim(tp, t, com)
2781	struct tty	*tp;
2782	struct termios	*t;
2783	struct com_s	*com;
2784{
2785	if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2786	    && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2787	    && (!(t->c_iflag & PARMRK)
2788		|| (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2789	    && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2790	    && linesw[tp->t_line].l_rint == ttyinput)
2791		tp->t_state |= TS_CAN_BYPASS_L_RINT;
2792	else
2793		tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2794	com->hotchar = linesw[tp->t_line].l_hotchar;
2795}
2796
2797/*
2798 * Following are all routines needed for SIO to act as console
2799 */
2800#include <sys/cons.h>
2801
2802struct siocnstate {
2803	u_char	dlbl;
2804	u_char	dlbh;
2805	u_char	ier;
2806	u_char	cfcr;
2807	u_char	mcr;
2808};
2809
2810static speed_t siocngetspeed __P((Port_t, struct speedtab *));
2811static void siocnclose	__P((struct siocnstate *sp, Port_t iobase));
2812static void siocnopen	__P((struct siocnstate *sp, Port_t iobase, int speed));
2813static void siocntxwait	__P((Port_t iobase));
2814
2815static cn_probe_t siocnprobe;
2816static cn_init_t siocninit;
2817static cn_checkc_t siocncheckc;
2818static cn_getc_t siocngetc;
2819static cn_putc_t siocnputc;
2820
2821#ifdef __i386__
2822CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc,
2823	    siocnputc, NULL);
2824#endif
2825
2826/* To get the GDB related variables */
2827#if DDB > 0
2828#include <ddb/ddb.h>
2829#endif
2830
2831static void
2832siocntxwait(iobase)
2833	Port_t	iobase;
2834{
2835	int	timo;
2836
2837	/*
2838	 * Wait for any pending transmission to finish.  Required to avoid
2839	 * the UART lockup bug when the speed is changed, and for normal
2840	 * transmits.
2841	 */
2842	timo = 100000;
2843	while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2844	       != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2845		;
2846}
2847
2848/*
2849 * Read the serial port specified and try to figure out what speed
2850 * it's currently running at.  We're assuming the serial port has
2851 * been initialized and is basicly idle.  This routine is only intended
2852 * to be run at system startup.
2853 *
2854 * If the value read from the serial port doesn't make sense, return 0.
2855 */
2856
2857static speed_t
2858siocngetspeed(iobase, table)
2859	Port_t iobase;
2860	struct speedtab *table;
2861{
2862	int	code;
2863	u_char	dlbh;
2864	u_char	dlbl;
2865	u_char  cfcr;
2866
2867	cfcr = inb(iobase + com_cfcr);
2868	outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2869
2870	dlbl = inb(iobase + com_dlbl);
2871	dlbh = inb(iobase + com_dlbh);
2872
2873	outb(iobase + com_cfcr, cfcr);
2874
2875	code = dlbh << 8 | dlbl;
2876
2877	for (; table->sp_speed != -1; table++)
2878		if (table->sp_code == code)
2879			return (table->sp_speed);
2880
2881	return (0);	/* didn't match anything sane */
2882}
2883
2884static void
2885siocnopen(sp, iobase, speed)
2886	struct siocnstate	*sp;
2887	Port_t			iobase;
2888	int			speed;
2889{
2890	int	divisor;
2891	u_char	dlbh;
2892	u_char	dlbl;
2893
2894	/*
2895	 * Save all the device control registers except the fifo register
2896	 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2897	 * We can't save the fifo register since it is read-only.
2898	 */
2899	sp->ier = inb(iobase + com_ier);
2900	outb(iobase + com_ier, 0);	/* spltty() doesn't stop siointr() */
2901	siocntxwait(iobase);
2902	sp->cfcr = inb(iobase + com_cfcr);
2903	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2904	sp->dlbl = inb(iobase + com_dlbl);
2905	sp->dlbh = inb(iobase + com_dlbh);
2906	/*
2907	 * Only set the divisor registers if they would change, since on
2908	 * some 16550 incompatibles (Startech), setting them clears the
2909	 * data input register.  This also reduces the effects of the
2910	 * UMC8669F bug.
2911	 */
2912	divisor = ttspeedtab(speed, comspeedtab);
2913	dlbl = divisor & 0xFF;
2914	if (sp->dlbl != dlbl)
2915		outb(iobase + com_dlbl, dlbl);
2916	dlbh = (u_int) divisor >> 8;
2917	if (sp->dlbh != dlbh)
2918		outb(iobase + com_dlbh, dlbh);
2919	outb(iobase + com_cfcr, CFCR_8BITS);
2920	sp->mcr = inb(iobase + com_mcr);
2921	/*
2922	 * We don't want interrupts, but must be careful not to "disable"
2923	 * them by clearing the MCR_IENABLE bit, since that might cause
2924	 * an interrupt by floating the IRQ line.
2925	 */
2926	outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2927}
2928
2929static void
2930siocnclose(sp, iobase)
2931	struct siocnstate	*sp;
2932	Port_t			iobase;
2933{
2934	/*
2935	 * Restore the device control registers.
2936	 */
2937	siocntxwait(iobase);
2938	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2939	if (sp->dlbl != inb(iobase + com_dlbl))
2940		outb(iobase + com_dlbl, sp->dlbl);
2941	if (sp->dlbh != inb(iobase + com_dlbh))
2942		outb(iobase + com_dlbh, sp->dlbh);
2943	outb(iobase + com_cfcr, sp->cfcr);
2944	/*
2945	 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2946	 */
2947	outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2948	outb(iobase + com_ier, sp->ier);
2949}
2950
2951static void
2952siocnprobe(cp)
2953	struct consdev	*cp;
2954{
2955	speed_t			boot_speed;
2956	u_char			cfcr;
2957	int			s, unit;
2958	struct siocnstate	sp;
2959
2960	/*
2961	 * Find our first enabled console, if any.  If it is a high-level
2962	 * console device, then initialize it and return successfully.
2963	 * If it is a low-level console device, then initialize it and
2964	 * return unsuccessfully.  It must be initialized in both cases
2965	 * for early use by console drivers and debuggers.  Initializing
2966	 * the hardware is not necessary in all cases, since the i/o
2967	 * routines initialize it on the fly, but it is necessary if
2968	 * input might arrive while the hardware is switched back to an
2969	 * uninitialized state.  We can't handle multiple console devices
2970	 * yet because our low-level routines don't take a device arg.
2971	 * We trust the user to set the console flags properly so that we
2972	 * don't need to probe.
2973	 */
2974	cp->cn_pri = CN_DEAD;
2975
2976	for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2977		int flags;
2978		int disabled;
2979		if (resource_int_value("sio", unit, "disabled", &disabled) == 0) {
2980			if (disabled)
2981				continue;
2982		}
2983		if (resource_int_value("sio", unit, "flags", &flags))
2984			continue;
2985		if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2986			int port;
2987			Port_t iobase;
2988
2989			if (resource_int_value("sio", unit, "port", &port))
2990				continue;
2991			iobase = port;
2992			s = spltty();
2993			if (boothowto & RB_SERIAL) {
2994				boot_speed = siocngetspeed(iobase, comspeedtab);
2995				if (boot_speed)
2996					comdefaultrate = boot_speed;
2997			}
2998
2999			/*
3000			 * Initialize the divisor latch.  We can't rely on
3001			 * siocnopen() to do this the first time, since it
3002			 * avoids writing to the latch if the latch appears
3003			 * to have the correct value.  Also, if we didn't
3004			 * just read the speed from the hardware, then we
3005			 * need to set the speed in hardware so that
3006			 * switching it later is null.
3007			 */
3008			cfcr = inb(iobase + com_cfcr);
3009			outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
3010			outb(iobase + com_dlbl,
3011			     COMBRD(comdefaultrate) & 0xff);
3012			outb(iobase + com_dlbh,
3013			     (u_int) COMBRD(comdefaultrate) >> 8);
3014			outb(iobase + com_cfcr, cfcr);
3015
3016			siocnopen(&sp, iobase, comdefaultrate);
3017
3018			splx(s);
3019			if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
3020				cp->cn_dev = makedev(CDEV_MAJOR, unit);
3021				cp->cn_pri = COM_FORCECONSOLE(flags)
3022					     || boothowto & RB_SERIAL
3023					     ? CN_REMOTE : CN_NORMAL;
3024				siocniobase = iobase;
3025				siocnunit = unit;
3026			}
3027			if (COM_DEBUGGER(flags)) {
3028				printf("sio%d: gdb debugging port\n", unit);
3029				siogdbiobase = iobase;
3030				siogdbunit = unit;
3031#if DDB > 0
3032				gdbdev = makedev(CDEV_MAJOR, unit);
3033				gdb_getc = siocngetc;
3034				gdb_putc = siocnputc;
3035#endif
3036			}
3037		}
3038	}
3039#ifdef	__i386__
3040#if DDB > 0
3041	/*
3042	 * XXX Ugly Compatability.
3043	 * If no gdb port has been specified, set it to be the console
3044	 * as some configuration files don't specify the gdb port.
3045	 */
3046	if (gdbdev == NODEV && (boothowto & RB_GDB)) {
3047		printf("Warning: no GDB port specified. Defaulting to sio%d.\n",
3048			siocnunit);
3049		printf("Set flag 0x80 on desired GDB port in your\n");
3050		printf("configuration file (currently sio only).\n");
3051		siogdbiobase = siocniobase;
3052		siogdbunit = siocnunit;
3053		gdbdev = makedev(CDEV_MAJOR, siocnunit);
3054		gdb_getc = siocngetc;
3055		gdb_putc = siocnputc;
3056	}
3057#endif
3058#endif
3059}
3060
3061#ifdef __alpha__
3062
3063CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL);
3064
3065int
3066siocnattach(port, speed)
3067	int port;
3068	int speed;
3069{
3070	int			s;
3071	u_char			cfcr;
3072	struct siocnstate	sp;
3073
3074	siocniobase = port;
3075	comdefaultrate = speed;
3076	sio_consdev.cn_pri = CN_NORMAL;
3077	sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0);
3078
3079	s = spltty();
3080
3081	/*
3082	 * Initialize the divisor latch.  We can't rely on
3083	 * siocnopen() to do this the first time, since it
3084	 * avoids writing to the latch if the latch appears
3085	 * to have the correct value.  Also, if we didn't
3086	 * just read the speed from the hardware, then we
3087	 * need to set the speed in hardware so that
3088	 * switching it later is null.
3089	 */
3090	cfcr = inb(siocniobase + com_cfcr);
3091	outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr);
3092	outb(siocniobase + com_dlbl,
3093	     COMBRD(comdefaultrate) & 0xff);
3094	outb(siocniobase + com_dlbh,
3095	     (u_int) COMBRD(comdefaultrate) >> 8);
3096	outb(siocniobase + com_cfcr, cfcr);
3097
3098	siocnopen(&sp, siocniobase, comdefaultrate);
3099	splx(s);
3100
3101	cn_tab = &sio_consdev;
3102	return (0);
3103}
3104
3105int
3106siogdbattach(port, speed)
3107	int port;
3108	int speed;
3109{
3110	int			s;
3111	u_char			cfcr;
3112	struct siocnstate	sp;
3113
3114	siogdbiobase = port;
3115	gdbdefaultrate = speed;
3116
3117	s = spltty();
3118
3119	/*
3120	 * Initialize the divisor latch.  We can't rely on
3121	 * siocnopen() to do this the first time, since it
3122	 * avoids writing to the latch if the latch appears
3123	 * to have the correct value.  Also, if we didn't
3124	 * just read the speed from the hardware, then we
3125	 * need to set the speed in hardware so that
3126	 * switching it later is null.
3127	 */
3128	cfcr = inb(siogdbiobase + com_cfcr);
3129	outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr);
3130	outb(siogdbiobase + com_dlbl,
3131	     COMBRD(gdbdefaultrate) & 0xff);
3132	outb(siogdbiobase + com_dlbh,
3133	     (u_int) COMBRD(gdbdefaultrate) >> 8);
3134	outb(siogdbiobase + com_cfcr, cfcr);
3135
3136	siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3137	splx(s);
3138
3139	return (0);
3140}
3141
3142#endif
3143
3144static void
3145siocninit(cp)
3146	struct consdev	*cp;
3147{
3148	comconsole = DEV_TO_UNIT(cp->cn_dev);
3149}
3150
3151static int
3152siocncheckc(dev)
3153	dev_t	dev;
3154{
3155	int	c;
3156	Port_t	iobase;
3157	int	s;
3158	struct siocnstate	sp;
3159
3160	if (minor(dev) == siogdbunit)
3161		iobase = siogdbiobase;
3162	else
3163		iobase = siocniobase;
3164	s = spltty();
3165	siocnopen(&sp, iobase, comdefaultrate);
3166	if (inb(iobase + com_lsr) & LSR_RXRDY)
3167		c = inb(iobase + com_data);
3168	else
3169		c = -1;
3170	siocnclose(&sp, iobase);
3171	splx(s);
3172	return (c);
3173}
3174
3175
3176int
3177siocngetc(dev)
3178	dev_t	dev;
3179{
3180	int	c;
3181	Port_t	iobase;
3182	int	s;
3183	struct siocnstate	sp;
3184
3185	if (minor(dev) == siogdbunit)
3186		iobase = siogdbiobase;
3187	else
3188		iobase = siocniobase;
3189	s = spltty();
3190	siocnopen(&sp, iobase, comdefaultrate);
3191	while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3192		;
3193	c = inb(iobase + com_data);
3194	siocnclose(&sp, iobase);
3195	splx(s);
3196	return (c);
3197}
3198
3199void
3200siocnputc(dev, c)
3201	dev_t	dev;
3202	int	c;
3203{
3204	int	s;
3205	struct siocnstate	sp;
3206	Port_t	iobase;
3207
3208	if (minor(dev) == siogdbunit)
3209		iobase = siogdbiobase;
3210	else
3211		iobase = siocniobase;
3212	s = spltty();
3213	siocnopen(&sp, iobase, comdefaultrate);
3214	siocntxwait(iobase);
3215	outb(iobase + com_data, c);
3216	siocnclose(&sp, iobase);
3217	splx(s);
3218}
3219
3220#ifdef __alpha__
3221int
3222siogdbgetc()
3223{
3224	int	c;
3225	Port_t	iobase;
3226	int	s;
3227	struct siocnstate	sp;
3228
3229	iobase = siogdbiobase;
3230	s = spltty();
3231	siocnopen(&sp, iobase, gdbdefaultrate);
3232	while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3233		;
3234	c = inb(iobase + com_data);
3235	siocnclose(&sp, iobase);
3236	splx(s);
3237	return (c);
3238}
3239
3240void
3241siogdbputc(c)
3242	int	c;
3243{
3244	int	s;
3245	struct siocnstate	sp;
3246
3247	s = spltty();
3248	siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3249	siocntxwait(siogdbiobase);
3250	outb(siogdbiobase + com_data, c);
3251	siocnclose(&sp, siogdbiobase);
3252	splx(s);
3253}
3254#endif
3255
3256DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0);
3257#if NCARD > 0
3258DRIVER_MODULE(sio, pccard, sio_pccard_driver, sio_devclass, 0, 0);
3259#endif
3260#if NPCI > 0
3261DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0);
3262#endif
3263