sio.c revision 54206
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * $FreeBSD: head/sys/dev/sio/sio.c 54206 1999-12-06 17:52:20Z peter $ 3451078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3551078Speter * from: i386/isa sio.c,v 1.234 3651078Speter */ 3751078Speter 3851078Speter#include "opt_comconsole.h" 3951078Speter#include "opt_compat.h" 4051078Speter#include "opt_ddb.h" 4151078Speter#include "opt_sio.h" 4251078Speter#include "sio.h" 4351078Speter 4451078Speter/* 4551078Speter * Serial driver, based on 386BSD-0.1 com driver. 4651078Speter * Mostly rewritten to use pseudo-DMA. 4751078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4851078Speter * COM driver, based on HP dca driver. 4951078Speter * 5051078Speter * Changes for PC-Card integration: 5151078Speter * - Added PC-Card driver table and handlers 5251078Speter */ 5351078Speter#include <sys/param.h> 5451078Speter#include <sys/systm.h> 5551078Speter#include <sys/reboot.h> 5651078Speter#include <sys/malloc.h> 5751078Speter#include <sys/tty.h> 5851078Speter#include <sys/proc.h> 5951078Speter#include <sys/module.h> 6051078Speter#include <sys/conf.h> 6151078Speter#include <sys/dkstat.h> 6251078Speter#include <sys/fcntl.h> 6351078Speter#include <sys/interrupt.h> 6451078Speter#include <sys/kernel.h> 6551078Speter#include <sys/syslog.h> 6651078Speter#include <sys/sysctl.h> 6751078Speter#include <sys/bus.h> 6851078Speter#include <machine/bus.h> 6951078Speter#include <sys/rman.h> 7051078Speter#include <sys/timepps.h> 7151078Speter 7251078Speter#include <isa/isareg.h> 7351078Speter#include <isa/isavar.h> 7451078Speter#include <machine/lock.h> 7551078Speter 7651078Speter#include <machine/clock.h> 7751078Speter#include <machine/ipl.h> 7851078Speter#ifndef SMP 7951078Speter#include <machine/lock.h> 8051078Speter#endif 8151078Speter#include <machine/resource.h> 8251078Speter 8351078Speter#include <isa/sioreg.h> 8451078Speter 8551078Speter#ifdef COM_ESP 8651078Speter#include <isa/ic/esp.h> 8751078Speter#endif 8851078Speter#include <isa/ic/ns16550.h> 8951078Speter 9051078Speter#ifndef __i386__ 9151078Speter#define disable_intr() 9251078Speter#define enable_intr() 9351078Speter#endif 9451078Speter 9551078Speter#ifdef SMP 9651078Speter#define disable_intr() COM_DISABLE_INTR() 9751078Speter#define enable_intr() COM_ENABLE_INTR() 9851078Speter#endif /* SMP */ 9951078Speter 10051078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 10151078Speter 10251078Speter#define CALLOUT_MASK 0x80 10351078Speter#define CONTROL_MASK 0x60 10451078Speter#define CONTROL_INIT_STATE 0x20 10551078Speter#define CONTROL_LOCK_STATE 0x40 10651078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 10751078Speter#define MINOR_MAGIC_MASK (CALLOUT_MASK | CONTROL_MASK) 10851078Speter#define MINOR_TO_UNIT(mynor) ((mynor) & ~MINOR_MAGIC_MASK) 10951078Speter 11051078Speter#ifdef COM_MULTIPORT 11151078Speter/* checks in flags for multiport and which is multiport "master chip" 11251078Speter * for a given card 11351078Speter */ 11451078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 11551078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 11651078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 11751078Speter#endif /* COM_MULTIPORT */ 11851078Speter 11951078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 12051078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 12151078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 12251078Speter#define COM_DEBUGGER(flags) ((flags) & 0x80) 12351078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 12451078Speter#define COM_NOFIFO(flags) ((flags) & 0x02) 12551078Speter#define COM_ST16650A(flags) ((flags) & 0x20000) 12651078Speter#define COM_C_NOPROBE (0x40000) 12751078Speter#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 12851078Speter#define COM_C_IIR_TXRDYBUG (0x80000) 12951078Speter#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 13051078Speter#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 13151078Speter 13251078Speter#define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 13351078Speter 13451078Speter/* 13551078Speter * com state bits. 13651078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 13751078Speter * than the other bits so that they can be tested as a group without masking 13851078Speter * off the low bits. 13951078Speter * 14051078Speter * The following com and tty flags correspond closely: 14151078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 14253344Speter * comstop()) 14351078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 14451078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14551078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14651078Speter * TS_FLUSH is not used. 14751078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 14851078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 14951078Speter */ 15051078Speter#define CS_BUSY 0x80 /* output in progress */ 15151078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 15251078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 15351078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 15451078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15551078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15651078Speter#define CS_ODONE 4 /* output completed */ 15751078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 15851078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 15951078Speter 16051078Speterstatic char const * const error_desc[] = { 16151078Speter#define CE_OVERRUN 0 16251078Speter "silo overflow", 16351078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 16451078Speter "interrupt-level buffer overflow", 16551078Speter#define CE_TTY_BUF_OVERFLOW 2 16651078Speter "tty-level buffer overflow", 16751078Speter}; 16851078Speter 16951078Speter#define CE_NTYPES 3 17051078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 17151078Speter 17251078Speter/* types. XXX - should be elsewhere */ 17351078Spetertypedef u_int Port_t; /* hardware port */ 17451078Spetertypedef u_char bool_t; /* boolean */ 17551078Speter 17651078Speter/* queue of linear buffers */ 17751078Speterstruct lbq { 17851078Speter u_char *l_head; /* next char to process */ 17951078Speter u_char *l_tail; /* one past the last char to process */ 18051078Speter struct lbq *l_next; /* next in queue */ 18151078Speter bool_t l_queued; /* nonzero if queued */ 18251078Speter}; 18351078Speter 18451078Speter/* com device structure */ 18551078Speterstruct com_s { 18651078Speter u_int flags; /* Copy isa device flags */ 18751078Speter u_char state; /* miscellaneous flag bits */ 18851078Speter bool_t active_out; /* nonzero if the callout device is open */ 18951078Speter u_char cfcr_image; /* copy of value written to CFCR */ 19051078Speter#ifdef COM_ESP 19151078Speter bool_t esp; /* is this unit a hayes esp board? */ 19251078Speter#endif 19351078Speter u_char extra_state; /* more flag bits, separate for order trick */ 19451078Speter u_char fifo_image; /* copy of value written to FIFO */ 19551078Speter bool_t hasfifo; /* nonzero for 16550 UARTs */ 19651078Speter bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 19751078Speter bool_t loses_outints; /* nonzero if device loses output interrupts */ 19851078Speter u_char mcr_image; /* copy of value written to MCR */ 19951078Speter#ifdef COM_MULTIPORT 20051078Speter bool_t multiport; /* is this unit part of a multiport device? */ 20151078Speter#endif /* COM_MULTIPORT */ 20251078Speter bool_t no_irq; /* nonzero if irq is not attached */ 20351078Speter bool_t gone; /* hardware disappeared */ 20451078Speter bool_t poll; /* nonzero if polling is required */ 20551078Speter bool_t poll_output; /* nonzero if polling for output is required */ 20651078Speter int unit; /* unit number */ 20751078Speter int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 20851078Speter u_int tx_fifo_size; 20951078Speter u_int wopeners; /* # processes waiting for DCD in open() */ 21051078Speter 21151078Speter /* 21251078Speter * The high level of the driver never reads status registers directly 21351078Speter * because there would be too many side effects to handle conveniently. 21451078Speter * Instead, it reads copies of the registers stored here by the 21551078Speter * interrupt handler. 21651078Speter */ 21751078Speter u_char last_modem_status; /* last MSR read by intr handler */ 21851078Speter u_char prev_modem_status; /* last MSR handled by high level */ 21951078Speter 22051078Speter u_char hotchar; /* ldisc-specific char to be handled ASAP */ 22151078Speter u_char *ibuf; /* start of input buffer */ 22251078Speter u_char *ibufend; /* end of input buffer */ 22351078Speter u_char *ibufold; /* old input buffer, to be freed */ 22451078Speter u_char *ihighwater; /* threshold in input buffer */ 22551078Speter u_char *iptr; /* next free spot in input buffer */ 22651078Speter int ibufsize; /* size of ibuf (not include error bytes) */ 22751078Speter int ierroff; /* offset of error bytes in ibuf */ 22851078Speter 22951078Speter struct lbq obufq; /* head of queue of output buffers */ 23051078Speter struct lbq obufs[2]; /* output buffers */ 23151078Speter 23251078Speter Port_t data_port; /* i/o ports */ 23351078Speter#ifdef COM_ESP 23451078Speter Port_t esp_port; 23551078Speter#endif 23651078Speter Port_t int_id_port; 23751078Speter Port_t iobase; 23851078Speter Port_t modem_ctl_port; 23951078Speter Port_t line_status_port; 24051078Speter Port_t modem_status_port; 24151078Speter Port_t intr_ctl_port; /* Ports of IIR register */ 24251078Speter 24351078Speter struct tty *tp; /* cross reference */ 24451078Speter 24551078Speter /* Initial state. */ 24651078Speter struct termios it_in; /* should be in struct tty */ 24751078Speter struct termios it_out; 24851078Speter 24951078Speter /* Lock state. */ 25051078Speter struct termios lt_in; /* should be in struct tty */ 25151078Speter struct termios lt_out; 25251078Speter 25351078Speter bool_t do_timestamp; 25451078Speter bool_t do_dcd_timestamp; 25551078Speter struct timeval timestamp; 25651078Speter struct timeval dcd_timestamp; 25751078Speter struct pps_state pps; 25851078Speter 25951078Speter u_long bytes_in; /* statistics */ 26051078Speter u_long bytes_out; 26151078Speter u_int delta_error_counts[CE_NTYPES]; 26251078Speter u_long error_counts[CE_NTYPES]; 26351078Speter 26451078Speter struct resource *irqres; 26551078Speter struct resource *ioportres; 26651078Speter 26751078Speter /* 26851078Speter * Data area for output buffers. Someday we should build the output 26951078Speter * buffer queue without copying data. 27051078Speter */ 27151078Speter u_char obuf1[256]; 27251078Speter u_char obuf2[256]; 27351078Speter}; 27451078Speter 27551078Speter#ifdef COM_ESP 27651078Speterstatic int espattach __P((struct com_s *com, Port_t esp_port)); 27751078Speter#endif 27851078Speterstatic int sioattach __P((device_t dev)); 27952471Simpstatic int sio_isa_attach __P((device_t dev)); 28051078Speter 28151078Speterstatic timeout_t siobusycheck; 28251078Speterstatic timeout_t siodtrwakeup; 28351078Speterstatic void comhardclose __P((struct com_s *com)); 28451078Speterstatic void sioinput __P((struct com_s *com)); 28551078Speterstatic void siointr1 __P((struct com_s *com)); 28651078Speterstatic void siointr __P((void *arg)); 28751078Speterstatic int commctl __P((struct com_s *com, int bits, int how)); 28851078Speterstatic int comparam __P((struct tty *tp, struct termios *t)); 28951078Speterstatic swihand_t siopoll; 29051078Speterstatic int sioprobe __P((device_t dev)); 29152471Simpstatic int sio_isa_probe __P((device_t dev)); 29251078Speterstatic void siosettimeout __P((void)); 29351078Speterstatic int siosetwater __P((struct com_s *com, speed_t speed)); 29451078Speterstatic void comstart __P((struct tty *tp)); 29551654Sphkstatic void comstop __P((struct tty *tp, int rw)); 29651078Speterstatic timeout_t comwakeup; 29751078Speterstatic void disc_optim __P((struct tty *tp, struct termios *t, 29851078Speter struct com_s *com)); 29951078Speter 30052471Simp#if NCARD > 0 30152471Simpstatic int sio_pccard_attach __P((device_t dev)); 30252471Simpstatic void sio_pccard_detach __P((device_t dev)); 30352471Simpstatic int sio_pccard_probe __P((device_t dev)); 30452471Simp#endif /* NCARD > 0 */ 30551078Speter 30651078Speterstatic char driver_name[] = "sio"; 30751078Speter 30851078Speter/* table and macro for fast conversion from a unit number to its com struct */ 30951078Speterstatic devclass_t sio_devclass; 31051078Speter#define com_addr(unit) ((struct com_s *) \ 31151078Speter devclass_get_softc(sio_devclass, unit)) 31251078Speter 31352471Simpstatic device_method_t sio_isa_methods[] = { 31451078Speter /* Device interface */ 31552471Simp DEVMETHOD(device_probe, sio_isa_probe), 31652471Simp DEVMETHOD(device_attach, sio_isa_attach), 31751078Speter 31851078Speter { 0, 0 } 31951078Speter}; 32051078Speter 32152471Simpstatic driver_t sio_isa_driver = { 32251078Speter driver_name, 32352471Simp sio_isa_methods, 32451078Speter sizeof(struct com_s), 32551078Speter}; 32651078Speter 32752471Simp#if NCARD > 0 32852471Simpstatic device_method_t sio_pccard_methods[] = { 32952471Simp /* Device interface */ 33052471Simp DEVMETHOD(device_probe, sio_pccard_probe), 33152471Simp DEVMETHOD(device_attach, sio_pccard_attach), 33252471Simp DEVMETHOD(device_detach, sio_pccard_detach), 33352471Simp 33452471Simp { 0, 0 } 33552471Simp}; 33652471Simp 33752471Simpstatic driver_t sio_pccard_driver = { 33852471Simp driver_name, 33952471Simp sio_pccard_methods, 34052471Simp sizeof(struct com_s), 34152471Simp}; 34252471Simp#endif (NCARD > 0) 34352471Simp 34451078Speterstatic d_open_t sioopen; 34551078Speterstatic d_close_t sioclose; 34651078Speterstatic d_read_t sioread; 34751078Speterstatic d_write_t siowrite; 34851078Speterstatic d_ioctl_t sioioctl; 34951078Speter 35051078Speter#define CDEV_MAJOR 28 35151078Speterstatic struct cdevsw sio_cdevsw = { 35251078Speter /* open */ sioopen, 35351078Speter /* close */ sioclose, 35451078Speter /* read */ sioread, 35551078Speter /* write */ siowrite, 35651078Speter /* ioctl */ sioioctl, 35751654Sphk /* poll */ ttypoll, 35851078Speter /* mmap */ nommap, 35951078Speter /* strategy */ nostrategy, 36051078Speter /* name */ driver_name, 36151078Speter /* maj */ CDEV_MAJOR, 36251078Speter /* dump */ nodump, 36351078Speter /* psize */ nopsize, 36451078Speter /* flags */ D_TTY, 36551078Speter /* bmaj */ -1 36651078Speter}; 36751078Speter 36851078Speterint comconsole = -1; 36951078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 37051078Speter#ifdef __alpha__ 37151078Speterstatic volatile speed_t gdbdefaultrate = CONSPEED; 37251078Speter#endif 37351078Speterstatic u_int com_events; /* input chars + weighted output completions */ 37451078Speterstatic Port_t siocniobase; 37551078Speterstatic int siocnunit; 37651078Speterstatic Port_t siogdbiobase; 37751078Speterstatic int siogdbunit = -1; 37851078Speterstatic bool_t sio_registered; 37951078Speterstatic int sio_timeout; 38051078Speterstatic int sio_timeouts_until_log; 38151078Speterstatic struct callout_handle sio_timeout_handle 38251078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 38353344Speterstatic int sio_numunits; 38451078Speter 38551078Speterstatic struct speedtab comspeedtab[] = { 38651078Speter { 0, 0 }, 38751078Speter { 50, COMBRD(50) }, 38851078Speter { 75, COMBRD(75) }, 38951078Speter { 110, COMBRD(110) }, 39051078Speter { 134, COMBRD(134) }, 39151078Speter { 150, COMBRD(150) }, 39251078Speter { 200, COMBRD(200) }, 39351078Speter { 300, COMBRD(300) }, 39451078Speter { 600, COMBRD(600) }, 39551078Speter { 1200, COMBRD(1200) }, 39651078Speter { 1800, COMBRD(1800) }, 39751078Speter { 2400, COMBRD(2400) }, 39851078Speter { 4800, COMBRD(4800) }, 39951078Speter { 9600, COMBRD(9600) }, 40051078Speter { 19200, COMBRD(19200) }, 40151078Speter { 38400, COMBRD(38400) }, 40251078Speter { 57600, COMBRD(57600) }, 40351078Speter { 115200, COMBRD(115200) }, 40451078Speter { -1, -1 } 40551078Speter}; 40651078Speter 40751078Speter#ifdef COM_ESP 40851078Speter/* XXX configure this properly. */ 40951078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 41051078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 41151078Speter#endif 41251078Speter 41351078Speter/* 41451078Speter * handle sysctl read/write requests for console speed 41551078Speter * 41651078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 41751078Speter * also set the initial and lock values for the /dev/ttyXX device 41851078Speter * if there is one associated with the console. Finally, if the /dev/tty 41951078Speter * device has already been open, change the speed on the open running port 42051078Speter * itself. 42151078Speter */ 42251078Speter 42351078Speterstatic int 42451078Spetersysctl_machdep_comdefaultrate SYSCTL_HANDLER_ARGS 42551078Speter{ 42651078Speter int error, s; 42751078Speter speed_t newspeed; 42851078Speter struct com_s *com; 42951078Speter struct tty *tp; 43051078Speter 43151078Speter newspeed = comdefaultrate; 43251078Speter 43351078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 43451078Speter if (error || !req->newptr) 43551078Speter return (error); 43651078Speter 43751078Speter comdefaultrate = newspeed; 43851078Speter 43951078Speter if (comconsole < 0) /* serial console not selected? */ 44051078Speter return (0); 44151078Speter 44251078Speter com = com_addr(comconsole); 44351078Speter if (!com) 44451078Speter return (ENXIO); 44551078Speter 44651078Speter /* 44751078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 44851078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 44951078Speter * speed changes) 45051078Speter */ 45151078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 45251078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 45351078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 45451078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 45551078Speter 45651078Speter /* 45751078Speter * if we're open, change the running rate too 45851078Speter */ 45951078Speter tp = com->tp; 46051078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 46151078Speter tp->t_termios.c_ispeed = 46251078Speter tp->t_termios.c_ospeed = comdefaultrate; 46351078Speter s = spltty(); 46451078Speter error = comparam(tp, &tp->t_termios); 46551078Speter splx(s); 46651078Speter } 46751078Speter return error; 46851078Speter} 46951078Speter 47051078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 47151078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 47251078Speter 47353344Speter#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 47453344Speter#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 47553344Speter 47651078Speter#if NCARD > 0 47752471Simpstatic int 47852471Simpsio_pccard_probe(dev) 47952471Simp device_t dev; 48051078Speter{ 48153344Speter /* Do not probe IRQ - pccardd has not arranged for it yet */ 48253978Simp /* XXX Actually it has been asigned to you, but isn't activated */ 48353978Simp /* XXX until you specifically activate the resource for your use. */ 48453344Speter SET_FLAG(dev, COM_C_NOPROBE); 48553344Speter 48652471Simp return (sioprobe(dev)); 48752471Simp} 48851078Speter 48952471Simpstatic int 49052471Simpsio_pccard_attach(dev) 49152471Simp device_t dev; 49252471Simp{ 49352471Simp return (sioattach(dev)); 49451078Speter} 49551078Speter 49651078Speter/* 49752471Simp * sio_detach - unload the driver and clear the table. 49851078Speter * XXX TODO: 49951078Speter * This is usually called when the card is ejected, but 50051078Speter * can be caused by a modunload of a controller driver. 50151078Speter * The idea is to reset the driver's view of the device 50251078Speter * and ensure that any driver entry points such as 50351078Speter * read and write do not hang. 50451078Speter */ 50553978Simpstatic int 50652471Simpsio_pccard_detach(dev) 50752471Simp device_t dev; 50851078Speter{ 50951078Speter struct com_s *com; 51051078Speter 51152471Simp com = (struct com_s *) device_get_softc(dev); 51251078Speter if (!com) { 51352471Simp device_printf(dev, "NULL com in siounload\n"); 51451078Speter return; 51551078Speter } 51651078Speter if (!com->iobase) { 51752471Simp device_printf(dev, "already unloaded!\n"); 51851078Speter return; 51951078Speter } 52051078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 52151078Speter com->gone = 1; 52252471Simp device_printf(dev, "unload\n"); 52351078Speter com->tp->t_gen++; 52451078Speter ttyclose(com->tp); 52551078Speter ttwakeup(com->tp); 52651078Speter ttwwakeup(com->tp); 52751078Speter } else { 52851078Speter if (com->ibuf != NULL) 52951078Speter free(com->ibuf, M_DEVBUF); 53051078Speter free(com, M_DEVBUF); 53152471Simp device_printf(dev, "unload,gone\n"); 53251078Speter } 53353978Simp return (0); 53451078Speter} 53551078Speter#endif /* NCARD > 0 */ 53651078Speter 53751078Speter 53851078Speterstatic struct isa_pnp_id sio_ids[] = { 53951078Speter {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 54051078Speter {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 54151078Speter {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 54251078Speter {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 54351078Speter {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 54452125Ssteve {0x01017256, NULL}, /* USR0101 */ 54551918Sdeischen {0x30207256, NULL}, /* USR2030 */ 54651918Sdeischen {0x31307256, NULL}, /* USR3031 */ 54751918Sdeischen {0x8020b04e, NULL}, /* SUP2080 */ 54851918Sdeischen {0x8024b04e, NULL}, /* SUP2480 */ 54951078Speter {0} 55051078Speter}; 55151078Speter 55251078Speterstatic int 55352471Simpsio_isa_probe(dev) 55452471Simp device_t dev; 55552471Simp{ 55652471Simp /* Check isapnp ids */ 55752471Simp if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 55852471Simp return (ENXIO); 55952471Simp return (sioprobe(dev)); 56052471Simp} 56152471Simp 56252471Simpstatic int 56351078Spetersioprobe(dev) 56451078Speter device_t dev; 56551078Speter{ 56653344Speter#if 0 56751078Speter static bool_t already_init; 56853344Speter device_t xdev; 56953344Speter#endif 57051078Speter bool_t failures[10]; 57151078Speter int fn; 57251078Speter device_t idev; 57351078Speter Port_t iobase; 57451078Speter intrmask_t irqmap[4]; 57551078Speter intrmask_t irqs; 57651078Speter u_char mcr_image; 57751078Speter int result; 57854206Speter u_long xirq; 57951088Speter u_int flags = device_get_flags(dev); 58051078Speter int rid; 58151078Speter struct resource *port; 58251078Speter 58351078Speter rid = 0; 58451078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 58551078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 58651078Speter if (!port) 58751078Speter return ENXIO; 58851078Speter 58953344Speter#if 0 59053344Speter /* 59153344Speter * XXX this is broken - when we are first called, there are no 59253344Speter * previously configured IO ports. We could hard code 59353344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 59453344Speter * This code has been doing nothing since the conversion since 59553344Speter * "count" is zero the first time around. 59653344Speter */ 59751078Speter if (!already_init) { 59851078Speter /* 59951078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 60051078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 60151078Speter * from any used port that shares the interrupt vector. 60251078Speter * XXX the gate enable is elsewhere for some multiports. 60351078Speter */ 60451078Speter device_t *devs; 60553344Speter int count, i, xioport; 60651078Speter 60751078Speter devclass_get_devices(sio_devclass, &devs, &count); 60851078Speter for (i = 0; i < count; i++) { 60951078Speter xdev = devs[i]; 61054194Speter if (device_is_enabled(xdev) && 61154194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 61254194Speter NULL) == 0) 61353344Speter outb(xioport + com_mcr, 0); 61451078Speter } 61551078Speter free(devs, M_TEMP); 61651078Speter already_init = TRUE; 61751078Speter } 61853344Speter#endif 61951078Speter 62051078Speter if (COM_LLCONSOLE(flags)) { 62151078Speter printf("sio%d: reserved for low-level i/o\n", 62251078Speter device_get_unit(dev)); 62351078Speter return (ENXIO); 62451078Speter } 62551078Speter 62651078Speter /* 62751078Speter * If the device is on a multiport card and has an AST/4 62851078Speter * compatible interrupt control register, initialize this 62951078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 63051078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 63151078Speter * Point idev to the device struct giving the correct id_irq. 63251078Speter * This is the struct for the master device if there is one. 63351078Speter */ 63451078Speter idev = dev; 63551078Speter mcr_image = MCR_IENABLE; 63651078Speter#ifdef COM_MULTIPORT 63753344Speter if (COM_ISMULTIPORT(flags) && !COM_NOTAST4(flags)) { 63854206Speter Port_t xiobase; 63954206Speter u_long io; 64054206Speter 64151078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 64251078Speter if (idev == NULL) { 64351078Speter printf("sio%d: master device %d not configured\n", 64451078Speter device_get_unit(dev), COM_MPMASTER(flags)); 64551078Speter idev = dev; 64651078Speter } 64754206Speter if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, NULL) == 0) { 64854206Speter xiobase = io; 64954194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL)) 65054194Speter outb(xiobase + com_scr, 0x80); /* no irq */ 65154194Speter else 65254194Speter outb(xiobase + com_scr, 0); 65351078Speter } 65453344Speter mcr_image = 0; 65551078Speter } 65651078Speter#endif /* COM_MULTIPORT */ 65754194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 65851078Speter mcr_image = 0; 65951078Speter 66051078Speter bzero(failures, sizeof failures); 66151078Speter iobase = rman_get_start(port); 66251078Speter 66351078Speter /* 66451078Speter * We don't want to get actual interrupts, just masked ones. 66551078Speter * Interrupts from this line should already be masked in the ICU, 66651078Speter * but mask them in the processor as well in case there are some 66751078Speter * (misconfigured) shared interrupts. 66851078Speter */ 66951078Speter disable_intr(); 67051078Speter/* EXTRA DELAY? */ 67151078Speter 67251078Speter /* 67351078Speter * Initialize the speed and the word size and wait long enough to 67451078Speter * drain the maximum of 16 bytes of junk in device output queues. 67551078Speter * The speed is undefined after a master reset and must be set 67651078Speter * before relying on anything related to output. There may be 67751078Speter * junk after a (very fast) soft reboot and (apparently) after 67851078Speter * master reset. 67951078Speter * XXX what about the UART bug avoided by waiting in comparam()? 68051078Speter * We don't want to to wait long enough to drain at 2 bps. 68151078Speter */ 68251078Speter if (iobase == siocniobase) 68351078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 68451078Speter else { 68551078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 68651078Speter outb(iobase + com_dlbl, COMBRD(SIO_TEST_SPEED) & 0xff); 68751078Speter outb(iobase + com_dlbh, (u_int) COMBRD(SIO_TEST_SPEED) >> 8); 68851078Speter outb(iobase + com_cfcr, CFCR_8BITS); 68951078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 69051078Speter } 69151078Speter 69251078Speter /* 69351078Speter * Enable the interrupt gate and disable device interupts. This 69451078Speter * should leave the device driving the interrupt line low and 69551078Speter * guarantee an edge trigger if an interrupt can be generated. 69651078Speter */ 69751078Speter/* EXTRA DELAY? */ 69851078Speter outb(iobase + com_mcr, mcr_image); 69951078Speter outb(iobase + com_ier, 0); 70051078Speter DELAY(1000); /* XXX */ 70151078Speter irqmap[0] = isa_irq_pending(); 70251078Speter 70351078Speter /* 70451078Speter * Attempt to set loopback mode so that we can send a null byte 70551078Speter * without annoying any external device. 70651078Speter */ 70751078Speter/* EXTRA DELAY? */ 70851078Speter outb(iobase + com_mcr, mcr_image | MCR_LOOPBACK); 70951078Speter 71051078Speter /* 71151078Speter * Attempt to generate an output interrupt. On 8250's, setting 71251078Speter * IER_ETXRDY generates an interrupt independent of the current 71351078Speter * setting and independent of whether the THR is empty. On 16450's, 71451078Speter * setting IER_ETXRDY generates an interrupt independent of the 71551078Speter * current setting. On 16550A's, setting IER_ETXRDY only 71651078Speter * generates an interrupt when IER_ETXRDY is not already set. 71751078Speter */ 71851078Speter outb(iobase + com_ier, IER_ETXRDY); 71951078Speter 72051078Speter /* 72151078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 72251078Speter * an interrupt. They'd better generate one for actually doing 72351078Speter * output. Loopback may be broken on the same incompatibles but 72451078Speter * it's unlikely to do more than allow the null byte out. 72551078Speter */ 72651078Speter outb(iobase + com_data, 0); 72751078Speter DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 72851078Speter 72951078Speter /* 73051078Speter * Turn off loopback mode so that the interrupt gate works again 73151078Speter * (MCR_IENABLE was hidden). This should leave the device driving 73251078Speter * an interrupt line high. It doesn't matter if the interrupt 73351078Speter * line oscillates while we are not looking at it, since interrupts 73451078Speter * are disabled. 73551078Speter */ 73651078Speter/* EXTRA DELAY? */ 73751078Speter outb(iobase + com_mcr, mcr_image); 73851078Speter 73951078Speter /* 74052471Simp * Some pcmcia cards have the "TXRDY bug", so we check everyone 74151078Speter * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 74251078Speter */ 74353370Speter if (COM_NOPROBE(flags)) { 74453370Speter /* Reading IIR register twice */ 74553370Speter for (fn = 0; fn < 2; fn ++) { 74653370Speter DELAY(10000); 74753370Speter failures[6] = inb(iobase + com_iir); 74853370Speter } 74953370Speter /* Check IIR_TXRDY clear ? */ 75053370Speter result = 0; 75153370Speter if (failures[6] & IIR_TXRDY) { 75253370Speter /* Nop, Double check with clearing IER */ 75353370Speter outb(iobase + com_ier, 0); 75453370Speter if (inb(iobase + com_iir) & IIR_NOPEND) { 75553370Speter /* Ok. we're familia this gang */ 75653370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 75753370Speter } else { 75853370Speter /* Unknown, Just omit this chip.. XXX */ 75953370Speter result = ENXIO; 76053370Speter } 76151078Speter } else { 76253370Speter /* OK. this is well-known guys */ 76353370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 76451078Speter } 76553344Speter outb(iobase + com_cfcr, CFCR_8BITS); 76653344Speter enable_intr(); 76753344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 76853344Speter return (iobase == siocniobase ? 0 : result); 76953344Speter } 77053344Speter 77151078Speter /* 77251078Speter * Check that 77351078Speter * o the CFCR, IER and MCR in UART hold the values written to them 77451078Speter * (the values happen to be all distinct - this is good for 77551078Speter * avoiding false positive tests from bus echoes). 77651078Speter * o an output interrupt is generated and its vector is correct. 77751078Speter * o the interrupt goes away when the IIR in the UART is read. 77851078Speter */ 77951078Speter/* EXTRA DELAY? */ 78051078Speter failures[0] = inb(iobase + com_cfcr) - CFCR_8BITS; 78151078Speter failures[1] = inb(iobase + com_ier) - IER_ETXRDY; 78251078Speter failures[2] = inb(iobase + com_mcr) - mcr_image; 78351078Speter DELAY(10000); /* Some internal modems need this time */ 78451078Speter irqmap[1] = isa_irq_pending(); 78551078Speter failures[4] = (inb(iobase + com_iir) & IIR_IMASK) - IIR_TXRDY; 78651078Speter DELAY(1000); /* XXX */ 78751078Speter irqmap[2] = isa_irq_pending(); 78851078Speter failures[6] = (inb(iobase + com_iir) & IIR_IMASK) - IIR_NOPEND; 78951078Speter 79051078Speter /* 79151078Speter * Turn off all device interrupts and check that they go off properly. 79251078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 79351078Speter * the OUT2 output of the UART to 79451078Speter * the ICU input. Closing the gate would give a floating ICU input 79551078Speter * (unless there is another device driving it) and spurious interrupts. 79651078Speter * (On the system that this was first tested on, the input floats high 79751078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 79851078Speter */ 79951078Speter outb(iobase + com_ier, 0); 80051078Speter outb(iobase + com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 80151078Speter failures[7] = inb(iobase + com_ier); 80251078Speter DELAY(1000); /* XXX */ 80351078Speter irqmap[3] = isa_irq_pending(); 80451078Speter failures[9] = (inb(iobase + com_iir) & IIR_IMASK) - IIR_NOPEND; 80551078Speter 80651078Speter enable_intr(); 80751078Speter 80851078Speter irqs = irqmap[1] & ~irqmap[0]; 80954194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 81054194Speter ((1 << xirq) & irqs) == 0) 81151078Speter printf( 81254206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 81353344Speter device_get_unit(dev), xirq, irqs); 81451078Speter if (bootverbose) 81551078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 81651078Speter device_get_unit(dev), 81751078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 81851078Speter 81951078Speter result = 0; 82051078Speter for (fn = 0; fn < sizeof failures; ++fn) 82151078Speter if (failures[fn]) { 82251078Speter outb(iobase + com_mcr, 0); 82351078Speter result = ENXIO; 82451078Speter if (bootverbose) { 82551078Speter printf("sio%d: probe failed test(s):", 82651078Speter device_get_unit(dev)); 82751078Speter for (fn = 0; fn < sizeof failures; ++fn) 82851078Speter if (failures[fn]) 82951078Speter printf(" %d", fn); 83051078Speter printf("\n"); 83151078Speter } 83251078Speter break; 83351078Speter } 83451078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 83551078Speter return (iobase == siocniobase ? 0 : result); 83651078Speter} 83751078Speter 83851078Speter#ifdef COM_ESP 83951078Speterstatic int 84051078Speterespattach(com, esp_port) 84151078Speter struct com_s *com; 84251078Speter Port_t esp_port; 84351078Speter{ 84451078Speter u_char dips; 84551078Speter u_char val; 84651078Speter 84751078Speter /* 84851078Speter * Check the ESP-specific I/O port to see if we're an ESP 84951078Speter * card. If not, return failure immediately. 85051078Speter */ 85151078Speter if ((inb(esp_port) & 0xf3) == 0) { 85251078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 85351078Speter return (0); 85451078Speter } 85551078Speter 85651078Speter /* 85751078Speter * We've got something that claims to be a Hayes ESP card. 85851078Speter * Let's hope so. 85951078Speter */ 86051078Speter 86151078Speter /* Get the dip-switch configuration */ 86251078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 86351078Speter dips = inb(esp_port + ESP_STATUS1); 86451078Speter 86551078Speter /* 86651078Speter * Bits 0,1 of dips say which COM port we are. 86751078Speter */ 86851078Speter if (com->iobase == likely_com_ports[dips & 0x03]) 86951078Speter printf(" : ESP"); 87051078Speter else { 87151078Speter printf(" esp_port has com %d\n", dips & 0x03); 87251078Speter return (0); 87351078Speter } 87451078Speter 87551078Speter /* 87651078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 87751078Speter */ 87851078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 87951078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 88051078Speter val = inb(esp_port + ESP_STATUS2); 88151078Speter if ((val & 0x70) < 0x20) { 88251078Speter printf("-old (%o)", val & 0x70); 88351078Speter return (0); 88451078Speter } 88551078Speter 88651078Speter /* 88751078Speter * Check for ability to emulate 16550: bit 7 == 1 88851078Speter */ 88951078Speter if ((dips & 0x80) == 0) { 89051078Speter printf(" slave"); 89151078Speter return (0); 89251078Speter } 89351078Speter 89451078Speter /* 89551078Speter * Okay, we seem to be a Hayes ESP card. Whee. 89651078Speter */ 89751078Speter com->esp = TRUE; 89851078Speter com->esp_port = esp_port; 89951078Speter return (1); 90051078Speter} 90151078Speter#endif /* COM_ESP */ 90251078Speter 90351078Speterstatic int 90452471Simpsio_isa_attach(dev) 90552471Simp device_t dev; 90652471Simp{ 90752471Simp return (sioattach(dev)); 90852471Simp} 90952471Simp 91052471Simpstatic int 91151078Spetersioattach(dev) 91251078Speter device_t dev; 91351078Speter{ 91451078Speter struct com_s *com; 91551078Speter#ifdef COM_ESP 91651078Speter Port_t *espp; 91751078Speter#endif 91851078Speter Port_t iobase; 91951078Speter int unit; 92051078Speter void *ih; 92153344Speter u_int flags; 92251078Speter int rid; 92351078Speter struct resource *port; 92453344Speter int ret; 92551078Speter 92651078Speter rid = 0; 92751078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 92851078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 92951078Speter if (!port) 93051078Speter return ENXIO; 93151078Speter 93251078Speter iobase = rman_get_start(port); 93351078Speter unit = device_get_unit(dev); 93451078Speter com = device_get_softc(dev); 93553344Speter flags = device_get_flags(dev); 93651078Speter 93753344Speter if (unit >= sio_numunits) 93853344Speter sio_numunits = unit + 1; 93951078Speter /* 94051078Speter * sioprobe() has initialized the device registers as follows: 94151078Speter * o cfcr = CFCR_8BITS. 94251078Speter * It is most important that CFCR_DLAB is off, so that the 94351078Speter * data port is not hidden when we enable interrupts. 94451078Speter * o ier = 0. 94551078Speter * Interrupts are only enabled when the line is open. 94651078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 94751078Speter * interrupt control register or the config specifies no irq. 94851078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 94951078Speter * device from sending before we are ready. 95051078Speter */ 95151078Speter bzero(com, sizeof *com); 95251078Speter com->unit = unit; 95351078Speter com->ioportres = port; 95451078Speter com->cfcr_image = CFCR_8BITS; 95551078Speter com->dtr_wait = 3 * hz; 95651078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 95754194Speter com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL); 95851078Speter com->tx_fifo_size = 1; 95951078Speter com->obufs[0].l_head = com->obuf1; 96051078Speter com->obufs[1].l_head = com->obuf2; 96151078Speter 96251078Speter com->iobase = iobase; 96351078Speter com->data_port = iobase + com_data; 96451078Speter com->int_id_port = iobase + com_iir; 96551078Speter com->modem_ctl_port = iobase + com_mcr; 96651078Speter com->mcr_image = inb(com->modem_ctl_port); 96751078Speter com->line_status_port = iobase + com_lsr; 96851078Speter com->modem_status_port = iobase + com_msr; 96951078Speter com->intr_ctl_port = iobase + com_ier; 97051078Speter 97151078Speter /* 97251078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 97351078Speter * are only relevant for logins. It's important to have echo off 97451078Speter * initially so that the line doesn't start blathering before the 97551078Speter * echo flag can be turned off. 97651078Speter */ 97751078Speter com->it_in.c_iflag = 0; 97851078Speter com->it_in.c_oflag = 0; 97951078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 98051078Speter com->it_in.c_lflag = 0; 98151078Speter if (unit == comconsole) { 98251078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 98351078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 98451078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 98551078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 98651078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 98751078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 98851078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 98951078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 99051078Speter } else 99151078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 99251078Speter if (siosetwater(com, com->it_in.c_ispeed) != 0) { 99351078Speter enable_intr(); 99451078Speter free(com, M_DEVBUF); 99551078Speter return (0); 99651078Speter } 99751078Speter enable_intr(); 99851078Speter termioschars(&com->it_in); 99951078Speter com->it_out = com->it_in; 100051078Speter 100151078Speter /* attempt to determine UART type */ 100251078Speter printf("sio%d: type", unit); 100351078Speter 100451078Speter 100551078Speter#ifdef COM_MULTIPORT 100651078Speter if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 100751078Speter#else 100851078Speter if (!COM_IIR_TXRDYBUG(flags)) 100951078Speter#endif 101051078Speter { 101151078Speter u_char scr; 101251078Speter u_char scr1; 101351078Speter u_char scr2; 101451078Speter 101551078Speter scr = inb(iobase + com_scr); 101651078Speter outb(iobase + com_scr, 0xa5); 101751078Speter scr1 = inb(iobase + com_scr); 101851078Speter outb(iobase + com_scr, 0x5a); 101951078Speter scr2 = inb(iobase + com_scr); 102051078Speter outb(iobase + com_scr, scr); 102151078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 102251078Speter printf(" 8250"); 102351078Speter goto determined_type; 102451078Speter } 102551078Speter } 102651078Speter outb(iobase + com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 102751078Speter DELAY(100); 102851078Speter com->st16650a = 0; 102951078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 103051078Speter case FIFO_RX_LOW: 103151078Speter printf(" 16450"); 103251078Speter break; 103351078Speter case FIFO_RX_MEDL: 103451078Speter printf(" 16450?"); 103551078Speter break; 103651078Speter case FIFO_RX_MEDH: 103751078Speter printf(" 16550?"); 103851078Speter break; 103951078Speter case FIFO_RX_HIGH: 104051078Speter if (COM_NOFIFO(flags)) { 104151078Speter printf(" 16550A fifo disabled"); 104251078Speter } else { 104351078Speter com->hasfifo = TRUE; 104451078Speter if (COM_ST16650A(flags)) { 104551078Speter com->st16650a = 1; 104651078Speter com->tx_fifo_size = 32; 104751078Speter printf(" ST16650A"); 104851078Speter } else { 104951078Speter com->tx_fifo_size = COM_FIFOSIZE(flags); 105051078Speter printf(" 16550A"); 105151078Speter } 105251078Speter } 105351078Speter#ifdef COM_ESP 105451078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 105551078Speter if (espattach(com, *espp)) { 105651078Speter com->tx_fifo_size = 1024; 105751078Speter break; 105851078Speter } 105951078Speter#endif 106051078Speter if (!com->st16650a) { 106151078Speter if (!com->tx_fifo_size) 106251078Speter com->tx_fifo_size = 16; 106351078Speter else 106451078Speter printf(" lookalike with %d bytes FIFO", 106551078Speter com->tx_fifo_size); 106651078Speter } 106751078Speter 106851078Speter break; 106951078Speter } 107051078Speter 107151078Speter#ifdef COM_ESP 107251078Speter if (com->esp) { 107351078Speter /* 107451078Speter * Set 16550 compatibility mode. 107551078Speter * We don't use the ESP_MODE_SCALE bit to increase the 107651078Speter * fifo trigger levels because we can't handle large 107751078Speter * bursts of input. 107851078Speter * XXX flow control should be set in comparam(), not here. 107951078Speter */ 108051078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 108151078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 108251078Speter 108351078Speter /* Set RTS/CTS flow control. */ 108451078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 108551078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 108651078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 108751078Speter 108851078Speter /* Set flow-control levels. */ 108951078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 109051078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 109151078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 109251078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 109351078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 109451078Speter } 109551078Speter#endif /* COM_ESP */ 109651078Speter outb(iobase + com_fifo, 0); 109751078Speterdetermined_type: ; 109851078Speter 109951078Speter#ifdef COM_MULTIPORT 110051078Speter if (COM_ISMULTIPORT(flags)) { 110153344Speter device_t masterdev; 110253344Speter 110351078Speter com->multiport = TRUE; 110451078Speter printf(" (multiport"); 110551078Speter if (unit == COM_MPMASTER(flags)) 110651078Speter printf(" master"); 110751078Speter printf(")"); 110853344Speter masterdev = devclass_get_device(sio_devclass, 110953344Speter COM_MPMASTER(flags)); 111054194Speter com->no_irq = bus_get_resource(masterdev, SYS_RES_IRQ, 0, NULL, 111154194Speter NULL); 111251078Speter } 111351078Speter#endif /* COM_MULTIPORT */ 111451078Speter if (unit == comconsole) 111551078Speter printf(", console"); 111653344Speter if (COM_IIR_TXRDYBUG(flags)) 111751078Speter printf(" with a bogus IIR_TXRDY register"); 111851078Speter printf("\n"); 111951078Speter 112051078Speter if (!sio_registered) { 112151078Speter register_swi(SWI_TTY, siopoll); 112251078Speter sio_registered = TRUE; 112351078Speter } 112451078Speter make_dev(&sio_cdevsw, unit, 112551078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 112651078Speter make_dev(&sio_cdevsw, unit | CONTROL_INIT_STATE, 112751078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 112851078Speter make_dev(&sio_cdevsw, unit | CONTROL_LOCK_STATE, 112951078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 113051078Speter make_dev(&sio_cdevsw, unit | CALLOUT_MASK, 113151078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 113251078Speter make_dev(&sio_cdevsw, unit | CALLOUT_MASK | CONTROL_INIT_STATE, 113351078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 113451078Speter make_dev(&sio_cdevsw, unit | CALLOUT_MASK | CONTROL_LOCK_STATE, 113551078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 113651078Speter com->flags = flags; 113751078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 113851078Speter pps_init(&com->pps); 113951078Speter 114051078Speter rid = 0; 114151078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 114253344Speter RF_ACTIVE); 114353344Speter if (com->irqres) { 114453344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 114554194Speter INTR_TYPE_TTY | INTR_TYPE_FAST, 114654194Speter siointr, com, &ih); 114754194Speter if (ret) { 114854194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 114954194Speter com->irqres, INTR_TYPE_TTY, 115054194Speter siointr, com, &ih); 115154194Speter if (ret == 0) 115254194Speter device_printf(dev, "unable to activate interrupt in fast mode - using normal mode"); 115354194Speter } 115453344Speter if (ret) 115553344Speter device_printf(dev, "could not activate interrupt\n"); 115653344Speter } 115751078Speter 115851078Speter return (0); 115951078Speter} 116051078Speter 116151078Speterstatic int 116251078Spetersioopen(dev, flag, mode, p) 116351078Speter dev_t dev; 116451078Speter int flag; 116551078Speter int mode; 116651078Speter struct proc *p; 116751078Speter{ 116851078Speter struct com_s *com; 116951078Speter int error; 117051078Speter Port_t iobase; 117151078Speter int mynor; 117251078Speter int s; 117351078Speter struct tty *tp; 117451078Speter int unit; 117551078Speter 117651078Speter mynor = minor(dev); 117751078Speter unit = MINOR_TO_UNIT(mynor); 117853344Speter com = com_addr(unit); 117953344Speter if (com == NULL) 118051078Speter return (ENXIO); 118151078Speter if (com->gone) 118251078Speter return (ENXIO); 118351078Speter if (mynor & CONTROL_MASK) 118451078Speter return (0); 118551078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 118651078Speter s = spltty(); 118751078Speter /* 118851078Speter * We jump to this label after all non-interrupted sleeps to pick 118951078Speter * up any changes of the device state. 119051078Speter */ 119151078Speteropen_top: 119251078Speter while (com->state & CS_DTR_OFF) { 119351078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 119451078Speter if (com_addr(unit) == NULL) 119551078Speter return (ENXIO); 119651078Speter if (error != 0 || com->gone) 119751078Speter goto out; 119851078Speter } 119951078Speter if (tp->t_state & TS_ISOPEN) { 120051078Speter /* 120151078Speter * The device is open, so everything has been initialized. 120251078Speter * Handle conflicts. 120351078Speter */ 120451078Speter if (mynor & CALLOUT_MASK) { 120551078Speter if (!com->active_out) { 120651078Speter error = EBUSY; 120751078Speter goto out; 120851078Speter } 120951078Speter } else { 121051078Speter if (com->active_out) { 121151078Speter if (flag & O_NONBLOCK) { 121251078Speter error = EBUSY; 121351078Speter goto out; 121451078Speter } 121551078Speter error = tsleep(&com->active_out, 121651078Speter TTIPRI | PCATCH, "siobi", 0); 121751078Speter if (com_addr(unit) == NULL) 121851078Speter return (ENXIO); 121951078Speter if (error != 0 || com->gone) 122051078Speter goto out; 122151078Speter goto open_top; 122251078Speter } 122351078Speter } 122451078Speter if (tp->t_state & TS_XCLUDE && 122551078Speter suser(p)) { 122651078Speter error = EBUSY; 122751078Speter goto out; 122851078Speter } 122951078Speter } else { 123051078Speter /* 123151078Speter * The device isn't open, so there are no conflicts. 123251078Speter * Initialize it. Initialization is done twice in many 123351078Speter * cases: to preempt sleeping callin opens if we are 123451078Speter * callout, and to complete a callin open after DCD rises. 123551078Speter */ 123651078Speter tp->t_oproc = comstart; 123751078Speter tp->t_param = comparam; 123851654Sphk tp->t_stop = comstop; 123951078Speter tp->t_dev = dev; 124051078Speter tp->t_termios = mynor & CALLOUT_MASK 124151078Speter ? com->it_out : com->it_in; 124251078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 124351078Speter com->poll = com->no_irq; 124451078Speter com->poll_output = com->loses_outints; 124551078Speter ++com->wopeners; 124651078Speter error = comparam(tp, &tp->t_termios); 124751078Speter --com->wopeners; 124851078Speter if (error != 0) 124951078Speter goto out; 125051078Speter /* 125151078Speter * XXX we should goto open_top if comparam() slept. 125251078Speter */ 125351078Speter iobase = com->iobase; 125451078Speter if (com->hasfifo) { 125551078Speter /* 125651078Speter * (Re)enable and drain fifos. 125751078Speter * 125851078Speter * Certain SMC chips cause problems if the fifos 125951078Speter * are enabled while input is ready. Turn off the 126051078Speter * fifo if necessary to clear the input. We test 126151078Speter * the input ready bit after enabling the fifos 126251078Speter * since we've already enabled them in comparam() 126351078Speter * and to handle races between enabling and fresh 126451078Speter * input. 126551078Speter */ 126651078Speter while (TRUE) { 126751078Speter outb(iobase + com_fifo, 126851078Speter FIFO_RCV_RST | FIFO_XMT_RST 126951078Speter | com->fifo_image); 127051078Speter /* 127151078Speter * XXX the delays are for superstitious 127251078Speter * historical reasons. It must be less than 127351078Speter * the character time at the maximum 127451078Speter * supported speed (87 usec at 115200 bps 127551078Speter * 8N1). Otherwise we might loop endlessly 127651078Speter * if data is streaming in. We used to use 127751078Speter * delays of 100. That usually worked 127851078Speter * because DELAY(100) used to usually delay 127951078Speter * for about 85 usec instead of 100. 128051078Speter */ 128151078Speter DELAY(50); 128251078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 128351078Speter break; 128451078Speter outb(iobase + com_fifo, 0); 128551078Speter DELAY(50); 128651078Speter (void) inb(com->data_port); 128751078Speter } 128851078Speter } 128951078Speter 129051078Speter disable_intr(); 129151078Speter (void) inb(com->line_status_port); 129251078Speter (void) inb(com->data_port); 129351078Speter com->prev_modem_status = com->last_modem_status 129451078Speter = inb(com->modem_status_port); 129551078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 129651078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 129751078Speter | IER_EMSC); 129851078Speter } else { 129951078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 130051078Speter | IER_ERLS | IER_EMSC); 130151078Speter } 130251078Speter enable_intr(); 130351078Speter /* 130451078Speter * Handle initial DCD. Callout devices get a fake initial 130551078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 130651078Speter * callin opens get woken up and resume sleeping on "siobi" 130751078Speter * instead of "siodcd". 130851078Speter */ 130951078Speter /* 131051078Speter * XXX `mynor & CALLOUT_MASK' should be 131151078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 131251078Speter * TRAPDOOR_CARRIER is the default initial state for callout 131351078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 131451078Speter * the true carrier. 131551078Speter */ 131651078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 131751078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 131851078Speter } 131951078Speter /* 132051078Speter * Wait for DCD if necessary. 132151078Speter */ 132251078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 132351078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 132451078Speter ++com->wopeners; 132551078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 132651078Speter if (com_addr(unit) == NULL) 132751078Speter return (ENXIO); 132851078Speter --com->wopeners; 132951078Speter if (error != 0 || com->gone) 133051078Speter goto out; 133151078Speter goto open_top; 133251078Speter } 133351078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 133451078Speter disc_optim(tp, &tp->t_termios, com); 133551078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 133651078Speter com->active_out = TRUE; 133751078Speter siosettimeout(); 133851078Speterout: 133951078Speter splx(s); 134051078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 134151078Speter comhardclose(com); 134251078Speter return (error); 134351078Speter} 134451078Speter 134551078Speterstatic int 134651078Spetersioclose(dev, flag, mode, p) 134751078Speter dev_t dev; 134851078Speter int flag; 134951078Speter int mode; 135051078Speter struct proc *p; 135151078Speter{ 135251078Speter struct com_s *com; 135351078Speter int mynor; 135451078Speter int s; 135551078Speter struct tty *tp; 135651078Speter 135751078Speter mynor = minor(dev); 135851078Speter if (mynor & CONTROL_MASK) 135951078Speter return (0); 136051078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 136151078Speter tp = com->tp; 136251078Speter s = spltty(); 136351078Speter (*linesw[tp->t_line].l_close)(tp, flag); 136451078Speter disc_optim(tp, &tp->t_termios, com); 136551654Sphk comstop(tp, FREAD | FWRITE); 136651078Speter comhardclose(com); 136751078Speter ttyclose(tp); 136851078Speter siosettimeout(); 136951078Speter splx(s); 137051078Speter if (com->gone) { 137151078Speter printf("sio%d: gone\n", com->unit); 137251078Speter s = spltty(); 137351078Speter if (com->ibuf != NULL) 137451078Speter free(com->ibuf, M_DEVBUF); 137551078Speter bzero(tp, sizeof *tp); 137651078Speter free(com, M_DEVBUF); 137751078Speter splx(s); 137851078Speter } 137951078Speter return (0); 138051078Speter} 138151078Speter 138251078Speterstatic void 138351078Spetercomhardclose(com) 138451078Speter struct com_s *com; 138551078Speter{ 138651078Speter Port_t iobase; 138751078Speter int s; 138851078Speter struct tty *tp; 138951078Speter int unit; 139051078Speter 139151078Speter unit = com->unit; 139251078Speter iobase = com->iobase; 139351078Speter s = spltty(); 139451078Speter com->poll = FALSE; 139551078Speter com->poll_output = FALSE; 139651078Speter com->do_timestamp = FALSE; 139751078Speter com->do_dcd_timestamp = FALSE; 139851078Speter com->pps.ppsparam.mode = 0; 139951078Speter outb(iobase + com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 140051078Speter { 140151078Speter outb(iobase + com_ier, 0); 140251078Speter tp = com->tp; 140351078Speter if (tp->t_cflag & HUPCL 140451078Speter /* 140551078Speter * XXX we will miss any carrier drop between here and the 140651078Speter * next open. Perhaps we should watch DCD even when the 140751078Speter * port is closed; it is not sufficient to check it at 140851078Speter * the next open because it might go up and down while 140951078Speter * we're not watching. 141051078Speter */ 141151078Speter || (!com->active_out 141251078Speter && !(com->prev_modem_status & MSR_DCD) 141351078Speter && !(com->it_in.c_cflag & CLOCAL)) 141451078Speter || !(tp->t_state & TS_ISOPEN)) { 141551078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 141651078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 141751078Speter timeout(siodtrwakeup, com, com->dtr_wait); 141851078Speter com->state |= CS_DTR_OFF; 141951078Speter } 142051078Speter } 142151078Speter } 142251078Speter if (com->hasfifo) { 142351078Speter /* 142451078Speter * Disable fifos so that they are off after controlled 142551078Speter * reboots. Some BIOSes fail to detect 16550s when the 142651078Speter * fifos are enabled. 142751078Speter */ 142851078Speter outb(iobase + com_fifo, 0); 142951078Speter } 143051078Speter com->active_out = FALSE; 143151078Speter wakeup(&com->active_out); 143251078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 143351078Speter splx(s); 143451078Speter} 143551078Speter 143651078Speterstatic int 143751078Spetersioread(dev, uio, flag) 143851078Speter dev_t dev; 143951078Speter struct uio *uio; 144051078Speter int flag; 144151078Speter{ 144251078Speter int mynor; 144351078Speter struct com_s *com; 144451078Speter 144551078Speter mynor = minor(dev); 144651078Speter if (mynor & CONTROL_MASK) 144751078Speter return (ENODEV); 144851078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 144951078Speter if (com->gone) 145051078Speter return (ENODEV); 145151078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 145251078Speter} 145351078Speter 145451078Speterstatic int 145551078Spetersiowrite(dev, uio, flag) 145651078Speter dev_t dev; 145751078Speter struct uio *uio; 145851078Speter int flag; 145951078Speter{ 146051078Speter int mynor; 146151078Speter struct com_s *com; 146251078Speter int unit; 146351078Speter 146451078Speter mynor = minor(dev); 146551078Speter if (mynor & CONTROL_MASK) 146651078Speter return (ENODEV); 146751078Speter 146851078Speter unit = MINOR_TO_UNIT(mynor); 146951078Speter com = com_addr(unit); 147051078Speter if (com->gone) 147151078Speter return (ENODEV); 147251078Speter /* 147351078Speter * (XXX) We disallow virtual consoles if the physical console is 147451078Speter * a serial port. This is in case there is a display attached that 147551078Speter * is not the console. In that situation we don't need/want the X 147651078Speter * server taking over the console. 147751078Speter */ 147851078Speter if (constty != NULL && unit == comconsole) 147951078Speter constty = NULL; 148051078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 148151078Speter} 148251078Speter 148351078Speterstatic void 148451078Spetersiobusycheck(chan) 148551078Speter void *chan; 148651078Speter{ 148751078Speter struct com_s *com; 148851078Speter int s; 148951078Speter 149051078Speter com = (struct com_s *)chan; 149151078Speter 149251078Speter /* 149351078Speter * Clear TS_BUSY if low-level output is complete. 149451078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 149551078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 149651078Speter * called again. Reading the line status port outside of siointr1() 149751078Speter * is safe because CS_BUSY is clear so there are no output interrupts 149851078Speter * to lose. 149951078Speter */ 150051078Speter s = spltty(); 150151078Speter if (com->state & CS_BUSY) 150251078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 150351078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 150451078Speter == (LSR_TSRE | LSR_TXRDY)) { 150551078Speter com->tp->t_state &= ~TS_BUSY; 150651078Speter ttwwakeup(com->tp); 150751078Speter com->extra_state &= ~CSE_BUSYCHECK; 150851078Speter } else 150951078Speter timeout(siobusycheck, com, hz / 100); 151051078Speter splx(s); 151151078Speter} 151251078Speter 151351078Speterstatic void 151451078Spetersiodtrwakeup(chan) 151551078Speter void *chan; 151651078Speter{ 151751078Speter struct com_s *com; 151851078Speter 151951078Speter com = (struct com_s *)chan; 152051078Speter com->state &= ~CS_DTR_OFF; 152151078Speter wakeup(&com->dtr_wait); 152251078Speter} 152351078Speter 152451078Speterstatic void 152551078Spetersioinput(com) 152651078Speter struct com_s *com; 152751078Speter{ 152851078Speter u_char *buf; 152951078Speter int incc; 153051078Speter u_char line_status; 153151078Speter int recv_data; 153251078Speter struct tty *tp; 153351078Speter 153451078Speter buf = com->ibuf; 153551078Speter tp = com->tp; 153651078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 153751078Speter com_events -= (com->iptr - com->ibuf); 153851078Speter com->iptr = com->ibuf; 153951078Speter return; 154051078Speter } 154151078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 154251078Speter /* 154351078Speter * Avoid the grotesquely inefficient lineswitch routine 154451078Speter * (ttyinput) in "raw" mode. It usually takes about 450 154551078Speter * instructions (that's without canonical processing or echo!). 154651078Speter * slinput is reasonably fast (usually 40 instructions plus 154751078Speter * call overhead). 154851078Speter */ 154951078Speter do { 155051078Speter enable_intr(); 155151078Speter incc = com->iptr - buf; 155251078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 155351078Speter && (com->state & CS_RTS_IFLOW 155451078Speter || tp->t_iflag & IXOFF) 155551078Speter && !(tp->t_state & TS_TBLOCK)) 155651078Speter ttyblock(tp); 155751078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 155851078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 155951078Speter buf += incc; 156051078Speter tk_nin += incc; 156151078Speter tk_rawcc += incc; 156251078Speter tp->t_rawcc += incc; 156351078Speter ttwakeup(tp); 156451078Speter if (tp->t_state & TS_TTSTOP 156551078Speter && (tp->t_iflag & IXANY 156651078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 156751078Speter tp->t_state &= ~TS_TTSTOP; 156851078Speter tp->t_lflag &= ~FLUSHO; 156951078Speter comstart(tp); 157051078Speter } 157151078Speter disable_intr(); 157251078Speter } while (buf < com->iptr); 157351078Speter } else { 157451078Speter do { 157551078Speter enable_intr(); 157651078Speter line_status = buf[com->ierroff]; 157751078Speter recv_data = *buf++; 157851078Speter if (line_status 157951078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 158051078Speter if (line_status & LSR_BI) 158151078Speter recv_data |= TTY_BI; 158251078Speter if (line_status & LSR_FE) 158351078Speter recv_data |= TTY_FE; 158451078Speter if (line_status & LSR_OE) 158551078Speter recv_data |= TTY_OE; 158651078Speter if (line_status & LSR_PE) 158751078Speter recv_data |= TTY_PE; 158851078Speter } 158951078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 159051078Speter disable_intr(); 159151078Speter } while (buf < com->iptr); 159251078Speter } 159351078Speter com_events -= (com->iptr - com->ibuf); 159451078Speter com->iptr = com->ibuf; 159551078Speter 159651078Speter /* 159751078Speter * There is now room for another low-level buffer full of input, 159851078Speter * so enable RTS if it is now disabled and there is room in the 159951078Speter * high-level buffer. 160051078Speter */ 160151078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 160251078Speter !(tp->t_state & TS_TBLOCK)) 160351078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 160451078Speter} 160551078Speter 160651078Spetervoid 160751078Spetersiointr(arg) 160851078Speter void *arg; 160951078Speter{ 161051078Speter#ifndef COM_MULTIPORT 161151078Speter COM_LOCK(); 161251078Speter siointr1((struct com_s *) arg); 161351078Speter COM_UNLOCK(); 161451078Speter#else /* COM_MULTIPORT */ 161551078Speter bool_t possibly_more_intrs; 161651078Speter int unit; 161751078Speter struct com_s *com; 161851078Speter 161951078Speter /* 162051078Speter * Loop until there is no activity on any port. This is necessary 162151078Speter * to get an interrupt edge more than to avoid another interrupt. 162251078Speter * If the IRQ signal is just an OR of the IRQ signals from several 162351078Speter * devices, then the edge from one may be lost because another is 162451078Speter * on. 162551078Speter */ 162651078Speter COM_LOCK(); 162751078Speter do { 162851078Speter possibly_more_intrs = FALSE; 162953344Speter for (unit = 0; unit < sio_numunits; ++unit) { 163051078Speter com = com_addr(unit); 163151078Speter /* 163251078Speter * XXX COM_LOCK(); 163351078Speter * would it work here, or be counter-productive? 163451078Speter */ 163551078Speter if (com != NULL 163651078Speter && !com->gone 163751078Speter && (inb(com->int_id_port) & IIR_IMASK) 163851078Speter != IIR_NOPEND) { 163951078Speter siointr1(com); 164051078Speter possibly_more_intrs = TRUE; 164151078Speter } 164251078Speter /* XXX COM_UNLOCK(); */ 164351078Speter } 164451078Speter } while (possibly_more_intrs); 164551078Speter COM_UNLOCK(); 164651078Speter#endif /* COM_MULTIPORT */ 164751078Speter} 164851078Speter 164951078Speterstatic void 165051078Spetersiointr1(com) 165151078Speter struct com_s *com; 165251078Speter{ 165351078Speter u_char line_status; 165451078Speter u_char modem_status; 165551078Speter u_char *ioptr; 165651078Speter u_char recv_data; 165751078Speter u_char int_ctl; 165851078Speter u_char int_ctl_new; 165951078Speter struct timecounter *tc; 166051078Speter u_int count; 166151078Speter 166251078Speter int_ctl = inb(com->intr_ctl_port); 166351078Speter int_ctl_new = int_ctl; 166451078Speter 166551078Speter while (!com->gone) { 166651078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 166751078Speter modem_status = inb(com->modem_status_port); 166851078Speter if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 166951078Speter tc = timecounter; 167051078Speter count = tc->tc_get_timecount(tc); 167151078Speter pps_event(&com->pps, tc, count, 167251078Speter (modem_status & MSR_DCD) ? 167351078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 167451078Speter } 167551078Speter } 167651078Speter line_status = inb(com->line_status_port); 167751078Speter 167851078Speter /* input event? (check first to help avoid overruns) */ 167951078Speter while (line_status & LSR_RCV_MASK) { 168051078Speter /* break/unnattached error bits or real input? */ 168151078Speter if (!(line_status & LSR_RXRDY)) 168251078Speter recv_data = 0; 168351078Speter else 168451078Speter recv_data = inb(com->data_port); 168551078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 168651078Speter /* 168751078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 168851078Speter * Otherwise, push the work to a higher level 168951078Speter * (to handle PARMRK) if we're bypassing. 169051078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 169151078Speter * 169251078Speter * This makes bypassing work right in the 169351078Speter * usual "raw" case (IGNBRK set, and IGNPAR 169451078Speter * and INPCK clear). 169551078Speter * 169651078Speter * Note: BI together with FE/PE means just BI. 169751078Speter */ 169851078Speter if (line_status & LSR_BI) { 169951078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 170051078Speter if (com->unit == comconsole) { 170151078Speter breakpoint(); 170251078Speter goto cont; 170351078Speter } 170451078Speter#endif 170551078Speter if (com->tp == NULL 170651078Speter || com->tp->t_iflag & IGNBRK) 170751078Speter goto cont; 170851078Speter } else { 170951078Speter if (com->tp == NULL 171051078Speter || com->tp->t_iflag & IGNPAR) 171151078Speter goto cont; 171251078Speter } 171351078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 171451078Speter && (line_status & (LSR_BI | LSR_FE) 171551078Speter || com->tp->t_iflag & INPCK)) 171651078Speter recv_data = 0; 171751078Speter } 171851078Speter ++com->bytes_in; 171951078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 172051078Speter setsofttty(); 172151078Speter ioptr = com->iptr; 172251078Speter if (ioptr >= com->ibufend) 172351078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 172451078Speter else { 172551078Speter if (com->do_timestamp) 172651078Speter microtime(&com->timestamp); 172751078Speter ++com_events; 172851078Speter schedsofttty(); 172951078Speter#if 0 /* for testing input latency vs efficiency */ 173051078Speterif (com->iptr - com->ibuf == 8) 173151078Speter setsofttty(); 173251078Speter#endif 173351078Speter ioptr[0] = recv_data; 173451078Speter ioptr[com->ierroff] = line_status; 173551078Speter com->iptr = ++ioptr; 173651078Speter if (ioptr == com->ihighwater 173751078Speter && com->state & CS_RTS_IFLOW) 173851078Speter outb(com->modem_ctl_port, 173951078Speter com->mcr_image &= ~MCR_RTS); 174051078Speter if (line_status & LSR_OE) 174151078Speter CE_RECORD(com, CE_OVERRUN); 174251078Speter } 174351078Spetercont: 174451078Speter /* 174551078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 174651078Speter * jump from the top of the loop to here 174751078Speter */ 174851078Speter line_status = inb(com->line_status_port) & 0x7F; 174951078Speter } 175051078Speter 175151078Speter /* modem status change? (always check before doing output) */ 175251078Speter modem_status = inb(com->modem_status_port); 175351078Speter if (modem_status != com->last_modem_status) { 175451078Speter if (com->do_dcd_timestamp 175551078Speter && !(com->last_modem_status & MSR_DCD) 175651078Speter && modem_status & MSR_DCD) 175751078Speter microtime(&com->dcd_timestamp); 175851078Speter 175951078Speter /* 176051078Speter * Schedule high level to handle DCD changes. Note 176151078Speter * that we don't use the delta bits anywhere. Some 176251078Speter * UARTs mess them up, and it's easy to remember the 176351078Speter * previous bits and calculate the delta. 176451078Speter */ 176551078Speter com->last_modem_status = modem_status; 176651078Speter if (!(com->state & CS_CHECKMSR)) { 176751078Speter com_events += LOTS_OF_EVENTS; 176851078Speter com->state |= CS_CHECKMSR; 176951078Speter setsofttty(); 177051078Speter } 177151078Speter 177251078Speter /* handle CTS change immediately for crisp flow ctl */ 177351078Speter if (com->state & CS_CTS_OFLOW) { 177451078Speter if (modem_status & MSR_CTS) 177551078Speter com->state |= CS_ODEVREADY; 177651078Speter else 177751078Speter com->state &= ~CS_ODEVREADY; 177851078Speter } 177951078Speter } 178051078Speter 178151078Speter /* output queued and everything ready? */ 178251078Speter if (line_status & LSR_TXRDY 178351078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 178451078Speter ioptr = com->obufq.l_head; 178551078Speter if (com->tx_fifo_size > 1) { 178651078Speter u_int ocount; 178751078Speter 178851078Speter ocount = com->obufq.l_tail - ioptr; 178951078Speter if (ocount > com->tx_fifo_size) 179051078Speter ocount = com->tx_fifo_size; 179151078Speter com->bytes_out += ocount; 179251078Speter do 179351078Speter outb(com->data_port, *ioptr++); 179451078Speter while (--ocount != 0); 179551078Speter } else { 179651078Speter outb(com->data_port, *ioptr++); 179751078Speter ++com->bytes_out; 179851078Speter } 179951078Speter com->obufq.l_head = ioptr; 180051078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 180151078Speter int_ctl_new = int_ctl | IER_ETXRDY; 180251078Speter } 180351078Speter if (ioptr >= com->obufq.l_tail) { 180451078Speter struct lbq *qp; 180551078Speter 180651078Speter qp = com->obufq.l_next; 180751078Speter qp->l_queued = FALSE; 180851078Speter qp = qp->l_next; 180951078Speter if (qp != NULL) { 181051078Speter com->obufq.l_head = qp->l_head; 181151078Speter com->obufq.l_tail = qp->l_tail; 181251078Speter com->obufq.l_next = qp; 181351078Speter } else { 181451078Speter /* output just completed */ 181553344Speter if (COM_IIR_TXRDYBUG(com->flags)) { 181651078Speter int_ctl_new = int_ctl & ~IER_ETXRDY; 181751078Speter } 181851078Speter com->state &= ~CS_BUSY; 181951078Speter } 182051078Speter if (!(com->state & CS_ODONE)) { 182151078Speter com_events += LOTS_OF_EVENTS; 182251078Speter com->state |= CS_ODONE; 182351078Speter setsofttty(); /* handle at high level ASAP */ 182451078Speter } 182551078Speter } 182653344Speter if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 182751078Speter outb(com->intr_ctl_port, int_ctl_new); 182851078Speter } 182951078Speter } 183051078Speter 183151078Speter /* finished? */ 183251078Speter#ifndef COM_MULTIPORT 183351078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 183451078Speter#endif /* COM_MULTIPORT */ 183551078Speter return; 183651078Speter } 183751078Speter} 183851078Speter 183951078Speterstatic int 184051078Spetersioioctl(dev, cmd, data, flag, p) 184151078Speter dev_t dev; 184251078Speter u_long cmd; 184351078Speter caddr_t data; 184451078Speter int flag; 184551078Speter struct proc *p; 184651078Speter{ 184751078Speter struct com_s *com; 184851078Speter int error; 184951078Speter Port_t iobase; 185051078Speter int mynor; 185151078Speter int s; 185251078Speter struct tty *tp; 185351078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 185451078Speter u_long oldcmd; 185551078Speter struct termios term; 185651078Speter#endif 185751078Speter 185851078Speter mynor = minor(dev); 185951078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 186051078Speter if (com->gone) 186151078Speter return (ENODEV); 186251078Speter iobase = com->iobase; 186351078Speter if (mynor & CONTROL_MASK) { 186451078Speter struct termios *ct; 186551078Speter 186651078Speter switch (mynor & CONTROL_MASK) { 186751078Speter case CONTROL_INIT_STATE: 186851078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 186951078Speter break; 187051078Speter case CONTROL_LOCK_STATE: 187151078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 187251078Speter break; 187351078Speter default: 187451078Speter return (ENODEV); /* /dev/nodev */ 187551078Speter } 187651078Speter switch (cmd) { 187751078Speter case TIOCSETA: 187851078Speter error = suser(p); 187951078Speter if (error != 0) 188051078Speter return (error); 188151078Speter *ct = *(struct termios *)data; 188251078Speter return (0); 188351078Speter case TIOCGETA: 188451078Speter *(struct termios *)data = *ct; 188551078Speter return (0); 188651078Speter case TIOCGETD: 188751078Speter *(int *)data = TTYDISC; 188851078Speter return (0); 188951078Speter case TIOCGWINSZ: 189051078Speter bzero(data, sizeof(struct winsize)); 189151078Speter return (0); 189251078Speter default: 189351078Speter return (ENOTTY); 189451078Speter } 189551078Speter } 189651078Speter tp = com->tp; 189751078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 189851078Speter term = tp->t_termios; 189951078Speter oldcmd = cmd; 190051078Speter error = ttsetcompat(tp, &cmd, data, &term); 190151078Speter if (error != 0) 190251078Speter return (error); 190351078Speter if (cmd != oldcmd) 190451078Speter data = (caddr_t)&term; 190551078Speter#endif 190651078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 190751078Speter int cc; 190851078Speter struct termios *dt = (struct termios *)data; 190951078Speter struct termios *lt = mynor & CALLOUT_MASK 191051078Speter ? &com->lt_out : &com->lt_in; 191151078Speter 191251078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 191351078Speter | (dt->c_iflag & ~lt->c_iflag); 191451078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 191551078Speter | (dt->c_oflag & ~lt->c_oflag); 191651078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 191751078Speter | (dt->c_cflag & ~lt->c_cflag); 191851078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 191951078Speter | (dt->c_lflag & ~lt->c_lflag); 192051078Speter for (cc = 0; cc < NCCS; ++cc) 192151078Speter if (lt->c_cc[cc] != 0) 192251078Speter dt->c_cc[cc] = tp->t_cc[cc]; 192351078Speter if (lt->c_ispeed != 0) 192451078Speter dt->c_ispeed = tp->t_ispeed; 192551078Speter if (lt->c_ospeed != 0) 192651078Speter dt->c_ospeed = tp->t_ospeed; 192751078Speter } 192851078Speter error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 192951078Speter if (error != ENOIOCTL) 193051078Speter return (error); 193151078Speter s = spltty(); 193251078Speter error = ttioctl(tp, cmd, data, flag); 193351078Speter disc_optim(tp, &tp->t_termios, com); 193451078Speter if (error != ENOIOCTL) { 193551078Speter splx(s); 193651078Speter return (error); 193751078Speter } 193851078Speter switch (cmd) { 193951078Speter case TIOCSBRK: 194051078Speter outb(iobase + com_cfcr, com->cfcr_image |= CFCR_SBREAK); 194151078Speter break; 194251078Speter case TIOCCBRK: 194351078Speter outb(iobase + com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 194451078Speter break; 194551078Speter case TIOCSDTR: 194651078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 194751078Speter break; 194851078Speter case TIOCCDTR: 194951078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 195051078Speter break; 195151078Speter /* 195251078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 195351078Speter * changes get undone on the next call to comparam(). 195451078Speter */ 195551078Speter case TIOCMSET: 195651078Speter (void)commctl(com, *(int *)data, DMSET); 195751078Speter break; 195851078Speter case TIOCMBIS: 195951078Speter (void)commctl(com, *(int *)data, DMBIS); 196051078Speter break; 196151078Speter case TIOCMBIC: 196251078Speter (void)commctl(com, *(int *)data, DMBIC); 196351078Speter break; 196451078Speter case TIOCMGET: 196551078Speter *(int *)data = commctl(com, 0, DMGET); 196651078Speter break; 196751078Speter case TIOCMSDTRWAIT: 196851078Speter /* must be root since the wait applies to following logins */ 196951078Speter error = suser(p); 197051078Speter if (error != 0) { 197151078Speter splx(s); 197251078Speter return (error); 197351078Speter } 197451078Speter com->dtr_wait = *(int *)data * hz / 100; 197551078Speter break; 197651078Speter case TIOCMGDTRWAIT: 197751078Speter *(int *)data = com->dtr_wait * 100 / hz; 197851078Speter break; 197951078Speter case TIOCTIMESTAMP: 198051078Speter com->do_timestamp = TRUE; 198151078Speter *(struct timeval *)data = com->timestamp; 198251078Speter break; 198351078Speter case TIOCDCDTIMESTAMP: 198451078Speter com->do_dcd_timestamp = TRUE; 198551078Speter *(struct timeval *)data = com->dcd_timestamp; 198651078Speter break; 198751078Speter default: 198851078Speter splx(s); 198951078Speter error = pps_ioctl(cmd, data, &com->pps); 199051078Speter if (error == ENODEV) 199151078Speter error = ENOTTY; 199251078Speter return (error); 199351078Speter } 199451078Speter splx(s); 199551078Speter return (0); 199651078Speter} 199751078Speter 199851078Speterstatic void 199951078Spetersiopoll() 200051078Speter{ 200151078Speter int unit; 200251078Speter 200351078Speter if (com_events == 0) 200451078Speter return; 200551078Speterrepeat: 200653344Speter for (unit = 0; unit < sio_numunits; ++unit) { 200751078Speter struct com_s *com; 200851078Speter int incc; 200951078Speter struct tty *tp; 201051078Speter 201151078Speter com = com_addr(unit); 201251078Speter if (com == NULL) 201351078Speter continue; 201451078Speter tp = com->tp; 201551078Speter if (tp == NULL || com->gone) { 201651078Speter /* 201751078Speter * Discard any events related to never-opened or 201851078Speter * going-away devices. 201951078Speter */ 202051078Speter disable_intr(); 202151078Speter incc = com->iptr - com->ibuf; 202251078Speter com->iptr = com->ibuf; 202351078Speter if (com->state & CS_CHECKMSR) { 202451078Speter incc += LOTS_OF_EVENTS; 202551078Speter com->state &= ~CS_CHECKMSR; 202651078Speter } 202751078Speter com_events -= incc; 202851078Speter enable_intr(); 202951078Speter continue; 203051078Speter } 203151078Speter if (com->iptr != com->ibuf) { 203251078Speter disable_intr(); 203351078Speter sioinput(com); 203451078Speter enable_intr(); 203551078Speter } 203651078Speter if (com->state & CS_CHECKMSR) { 203751078Speter u_char delta_modem_status; 203851078Speter 203951078Speter disable_intr(); 204051078Speter delta_modem_status = com->last_modem_status 204151078Speter ^ com->prev_modem_status; 204251078Speter com->prev_modem_status = com->last_modem_status; 204351078Speter com_events -= LOTS_OF_EVENTS; 204451078Speter com->state &= ~CS_CHECKMSR; 204551078Speter enable_intr(); 204651078Speter if (delta_modem_status & MSR_DCD) 204751078Speter (*linesw[tp->t_line].l_modem) 204851078Speter (tp, com->prev_modem_status & MSR_DCD); 204951078Speter } 205051078Speter if (com->state & CS_ODONE) { 205151078Speter disable_intr(); 205251078Speter com_events -= LOTS_OF_EVENTS; 205351078Speter com->state &= ~CS_ODONE; 205451078Speter enable_intr(); 205551078Speter if (!(com->state & CS_BUSY) 205651078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 205751078Speter timeout(siobusycheck, com, hz / 100); 205851078Speter com->extra_state |= CSE_BUSYCHECK; 205951078Speter } 206051078Speter (*linesw[tp->t_line].l_start)(tp); 206151078Speter } 206251078Speter if (com_events == 0) 206351078Speter break; 206451078Speter } 206551078Speter if (com_events >= LOTS_OF_EVENTS) 206651078Speter goto repeat; 206751078Speter} 206851078Speter 206951078Speterstatic int 207051078Spetercomparam(tp, t) 207151078Speter struct tty *tp; 207251078Speter struct termios *t; 207351078Speter{ 207451078Speter u_int cfcr; 207551078Speter int cflag; 207651078Speter struct com_s *com; 207751078Speter int divisor; 207851078Speter u_char dlbh; 207951078Speter u_char dlbl; 208051078Speter Port_t iobase; 208151078Speter int s; 208251078Speter int unit; 208351078Speter 208451078Speter /* do historical conversions */ 208551078Speter if (t->c_ispeed == 0) 208651078Speter t->c_ispeed = t->c_ospeed; 208751078Speter 208851078Speter /* check requested parameters */ 208951078Speter divisor = ttspeedtab(t->c_ospeed, comspeedtab); 209051078Speter if (divisor < 0 || (divisor > 0 && t->c_ispeed != t->c_ospeed)) 209151078Speter return (EINVAL); 209251078Speter 209351078Speter /* parameters are OK, convert them to the com struct and the device */ 209451078Speter unit = DEV_TO_UNIT(tp->t_dev); 209551078Speter com = com_addr(unit); 209651078Speter iobase = com->iobase; 209751078Speter s = spltty(); 209851078Speter if (divisor == 0) 209951078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 210051078Speter else 210151078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 210251078Speter cflag = t->c_cflag; 210351078Speter switch (cflag & CSIZE) { 210451078Speter case CS5: 210551078Speter cfcr = CFCR_5BITS; 210651078Speter break; 210751078Speter case CS6: 210851078Speter cfcr = CFCR_6BITS; 210951078Speter break; 211051078Speter case CS7: 211151078Speter cfcr = CFCR_7BITS; 211251078Speter break; 211351078Speter default: 211451078Speter cfcr = CFCR_8BITS; 211551078Speter break; 211651078Speter } 211751078Speter if (cflag & PARENB) { 211851078Speter cfcr |= CFCR_PENAB; 211951078Speter if (!(cflag & PARODD)) 212051078Speter cfcr |= CFCR_PEVEN; 212151078Speter } 212251078Speter if (cflag & CSTOPB) 212351078Speter cfcr |= CFCR_STOPB; 212451078Speter 212551078Speter if (com->hasfifo && divisor != 0) { 212651078Speter /* 212751078Speter * Use a fifo trigger level low enough so that the input 212851078Speter * latency from the fifo is less than about 16 msec and 212951078Speter * the total latency is less than about 30 msec. These 213051078Speter * latencies are reasonable for humans. Serial comms 213151078Speter * protocols shouldn't expect anything better since modem 213251078Speter * latencies are larger. 213351078Speter */ 213451078Speter com->fifo_image = t->c_ospeed <= 4800 213551078Speter ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH; 213651078Speter#ifdef COM_ESP 213751078Speter /* 213851078Speter * The Hayes ESP card needs the fifo DMA mode bit set 213951078Speter * in compatibility mode. If not, it will interrupt 214051078Speter * for each character received. 214151078Speter */ 214251078Speter if (com->esp) 214351078Speter com->fifo_image |= FIFO_DMA_MODE; 214451078Speter#endif 214551078Speter outb(iobase + com_fifo, com->fifo_image); 214651078Speter } 214751078Speter 214851078Speter /* 214951078Speter * This returns with interrupts disabled so that we can complete 215051078Speter * the speed change atomically. Keeping interrupts disabled is 215151078Speter * especially important while com_data is hidden. 215251078Speter */ 215351078Speter (void) siosetwater(com, t->c_ispeed); 215451078Speter 215551078Speter if (divisor != 0) { 215651078Speter outb(iobase + com_cfcr, cfcr | CFCR_DLAB); 215751078Speter /* 215851078Speter * Only set the divisor registers if they would change, 215951078Speter * since on some 16550 incompatibles (UMC8669F), setting 216051078Speter * them while input is arriving them loses sync until 216151078Speter * data stops arriving. 216251078Speter */ 216351078Speter dlbl = divisor & 0xFF; 216451078Speter if (inb(iobase + com_dlbl) != dlbl) 216551078Speter outb(iobase + com_dlbl, dlbl); 216651078Speter dlbh = (u_int) divisor >> 8; 216751078Speter if (inb(iobase + com_dlbh) != dlbh) 216851078Speter outb(iobase + com_dlbh, dlbh); 216951078Speter } 217051078Speter 217151078Speter 217251078Speter outb(iobase + com_cfcr, com->cfcr_image = cfcr); 217351078Speter 217451078Speter if (!(tp->t_state & TS_TTSTOP)) 217551078Speter com->state |= CS_TTGO; 217651078Speter 217751078Speter if (cflag & CRTS_IFLOW) { 217851078Speter if (com->st16650a) { 217951078Speter outb(iobase + com_cfcr, 0xbf); 218051078Speter outb(iobase + com_fifo, inb(iobase + com_fifo) | 0x40); 218151078Speter } 218251078Speter com->state |= CS_RTS_IFLOW; 218351078Speter /* 218451078Speter * If CS_RTS_IFLOW just changed from off to on, the change 218551078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 218651078Speter * so do it later by calling comstart() instead of repeating 218751078Speter * a lot of code from comstart() here. 218851078Speter */ 218951078Speter } else if (com->state & CS_RTS_IFLOW) { 219051078Speter com->state &= ~CS_RTS_IFLOW; 219151078Speter /* 219251078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 219351078Speter * on here, since comstart() won't do it later. 219451078Speter */ 219551078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 219651078Speter if (com->st16650a) { 219751078Speter outb(iobase + com_cfcr, 0xbf); 219851078Speter outb(iobase + com_fifo, inb(iobase + com_fifo) & ~0x40); 219951078Speter } 220051078Speter } 220151078Speter 220251078Speter 220351078Speter /* 220451078Speter * Set up state to handle output flow control. 220551078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 220651078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 220751078Speter */ 220851078Speter com->state |= CS_ODEVREADY; 220951078Speter com->state &= ~CS_CTS_OFLOW; 221051078Speter if (cflag & CCTS_OFLOW) { 221151078Speter com->state |= CS_CTS_OFLOW; 221251078Speter if (!(com->last_modem_status & MSR_CTS)) 221351078Speter com->state &= ~CS_ODEVREADY; 221451078Speter if (com->st16650a) { 221551078Speter outb(iobase + com_cfcr, 0xbf); 221651078Speter outb(iobase + com_fifo, inb(iobase + com_fifo) | 0x80); 221751078Speter } 221851078Speter } else { 221951078Speter if (com->st16650a) { 222051078Speter outb(iobase + com_cfcr, 0xbf); 222151078Speter outb(iobase + com_fifo, inb(iobase + com_fifo) & ~0x80); 222251078Speter } 222351078Speter } 222451078Speter 222551078Speter 222651078Speter outb(iobase + com_cfcr, com->cfcr_image); 222751078Speter 222851078Speter 222951078Speter /* XXX shouldn't call functions while intrs are disabled. */ 223051078Speter disc_optim(tp, t, com); 223151078Speter /* 223251078Speter * Recover from fiddling with CS_TTGO. We used to call siointr1() 223351078Speter * unconditionally, but that defeated the careful discarding of 223451078Speter * stale input in sioopen(). 223551078Speter */ 223651078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 223751078Speter siointr1(com); 223851078Speter 223951078Speter enable_intr(); 224051078Speter splx(s); 224151078Speter comstart(tp); 224251078Speter if (com->ibufold != NULL) { 224351078Speter free(com->ibufold, M_DEVBUF); 224451078Speter com->ibufold = NULL; 224551078Speter } 224651078Speter return (0); 224751078Speter} 224851078Speter 224951078Speterstatic int 225051078Spetersiosetwater(com, speed) 225151078Speter struct com_s *com; 225251078Speter speed_t speed; 225351078Speter{ 225451078Speter int cp4ticks; 225551078Speter u_char *ibuf; 225651078Speter int ibufsize; 225751078Speter struct tty *tp; 225851078Speter 225951078Speter /* 226051078Speter * Make the buffer size large enough to handle a softtty interrupt 226151078Speter * latency of about 2 ticks without loss of throughput or data 226251078Speter * (about 3 ticks if input flow control is not used or not honoured, 226351078Speter * but a bit less for CS5-CS7 modes). 226451078Speter */ 226551078Speter cp4ticks = speed / 10 / hz * 4; 226651078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 226751078Speter ibufsize <<= 1; 226851078Speter if (ibufsize == com->ibufsize) { 226951078Speter disable_intr(); 227051078Speter return (0); 227151078Speter } 227251078Speter 227351078Speter /* 227451078Speter * Allocate input buffer. The extra factor of 2 in the size is 227551078Speter * to allow for an error byte for each input byte. 227651078Speter */ 227751078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 227851078Speter if (ibuf == NULL) { 227951078Speter disable_intr(); 228051078Speter return (ENOMEM); 228151078Speter } 228251078Speter 228351078Speter /* Initialize non-critical variables. */ 228451078Speter com->ibufold = com->ibuf; 228551078Speter com->ibufsize = ibufsize; 228651078Speter tp = com->tp; 228751078Speter if (tp != NULL) { 228851078Speter tp->t_ififosize = 2 * ibufsize; 228951078Speter tp->t_ispeedwat = (speed_t)-1; 229051078Speter tp->t_ospeedwat = (speed_t)-1; 229151078Speter } 229251078Speter 229351078Speter /* 229451078Speter * Read current input buffer, if any. Continue with interrupts 229551078Speter * disabled. 229651078Speter */ 229751078Speter disable_intr(); 229851078Speter if (com->iptr != com->ibuf) 229951078Speter sioinput(com); 230051078Speter 230151078Speter /*- 230251078Speter * Initialize critical variables, including input buffer watermarks. 230351078Speter * The external device is asked to stop sending when the buffer 230451078Speter * exactly reaches high water, or when the high level requests it. 230551078Speter * The high level is notified immediately (rather than at a later 230651078Speter * clock tick) when this watermark is reached. 230751078Speter * The buffer size is chosen so the watermark should almost never 230851078Speter * be reached. 230951078Speter * The low watermark is invisibly 0 since the buffer is always 231051078Speter * emptied all at once. 231151078Speter */ 231251078Speter com->iptr = com->ibuf = ibuf; 231351078Speter com->ibufend = ibuf + ibufsize; 231451078Speter com->ierroff = ibufsize; 231551078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 231651078Speter return (0); 231751078Speter} 231851078Speter 231951078Speterstatic void 232051078Spetercomstart(tp) 232151078Speter struct tty *tp; 232251078Speter{ 232351078Speter struct com_s *com; 232451078Speter int s; 232551078Speter int unit; 232651078Speter 232751078Speter unit = DEV_TO_UNIT(tp->t_dev); 232851078Speter com = com_addr(unit); 232951078Speter s = spltty(); 233051078Speter disable_intr(); 233151078Speter if (tp->t_state & TS_TTSTOP) 233251078Speter com->state &= ~CS_TTGO; 233351078Speter else 233451078Speter com->state |= CS_TTGO; 233551078Speter if (tp->t_state & TS_TBLOCK) { 233651078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 233751078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 233851078Speter } else { 233951078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 234051078Speter && com->state & CS_RTS_IFLOW) 234151078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 234251078Speter } 234351078Speter enable_intr(); 234451078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 234551078Speter ttwwakeup(tp); 234651078Speter splx(s); 234751078Speter return; 234851078Speter } 234951078Speter if (tp->t_outq.c_cc != 0) { 235051078Speter struct lbq *qp; 235151078Speter struct lbq *next; 235251078Speter 235351078Speter if (!com->obufs[0].l_queued) { 235451078Speter com->obufs[0].l_tail 235551078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 235651078Speter sizeof com->obuf1); 235751078Speter com->obufs[0].l_next = NULL; 235851078Speter com->obufs[0].l_queued = TRUE; 235951078Speter disable_intr(); 236051078Speter if (com->state & CS_BUSY) { 236151078Speter qp = com->obufq.l_next; 236251078Speter while ((next = qp->l_next) != NULL) 236351078Speter qp = next; 236451078Speter qp->l_next = &com->obufs[0]; 236551078Speter } else { 236651078Speter com->obufq.l_head = com->obufs[0].l_head; 236751078Speter com->obufq.l_tail = com->obufs[0].l_tail; 236851078Speter com->obufq.l_next = &com->obufs[0]; 236951078Speter com->state |= CS_BUSY; 237051078Speter } 237151078Speter enable_intr(); 237251078Speter } 237351078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 237451078Speter com->obufs[1].l_tail 237551078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 237651078Speter sizeof com->obuf2); 237751078Speter com->obufs[1].l_next = NULL; 237851078Speter com->obufs[1].l_queued = TRUE; 237951078Speter disable_intr(); 238051078Speter if (com->state & CS_BUSY) { 238151078Speter qp = com->obufq.l_next; 238251078Speter while ((next = qp->l_next) != NULL) 238351078Speter qp = next; 238451078Speter qp->l_next = &com->obufs[1]; 238551078Speter } else { 238651078Speter com->obufq.l_head = com->obufs[1].l_head; 238751078Speter com->obufq.l_tail = com->obufs[1].l_tail; 238851078Speter com->obufq.l_next = &com->obufs[1]; 238951078Speter com->state |= CS_BUSY; 239051078Speter } 239151078Speter enable_intr(); 239251078Speter } 239351078Speter tp->t_state |= TS_BUSY; 239451078Speter } 239551078Speter disable_intr(); 239651078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 239751078Speter siointr1(com); /* fake interrupt to start output */ 239851078Speter enable_intr(); 239951078Speter ttwwakeup(tp); 240051078Speter splx(s); 240151078Speter} 240251078Speter 240351078Speterstatic void 240451654Sphkcomstop(tp, rw) 240551078Speter struct tty *tp; 240651078Speter int rw; 240751078Speter{ 240851078Speter struct com_s *com; 240951078Speter 241051078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 241151078Speter if (com->gone) 241251078Speter return; 241351078Speter disable_intr(); 241451078Speter if (rw & FWRITE) { 241551078Speter if (com->hasfifo) 241651078Speter#ifdef COM_ESP 241751078Speter /* XXX avoid h/w bug. */ 241851078Speter if (!com->esp) 241951078Speter#endif 242051078Speter outb(com->iobase + com_fifo, 242151078Speter FIFO_XMT_RST | com->fifo_image); 242251078Speter com->obufs[0].l_queued = FALSE; 242351078Speter com->obufs[1].l_queued = FALSE; 242451078Speter if (com->state & CS_ODONE) 242551078Speter com_events -= LOTS_OF_EVENTS; 242651078Speter com->state &= ~(CS_ODONE | CS_BUSY); 242751078Speter com->tp->t_state &= ~TS_BUSY; 242851078Speter } 242951078Speter if (rw & FREAD) { 243051078Speter if (com->hasfifo) 243151078Speter#ifdef COM_ESP 243251078Speter /* XXX avoid h/w bug. */ 243351078Speter if (!com->esp) 243451078Speter#endif 243551078Speter outb(com->iobase + com_fifo, 243651078Speter FIFO_RCV_RST | com->fifo_image); 243751078Speter com_events -= (com->iptr - com->ibuf); 243851078Speter com->iptr = com->ibuf; 243951078Speter } 244051078Speter enable_intr(); 244151078Speter comstart(tp); 244251078Speter} 244351078Speter 244451078Speterstatic int 244551078Spetercommctl(com, bits, how) 244651078Speter struct com_s *com; 244751078Speter int bits; 244851078Speter int how; 244951078Speter{ 245051078Speter int mcr; 245151078Speter int msr; 245251078Speter 245351078Speter if (how == DMGET) { 245451078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 245551078Speter mcr = com->mcr_image; 245651078Speter if (mcr & MCR_DTR) 245751078Speter bits |= TIOCM_DTR; 245851078Speter if (mcr & MCR_RTS) 245951078Speter bits |= TIOCM_RTS; 246051078Speter msr = com->prev_modem_status; 246151078Speter if (msr & MSR_CTS) 246251078Speter bits |= TIOCM_CTS; 246351078Speter if (msr & MSR_DCD) 246451078Speter bits |= TIOCM_CD; 246551078Speter if (msr & MSR_DSR) 246651078Speter bits |= TIOCM_DSR; 246751078Speter /* 246851078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 246951078Speter * more volatile by reading the modem status a lot. Perhaps 247051078Speter * we should latch both bits until the status is read here. 247151078Speter */ 247251078Speter if (msr & (MSR_RI | MSR_TERI)) 247351078Speter bits |= TIOCM_RI; 247451078Speter return (bits); 247551078Speter } 247651078Speter mcr = 0; 247751078Speter if (bits & TIOCM_DTR) 247851078Speter mcr |= MCR_DTR; 247951078Speter if (bits & TIOCM_RTS) 248051078Speter mcr |= MCR_RTS; 248151078Speter if (com->gone) 248251078Speter return(0); 248351078Speter disable_intr(); 248451078Speter switch (how) { 248551078Speter case DMSET: 248651078Speter outb(com->modem_ctl_port, 248751078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 248851078Speter break; 248951078Speter case DMBIS: 249051078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 249151078Speter break; 249251078Speter case DMBIC: 249351078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 249451078Speter break; 249551078Speter } 249651078Speter enable_intr(); 249751078Speter return (0); 249851078Speter} 249951078Speter 250051078Speterstatic void 250151078Spetersiosettimeout() 250251078Speter{ 250351078Speter struct com_s *com; 250451078Speter bool_t someopen; 250551078Speter int unit; 250651078Speter 250751078Speter /* 250851078Speter * Set our timeout period to 1 second if no polled devices are open. 250951078Speter * Otherwise set it to max(1/200, 1/hz). 251051078Speter * Enable timeouts iff some device is open. 251151078Speter */ 251251078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 251351078Speter sio_timeout = hz; 251451078Speter someopen = FALSE; 251553344Speter for (unit = 0; unit < sio_numunits; ++unit) { 251651078Speter com = com_addr(unit); 251751078Speter if (com != NULL && com->tp != NULL 251851078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 251951078Speter someopen = TRUE; 252051078Speter if (com->poll || com->poll_output) { 252151078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 252251078Speter break; 252351078Speter } 252451078Speter } 252551078Speter } 252651078Speter if (someopen) { 252751078Speter sio_timeouts_until_log = hz / sio_timeout; 252851078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 252951078Speter sio_timeout); 253051078Speter } else { 253151078Speter /* Flush error messages, if any. */ 253251078Speter sio_timeouts_until_log = 1; 253351078Speter comwakeup((void *)NULL); 253451078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 253551078Speter } 253651078Speter} 253751078Speter 253851078Speterstatic void 253951078Spetercomwakeup(chan) 254051078Speter void *chan; 254151078Speter{ 254251078Speter struct com_s *com; 254351078Speter int unit; 254451078Speter 254551078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 254651078Speter 254751078Speter /* 254851078Speter * Recover from lost output interrupts. 254951078Speter * Poll any lines that don't use interrupts. 255051078Speter */ 255153344Speter for (unit = 0; unit < sio_numunits; ++unit) { 255251078Speter com = com_addr(unit); 255351078Speter if (com != NULL && !com->gone 255451078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 255551078Speter disable_intr(); 255651078Speter siointr1(com); 255751078Speter enable_intr(); 255851078Speter } 255951078Speter } 256051078Speter 256151078Speter /* 256251078Speter * Check for and log errors, but not too often. 256351078Speter */ 256451078Speter if (--sio_timeouts_until_log > 0) 256551078Speter return; 256651078Speter sio_timeouts_until_log = hz / sio_timeout; 256753344Speter for (unit = 0; unit < sio_numunits; ++unit) { 256851078Speter int errnum; 256951078Speter 257051078Speter com = com_addr(unit); 257151078Speter if (com == NULL) 257251078Speter continue; 257351078Speter if (com->gone) 257451078Speter continue; 257551078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 257651078Speter u_int delta; 257751078Speter u_long total; 257851078Speter 257951078Speter disable_intr(); 258051078Speter delta = com->delta_error_counts[errnum]; 258151078Speter com->delta_error_counts[errnum] = 0; 258251078Speter enable_intr(); 258351078Speter if (delta == 0) 258451078Speter continue; 258551078Speter total = com->error_counts[errnum] += delta; 258651078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 258751078Speter unit, delta, error_desc[errnum], 258851078Speter delta == 1 ? "" : "s", total); 258951078Speter } 259051078Speter } 259151078Speter} 259251078Speter 259351078Speterstatic void 259451078Speterdisc_optim(tp, t, com) 259551078Speter struct tty *tp; 259651078Speter struct termios *t; 259751078Speter struct com_s *com; 259851078Speter{ 259951078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 260051078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 260151078Speter && (!(t->c_iflag & PARMRK) 260251078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 260351078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 260451078Speter && linesw[tp->t_line].l_rint == ttyinput) 260551078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 260651078Speter else 260751078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 260851078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 260951078Speter} 261051078Speter 261151078Speter/* 261251078Speter * Following are all routines needed for SIO to act as console 261351078Speter */ 261451078Speter#include <sys/cons.h> 261551078Speter 261651078Speterstruct siocnstate { 261751078Speter u_char dlbl; 261851078Speter u_char dlbh; 261951078Speter u_char ier; 262051078Speter u_char cfcr; 262151078Speter u_char mcr; 262251078Speter}; 262351078Speter 262451078Speterstatic speed_t siocngetspeed __P((Port_t, struct speedtab *)); 262551078Speterstatic void siocnclose __P((struct siocnstate *sp, Port_t iobase)); 262651078Speterstatic void siocnopen __P((struct siocnstate *sp, Port_t iobase, int speed)); 262751078Speterstatic void siocntxwait __P((Port_t iobase)); 262851078Speter 262951078Speterstatic cn_probe_t siocnprobe; 263051078Speterstatic cn_init_t siocninit; 263151078Speterstatic cn_checkc_t siocncheckc; 263251078Speterstatic cn_getc_t siocngetc; 263351078Speterstatic cn_putc_t siocnputc; 263451078Speter 263551078Speter#ifdef __i386__ 263651078SpeterCONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, siocnputc); 263751078Speter 263851078Speter#endif 263951078Speter 264051078Speter/* To get the GDB related variables */ 264151078Speter#if DDB > 0 264251078Speter#include <ddb/ddb.h> 264351078Speter#endif 264451078Speter 264551078Speterstatic void 264651078Spetersiocntxwait(iobase) 264751078Speter Port_t iobase; 264851078Speter{ 264951078Speter int timo; 265051078Speter 265151078Speter /* 265251078Speter * Wait for any pending transmission to finish. Required to avoid 265351078Speter * the UART lockup bug when the speed is changed, and for normal 265451078Speter * transmits. 265551078Speter */ 265651078Speter timo = 100000; 265751078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 265851078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 265951078Speter ; 266051078Speter} 266151078Speter 266251078Speter/* 266351078Speter * Read the serial port specified and try to figure out what speed 266451078Speter * it's currently running at. We're assuming the serial port has 266551078Speter * been initialized and is basicly idle. This routine is only intended 266651078Speter * to be run at system startup. 266751078Speter * 266851078Speter * If the value read from the serial port doesn't make sense, return 0. 266951078Speter */ 267051078Speter 267151078Speterstatic speed_t 267251078Spetersiocngetspeed(iobase, table) 267351078Speter Port_t iobase; 267451078Speter struct speedtab *table; 267551078Speter{ 267651078Speter int code; 267751078Speter u_char dlbh; 267851078Speter u_char dlbl; 267951078Speter u_char cfcr; 268051078Speter 268151078Speter cfcr = inb(iobase + com_cfcr); 268251078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 268351078Speter 268451078Speter dlbl = inb(iobase + com_dlbl); 268551078Speter dlbh = inb(iobase + com_dlbh); 268651078Speter 268751078Speter outb(iobase + com_cfcr, cfcr); 268851078Speter 268951078Speter code = dlbh << 8 | dlbl; 269051078Speter 269153344Speter for (; table->sp_speed != -1; table++) 269251078Speter if (table->sp_code == code) 269351078Speter return (table->sp_speed); 269451078Speter 269551078Speter return 0; /* didn't match anything sane */ 269651078Speter} 269751078Speter 269851078Speterstatic void 269951078Spetersiocnopen(sp, iobase, speed) 270051078Speter struct siocnstate *sp; 270151078Speter Port_t iobase; 270251078Speter int speed; 270351078Speter{ 270451078Speter int divisor; 270551078Speter u_char dlbh; 270651078Speter u_char dlbl; 270751078Speter 270851078Speter /* 270951078Speter * Save all the device control registers except the fifo register 271051078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 271151078Speter * We can't save the fifo register since it is read-only. 271251078Speter */ 271351078Speter sp->ier = inb(iobase + com_ier); 271451078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 271551078Speter siocntxwait(iobase); 271651078Speter sp->cfcr = inb(iobase + com_cfcr); 271751078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 271851078Speter sp->dlbl = inb(iobase + com_dlbl); 271951078Speter sp->dlbh = inb(iobase + com_dlbh); 272051078Speter /* 272151078Speter * Only set the divisor registers if they would change, since on 272251078Speter * some 16550 incompatibles (Startech), setting them clears the 272351078Speter * data input register. This also reduces the effects of the 272451078Speter * UMC8669F bug. 272551078Speter */ 272651078Speter divisor = ttspeedtab(speed, comspeedtab); 272751078Speter dlbl = divisor & 0xFF; 272851078Speter if (sp->dlbl != dlbl) 272951078Speter outb(iobase + com_dlbl, dlbl); 273051078Speter dlbh = (u_int) divisor >> 8; 273151078Speter if (sp->dlbh != dlbh) 273251078Speter outb(iobase + com_dlbh, dlbh); 273351078Speter outb(iobase + com_cfcr, CFCR_8BITS); 273451078Speter sp->mcr = inb(iobase + com_mcr); 273551078Speter /* 273651078Speter * We don't want interrupts, but must be careful not to "disable" 273751078Speter * them by clearing the MCR_IENABLE bit, since that might cause 273851078Speter * an interrupt by floating the IRQ line. 273951078Speter */ 274051078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 274151078Speter} 274251078Speter 274351078Speterstatic void 274451078Spetersiocnclose(sp, iobase) 274551078Speter struct siocnstate *sp; 274651078Speter Port_t iobase; 274751078Speter{ 274851078Speter /* 274951078Speter * Restore the device control registers. 275051078Speter */ 275151078Speter siocntxwait(iobase); 275251078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 275351078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 275451078Speter outb(iobase + com_dlbl, sp->dlbl); 275551078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 275651078Speter outb(iobase + com_dlbh, sp->dlbh); 275751078Speter outb(iobase + com_cfcr, sp->cfcr); 275851078Speter /* 275951078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 276051078Speter */ 276151078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 276251078Speter outb(iobase + com_ier, sp->ier); 276351078Speter} 276451078Speter 276551078Speterstatic void 276651078Spetersiocnprobe(cp) 276751078Speter struct consdev *cp; 276851078Speter{ 276951078Speter speed_t boot_speed; 277051078Speter u_char cfcr; 277151078Speter int s, unit; 277251078Speter struct siocnstate sp; 277351078Speter 277451078Speter /* 277551078Speter * Find our first enabled console, if any. If it is a high-level 277651078Speter * console device, then initialize it and return successfully. 277751078Speter * If it is a low-level console device, then initialize it and 277851078Speter * return unsuccessfully. It must be initialized in both cases 277951078Speter * for early use by console drivers and debuggers. Initializing 278051078Speter * the hardware is not necessary in all cases, since the i/o 278151078Speter * routines initialize it on the fly, but it is necessary if 278251078Speter * input might arrive while the hardware is switched back to an 278351078Speter * uninitialized state. We can't handle multiple console devices 278451078Speter * yet because our low-level routines don't take a device arg. 278551078Speter * We trust the user to set the console flags properly so that we 278651078Speter * don't need to probe. 278751078Speter */ 278851078Speter cp->cn_pri = CN_DEAD; 278951078Speter 279051078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 279151078Speter int flags; 279251078Speter int disabled; 279351078Speter if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 279451078Speter if (disabled) 279551078Speter continue; 279651078Speter } 279751078Speter if (resource_int_value("sio", unit, "flags", &flags)) 279851078Speter continue; 279951078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 280051078Speter int port; 280151078Speter Port_t iobase; 280251078Speter 280351078Speter if (resource_int_value("sio", unit, "port", &port)) 280451078Speter continue; 280551078Speter iobase = port; 280651078Speter s = spltty(); 280751078Speter if (boothowto & RB_SERIAL) { 280851078Speter boot_speed = siocngetspeed(iobase, comspeedtab); 280951078Speter if (boot_speed) 281051078Speter comdefaultrate = boot_speed; 281151078Speter } 281251078Speter 281351078Speter /* 281451078Speter * Initialize the divisor latch. We can't rely on 281551078Speter * siocnopen() to do this the first time, since it 281651078Speter * avoids writing to the latch if the latch appears 281751078Speter * to have the correct value. Also, if we didn't 281851078Speter * just read the speed from the hardware, then we 281951078Speter * need to set the speed in hardware so that 282051078Speter * switching it later is null. 282151078Speter */ 282251078Speter cfcr = inb(iobase + com_cfcr); 282351078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 282451078Speter outb(iobase + com_dlbl, 282551078Speter COMBRD(comdefaultrate) & 0xff); 282651078Speter outb(iobase + com_dlbh, 282751078Speter (u_int) COMBRD(comdefaultrate) >> 8); 282851078Speter outb(iobase + com_cfcr, cfcr); 282951078Speter 283051078Speter siocnopen(&sp, iobase, comdefaultrate); 283151078Speter 283251078Speter splx(s); 283351078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 283451078Speter cp->cn_dev = makedev(CDEV_MAJOR, unit); 283551078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 283651078Speter || boothowto & RB_SERIAL 283751078Speter ? CN_REMOTE : CN_NORMAL; 283851078Speter siocniobase = iobase; 283951078Speter siocnunit = unit; 284051078Speter } 284151078Speter if (COM_DEBUGGER(flags)) { 284251078Speter printf("sio%d: gdb debugging port\n", unit); 284351078Speter siogdbiobase = iobase; 284451078Speter siogdbunit = unit; 284551078Speter#if DDB > 0 284651078Speter gdbdev = makedev(CDEV_MAJOR, unit); 284751078Speter gdb_getc = siocngetc; 284851078Speter gdb_putc = siocnputc; 284951078Speter#endif 285051078Speter } 285151078Speter } 285251078Speter } 285351078Speter#ifdef __i386__ 285451078Speter#if DDB > 0 285551078Speter /* 285651078Speter * XXX Ugly Compatability. 285751078Speter * If no gdb port has been specified, set it to be the console 285851078Speter * as some configuration files don't specify the gdb port. 285951078Speter */ 286051078Speter if (gdbdev == NODEV && (boothowto & RB_GDB)) { 286151078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 286251078Speter siocnunit); 286351078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 286451078Speter printf("configuration file (currently sio only).\n"); 286551078Speter siogdbiobase = siocniobase; 286651078Speter siogdbunit = siocnunit; 286751078Speter gdbdev = makedev(CDEV_MAJOR, siocnunit); 286851078Speter gdb_getc = siocngetc; 286951078Speter gdb_putc = siocnputc; 287051078Speter } 287151078Speter#endif 287251078Speter#endif 287351078Speter} 287451078Speter 287551078Speter#ifdef __alpha__ 287651078Speter 287751078SpeterCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc); 287851078Speter 287951078Speterint 288051078Spetersiocnattach(port, speed) 288151078Speter int port; 288251078Speter int speed; 288351078Speter{ 288451078Speter int s; 288551078Speter u_char cfcr; 288651078Speter struct siocnstate sp; 288751078Speter 288851078Speter siocniobase = port; 288951078Speter comdefaultrate = speed; 289051078Speter sio_consdev.cn_pri = CN_NORMAL; 289151078Speter sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0); 289251078Speter 289351078Speter s = spltty(); 289451078Speter 289551078Speter /* 289651078Speter * Initialize the divisor latch. We can't rely on 289751078Speter * siocnopen() to do this the first time, since it 289851078Speter * avoids writing to the latch if the latch appears 289951078Speter * to have the correct value. Also, if we didn't 290051078Speter * just read the speed from the hardware, then we 290151078Speter * need to set the speed in hardware so that 290251078Speter * switching it later is null. 290351078Speter */ 290451078Speter cfcr = inb(siocniobase + com_cfcr); 290551078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 290651078Speter outb(siocniobase + com_dlbl, 290751078Speter COMBRD(comdefaultrate) & 0xff); 290851078Speter outb(siocniobase + com_dlbh, 290951078Speter (u_int) COMBRD(comdefaultrate) >> 8); 291051078Speter outb(siocniobase + com_cfcr, cfcr); 291151078Speter 291251078Speter siocnopen(&sp, siocniobase, comdefaultrate); 291351078Speter splx(s); 291451078Speter 291551078Speter cn_tab = &sio_consdev; 291651078Speter return 0; 291751078Speter} 291851078Speter 291951078Speterint 292051078Spetersiogdbattach(port, speed) 292151078Speter int port; 292251078Speter int speed; 292351078Speter{ 292451078Speter int s; 292551078Speter u_char cfcr; 292651078Speter struct siocnstate sp; 292751078Speter 292851078Speter siogdbiobase = port; 292951078Speter gdbdefaultrate = speed; 293051078Speter 293151078Speter s = spltty(); 293251078Speter 293351078Speter /* 293451078Speter * Initialize the divisor latch. We can't rely on 293551078Speter * siocnopen() to do this the first time, since it 293651078Speter * avoids writing to the latch if the latch appears 293751078Speter * to have the correct value. Also, if we didn't 293851078Speter * just read the speed from the hardware, then we 293951078Speter * need to set the speed in hardware so that 294051078Speter * switching it later is null. 294151078Speter */ 294251078Speter cfcr = inb(siogdbiobase + com_cfcr); 294351078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 294451078Speter outb(siogdbiobase + com_dlbl, 294551078Speter COMBRD(gdbdefaultrate) & 0xff); 294651078Speter outb(siogdbiobase + com_dlbh, 294751078Speter (u_int) COMBRD(gdbdefaultrate) >> 8); 294851078Speter outb(siogdbiobase + com_cfcr, cfcr); 294951078Speter 295051078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 295151078Speter splx(s); 295251078Speter 295351078Speter return 0; 295451078Speter} 295551078Speter 295651078Speter#endif 295751078Speter 295851078Speterstatic void 295951078Spetersiocninit(cp) 296051078Speter struct consdev *cp; 296151078Speter{ 296251078Speter comconsole = DEV_TO_UNIT(cp->cn_dev); 296351078Speter} 296451078Speter 296551078Speterstatic int 296651078Spetersiocncheckc(dev) 296751078Speter dev_t dev; 296851078Speter{ 296951078Speter int c; 297051078Speter Port_t iobase; 297151078Speter int s; 297251078Speter struct siocnstate sp; 297351078Speter 297451078Speter if (minor(dev) == siogdbunit) 297551078Speter iobase = siogdbiobase; 297651078Speter else 297751078Speter iobase = siocniobase; 297851078Speter s = spltty(); 297951078Speter siocnopen(&sp, iobase, comdefaultrate); 298051078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 298151078Speter c = inb(iobase + com_data); 298251078Speter else 298351078Speter c = -1; 298451078Speter siocnclose(&sp, iobase); 298551078Speter splx(s); 298651078Speter return (c); 298751078Speter} 298851078Speter 298951078Speter 299051078Speterint 299151078Spetersiocngetc(dev) 299251078Speter dev_t dev; 299351078Speter{ 299451078Speter int c; 299551078Speter Port_t iobase; 299651078Speter int s; 299751078Speter struct siocnstate sp; 299851078Speter 299951078Speter if (minor(dev) == siogdbunit) 300051078Speter iobase = siogdbiobase; 300151078Speter else 300251078Speter iobase = siocniobase; 300351078Speter s = spltty(); 300451078Speter siocnopen(&sp, iobase, comdefaultrate); 300551078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 300651078Speter ; 300751078Speter c = inb(iobase + com_data); 300851078Speter siocnclose(&sp, iobase); 300951078Speter splx(s); 301051078Speter return (c); 301151078Speter} 301251078Speter 301351078Spetervoid 301451078Spetersiocnputc(dev, c) 301551078Speter dev_t dev; 301651078Speter int c; 301751078Speter{ 301851078Speter int s; 301951078Speter struct siocnstate sp; 302051078Speter Port_t iobase; 302151078Speter 302251078Speter if (minor(dev) == siogdbunit) 302351078Speter iobase = siogdbiobase; 302451078Speter else 302551078Speter iobase = siocniobase; 302651078Speter s = spltty(); 302751078Speter siocnopen(&sp, iobase, comdefaultrate); 302851078Speter siocntxwait(iobase); 302951078Speter outb(iobase + com_data, c); 303051078Speter siocnclose(&sp, iobase); 303151078Speter splx(s); 303251078Speter} 303351078Speter 303451078Speter#ifdef __alpha__ 303551078Speterint 303651078Spetersiogdbgetc() 303751078Speter{ 303851078Speter int c; 303951078Speter Port_t iobase; 304051078Speter int s; 304151078Speter struct siocnstate sp; 304251078Speter 304351078Speter iobase = siogdbiobase; 304451078Speter s = spltty(); 304551078Speter siocnopen(&sp, iobase, gdbdefaultrate); 304651078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 304751078Speter ; 304851078Speter c = inb(iobase + com_data); 304951078Speter siocnclose(&sp, iobase); 305051078Speter splx(s); 305151078Speter return (c); 305251078Speter} 305351078Speter 305451078Spetervoid 305551078Spetersiogdbputc(c) 305651078Speter int c; 305751078Speter{ 305851078Speter int s; 305951078Speter struct siocnstate sp; 306051078Speter 306151078Speter s = spltty(); 306251078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 306351078Speter siocntxwait(siogdbiobase); 306451078Speter outb(siogdbiobase + com_data, c); 306551078Speter siocnclose(&sp, siogdbiobase); 306651078Speter splx(s); 306751078Speter} 306851078Speter#endif 306951078Speter 307052471SimpDRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 307152471Simp#if NCARD > 0 307252471SimpDRIVER_MODULE(sio, pccard, sio_pccard_driver, sio_devclass, 0, 0); 307352471Simp#endif 3074