sio.c revision 127157
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3451078Speter * from: i386/isa sio.c,v 1.234 3551078Speter */ 3651078Speter 37119419Sobrien#include <sys/cdefs.h> 38119419Sobrien__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 127157 2004-03-18 02:36:41Z njl $"); 39119419Sobrien 4051078Speter#include "opt_comconsole.h" 4151078Speter#include "opt_compat.h" 4251078Speter#include "opt_ddb.h" 4351078Speter#include "opt_sio.h" 4451078Speter 4551078Speter/* 4651078Speter * Serial driver, based on 386BSD-0.1 com driver. 4751078Speter * Mostly rewritten to use pseudo-DMA. 4851078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4951078Speter * COM driver, based on HP dca driver. 5051078Speter * 5151078Speter * Changes for PC-Card integration: 5251078Speter * - Added PC-Card driver table and handlers 5351078Speter */ 5451078Speter#include <sys/param.h> 5576166Smarkm#include <sys/systm.h> 5665822Sjhb#include <sys/bus.h> 5751078Speter#include <sys/conf.h> 5851078Speter#include <sys/fcntl.h> 5951078Speter#include <sys/interrupt.h> 6051078Speter#include <sys/kernel.h> 61114216Skan#include <sys/limits.h> 6276166Smarkm#include <sys/lock.h> 6376166Smarkm#include <sys/malloc.h> 6476166Smarkm#include <sys/module.h> 6576166Smarkm#include <sys/mutex.h> 6676166Smarkm#include <sys/proc.h> 6776166Smarkm#include <sys/reboot.h> 6876166Smarkm#include <sys/sysctl.h> 6951078Speter#include <sys/syslog.h> 7076166Smarkm#include <sys/tty.h> 7160471Snyan#include <machine/bus_pio.h> 7251078Speter#include <machine/bus.h> 7351078Speter#include <sys/rman.h> 7451078Speter#include <sys/timepps.h> 7593466Sbde#include <sys/uio.h> 76119485Snjl#include <sys/cons.h> 77119485Snjl#if DDB > 0 78119485Snjl#include <ddb/ddb.h> 79119485Snjl#endif 8051078Speter 8186909Simp#include <isa/isavar.h> 8286909Simp 8351078Speter#include <machine/resource.h> 8451078Speter 8585302Simp#include <dev/sio/sioreg.h> 8685365Simp#include <dev/sio/siovar.h> 8751078Speter 8851078Speter#ifdef COM_ESP 8977726Sjoerg#include <dev/ic/esp.h> 9051078Speter#endif 9177726Sjoerg#include <dev/ic/ns16550.h> 9251078Speter 9351078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 9451078Speter 9551078Speter#define CALLOUT_MASK 0x80 9651078Speter#define CONTROL_MASK 0x60 9751078Speter#define CONTROL_INIT_STATE 0x20 9851078Speter#define CONTROL_LOCK_STATE 0x40 9951078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 10093470Sbde#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 10193470Sbde | ((mynor) & 0x1f)) 10293470Sbde#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 10393470Sbde | ((unit) & 0x1f)) 10451078Speter 10551078Speter#ifdef COM_MULTIPORT 10651078Speter/* checks in flags for multiport and which is multiport "master chip" 10751078Speter * for a given card 10851078Speter */ 10951078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 11051078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 11151078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 112104067Sphk#else 113104067Sphk#define COM_ISMULTIPORT(flags) (0) 11451078Speter#endif /* COM_MULTIPORT */ 11551078Speter 116120175Sbde#define COM_C_IIR_TXRDYBUG 0x80000 11751078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 118120175Sbde#define COM_DEBUGGER(flags) ((flags) & 0x80) 119120175Sbde#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 12051078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 121120175Sbde#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 12251078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 12351078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 124120175Sbde#define COM_NOFIFO(flags) ((flags) & 0x02) 125120175Sbde#define COM_NOPROBE(flags) ((flags) & 0x40000) 126120175Sbde#define COM_NOSCR(flags) ((flags) & 0x100000) 127111613Sphk#define COM_PPSCTS(flags) ((flags) & 0x10000) 128120175Sbde#define COM_ST16650A(flags) ((flags) & 0x20000) 129112384Ssobomax#define COM_TI16754(flags) ((flags) & 0x200000) 13051078Speter 13160471Snyan#define sio_getreg(com, off) \ 13260471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 13360471Snyan#define sio_setreg(com, off, value) \ 13460471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 13560471Snyan 13651078Speter/* 13751078Speter * com state bits. 13851078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 13951078Speter * than the other bits so that they can be tested as a group without masking 14051078Speter * off the low bits. 14151078Speter * 14251078Speter * The following com and tty flags correspond closely: 14351078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 14453344Speter * comstop()) 14551078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 14651078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14751078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14851078Speter * TS_FLUSH is not used. 14951078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 15051078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 15151078Speter */ 15251078Speter#define CS_BUSY 0x80 /* output in progress */ 15351078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 15451078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 15551078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 15651078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15751078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15851078Speter#define CS_ODONE 4 /* output completed */ 15951078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 16051078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 16151078Speter 16251078Speterstatic char const * const error_desc[] = { 16351078Speter#define CE_OVERRUN 0 16451078Speter "silo overflow", 16551078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 16651078Speter "interrupt-level buffer overflow", 16751078Speter#define CE_TTY_BUF_OVERFLOW 2 16851078Speter "tty-level buffer overflow", 16951078Speter}; 17051078Speter 17186909Simp#define CE_NTYPES 3 17251078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 17351078Speter 17486909Simp/* types. XXX - should be elsewhere */ 17586909Simptypedef u_int Port_t; /* hardware port */ 17686909Simptypedef u_char bool_t; /* boolean */ 17786909Simp 17886909Simp/* queue of linear buffers */ 17986909Simpstruct lbq { 18086909Simp u_char *l_head; /* next char to process */ 18186909Simp u_char *l_tail; /* one past the last char to process */ 18286909Simp struct lbq *l_next; /* next in queue */ 18386909Simp bool_t l_queued; /* nonzero if queued */ 18486909Simp}; 18586909Simp 18686909Simp/* com device structure */ 18786909Simpstruct com_s { 18886909Simp u_char state; /* miscellaneous flag bits */ 18986909Simp bool_t active_out; /* nonzero if the callout device is open */ 19086909Simp u_char cfcr_image; /* copy of value written to CFCR */ 19151078Speter#ifdef COM_ESP 19286909Simp bool_t esp; /* is this unit a hayes esp board? */ 19386909Simp#endif 19486909Simp u_char extra_state; /* more flag bits, separate for order trick */ 19586909Simp u_char fifo_image; /* copy of value written to FIFO */ 19686909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 19786909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 19886909Simp u_char mcr_image; /* copy of value written to MCR */ 19986909Simp#ifdef COM_MULTIPORT 20086909Simp bool_t multiport; /* is this unit part of a multiport device? */ 20186909Simp#endif /* COM_MULTIPORT */ 20286909Simp bool_t no_irq; /* nonzero if irq is not attached */ 20386909Simp bool_t gone; /* hardware disappeared */ 20486909Simp bool_t poll; /* nonzero if polling is required */ 20586909Simp bool_t poll_output; /* nonzero if polling for output is required */ 206120175Sbde bool_t st16650a; /* nonzero if Startech 16650A compatible */ 20786909Simp int unit; /* unit number */ 20886909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 209120189Sbde u_int flags; /* copy of device flags */ 21086909Simp u_int tx_fifo_size; 21186909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 21286909Simp 21386909Simp /* 21486909Simp * The high level of the driver never reads status registers directly 21586909Simp * because there would be too many side effects to handle conveniently. 21686909Simp * Instead, it reads copies of the registers stored here by the 21786909Simp * interrupt handler. 21886909Simp */ 21986909Simp u_char last_modem_status; /* last MSR read by intr handler */ 22086909Simp u_char prev_modem_status; /* last MSR handled by high level */ 22186909Simp 22286909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 22386909Simp u_char *ibuf; /* start of input buffer */ 22486909Simp u_char *ibufend; /* end of input buffer */ 22586909Simp u_char *ibufold; /* old input buffer, to be freed */ 22686909Simp u_char *ihighwater; /* threshold in input buffer */ 22786909Simp u_char *iptr; /* next free spot in input buffer */ 22886909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 22986909Simp int ierroff; /* offset of error bytes in ibuf */ 23086909Simp 23186909Simp struct lbq obufq; /* head of queue of output buffers */ 23286909Simp struct lbq obufs[2]; /* output buffers */ 23386909Simp 23486909Simp bus_space_tag_t bst; 23586909Simp bus_space_handle_t bsh; 23686909Simp 23786909Simp Port_t data_port; /* i/o ports */ 23886909Simp#ifdef COM_ESP 23986909Simp Port_t esp_port; 24086909Simp#endif 241120189Sbde Port_t int_ctl_port; 24286909Simp Port_t int_id_port; 24386909Simp Port_t modem_ctl_port; 24486909Simp Port_t line_status_port; 24586909Simp Port_t modem_status_port; 24686909Simp 24786909Simp struct tty *tp; /* cross reference */ 24886909Simp 24986909Simp /* Initial state. */ 25086909Simp struct termios it_in; /* should be in struct tty */ 25186909Simp struct termios it_out; 25286909Simp 25386909Simp /* Lock state. */ 25486909Simp struct termios lt_in; /* should be in struct tty */ 25586909Simp struct termios lt_out; 25686909Simp 25786909Simp bool_t do_timestamp; 25886909Simp bool_t do_dcd_timestamp; 25986909Simp struct timeval timestamp; 26086909Simp struct timeval dcd_timestamp; 26186909Simp struct pps_state pps; 262111613Sphk int pps_bit; 263119485Snjl#ifdef ALT_BREAK_TO_DEBUGGER 264119485Snjl int alt_brk_state; 265119485Snjl#endif 26686909Simp 26786909Simp u_long bytes_in; /* statistics */ 26886909Simp u_long bytes_out; 26986909Simp u_int delta_error_counts[CE_NTYPES]; 27086909Simp u_long error_counts[CE_NTYPES]; 27186909Simp 27289986Sjhay u_long rclk; 27389986Sjhay 27486909Simp struct resource *irqres; 27586909Simp struct resource *ioportres; 276116120Sscottl int ioportrid; 277116120Sscottl void *cookie; 278116120Sscottl dev_t devs[6]; 27986909Simp 28086909Simp /* 28186909Simp * Data area for output buffers. Someday we should build the output 28286909Simp * buffer queue without copying data. 28386909Simp */ 28486909Simp u_char obuf1[256]; 28586909Simp u_char obuf2[256]; 28686909Simp}; 28786909Simp 28886909Simp#ifdef COM_ESP 28993010Sbdestatic int espattach(struct com_s *com, Port_t esp_port); 29051078Speter#endif 29151078Speter 29251078Speterstatic timeout_t siobusycheck; 29393010Sbdestatic u_int siodivisor(u_long rclk, speed_t speed); 29451078Speterstatic timeout_t siodtrwakeup; 29593010Sbdestatic void comhardclose(struct com_s *com); 29693010Sbdestatic void sioinput(struct com_s *com); 29793010Sbdestatic void siointr1(struct com_s *com); 29893010Sbdestatic void siointr(void *arg); 29993010Sbdestatic int commctl(struct com_s *com, int bits, int how); 30093010Sbdestatic int comparam(struct tty *tp, struct termios *t); 30193010Sbdestatic void siopoll(void *); 30293010Sbdestatic void siosettimeout(void); 30393010Sbdestatic int siosetwater(struct com_s *com, speed_t speed); 30493010Sbdestatic void comstart(struct tty *tp); 30593010Sbdestatic void comstop(struct tty *tp, int rw); 30651078Speterstatic timeout_t comwakeup; 30793010Sbdestatic void disc_optim(struct tty *tp, struct termios *t, 30893010Sbde struct com_s *com); 30951078Speter 31085365Simpchar sio_driver_name[] = "sio"; 31170174Sjhbstatic struct mtx sio_lock; 31270174Sjhbstatic int sio_inited; 31351078Speter 31451078Speter/* table and macro for fast conversion from a unit number to its com struct */ 31585365Simpdevclass_t sio_devclass; 31651078Speter#define com_addr(unit) ((struct com_s *) \ 31786909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 31851078Speter 31951078Speterstatic d_open_t sioopen; 32051078Speterstatic d_close_t sioclose; 32151078Speterstatic d_read_t sioread; 32251078Speterstatic d_write_t siowrite; 32351078Speterstatic d_ioctl_t sioioctl; 32451078Speter 32551078Speterstatic struct cdevsw sio_cdevsw = { 326126080Sphk .d_version = D_VERSION, 327111815Sphk .d_open = sioopen, 328111815Sphk .d_close = sioclose, 329111815Sphk .d_read = sioread, 330111815Sphk .d_write = siowrite, 331111815Sphk .d_ioctl = sioioctl, 332111815Sphk .d_name = sio_driver_name, 333126080Sphk .d_flags = D_TTY | D_NEEDGIANT, 33451078Speter}; 33551078Speter 336114722Sobrienint comconsole = -1; 33751078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 33889986Sjhaystatic u_long comdefaultrclk = DEFAULT_RCLK; 33989986SjhaySYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 34098401Sn_hibmastatic speed_t gdbdefaultrate = GDBSPEED; 34198401Sn_hibmaSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 34298401Sn_hibma &gdbdefaultrate, GDBSPEED, ""); 34351078Speterstatic u_int com_events; /* input chars + weighted output completions */ 34451078Speterstatic Port_t siocniobase; 34598401Sn_hibmastatic int siocnunit = -1; 34651078Speterstatic Port_t siogdbiobase; 34751078Speterstatic int siogdbunit = -1; 34872238Sjhbstatic void *sio_slow_ih; 34972238Sjhbstatic void *sio_fast_ih; 35051078Speterstatic int sio_timeout; 35151078Speterstatic int sio_timeouts_until_log; 35251078Speterstatic struct callout_handle sio_timeout_handle 35351078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 35453344Speterstatic int sio_numunits; 35551078Speter 35651078Speter#ifdef COM_ESP 35751078Speter/* XXX configure this properly. */ 35886909Simp/* XXX quite broken for new-bus. */ 35951078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 36051078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 36151078Speter#endif 36251078Speter 36351078Speter/* 36451078Speter * handle sysctl read/write requests for console speed 36551078Speter * 36651078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 36751078Speter * also set the initial and lock values for the /dev/ttyXX device 36851078Speter * if there is one associated with the console. Finally, if the /dev/tty 36951078Speter * device has already been open, change the speed on the open running port 37051078Speter * itself. 37151078Speter */ 37251078Speter 37351078Speterstatic int 37462573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 37551078Speter{ 37651078Speter int error, s; 37751078Speter speed_t newspeed; 37851078Speter struct com_s *com; 37951078Speter struct tty *tp; 38051078Speter 38151078Speter newspeed = comdefaultrate; 38251078Speter 38351078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 38451078Speter if (error || !req->newptr) 38551078Speter return (error); 38651078Speter 38751078Speter comdefaultrate = newspeed; 38851078Speter 38951078Speter if (comconsole < 0) /* serial console not selected? */ 39051078Speter return (0); 39151078Speter 39251078Speter com = com_addr(comconsole); 39357915Simp if (com == NULL) 39451078Speter return (ENXIO); 39551078Speter 39651078Speter /* 39751078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 39851078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 39951078Speter * speed changes) 40051078Speter */ 40151078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 40251078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 40351078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 40451078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 40551078Speter 40651078Speter /* 40751078Speter * if we're open, change the running rate too 40851078Speter */ 40951078Speter tp = com->tp; 41051078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 41151078Speter tp->t_termios.c_ispeed = 41251078Speter tp->t_termios.c_ospeed = comdefaultrate; 41351078Speter s = spltty(); 41451078Speter error = comparam(tp, &tp->t_termios); 41551078Speter splx(s); 41651078Speter } 41751078Speter return error; 41851078Speter} 41951078Speter 42051078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 42151078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 42291280Simp/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 42351078Speter 42486909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 42586909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 42686909Simp 42786909Simp/* 42886909Simp * Unload the driver and clear the table. 42986909Simp * XXX this is mostly wrong. 43086909Simp * XXX TODO: 43186909Simp * This is usually called when the card is ejected, but 432104933Simp * can be caused by a kldunload of a controller driver. 43386909Simp * The idea is to reset the driver's view of the device 43486909Simp * and ensure that any driver entry points such as 43586909Simp * read and write do not hang. 43686909Simp */ 43785365Simpint 43885365Simpsiodetach(dev) 43952471Simp device_t dev; 44051078Speter{ 44151078Speter struct com_s *com; 44265131Sphk int i; 44351078Speter 44452471Simp com = (struct com_s *) device_get_softc(dev); 44557915Simp if (com == NULL) { 44652471Simp device_printf(dev, "NULL com in siounload\n"); 44754386Simp return (0); 44851078Speter } 449120175Sbde com->gone = TRUE; 45065131Sphk for (i = 0 ; i < 6; i++) 45165131Sphk destroy_dev(com->devs[i]); 45254386Simp if (com->irqres) { 45354386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 45454386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 45554386Simp } 45654386Simp if (com->ioportres) 457116120Sscottl bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid, 458116120Sscottl com->ioportres); 45951078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 46057915Simp device_printf(dev, "still open, forcing close\n"); 46177750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 46251078Speter com->tp->t_gen++; 46351078Speter ttyclose(com->tp); 46451078Speter ttwakeup(com->tp); 46551078Speter ttwwakeup(com->tp); 46651078Speter } else { 46751078Speter if (com->ibuf != NULL) 46851078Speter free(com->ibuf, M_DEVBUF); 46986909Simp device_set_softc(dev, NULL); 47086909Simp free(com, M_DEVBUF); 47151078Speter } 47253978Simp return (0); 47351078Speter} 47451078Speter 47585365Simpint 47689986Sjhaysioprobe(dev, xrid, rclk, noprobe) 47758885Simp device_t dev; 47858885Simp int xrid; 47989986Sjhay u_long rclk; 48085365Simp int noprobe; 48151078Speter{ 48253344Speter#if 0 48351078Speter static bool_t already_init; 48453344Speter device_t xdev; 48553344Speter#endif 48660471Snyan struct com_s *com; 48789986Sjhay u_int divisor; 48851078Speter bool_t failures[10]; 48951078Speter int fn; 49051078Speter device_t idev; 49151078Speter Port_t iobase; 49251078Speter intrmask_t irqmap[4]; 49351078Speter intrmask_t irqs; 49451078Speter u_char mcr_image; 49551078Speter int result; 49654206Speter u_long xirq; 49751088Speter u_int flags = device_get_flags(dev); 49851078Speter int rid; 49951078Speter struct resource *port; 50051078Speter 50158885Simp rid = xrid; 50251078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 50351078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 50451078Speter if (!port) 50557915Simp return (ENXIO); 50651078Speter 50786909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 508124669Sru if (com == NULL) { 509124669Sru bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 51086909Simp return (ENOMEM); 511124669Sru } 51286909Simp device_set_softc(dev, com); 51360471Snyan com->bst = rman_get_bustag(port); 51460471Snyan com->bsh = rman_get_bushandle(port); 51589986Sjhay if (rclk == 0) 51689986Sjhay rclk = DEFAULT_RCLK; 51789986Sjhay com->rclk = rclk; 51860471Snyan 51985209Sjhb while (sio_inited != 2) 52085209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 52193818Sjhb mtx_init(&sio_lock, sio_driver_name, NULL, 52293818Sjhb (comconsole != -1) ? 52385209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 52485209Sjhb atomic_store_rel_int(&sio_inited, 2); 52585209Sjhb } 52670174Sjhb 52753344Speter#if 0 52853344Speter /* 52953344Speter * XXX this is broken - when we are first called, there are no 53053344Speter * previously configured IO ports. We could hard code 53153344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 53253344Speter * This code has been doing nothing since the conversion since 53353344Speter * "count" is zero the first time around. 53453344Speter */ 53551078Speter if (!already_init) { 53651078Speter /* 53751078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 53851078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 53951078Speter * from any used port that shares the interrupt vector. 54051078Speter * XXX the gate enable is elsewhere for some multiports. 54151078Speter */ 54251078Speter device_t *devs; 54353344Speter int count, i, xioport; 54451078Speter 54551078Speter devclass_get_devices(sio_devclass, &devs, &count); 54651078Speter for (i = 0; i < count; i++) { 54751078Speter xdev = devs[i]; 54854194Speter if (device_is_enabled(xdev) && 54954194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 55054194Speter NULL) == 0) 55153344Speter outb(xioport + com_mcr, 0); 55251078Speter } 55351078Speter free(devs, M_TEMP); 55451078Speter already_init = TRUE; 55551078Speter } 55653344Speter#endif 55751078Speter 55851078Speter if (COM_LLCONSOLE(flags)) { 55951078Speter printf("sio%d: reserved for low-level i/o\n", 56051078Speter device_get_unit(dev)); 56156788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 56286909Simp device_set_softc(dev, NULL); 56386909Simp free(com, M_DEVBUF); 56451078Speter return (ENXIO); 56551078Speter } 56651078Speter 56751078Speter /* 56851078Speter * If the device is on a multiport card and has an AST/4 56951078Speter * compatible interrupt control register, initialize this 57051078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 57151078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 57251078Speter * Point idev to the device struct giving the correct id_irq. 57351078Speter * This is the struct for the master device if there is one. 57451078Speter */ 57551078Speter idev = dev; 57651078Speter mcr_image = MCR_IENABLE; 57751078Speter#ifdef COM_MULTIPORT 57857234Sbde if (COM_ISMULTIPORT(flags)) { 57954206Speter Port_t xiobase; 58054206Speter u_long io; 58154206Speter 58251078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 58351078Speter if (idev == NULL) { 58451078Speter printf("sio%d: master device %d not configured\n", 58551078Speter device_get_unit(dev), COM_MPMASTER(flags)); 58651078Speter idev = dev; 58751078Speter } 58857234Sbde if (!COM_NOTAST4(flags)) { 58957234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 59057234Sbde NULL) == 0) { 59157234Sbde xiobase = io; 59257234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 59357234Sbde NULL, NULL) == 0) 59457234Sbde outb(xiobase + com_scr, 0x80); 59557234Sbde else 59657234Sbde outb(xiobase + com_scr, 0); 59757234Sbde } 59857234Sbde mcr_image = 0; 59951078Speter } 60051078Speter } 60151078Speter#endif /* COM_MULTIPORT */ 60254194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 60351078Speter mcr_image = 0; 60451078Speter 60551078Speter bzero(failures, sizeof failures); 60651078Speter iobase = rman_get_start(port); 60751078Speter 60851078Speter /* 60951078Speter * We don't want to get actual interrupts, just masked ones. 61051078Speter * Interrupts from this line should already be masked in the ICU, 61151078Speter * but mask them in the processor as well in case there are some 61251078Speter * (misconfigured) shared interrupts. 61351078Speter */ 61472200Sbmilekic mtx_lock_spin(&sio_lock); 61551078Speter/* EXTRA DELAY? */ 61651078Speter 61751078Speter /* 618112384Ssobomax * For the TI16754 chips, set prescaler to 1 (4 is often the 619112384Ssobomax * default after-reset value) as otherwise it's impossible to 620112270Ssobomax * get highest baudrates. 621112270Ssobomax */ 622112270Ssobomax if (COM_TI16754(flags)) { 623112384Ssobomax u_char cfcr, efr; 624112270Ssobomax 625112384Ssobomax cfcr = sio_getreg(com, com_cfcr); 626112384Ssobomax sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 627112384Ssobomax efr = sio_getreg(com, com_efr); 628112384Ssobomax /* Unlock extended features to turn off prescaler. */ 629112384Ssobomax sio_setreg(com, com_efr, efr | EFR_EFE); 630112384Ssobomax /* Disable EFR. */ 631112384Ssobomax sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 632112384Ssobomax /* Turn off prescaler. */ 633112384Ssobomax sio_setreg(com, com_mcr, 634112384Ssobomax sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 635112384Ssobomax sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 636112384Ssobomax sio_setreg(com, com_efr, efr); 637112384Ssobomax sio_setreg(com, com_cfcr, cfcr); 638112270Ssobomax } 639112384Ssobomax 640112270Ssobomax /* 64151078Speter * Initialize the speed and the word size and wait long enough to 64251078Speter * drain the maximum of 16 bytes of junk in device output queues. 64351078Speter * The speed is undefined after a master reset and must be set 64451078Speter * before relying on anything related to output. There may be 64551078Speter * junk after a (very fast) soft reboot and (apparently) after 64651078Speter * master reset. 64751078Speter * XXX what about the UART bug avoided by waiting in comparam()? 64851078Speter * We don't want to to wait long enough to drain at 2 bps. 64951078Speter */ 65051078Speter if (iobase == siocniobase) 65151078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 65251078Speter else { 65360471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 65489986Sjhay divisor = siodivisor(rclk, SIO_TEST_SPEED); 65589986Sjhay sio_setreg(com, com_dlbl, divisor & 0xff); 65689986Sjhay sio_setreg(com, com_dlbh, divisor >> 8); 65760471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 65851078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 65951078Speter } 66051078Speter 66151078Speter /* 66251078Speter * Enable the interrupt gate and disable device interupts. This 66351078Speter * should leave the device driving the interrupt line low and 66451078Speter * guarantee an edge trigger if an interrupt can be generated. 66551078Speter */ 66651078Speter/* EXTRA DELAY? */ 66760471Snyan sio_setreg(com, com_mcr, mcr_image); 66860471Snyan sio_setreg(com, com_ier, 0); 66951078Speter DELAY(1000); /* XXX */ 67051078Speter irqmap[0] = isa_irq_pending(); 67151078Speter 67251078Speter /* 67351078Speter * Attempt to set loopback mode so that we can send a null byte 67451078Speter * without annoying any external device. 67551078Speter */ 67651078Speter/* EXTRA DELAY? */ 67760471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 67851078Speter 67951078Speter /* 68051078Speter * Attempt to generate an output interrupt. On 8250's, setting 68151078Speter * IER_ETXRDY generates an interrupt independent of the current 68251078Speter * setting and independent of whether the THR is empty. On 16450's, 68351078Speter * setting IER_ETXRDY generates an interrupt independent of the 68451078Speter * current setting. On 16550A's, setting IER_ETXRDY only 68551078Speter * generates an interrupt when IER_ETXRDY is not already set. 68651078Speter */ 68760471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 68851078Speter 68951078Speter /* 69051078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 69151078Speter * an interrupt. They'd better generate one for actually doing 69251078Speter * output. Loopback may be broken on the same incompatibles but 69351078Speter * it's unlikely to do more than allow the null byte out. 69451078Speter */ 69560471Snyan sio_setreg(com, com_data, 0); 696120468Sbde if (iobase == siocniobase) 697120468Sbde DELAY((1 + 2) * 1000000 / (comdefaultrate / 10)); 698120468Sbde else 699120468Sbde DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 70051078Speter 70151078Speter /* 70251078Speter * Turn off loopback mode so that the interrupt gate works again 70351078Speter * (MCR_IENABLE was hidden). This should leave the device driving 70451078Speter * an interrupt line high. It doesn't matter if the interrupt 70551078Speter * line oscillates while we are not looking at it, since interrupts 70651078Speter * are disabled. 70751078Speter */ 70851078Speter/* EXTRA DELAY? */ 70960471Snyan sio_setreg(com, com_mcr, mcr_image); 71092401Simp 71192401Simp /* 71292401Simp * It seems my Xircom CBEM56G Cardbus modem wants to be reset 71392401Simp * to 8 bits *again*, or else probe test 0 will fail. 71492401Simp * gwk@sgi.com, 4/19/2001 71592401Simp */ 71692401Simp sio_setreg(com, com_cfcr, CFCR_8BITS); 71751078Speter 71851078Speter /* 719120189Sbde * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug", 720120189Sbde * so we probe for a buggy IIR_TXRDY implementation even in the 721120189Sbde * noprobe case. We don't probe for it in the !noprobe case because 722120189Sbde * noprobe is always set for PCMCIA cards and the problem is not 723120189Sbde * known to affect any other cards. 72451078Speter */ 72585365Simp if (noprobe) { 726120189Sbde /* Read IIR a few times. */ 72753370Speter for (fn = 0; fn < 2; fn ++) { 72853370Speter DELAY(10000); 72960471Snyan failures[6] = sio_getreg(com, com_iir); 73053370Speter } 731120189Sbde 732120189Sbde /* IIR_TXRDY should be clear. Is it? */ 73353370Speter result = 0; 73453370Speter if (failures[6] & IIR_TXRDY) { 735120189Sbde /* 736120189Sbde * No. We seem to have the bug. Does our fix for 737120189Sbde * it work? 738120189Sbde */ 73960471Snyan sio_setreg(com, com_ier, 0); 74060471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 741120189Sbde /* Yes. We discovered the TXRDY bug! */ 74253370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 74353370Speter } else { 744120189Sbde /* No. Just fail. XXX */ 74553370Speter result = ENXIO; 74681793Simp sio_setreg(com, com_mcr, 0); 74753370Speter } 74851078Speter } else { 749120189Sbde /* Yes. No bug. */ 75053370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 75151078Speter } 75281793Simp sio_setreg(com, com_ier, 0); 75360471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 75472200Sbmilekic mtx_unlock_spin(&sio_lock); 75553344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 75686909Simp if (iobase == siocniobase) 75786909Simp result = 0; 75886909Simp if (result != 0) { 75986909Simp device_set_softc(dev, NULL); 76086909Simp free(com, M_DEVBUF); 76186909Simp } 76286909Simp return (result); 76353344Speter } 76453344Speter 76551078Speter /* 76651078Speter * Check that 76751078Speter * o the CFCR, IER and MCR in UART hold the values written to them 76851078Speter * (the values happen to be all distinct - this is good for 76951078Speter * avoiding false positive tests from bus echoes). 77051078Speter * o an output interrupt is generated and its vector is correct. 77151078Speter * o the interrupt goes away when the IIR in the UART is read. 77251078Speter */ 77351078Speter/* EXTRA DELAY? */ 77460471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 77560471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 776112270Ssobomax failures[2] = sio_getreg(com, com_mcr) - mcr_image; 77751078Speter DELAY(10000); /* Some internal modems need this time */ 77851078Speter irqmap[1] = isa_irq_pending(); 77960471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 78051078Speter DELAY(1000); /* XXX */ 78151078Speter irqmap[2] = isa_irq_pending(); 78260471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 78351078Speter 78451078Speter /* 78551078Speter * Turn off all device interrupts and check that they go off properly. 78651078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 78751078Speter * the OUT2 output of the UART to 78851078Speter * the ICU input. Closing the gate would give a floating ICU input 78951078Speter * (unless there is another device driving it) and spurious interrupts. 79051078Speter * (On the system that this was first tested on, the input floats high 79151078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 79251078Speter */ 79360471Snyan sio_setreg(com, com_ier, 0); 79460471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 79560471Snyan failures[7] = sio_getreg(com, com_ier); 79651078Speter DELAY(1000); /* XXX */ 79751078Speter irqmap[3] = isa_irq_pending(); 79860471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 79951078Speter 80072200Sbmilekic mtx_unlock_spin(&sio_lock); 80151078Speter 80251078Speter irqs = irqmap[1] & ~irqmap[0]; 80354194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 80489463Simp ((1 << xirq) & irqs) == 0) { 80551078Speter printf( 80654206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 80753344Speter device_get_unit(dev), xirq, irqs); 80889447Sbmah printf( 80989470Sbmah "sio%d: port may not be enabled\n", 81089447Sbmah device_get_unit(dev)); 81189463Simp } 81251078Speter if (bootverbose) 81351078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 81451078Speter device_get_unit(dev), 81551078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 81651078Speter 81751078Speter result = 0; 81851078Speter for (fn = 0; fn < sizeof failures; ++fn) 81951078Speter if (failures[fn]) { 82060471Snyan sio_setreg(com, com_mcr, 0); 82151078Speter result = ENXIO; 82251078Speter if (bootverbose) { 82351078Speter printf("sio%d: probe failed test(s):", 82451078Speter device_get_unit(dev)); 82551078Speter for (fn = 0; fn < sizeof failures; ++fn) 82651078Speter if (failures[fn]) 82751078Speter printf(" %d", fn); 82851078Speter printf("\n"); 82951078Speter } 83051078Speter break; 83151078Speter } 83251078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 83386909Simp if (iobase == siocniobase) 83486909Simp result = 0; 83586909Simp if (result != 0) { 83686909Simp device_set_softc(dev, NULL); 83786909Simp free(com, M_DEVBUF); 83886909Simp } 83986909Simp return (result); 84051078Speter} 84151078Speter 84251078Speter#ifdef COM_ESP 84351078Speterstatic int 84451078Speterespattach(com, esp_port) 84551078Speter struct com_s *com; 84651078Speter Port_t esp_port; 84751078Speter{ 84851078Speter u_char dips; 84951078Speter u_char val; 85051078Speter 85151078Speter /* 85251078Speter * Check the ESP-specific I/O port to see if we're an ESP 85351078Speter * card. If not, return failure immediately. 85451078Speter */ 85551078Speter if ((inb(esp_port) & 0xf3) == 0) { 85651078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 85751078Speter return (0); 85851078Speter } 85951078Speter 86051078Speter /* 86151078Speter * We've got something that claims to be a Hayes ESP card. 86251078Speter * Let's hope so. 86351078Speter */ 86451078Speter 86551078Speter /* Get the dip-switch configuration */ 86651078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 86751078Speter dips = inb(esp_port + ESP_STATUS1); 86851078Speter 86951078Speter /* 87051078Speter * Bits 0,1 of dips say which COM port we are. 87151078Speter */ 87260471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 87351078Speter printf(" : ESP"); 87451078Speter else { 87551078Speter printf(" esp_port has com %d\n", dips & 0x03); 87651078Speter return (0); 87751078Speter } 87851078Speter 87951078Speter /* 88051078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 88151078Speter */ 88251078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 88351078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 88451078Speter val = inb(esp_port + ESP_STATUS2); 88551078Speter if ((val & 0x70) < 0x20) { 88651078Speter printf("-old (%o)", val & 0x70); 88751078Speter return (0); 88851078Speter } 88951078Speter 89051078Speter /* 89151078Speter * Check for ability to emulate 16550: bit 7 == 1 89251078Speter */ 89351078Speter if ((dips & 0x80) == 0) { 89451078Speter printf(" slave"); 89551078Speter return (0); 89651078Speter } 89751078Speter 89851078Speter /* 89951078Speter * Okay, we seem to be a Hayes ESP card. Whee. 90051078Speter */ 90151078Speter com->esp = TRUE; 90251078Speter com->esp_port = esp_port; 90351078Speter return (1); 90451078Speter} 90551078Speter#endif /* COM_ESP */ 90651078Speter 90785365Simpint 90889986Sjhaysioattach(dev, xrid, rclk) 90951078Speter device_t dev; 91058885Simp int xrid; 91189986Sjhay u_long rclk; 91251078Speter{ 91351078Speter struct com_s *com; 91451078Speter#ifdef COM_ESP 91551078Speter Port_t *espp; 91651078Speter#endif 91751078Speter Port_t iobase; 91893470Sbde int minorbase; 91951078Speter int unit; 92053344Speter u_int flags; 92151078Speter int rid; 92251078Speter struct resource *port; 92353344Speter int ret; 92451078Speter 92558885Simp rid = xrid; 92651078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 92751078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 92851078Speter if (!port) 92957915Simp return (ENXIO); 93051078Speter 93151078Speter iobase = rman_get_start(port); 93251078Speter unit = device_get_unit(dev); 93351078Speter com = device_get_softc(dev); 93453344Speter flags = device_get_flags(dev); 93551078Speter 93653344Speter if (unit >= sio_numunits) 93753344Speter sio_numunits = unit + 1; 93851078Speter /* 93951078Speter * sioprobe() has initialized the device registers as follows: 94051078Speter * o cfcr = CFCR_8BITS. 94151078Speter * It is most important that CFCR_DLAB is off, so that the 94251078Speter * data port is not hidden when we enable interrupts. 94351078Speter * o ier = 0. 94451078Speter * Interrupts are only enabled when the line is open. 94551078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 94651078Speter * interrupt control register or the config specifies no irq. 94751078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 94851078Speter * device from sending before we are ready. 94951078Speter */ 95051078Speter bzero(com, sizeof *com); 95151078Speter com->unit = unit; 95251078Speter com->ioportres = port; 953116120Sscottl com->ioportrid = rid; 95460471Snyan com->bst = rman_get_bustag(port); 95560471Snyan com->bsh = rman_get_bushandle(port); 95651078Speter com->cfcr_image = CFCR_8BITS; 95751078Speter com->dtr_wait = 3 * hz; 95851078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 95957234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 96051078Speter com->tx_fifo_size = 1; 96151078Speter com->obufs[0].l_head = com->obuf1; 96251078Speter com->obufs[1].l_head = com->obuf2; 96351078Speter 96451078Speter com->data_port = iobase + com_data; 965120189Sbde com->int_ctl_port = iobase + com_ier; 96651078Speter com->int_id_port = iobase + com_iir; 96751078Speter com->modem_ctl_port = iobase + com_mcr; 96851078Speter com->mcr_image = inb(com->modem_ctl_port); 96951078Speter com->line_status_port = iobase + com_lsr; 97051078Speter com->modem_status_port = iobase + com_msr; 97151078Speter 97289986Sjhay if (rclk == 0) 97389986Sjhay rclk = DEFAULT_RCLK; 97489986Sjhay com->rclk = rclk; 97589986Sjhay 97651078Speter /* 97751078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 97851078Speter * are only relevant for logins. It's important to have echo off 97951078Speter * initially so that the line doesn't start blathering before the 98051078Speter * echo flag can be turned off. 98151078Speter */ 98251078Speter com->it_in.c_iflag = 0; 98351078Speter com->it_in.c_oflag = 0; 98451078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 98551078Speter com->it_in.c_lflag = 0; 98651078Speter if (unit == comconsole) { 98751078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 98851078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 98951078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 99051078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 99151078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 99251078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 99351078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 99451078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 99551078Speter } else 99651078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 99765605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 99872200Sbmilekic mtx_unlock_spin(&sio_lock); 99956788Sbde /* 100056788Sbde * Leave i/o resources allocated if this is a `cn'-level 100156788Sbde * console, so that other devices can't snarf them. 100256788Sbde */ 100356788Sbde if (iobase != siocniobase) 100456788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 100556788Sbde return (ENOMEM); 100651078Speter } 100772200Sbmilekic mtx_unlock_spin(&sio_lock); 100851078Speter termioschars(&com->it_in); 100951078Speter com->it_out = com->it_in; 101051078Speter 101151078Speter /* attempt to determine UART type */ 101251078Speter printf("sio%d: type", unit); 101351078Speter 101451078Speter 1015104067Sphk if (!COM_ISMULTIPORT(flags) && 1016104067Sphk !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 101751078Speter u_char scr; 101851078Speter u_char scr1; 101951078Speter u_char scr2; 102051078Speter 102160471Snyan scr = sio_getreg(com, com_scr); 102260471Snyan sio_setreg(com, com_scr, 0xa5); 102360471Snyan scr1 = sio_getreg(com, com_scr); 102460471Snyan sio_setreg(com, com_scr, 0x5a); 102560471Snyan scr2 = sio_getreg(com, com_scr); 102660471Snyan sio_setreg(com, com_scr, scr); 102751078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 102889447Sbmah printf(" 8250 or not responding"); 102951078Speter goto determined_type; 103051078Speter } 103151078Speter } 103260471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 103351078Speter DELAY(100); 103451078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 103551078Speter case FIFO_RX_LOW: 103651078Speter printf(" 16450"); 103751078Speter break; 103851078Speter case FIFO_RX_MEDL: 103951078Speter printf(" 16450?"); 104051078Speter break; 104151078Speter case FIFO_RX_MEDH: 104251078Speter printf(" 16550?"); 104351078Speter break; 104451078Speter case FIFO_RX_HIGH: 104551078Speter if (COM_NOFIFO(flags)) { 104651078Speter printf(" 16550A fifo disabled"); 1047120173Sbde break; 104851078Speter } 1049120173Sbde com->hasfifo = TRUE; 1050120173Sbde if (COM_ST16650A(flags)) { 1051120173Sbde printf(" ST16650A"); 1052120173Sbde com->st16650a = TRUE; 1053120173Sbde com->tx_fifo_size = 32; 1054120173Sbde break; 1055120173Sbde } 1056120173Sbde if (COM_TI16754(flags)) { 1057120173Sbde printf(" TI16754"); 1058120173Sbde com->tx_fifo_size = 64; 1059120173Sbde break; 1060120173Sbde } 1061120173Sbde printf(" 16550A"); 106251078Speter#ifdef COM_ESP 106351078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 106451078Speter if (espattach(com, *espp)) { 106551078Speter com->tx_fifo_size = 1024; 106651078Speter break; 106751078Speter } 1068123796Sbde if (com->esp) 1069120173Sbde break; 107051078Speter#endif 1071120173Sbde com->tx_fifo_size = COM_FIFOSIZE(flags); 1072120173Sbde if (com->tx_fifo_size == 0) 1073120173Sbde com->tx_fifo_size = 16; 1074120173Sbde else 1075120173Sbde printf(" lookalike with %u bytes FIFO", 1076120173Sbde com->tx_fifo_size); 107751078Speter break; 107851078Speter } 107951078Speter#ifdef COM_ESP 1080123796Sbde if (com->esp) { 108151078Speter /* 108251078Speter * Set 16550 compatibility mode. 108351078Speter * We don't use the ESP_MODE_SCALE bit to increase the 108451078Speter * fifo trigger levels because we can't handle large 108551078Speter * bursts of input. 108651078Speter * XXX flow control should be set in comparam(), not here. 108751078Speter */ 108851078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 108951078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 109051078Speter 109151078Speter /* Set RTS/CTS flow control. */ 109251078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 109351078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 109451078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 109551078Speter 109651078Speter /* Set flow-control levels. */ 109751078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 109851078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 109951078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 110051078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 110151078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 110251078Speter } 110351078Speter#endif /* COM_ESP */ 110460471Snyan sio_setreg(com, com_fifo, 0); 110551078Speterdetermined_type: ; 110651078Speter 110751078Speter#ifdef COM_MULTIPORT 110851078Speter if (COM_ISMULTIPORT(flags)) { 110953344Speter device_t masterdev; 111053344Speter 111151078Speter com->multiport = TRUE; 111251078Speter printf(" (multiport"); 111351078Speter if (unit == COM_MPMASTER(flags)) 111451078Speter printf(" master"); 111551078Speter printf(")"); 111653344Speter masterdev = devclass_get_device(sio_devclass, 111753344Speter COM_MPMASTER(flags)); 111857234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 111957234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 112051078Speter } 112151078Speter#endif /* COM_MULTIPORT */ 112251078Speter if (unit == comconsole) 112351078Speter printf(", console"); 112453344Speter if (COM_IIR_TXRDYBUG(flags)) 1125120189Sbde printf(" with a buggy IIR_TXRDY implementation"); 112651078Speter printf("\n"); 112751078Speter 112867551Sjhb if (sio_fast_ih == NULL) { 112972238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 113072238Sjhb &sio_fast_ih); 113172238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 113272238Sjhb &sio_slow_ih); 113351078Speter } 113493470Sbde minorbase = UNIT_TO_MINOR(unit); 113593470Sbde com->devs[0] = make_dev(&sio_cdevsw, minorbase, 113651078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 113793470Sbde com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 113851078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 113993470Sbde com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 114051078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 114193470Sbde com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 114251078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 114365131Sphk com->devs[4] = make_dev(&sio_cdevsw, 114493470Sbde minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 114551078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 114665131Sphk com->devs[5] = make_dev(&sio_cdevsw, 114793470Sbde minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 114851078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1149110249Sphk for (rid = 0; rid < 6; rid++) 1150110249Sphk com->devs[rid]->si_drv1 = com; 115151078Speter com->flags = flags; 115251078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1153111613Sphk 1154111613Sphk if (COM_PPSCTS(flags)) 1155111613Sphk com->pps_bit = MSR_CTS; 1156111613Sphk else 1157111613Sphk com->pps_bit = MSR_DCD; 115851078Speter pps_init(&com->pps); 115951078Speter 116051078Speter rid = 0; 1161127135Snjl com->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 116253344Speter if (com->irqres) { 116353344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 116465557Sjasone INTR_TYPE_TTY | INTR_FAST, 116554386Simp siointr, com, &com->cookie); 116654194Speter if (ret) { 116754194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 116854194Speter com->irqres, INTR_TYPE_TTY, 116954386Simp siointr, com, &com->cookie); 117054194Speter if (ret == 0) 117183246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 117254194Speter } 117353344Speter if (ret) 117453344Speter device_printf(dev, "could not activate interrupt\n"); 117578504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1176127157Snjl defined(ALT_BREAK_TO_DEBUGGER)) 117778504Siedowse /* 117878504Siedowse * Enable interrupts for early break-to-debugger support 1179127157Snjl * on the console. 118078504Siedowse */ 1181127157Snjl if (ret == 0 && unit == comconsole) 118278504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 118378504Siedowse IER_EMSC); 118478504Siedowse#endif 118553344Speter } 118651078Speter 118751078Speter return (0); 118851078Speter} 118951078Speter 119051078Speterstatic int 119183366Sjuliansioopen(dev, flag, mode, td) 119251078Speter dev_t dev; 119351078Speter int flag; 119451078Speter int mode; 119583366Sjulian struct thread *td; 119651078Speter{ 119751078Speter struct com_s *com; 119851078Speter int error; 119951078Speter int mynor; 120051078Speter int s; 120151078Speter struct tty *tp; 120251078Speter int unit; 120351078Speter 120451078Speter mynor = minor(dev); 120551078Speter unit = MINOR_TO_UNIT(mynor); 120653344Speter com = com_addr(unit); 120753344Speter if (com == NULL) 120851078Speter return (ENXIO); 120951078Speter if (com->gone) 121051078Speter return (ENXIO); 121151078Speter if (mynor & CONTROL_MASK) 121251078Speter return (0); 121351078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 121451078Speter s = spltty(); 121551078Speter /* 121651078Speter * We jump to this label after all non-interrupted sleeps to pick 121751078Speter * up any changes of the device state. 121851078Speter */ 121951078Speteropen_top: 122051078Speter while (com->state & CS_DTR_OFF) { 122151078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 122251078Speter if (com_addr(unit) == NULL) 122351078Speter return (ENXIO); 122451078Speter if (error != 0 || com->gone) 122551078Speter goto out; 122651078Speter } 122751078Speter if (tp->t_state & TS_ISOPEN) { 122851078Speter /* 122951078Speter * The device is open, so everything has been initialized. 123051078Speter * Handle conflicts. 123151078Speter */ 123251078Speter if (mynor & CALLOUT_MASK) { 123351078Speter if (!com->active_out) { 123451078Speter error = EBUSY; 123551078Speter goto out; 123651078Speter } 123751078Speter } else { 123851078Speter if (com->active_out) { 123951078Speter if (flag & O_NONBLOCK) { 124051078Speter error = EBUSY; 124151078Speter goto out; 124251078Speter } 124351078Speter error = tsleep(&com->active_out, 124451078Speter TTIPRI | PCATCH, "siobi", 0); 124551078Speter if (com_addr(unit) == NULL) 124651078Speter return (ENXIO); 124751078Speter if (error != 0 || com->gone) 124851078Speter goto out; 124951078Speter goto open_top; 125051078Speter } 125151078Speter } 125251078Speter if (tp->t_state & TS_XCLUDE && 125393593Sjhb suser(td)) { 125451078Speter error = EBUSY; 125551078Speter goto out; 125651078Speter } 125751078Speter } else { 125851078Speter /* 125951078Speter * The device isn't open, so there are no conflicts. 126051078Speter * Initialize it. Initialization is done twice in many 126151078Speter * cases: to preempt sleeping callin opens if we are 126251078Speter * callout, and to complete a callin open after DCD rises. 126351078Speter */ 126451078Speter tp->t_oproc = comstart; 126551078Speter tp->t_param = comparam; 126651654Sphk tp->t_stop = comstop; 126751078Speter tp->t_dev = dev; 126851078Speter tp->t_termios = mynor & CALLOUT_MASK 126951078Speter ? com->it_out : com->it_in; 127051078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 127151078Speter com->poll = com->no_irq; 127251078Speter com->poll_output = com->loses_outints; 127351078Speter ++com->wopeners; 127451078Speter error = comparam(tp, &tp->t_termios); 127551078Speter --com->wopeners; 127651078Speter if (error != 0) 127751078Speter goto out; 127851078Speter /* 127951078Speter * XXX we should goto open_top if comparam() slept. 128051078Speter */ 128151078Speter if (com->hasfifo) { 1282102542Sphk int i; 128351078Speter /* 128451078Speter * (Re)enable and drain fifos. 128551078Speter * 128651078Speter * Certain SMC chips cause problems if the fifos 128751078Speter * are enabled while input is ready. Turn off the 128851078Speter * fifo if necessary to clear the input. We test 128951078Speter * the input ready bit after enabling the fifos 129051078Speter * since we've already enabled them in comparam() 129151078Speter * and to handle races between enabling and fresh 129251078Speter * input. 129351078Speter */ 1294102542Sphk for (i = 0; i < 500; i++) { 129560471Snyan sio_setreg(com, com_fifo, 129660471Snyan FIFO_RCV_RST | FIFO_XMT_RST 129760471Snyan | com->fifo_image); 129851078Speter /* 129951078Speter * XXX the delays are for superstitious 130051078Speter * historical reasons. It must be less than 130151078Speter * the character time at the maximum 130251078Speter * supported speed (87 usec at 115200 bps 130351078Speter * 8N1). Otherwise we might loop endlessly 130451078Speter * if data is streaming in. We used to use 130551078Speter * delays of 100. That usually worked 130651078Speter * because DELAY(100) used to usually delay 130751078Speter * for about 85 usec instead of 100. 130851078Speter */ 130951078Speter DELAY(50); 131051078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 131151078Speter break; 131260471Snyan sio_setreg(com, com_fifo, 0); 131351078Speter DELAY(50); 131451078Speter (void) inb(com->data_port); 131551078Speter } 1316102542Sphk if (i == 500) { 1317102542Sphk error = EIO; 1318102542Sphk goto out; 1319102542Sphk } 132051078Speter } 132151078Speter 132272200Sbmilekic mtx_lock_spin(&sio_lock); 132351078Speter (void) inb(com->line_status_port); 132451078Speter (void) inb(com->data_port); 132551078Speter com->prev_modem_status = com->last_modem_status 132651078Speter = inb(com->modem_status_port); 1327120189Sbde outb(com->int_ctl_port, 1328120189Sbde IER_ERXRDY | IER_ERLS | IER_EMSC 1329120189Sbde | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY)); 133072200Sbmilekic mtx_unlock_spin(&sio_lock); 133151078Speter /* 133251078Speter * Handle initial DCD. Callout devices get a fake initial 133351078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 133451078Speter * callin opens get woken up and resume sleeping on "siobi" 133551078Speter * instead of "siodcd". 133651078Speter */ 133751078Speter /* 133851078Speter * XXX `mynor & CALLOUT_MASK' should be 133951078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 134051078Speter * TRAPDOOR_CARRIER is the default initial state for callout 134151078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 134251078Speter * the true carrier. 134351078Speter */ 134451078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 134551078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 134651078Speter } 134751078Speter /* 134851078Speter * Wait for DCD if necessary. 134951078Speter */ 135051078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 135151078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 135251078Speter ++com->wopeners; 135351078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 135451078Speter if (com_addr(unit) == NULL) 135551078Speter return (ENXIO); 135651078Speter --com->wopeners; 135751078Speter if (error != 0 || com->gone) 135851078Speter goto out; 135951078Speter goto open_top; 136051078Speter } 136151078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 136251078Speter disc_optim(tp, &tp->t_termios, com); 136351078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 136451078Speter com->active_out = TRUE; 136551078Speter siosettimeout(); 136651078Speterout: 136751078Speter splx(s); 136851078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 136951078Speter comhardclose(com); 137051078Speter return (error); 137151078Speter} 137251078Speter 137351078Speterstatic int 137483366Sjuliansioclose(dev, flag, mode, td) 137551078Speter dev_t dev; 137651078Speter int flag; 137751078Speter int mode; 137883366Sjulian struct thread *td; 137951078Speter{ 138051078Speter struct com_s *com; 138151078Speter int mynor; 138251078Speter int s; 138351078Speter struct tty *tp; 138451078Speter 138551078Speter mynor = minor(dev); 138651078Speter if (mynor & CONTROL_MASK) 138751078Speter return (0); 138851078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 138957915Simp if (com == NULL) 139057915Simp return (ENODEV); 139151078Speter tp = com->tp; 139251078Speter s = spltty(); 139351078Speter (*linesw[tp->t_line].l_close)(tp, flag); 139451078Speter disc_optim(tp, &tp->t_termios, com); 139551654Sphk comstop(tp, FREAD | FWRITE); 139651078Speter comhardclose(com); 139751078Speter ttyclose(tp); 139851078Speter siosettimeout(); 139951078Speter splx(s); 140051078Speter if (com->gone) { 140151078Speter printf("sio%d: gone\n", com->unit); 140251078Speter s = spltty(); 140351078Speter if (com->ibuf != NULL) 140451078Speter free(com->ibuf, M_DEVBUF); 140551078Speter bzero(tp, sizeof *tp); 140651078Speter splx(s); 140751078Speter } 140851078Speter return (0); 140951078Speter} 141051078Speter 141151078Speterstatic void 141251078Spetercomhardclose(com) 141351078Speter struct com_s *com; 141451078Speter{ 141551078Speter int s; 141651078Speter struct tty *tp; 141751078Speter 141851078Speter s = spltty(); 141951078Speter com->poll = FALSE; 142051078Speter com->poll_output = FALSE; 142151078Speter com->do_timestamp = FALSE; 142251078Speter com->do_dcd_timestamp = FALSE; 142351078Speter com->pps.ppsparam.mode = 0; 142460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 142578504Siedowse tp = com->tp; 142678504Siedowse 142778504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1428127157Snjl defined(ALT_BREAK_TO_DEBUGGER)) 142978504Siedowse /* 143078504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 143178504Siedowse * console. This allows us to detect break-to-debugger events 143278504Siedowse * while the console device is closed. 143378504Siedowse */ 1434127157Snjl if (com->unit != comconsole) 143578504Siedowse#endif 143651078Speter { 143760471Snyan sio_setreg(com, com_ier, 0); 143851078Speter if (tp->t_cflag & HUPCL 143951078Speter /* 144051078Speter * XXX we will miss any carrier drop between here and the 144151078Speter * next open. Perhaps we should watch DCD even when the 144251078Speter * port is closed; it is not sufficient to check it at 144351078Speter * the next open because it might go up and down while 144451078Speter * we're not watching. 144551078Speter */ 144651078Speter || (!com->active_out 144751078Speter && !(com->prev_modem_status & MSR_DCD) 144851078Speter && !(com->it_in.c_cflag & CLOCAL)) 144951078Speter || !(tp->t_state & TS_ISOPEN)) { 145051078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 145151078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 145251078Speter timeout(siodtrwakeup, com, com->dtr_wait); 145351078Speter com->state |= CS_DTR_OFF; 145451078Speter } 145551078Speter } 145651078Speter } 145751078Speter if (com->hasfifo) { 145851078Speter /* 145951078Speter * Disable fifos so that they are off after controlled 146051078Speter * reboots. Some BIOSes fail to detect 16550s when the 146151078Speter * fifos are enabled. 146251078Speter */ 146360471Snyan sio_setreg(com, com_fifo, 0); 146451078Speter } 146551078Speter com->active_out = FALSE; 146651078Speter wakeup(&com->active_out); 146751078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 146851078Speter splx(s); 146951078Speter} 147051078Speter 147151078Speterstatic int 147251078Spetersioread(dev, uio, flag) 147351078Speter dev_t dev; 147451078Speter struct uio *uio; 147551078Speter int flag; 147651078Speter{ 147751078Speter int mynor; 147851078Speter struct com_s *com; 147951078Speter 148051078Speter mynor = minor(dev); 148151078Speter if (mynor & CONTROL_MASK) 148251078Speter return (ENODEV); 148351078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 148457915Simp if (com == NULL || com->gone) 148551078Speter return (ENODEV); 148651078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 148751078Speter} 148851078Speter 148951078Speterstatic int 149051078Spetersiowrite(dev, uio, flag) 149151078Speter dev_t dev; 149251078Speter struct uio *uio; 149351078Speter int flag; 149451078Speter{ 149551078Speter int mynor; 149651078Speter struct com_s *com; 149751078Speter int unit; 149851078Speter 149951078Speter mynor = minor(dev); 150051078Speter if (mynor & CONTROL_MASK) 150151078Speter return (ENODEV); 150251078Speter 150351078Speter unit = MINOR_TO_UNIT(mynor); 150451078Speter com = com_addr(unit); 150557915Simp if (com == NULL || com->gone) 150651078Speter return (ENODEV); 150751078Speter /* 150851078Speter * (XXX) We disallow virtual consoles if the physical console is 150951078Speter * a serial port. This is in case there is a display attached that 151051078Speter * is not the console. In that situation we don't need/want the X 151151078Speter * server taking over the console. 151251078Speter */ 151351078Speter if (constty != NULL && unit == comconsole) 151451078Speter constty = NULL; 151551078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 151651078Speter} 151751078Speter 151851078Speterstatic void 151951078Spetersiobusycheck(chan) 152051078Speter void *chan; 152151078Speter{ 152251078Speter struct com_s *com; 152351078Speter int s; 152451078Speter 152551078Speter com = (struct com_s *)chan; 152651078Speter 152751078Speter /* 152851078Speter * Clear TS_BUSY if low-level output is complete. 152951078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 153051078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 153151078Speter * called again. Reading the line status port outside of siointr1() 153251078Speter * is safe because CS_BUSY is clear so there are no output interrupts 153351078Speter * to lose. 153451078Speter */ 153551078Speter s = spltty(); 153651078Speter if (com->state & CS_BUSY) 153751078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 153851078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 153951078Speter == (LSR_TSRE | LSR_TXRDY)) { 154051078Speter com->tp->t_state &= ~TS_BUSY; 154151078Speter ttwwakeup(com->tp); 154251078Speter com->extra_state &= ~CSE_BUSYCHECK; 154351078Speter } else 154451078Speter timeout(siobusycheck, com, hz / 100); 154551078Speter splx(s); 154651078Speter} 154751078Speter 154889986Sjhaystatic u_int 154989986Sjhaysiodivisor(rclk, speed) 155089986Sjhay u_long rclk; 155189986Sjhay speed_t speed; 155289986Sjhay{ 155389986Sjhay long actual_speed; 155489986Sjhay u_int divisor; 155589986Sjhay int error; 155689986Sjhay 1557114334Speter if (speed == 0) 155889986Sjhay return (0); 1559114334Speter#if UINT_MAX > (ULONG_MAX - 1) / 8 1560114334Speter if (speed > (ULONG_MAX - 1) / 8) 1561114334Speter return (0); 1562114334Speter#endif 156389986Sjhay divisor = (rclk / (8UL * speed) + 1) / 2; 156489986Sjhay if (divisor == 0 || divisor >= 65536) 156589986Sjhay return (0); 156689986Sjhay actual_speed = rclk / (16UL * divisor); 156789986Sjhay 156889986Sjhay /* 10 times error in percent: */ 156989986Sjhay error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 157089986Sjhay 157189986Sjhay /* 3.0% maximum error tolerance: */ 157289986Sjhay if (error < -30 || error > 30) 157389986Sjhay return (0); 157489986Sjhay 157589986Sjhay return (divisor); 157689986Sjhay} 157789986Sjhay 157851078Speterstatic void 157951078Spetersiodtrwakeup(chan) 158051078Speter void *chan; 158151078Speter{ 158251078Speter struct com_s *com; 158351078Speter 158451078Speter com = (struct com_s *)chan; 158551078Speter com->state &= ~CS_DTR_OFF; 158651078Speter wakeup(&com->dtr_wait); 158751078Speter} 158851078Speter 158965557Sjasone/* 159070174Sjhb * Call this function with the sio_lock mutex held. It will return with the 159170174Sjhb * lock still held. 159265557Sjasone */ 159351078Speterstatic void 159451078Spetersioinput(com) 159551078Speter struct com_s *com; 159651078Speter{ 159751078Speter u_char *buf; 159851078Speter int incc; 159951078Speter u_char line_status; 160051078Speter int recv_data; 160151078Speter struct tty *tp; 160251078Speter 160351078Speter buf = com->ibuf; 160451078Speter tp = com->tp; 160551078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 160651078Speter com_events -= (com->iptr - com->ibuf); 160751078Speter com->iptr = com->ibuf; 160851078Speter return; 160951078Speter } 161051078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 161151078Speter /* 161251078Speter * Avoid the grotesquely inefficient lineswitch routine 161351078Speter * (ttyinput) in "raw" mode. It usually takes about 450 161451078Speter * instructions (that's without canonical processing or echo!). 161551078Speter * slinput is reasonably fast (usually 40 instructions plus 161651078Speter * call overhead). 161751078Speter */ 161851078Speter do { 161965557Sjasone /* 162065557Sjasone * This may look odd, but it is using save-and-enable 162165557Sjasone * semantics instead of the save-and-disable semantics 162265557Sjasone * that are used everywhere else. 162365557Sjasone */ 162472200Sbmilekic mtx_unlock_spin(&sio_lock); 162551078Speter incc = com->iptr - buf; 162651078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 162751078Speter && (com->state & CS_RTS_IFLOW 162851078Speter || tp->t_iflag & IXOFF) 162951078Speter && !(tp->t_state & TS_TBLOCK)) 163051078Speter ttyblock(tp); 163151078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 163251078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 163351078Speter buf += incc; 163451078Speter tk_nin += incc; 163551078Speter tk_rawcc += incc; 163651078Speter tp->t_rawcc += incc; 163751078Speter ttwakeup(tp); 163851078Speter if (tp->t_state & TS_TTSTOP 163951078Speter && (tp->t_iflag & IXANY 164051078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 164151078Speter tp->t_state &= ~TS_TTSTOP; 164251078Speter tp->t_lflag &= ~FLUSHO; 164351078Speter comstart(tp); 164451078Speter } 164572200Sbmilekic mtx_lock_spin(&sio_lock); 164651078Speter } while (buf < com->iptr); 164751078Speter } else { 164851078Speter do { 164965557Sjasone /* 165065557Sjasone * This may look odd, but it is using save-and-enable 165165557Sjasone * semantics instead of the save-and-disable semantics 165265557Sjasone * that are used everywhere else. 165365557Sjasone */ 165472200Sbmilekic mtx_unlock_spin(&sio_lock); 165551078Speter line_status = buf[com->ierroff]; 165651078Speter recv_data = *buf++; 165751078Speter if (line_status 165851078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 165951078Speter if (line_status & LSR_BI) 166051078Speter recv_data |= TTY_BI; 166151078Speter if (line_status & LSR_FE) 166251078Speter recv_data |= TTY_FE; 166351078Speter if (line_status & LSR_OE) 166451078Speter recv_data |= TTY_OE; 166551078Speter if (line_status & LSR_PE) 166651078Speter recv_data |= TTY_PE; 166751078Speter } 166851078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 166972200Sbmilekic mtx_lock_spin(&sio_lock); 167051078Speter } while (buf < com->iptr); 167151078Speter } 167251078Speter com_events -= (com->iptr - com->ibuf); 167351078Speter com->iptr = com->ibuf; 167451078Speter 167551078Speter /* 167651078Speter * There is now room for another low-level buffer full of input, 167751078Speter * so enable RTS if it is now disabled and there is room in the 167851078Speter * high-level buffer. 167951078Speter */ 168051078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 168151078Speter !(tp->t_state & TS_TBLOCK)) 168251078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 168351078Speter} 168451078Speter 1685104094Sphkstatic void 168651078Spetersiointr(arg) 168751078Speter void *arg; 168851078Speter{ 168970174Sjhb struct com_s *com; 169070174Sjhb 169151078Speter#ifndef COM_MULTIPORT 169270174Sjhb com = (struct com_s *)arg; 169370174Sjhb 169472200Sbmilekic mtx_lock_spin(&sio_lock); 169570174Sjhb siointr1(com); 169672200Sbmilekic mtx_unlock_spin(&sio_lock); 169751078Speter#else /* COM_MULTIPORT */ 169851078Speter bool_t possibly_more_intrs; 169951078Speter int unit; 170051078Speter 170151078Speter /* 170251078Speter * Loop until there is no activity on any port. This is necessary 170351078Speter * to get an interrupt edge more than to avoid another interrupt. 170451078Speter * If the IRQ signal is just an OR of the IRQ signals from several 170551078Speter * devices, then the edge from one may be lost because another is 170651078Speter * on. 170751078Speter */ 170872200Sbmilekic mtx_lock_spin(&sio_lock); 170951078Speter do { 171051078Speter possibly_more_intrs = FALSE; 171153344Speter for (unit = 0; unit < sio_numunits; ++unit) { 171251078Speter com = com_addr(unit); 171351078Speter /* 171451078Speter * XXX COM_LOCK(); 171551078Speter * would it work here, or be counter-productive? 171651078Speter */ 171751078Speter if (com != NULL 171851078Speter && !com->gone 171951078Speter && (inb(com->int_id_port) & IIR_IMASK) 172051078Speter != IIR_NOPEND) { 172151078Speter siointr1(com); 172251078Speter possibly_more_intrs = TRUE; 172351078Speter } 172451078Speter /* XXX COM_UNLOCK(); */ 172551078Speter } 172651078Speter } while (possibly_more_intrs); 172772200Sbmilekic mtx_unlock_spin(&sio_lock); 172851078Speter#endif /* COM_MULTIPORT */ 172951078Speter} 173051078Speter 1731122819Sbdestatic struct timespec siots[8]; 173293466Sbdestatic int siotso; 173393466Sbdestatic int volatile siotsunit = -1; 173493466Sbde 173593466Sbdestatic int 173693466Sbdesysctl_siots(SYSCTL_HANDLER_ARGS) 173793466Sbde{ 173893466Sbde char buf[128]; 173993466Sbde long long delta; 174093466Sbde size_t len; 1741122819Sbde int error, i, tso; 174293466Sbde 1743122819Sbde for (i = 1, tso = siotso; i < tso; i++) { 174493466Sbde delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 174593466Sbde 1000000000 + 174693466Sbde (siots[i].tv_nsec - siots[i - 1].tv_nsec); 174793466Sbde len = sprintf(buf, "%lld\n", delta); 174893466Sbde if (delta >= 110000) 174993466Sbde len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 1750122819Sbde (long)siots[i].tv_sec, siots[i].tv_nsec) - 1; 1751122819Sbde if (i == tso - 1) 175293466Sbde buf[len - 1] = '\0'; 175393466Sbde error = SYSCTL_OUT(req, buf, len); 175493466Sbde if (error != 0) 175593466Sbde return (error); 175693466Sbde uio_yield(); 175793466Sbde } 175893466Sbde return (0); 175993466Sbde} 176093466Sbde 176193466SbdeSYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 176293466Sbde 0, 0, sysctl_siots, "A", "sio timestamps"); 176393466Sbde 176451078Speterstatic void 176551078Spetersiointr1(com) 176651078Speter struct com_s *com; 176751078Speter{ 1768120189Sbde u_char int_ctl; 1769120189Sbde u_char int_ctl_new; 177051078Speter u_char line_status; 177151078Speter u_char modem_status; 177251078Speter u_char *ioptr; 177351078Speter u_char recv_data; 177451078Speter 1775120091Sbde if (COM_IIR_TXRDYBUG(com->flags)) { 1776120189Sbde int_ctl = inb(com->int_ctl_port); 1777120091Sbde int_ctl_new = int_ctl; 1778120091Sbde } else { 1779120091Sbde int_ctl = 0; 1780120091Sbde int_ctl_new = 0; 1781120091Sbde } 178251078Speter 178351078Speter while (!com->gone) { 178451078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 178551078Speter modem_status = inb(com->modem_status_port); 1786111613Sphk if ((modem_status ^ com->last_modem_status) & 1787111613Sphk com->pps_bit) { 178895523Sphk pps_capture(&com->pps); 1789111613Sphk pps_event(&com->pps, 1790111616Sphk (modem_status & com->pps_bit) ? 179151078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 179251078Speter } 179351078Speter } 179451078Speter line_status = inb(com->line_status_port); 179551078Speter 179651078Speter /* input event? (check first to help avoid overruns) */ 179751078Speter while (line_status & LSR_RCV_MASK) { 179851078Speter /* break/unnattached error bits or real input? */ 179951078Speter if (!(line_status & LSR_RXRDY)) 180051078Speter recv_data = 0; 180151078Speter else 180251078Speter recv_data = inb(com->data_port); 1803119485Snjl#ifdef DDB 1804119485Snjl#ifdef ALT_BREAK_TO_DEBUGGER 1805119485Snjl if (com->unit == comconsole && 1806119485Snjl db_alt_break(recv_data, &com->alt_brk_state) != 0) 1807119485Snjl breakpoint(); 1808119485Snjl#endif /* ALT_BREAK_TO_DEBUGGER */ 1809119485Snjl#endif /* DDB */ 181051078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 181151078Speter /* 181251078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 181351078Speter * Otherwise, push the work to a higher level 181451078Speter * (to handle PARMRK) if we're bypassing. 181551078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 181651078Speter * 181751078Speter * This makes bypassing work right in the 181851078Speter * usual "raw" case (IGNBRK set, and IGNPAR 181951078Speter * and INPCK clear). 182051078Speter * 182151078Speter * Note: BI together with FE/PE means just BI. 182251078Speter */ 182351078Speter if (line_status & LSR_BI) { 182451078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 182551078Speter if (com->unit == comconsole) { 182651078Speter breakpoint(); 182751078Speter goto cont; 182851078Speter } 182951078Speter#endif 183051078Speter if (com->tp == NULL 183151078Speter || com->tp->t_iflag & IGNBRK) 183251078Speter goto cont; 183351078Speter } else { 183451078Speter if (com->tp == NULL 183551078Speter || com->tp->t_iflag & IGNPAR) 183651078Speter goto cont; 183751078Speter } 183851078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 183951078Speter && (line_status & (LSR_BI | LSR_FE) 184051078Speter || com->tp->t_iflag & INPCK)) 184151078Speter recv_data = 0; 184251078Speter } 184351078Speter ++com->bytes_in; 184451078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 184588900Sjhb swi_sched(sio_fast_ih, 0); 184651078Speter ioptr = com->iptr; 184751078Speter if (ioptr >= com->ibufend) 184851078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 184951078Speter else { 185051078Speter if (com->do_timestamp) 185151078Speter microtime(&com->timestamp); 185251078Speter ++com_events; 185372238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 185451078Speter#if 0 /* for testing input latency vs efficiency */ 185551078Speterif (com->iptr - com->ibuf == 8) 185688900Sjhb swi_sched(sio_fast_ih, 0); 185751078Speter#endif 185851078Speter ioptr[0] = recv_data; 185951078Speter ioptr[com->ierroff] = line_status; 186051078Speter com->iptr = ++ioptr; 186151078Speter if (ioptr == com->ihighwater 186251078Speter && com->state & CS_RTS_IFLOW) 186351078Speter outb(com->modem_ctl_port, 186451078Speter com->mcr_image &= ~MCR_RTS); 186551078Speter if (line_status & LSR_OE) 186651078Speter CE_RECORD(com, CE_OVERRUN); 186751078Speter } 186851078Spetercont: 1869122844Sbde if (line_status & LSR_TXRDY 1870122844Sbde && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) 1871122844Sbde goto txrdy; 1872122844Sbde 187351078Speter /* 187451078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 187551078Speter * jump from the top of the loop to here 187651078Speter */ 187751078Speter line_status = inb(com->line_status_port) & 0x7F; 187851078Speter } 187951078Speter 188051078Speter /* modem status change? (always check before doing output) */ 188151078Speter modem_status = inb(com->modem_status_port); 188251078Speter if (modem_status != com->last_modem_status) { 188351078Speter if (com->do_dcd_timestamp 188451078Speter && !(com->last_modem_status & MSR_DCD) 188551078Speter && modem_status & MSR_DCD) 188651078Speter microtime(&com->dcd_timestamp); 188751078Speter 188851078Speter /* 188951078Speter * Schedule high level to handle DCD changes. Note 189051078Speter * that we don't use the delta bits anywhere. Some 189151078Speter * UARTs mess them up, and it's easy to remember the 189251078Speter * previous bits and calculate the delta. 189351078Speter */ 189451078Speter com->last_modem_status = modem_status; 189551078Speter if (!(com->state & CS_CHECKMSR)) { 189651078Speter com_events += LOTS_OF_EVENTS; 189751078Speter com->state |= CS_CHECKMSR; 189888900Sjhb swi_sched(sio_fast_ih, 0); 189951078Speter } 190051078Speter 190151078Speter /* handle CTS change immediately for crisp flow ctl */ 190251078Speter if (com->state & CS_CTS_OFLOW) { 190351078Speter if (modem_status & MSR_CTS) 190451078Speter com->state |= CS_ODEVREADY; 190551078Speter else 190651078Speter com->state &= ~CS_ODEVREADY; 190751078Speter } 190851078Speter } 190951078Speter 1910122844Sbdetxrdy: 191151078Speter /* output queued and everything ready? */ 191251078Speter if (line_status & LSR_TXRDY 191351078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 191451078Speter ioptr = com->obufq.l_head; 191593466Sbde if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 191651078Speter u_int ocount; 191751078Speter 191851078Speter ocount = com->obufq.l_tail - ioptr; 191951078Speter if (ocount > com->tx_fifo_size) 192051078Speter ocount = com->tx_fifo_size; 192151078Speter com->bytes_out += ocount; 192251078Speter do 192351078Speter outb(com->data_port, *ioptr++); 192451078Speter while (--ocount != 0); 192551078Speter } else { 192651078Speter outb(com->data_port, *ioptr++); 192751078Speter ++com->bytes_out; 1928122819Sbde if (com->unit == siotsunit 1929122819Sbde && siotso < sizeof siots / sizeof siots[0]) 1930122819Sbde nanouptime(&siots[siotso++]); 193151078Speter } 193251078Speter com->obufq.l_head = ioptr; 1933120189Sbde if (COM_IIR_TXRDYBUG(com->flags)) 193451078Speter int_ctl_new = int_ctl | IER_ETXRDY; 193551078Speter if (ioptr >= com->obufq.l_tail) { 193651078Speter struct lbq *qp; 193751078Speter 193851078Speter qp = com->obufq.l_next; 193951078Speter qp->l_queued = FALSE; 194051078Speter qp = qp->l_next; 194151078Speter if (qp != NULL) { 194251078Speter com->obufq.l_head = qp->l_head; 194351078Speter com->obufq.l_tail = qp->l_tail; 194451078Speter com->obufq.l_next = qp; 194551078Speter } else { 194651078Speter /* output just completed */ 1947120189Sbde if (COM_IIR_TXRDYBUG(com->flags)) 1948120189Sbde int_ctl_new = int_ctl 1949120189Sbde & ~IER_ETXRDY; 195051078Speter com->state &= ~CS_BUSY; 195151078Speter } 195251078Speter if (!(com->state & CS_ODONE)) { 195351078Speter com_events += LOTS_OF_EVENTS; 195451078Speter com->state |= CS_ODONE; 195567551Sjhb /* handle at high level ASAP */ 195688900Sjhb swi_sched(sio_fast_ih, 0); 195751078Speter } 195851078Speter } 1959120189Sbde if (COM_IIR_TXRDYBUG(com->flags) 1960120189Sbde && int_ctl != int_ctl_new) 1961120189Sbde outb(com->int_ctl_port, int_ctl_new); 196251078Speter } 196351078Speter 196451078Speter /* finished? */ 196551078Speter#ifndef COM_MULTIPORT 196651078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 196751078Speter#endif /* COM_MULTIPORT */ 196851078Speter return; 196951078Speter } 197051078Speter} 197151078Speter 197251078Speterstatic int 197383366Sjuliansioioctl(dev, cmd, data, flag, td) 197451078Speter dev_t dev; 197551078Speter u_long cmd; 197651078Speter caddr_t data; 197751078Speter int flag; 197883366Sjulian struct thread *td; 197951078Speter{ 198051078Speter struct com_s *com; 198151078Speter int error; 198251078Speter int mynor; 198351078Speter int s; 198451078Speter struct tty *tp; 198551078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 198651078Speter u_long oldcmd; 198751078Speter struct termios term; 198851078Speter#endif 198951078Speter 199051078Speter mynor = minor(dev); 199151078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 199257915Simp if (com == NULL || com->gone) 199351078Speter return (ENODEV); 199451078Speter if (mynor & CONTROL_MASK) { 199551078Speter struct termios *ct; 199651078Speter 199751078Speter switch (mynor & CONTROL_MASK) { 199851078Speter case CONTROL_INIT_STATE: 199951078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 200051078Speter break; 200151078Speter case CONTROL_LOCK_STATE: 200251078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 200351078Speter break; 200451078Speter default: 200551078Speter return (ENODEV); /* /dev/nodev */ 200651078Speter } 200751078Speter switch (cmd) { 200851078Speter case TIOCSETA: 200993593Sjhb error = suser(td); 201051078Speter if (error != 0) 201151078Speter return (error); 201251078Speter *ct = *(struct termios *)data; 201351078Speter return (0); 201451078Speter case TIOCGETA: 201551078Speter *(struct termios *)data = *ct; 201651078Speter return (0); 201751078Speter case TIOCGETD: 201851078Speter *(int *)data = TTYDISC; 201951078Speter return (0); 202051078Speter case TIOCGWINSZ: 202151078Speter bzero(data, sizeof(struct winsize)); 202251078Speter return (0); 202351078Speter default: 202451078Speter return (ENOTTY); 202551078Speter } 202651078Speter } 202751078Speter tp = com->tp; 202851078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 202951078Speter term = tp->t_termios; 203051078Speter oldcmd = cmd; 203151078Speter error = ttsetcompat(tp, &cmd, data, &term); 203251078Speter if (error != 0) 203351078Speter return (error); 203451078Speter if (cmd != oldcmd) 203551078Speter data = (caddr_t)&term; 203651078Speter#endif 203751078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 203851078Speter int cc; 203951078Speter struct termios *dt = (struct termios *)data; 204051078Speter struct termios *lt = mynor & CALLOUT_MASK 204151078Speter ? &com->lt_out : &com->lt_in; 204251078Speter 204351078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 204451078Speter | (dt->c_iflag & ~lt->c_iflag); 204551078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 204651078Speter | (dt->c_oflag & ~lt->c_oflag); 204751078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 204851078Speter | (dt->c_cflag & ~lt->c_cflag); 204951078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 205051078Speter | (dt->c_lflag & ~lt->c_lflag); 205151078Speter for (cc = 0; cc < NCCS; ++cc) 205251078Speter if (lt->c_cc[cc] != 0) 205351078Speter dt->c_cc[cc] = tp->t_cc[cc]; 205451078Speter if (lt->c_ispeed != 0) 205551078Speter dt->c_ispeed = tp->t_ispeed; 205651078Speter if (lt->c_ospeed != 0) 205751078Speter dt->c_ospeed = tp->t_ospeed; 205851078Speter } 205983366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 206051078Speter if (error != ENOIOCTL) 206151078Speter return (error); 206251078Speter s = spltty(); 206351078Speter error = ttioctl(tp, cmd, data, flag); 206451078Speter disc_optim(tp, &tp->t_termios, com); 206551078Speter if (error != ENOIOCTL) { 206651078Speter splx(s); 206751078Speter return (error); 206851078Speter } 206951078Speter switch (cmd) { 207051078Speter case TIOCSBRK: 207160471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 207251078Speter break; 207351078Speter case TIOCCBRK: 207460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 207551078Speter break; 207651078Speter case TIOCSDTR: 207751078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 207851078Speter break; 207951078Speter case TIOCCDTR: 208051078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 208151078Speter break; 208251078Speter /* 208351078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 208451078Speter * changes get undone on the next call to comparam(). 208551078Speter */ 208651078Speter case TIOCMSET: 208751078Speter (void)commctl(com, *(int *)data, DMSET); 208851078Speter break; 208951078Speter case TIOCMBIS: 209051078Speter (void)commctl(com, *(int *)data, DMBIS); 209151078Speter break; 209251078Speter case TIOCMBIC: 209351078Speter (void)commctl(com, *(int *)data, DMBIC); 209451078Speter break; 209551078Speter case TIOCMGET: 209651078Speter *(int *)data = commctl(com, 0, DMGET); 209751078Speter break; 209851078Speter case TIOCMSDTRWAIT: 209951078Speter /* must be root since the wait applies to following logins */ 210093593Sjhb error = suser(td); 210151078Speter if (error != 0) { 210251078Speter splx(s); 210351078Speter return (error); 210451078Speter } 210551078Speter com->dtr_wait = *(int *)data * hz / 100; 210651078Speter break; 210751078Speter case TIOCMGDTRWAIT: 210851078Speter *(int *)data = com->dtr_wait * 100 / hz; 210951078Speter break; 211051078Speter case TIOCTIMESTAMP: 211151078Speter com->do_timestamp = TRUE; 211251078Speter *(struct timeval *)data = com->timestamp; 211351078Speter break; 211451078Speter case TIOCDCDTIMESTAMP: 211551078Speter com->do_dcd_timestamp = TRUE; 211651078Speter *(struct timeval *)data = com->dcd_timestamp; 211751078Speter break; 211851078Speter default: 211951078Speter splx(s); 212051078Speter error = pps_ioctl(cmd, data, &com->pps); 212151078Speter if (error == ENODEV) 212251078Speter error = ENOTTY; 212351078Speter return (error); 212451078Speter } 212551078Speter splx(s); 212651078Speter return (0); 212751078Speter} 212851078Speter 212965557Sjasone/* software interrupt handler for SWI_TTY */ 213051078Speterstatic void 213167551Sjhbsiopoll(void *dummy) 213251078Speter{ 213351078Speter int unit; 213451078Speter 213551078Speter if (com_events == 0) 213651078Speter return; 213751078Speterrepeat: 213853344Speter for (unit = 0; unit < sio_numunits; ++unit) { 213951078Speter struct com_s *com; 214051078Speter int incc; 214151078Speter struct tty *tp; 214251078Speter 214351078Speter com = com_addr(unit); 214451078Speter if (com == NULL) 214551078Speter continue; 214651078Speter tp = com->tp; 214751078Speter if (tp == NULL || com->gone) { 214851078Speter /* 214951078Speter * Discard any events related to never-opened or 215051078Speter * going-away devices. 215151078Speter */ 215272200Sbmilekic mtx_lock_spin(&sio_lock); 215351078Speter incc = com->iptr - com->ibuf; 215451078Speter com->iptr = com->ibuf; 215551078Speter if (com->state & CS_CHECKMSR) { 215651078Speter incc += LOTS_OF_EVENTS; 215751078Speter com->state &= ~CS_CHECKMSR; 215851078Speter } 215951078Speter com_events -= incc; 216072200Sbmilekic mtx_unlock_spin(&sio_lock); 216151078Speter continue; 216251078Speter } 216351078Speter if (com->iptr != com->ibuf) { 216472200Sbmilekic mtx_lock_spin(&sio_lock); 216551078Speter sioinput(com); 216672200Sbmilekic mtx_unlock_spin(&sio_lock); 216751078Speter } 216851078Speter if (com->state & CS_CHECKMSR) { 216951078Speter u_char delta_modem_status; 217051078Speter 217172200Sbmilekic mtx_lock_spin(&sio_lock); 217251078Speter delta_modem_status = com->last_modem_status 217351078Speter ^ com->prev_modem_status; 217451078Speter com->prev_modem_status = com->last_modem_status; 217551078Speter com_events -= LOTS_OF_EVENTS; 217651078Speter com->state &= ~CS_CHECKMSR; 217772200Sbmilekic mtx_unlock_spin(&sio_lock); 217851078Speter if (delta_modem_status & MSR_DCD) 217951078Speter (*linesw[tp->t_line].l_modem) 218051078Speter (tp, com->prev_modem_status & MSR_DCD); 218151078Speter } 218251078Speter if (com->state & CS_ODONE) { 218372200Sbmilekic mtx_lock_spin(&sio_lock); 218451078Speter com_events -= LOTS_OF_EVENTS; 218551078Speter com->state &= ~CS_ODONE; 218672200Sbmilekic mtx_unlock_spin(&sio_lock); 218751078Speter if (!(com->state & CS_BUSY) 218851078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 218951078Speter timeout(siobusycheck, com, hz / 100); 219051078Speter com->extra_state |= CSE_BUSYCHECK; 219151078Speter } 219251078Speter (*linesw[tp->t_line].l_start)(tp); 219351078Speter } 219451078Speter if (com_events == 0) 219551078Speter break; 219651078Speter } 219751078Speter if (com_events >= LOTS_OF_EVENTS) 219851078Speter goto repeat; 219951078Speter} 220051078Speter 220151078Speterstatic int 220251078Spetercomparam(tp, t) 220351078Speter struct tty *tp; 220451078Speter struct termios *t; 220551078Speter{ 220651078Speter u_int cfcr; 220751078Speter int cflag; 220851078Speter struct com_s *com; 220989986Sjhay u_int divisor; 221051078Speter u_char dlbh; 221151078Speter u_char dlbl; 2212120159Sbde u_char efr_flowbits; 221351078Speter int s; 221451078Speter int unit; 221551078Speter 221689986Sjhay unit = DEV_TO_UNIT(tp->t_dev); 221789986Sjhay com = com_addr(unit); 221889986Sjhay if (com == NULL) 221989986Sjhay return (ENODEV); 222089986Sjhay 222151078Speter /* check requested parameters */ 2222120505Sbde if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed)) 2223120505Sbde return (EINVAL); 2224120505Sbde divisor = siodivisor(com->rclk, t->c_ispeed); 2225120505Sbde if (divisor == 0) 2226120505Sbde return (EINVAL); 222751078Speter 222851078Speter /* parameters are OK, convert them to the com struct and the device */ 222951078Speter s = spltty(); 2230120505Sbde if (t->c_ospeed == 0) 223151078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 223251078Speter else 223351078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 223451078Speter cflag = t->c_cflag; 223551078Speter switch (cflag & CSIZE) { 223651078Speter case CS5: 223751078Speter cfcr = CFCR_5BITS; 223851078Speter break; 223951078Speter case CS6: 224051078Speter cfcr = CFCR_6BITS; 224151078Speter break; 224251078Speter case CS7: 224351078Speter cfcr = CFCR_7BITS; 224451078Speter break; 224551078Speter default: 224651078Speter cfcr = CFCR_8BITS; 224751078Speter break; 224851078Speter } 224951078Speter if (cflag & PARENB) { 225051078Speter cfcr |= CFCR_PENAB; 225151078Speter if (!(cflag & PARODD)) 225251078Speter cfcr |= CFCR_PEVEN; 225351078Speter } 225451078Speter if (cflag & CSTOPB) 225551078Speter cfcr |= CFCR_STOPB; 225651078Speter 2257120505Sbde if (com->hasfifo) { 225851078Speter /* 225951078Speter * Use a fifo trigger level low enough so that the input 226051078Speter * latency from the fifo is less than about 16 msec and 226151078Speter * the total latency is less than about 30 msec. These 226251078Speter * latencies are reasonable for humans. Serial comms 226351078Speter * protocols shouldn't expect anything better since modem 226451078Speter * latencies are larger. 226588433Sdillon * 226688433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 226788433Sdillon * speed connections without further work on reducing 226888433Sdillon * interrupt disablement times in other parts of the system, 226988433Sdillon * without producing silo overflow errors. 227051078Speter */ 227193466Sbde com->fifo_image = com->unit == siotsunit ? 0 2272120505Sbde : t->c_ispeed <= 4800 227388451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 227451078Speter#ifdef COM_ESP 227551078Speter /* 227651078Speter * The Hayes ESP card needs the fifo DMA mode bit set 227751078Speter * in compatibility mode. If not, it will interrupt 227851078Speter * for each character received. 227951078Speter */ 228051078Speter if (com->esp) 228151078Speter com->fifo_image |= FIFO_DMA_MODE; 228251078Speter#endif 228360471Snyan sio_setreg(com, com_fifo, com->fifo_image); 228451078Speter } 228551078Speter 228665605Sjhb /* 228765605Sjhb * This returns with interrupts disabled so that we can complete 228865605Sjhb * the speed change atomically. Keeping interrupts disabled is 228965605Sjhb * especially important while com_data is hidden. 229065605Sjhb */ 229165605Sjhb (void) siosetwater(com, t->c_ispeed); 229265557Sjasone 2293120505Sbde sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2294120505Sbde /* 2295120505Sbde * Only set the divisor registers if they would change, since on 2296120505Sbde * some 16550 incompatibles (UMC8669F), setting them while input 2297120505Sbde * is arriving loses sync until data stops arriving. 2298120505Sbde */ 2299120505Sbde dlbl = divisor & 0xFF; 2300120505Sbde if (sio_getreg(com, com_dlbl) != dlbl) 2301120505Sbde sio_setreg(com, com_dlbl, dlbl); 2302120505Sbde dlbh = divisor >> 8; 2303120505Sbde if (sio_getreg(com, com_dlbh) != dlbh) 2304120505Sbde sio_setreg(com, com_dlbh, dlbh); 230551078Speter 2306120159Sbde efr_flowbits = 0; 230751078Speter 230851078Speter if (cflag & CRTS_IFLOW) { 230951078Speter com->state |= CS_RTS_IFLOW; 2310120159Sbde efr_flowbits |= EFR_AUTORTS; 231151078Speter /* 231251078Speter * If CS_RTS_IFLOW just changed from off to on, the change 231351078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 231451078Speter * so do it later by calling comstart() instead of repeating 231551078Speter * a lot of code from comstart() here. 231651078Speter */ 231751078Speter } else if (com->state & CS_RTS_IFLOW) { 231851078Speter com->state &= ~CS_RTS_IFLOW; 231951078Speter /* 232051078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 232151078Speter * on here, since comstart() won't do it later. 232251078Speter */ 232351078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 232451078Speter } 232551078Speter 232651078Speter /* 232751078Speter * Set up state to handle output flow control. 232851078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 232951078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 233051078Speter */ 233151078Speter com->state |= CS_ODEVREADY; 233251078Speter com->state &= ~CS_CTS_OFLOW; 233351078Speter if (cflag & CCTS_OFLOW) { 233451078Speter com->state |= CS_CTS_OFLOW; 2335120159Sbde efr_flowbits |= EFR_AUTOCTS; 233651078Speter if (!(com->last_modem_status & MSR_CTS)) 233751078Speter com->state &= ~CS_ODEVREADY; 233851078Speter } 233951078Speter 2340120159Sbde if (com->st16650a) { 2341120159Sbde sio_setreg(com, com_lcr, LCR_EFR_ENABLE); 2342120159Sbde sio_setreg(com, com_efr, 2343120159Sbde (sio_getreg(com, com_efr) 2344120159Sbde & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits); 2345120159Sbde } 2346120159Sbde sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 234751078Speter 234851078Speter /* XXX shouldn't call functions while intrs are disabled. */ 234951078Speter disc_optim(tp, t, com); 235051078Speter 235172200Sbmilekic mtx_unlock_spin(&sio_lock); 235251078Speter splx(s); 235351078Speter comstart(tp); 235451078Speter if (com->ibufold != NULL) { 235551078Speter free(com->ibufold, M_DEVBUF); 235651078Speter com->ibufold = NULL; 235751078Speter } 235851078Speter return (0); 235951078Speter} 236051078Speter 236165605Sjhb/* 236270174Sjhb * This function must be called with the sio_lock mutex released and will 236370174Sjhb * return with it obtained. 236465605Sjhb */ 236551078Speterstatic int 236665605Sjhbsiosetwater(com, speed) 236751078Speter struct com_s *com; 236851078Speter speed_t speed; 236951078Speter{ 237051078Speter int cp4ticks; 237151078Speter u_char *ibuf; 237251078Speter int ibufsize; 237351078Speter struct tty *tp; 237451078Speter 237551078Speter /* 237651078Speter * Make the buffer size large enough to handle a softtty interrupt 237751078Speter * latency of about 2 ticks without loss of throughput or data 237851078Speter * (about 3 ticks if input flow control is not used or not honoured, 237951078Speter * but a bit less for CS5-CS7 modes). 238051078Speter */ 238151078Speter cp4ticks = speed / 10 / hz * 4; 238251078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 238351078Speter ibufsize <<= 1; 238465605Sjhb if (ibufsize == com->ibufsize) { 238572200Sbmilekic mtx_lock_spin(&sio_lock); 238651078Speter return (0); 238765605Sjhb } 238851078Speter 238951078Speter /* 239051078Speter * Allocate input buffer. The extra factor of 2 in the size is 239151078Speter * to allow for an error byte for each input byte. 239251078Speter */ 239351078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 239465605Sjhb if (ibuf == NULL) { 239572200Sbmilekic mtx_lock_spin(&sio_lock); 239651078Speter return (ENOMEM); 239765605Sjhb } 239851078Speter 239951078Speter /* Initialize non-critical variables. */ 240051078Speter com->ibufold = com->ibuf; 240151078Speter com->ibufsize = ibufsize; 240251078Speter tp = com->tp; 240351078Speter if (tp != NULL) { 240451078Speter tp->t_ififosize = 2 * ibufsize; 240551078Speter tp->t_ispeedwat = (speed_t)-1; 240651078Speter tp->t_ospeedwat = (speed_t)-1; 240751078Speter } 240851078Speter 240951078Speter /* 241051078Speter * Read current input buffer, if any. Continue with interrupts 241151078Speter * disabled. 241251078Speter */ 241372200Sbmilekic mtx_lock_spin(&sio_lock); 241451078Speter if (com->iptr != com->ibuf) 241551078Speter sioinput(com); 241651078Speter 241751078Speter /*- 241851078Speter * Initialize critical variables, including input buffer watermarks. 241951078Speter * The external device is asked to stop sending when the buffer 242051078Speter * exactly reaches high water, or when the high level requests it. 242151078Speter * The high level is notified immediately (rather than at a later 242251078Speter * clock tick) when this watermark is reached. 242351078Speter * The buffer size is chosen so the watermark should almost never 242451078Speter * be reached. 242551078Speter * The low watermark is invisibly 0 since the buffer is always 242651078Speter * emptied all at once. 242751078Speter */ 242851078Speter com->iptr = com->ibuf = ibuf; 242951078Speter com->ibufend = ibuf + ibufsize; 243051078Speter com->ierroff = ibufsize; 243151078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 243251078Speter return (0); 243351078Speter} 243451078Speter 243551078Speterstatic void 243651078Spetercomstart(tp) 243751078Speter struct tty *tp; 243851078Speter{ 243951078Speter struct com_s *com; 244051078Speter int s; 244151078Speter int unit; 244251078Speter 244351078Speter unit = DEV_TO_UNIT(tp->t_dev); 244451078Speter com = com_addr(unit); 244557915Simp if (com == NULL) 244657915Simp return; 244751078Speter s = spltty(); 244872200Sbmilekic mtx_lock_spin(&sio_lock); 244951078Speter if (tp->t_state & TS_TTSTOP) 245051078Speter com->state &= ~CS_TTGO; 245151078Speter else 245251078Speter com->state |= CS_TTGO; 245351078Speter if (tp->t_state & TS_TBLOCK) { 245451078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 245551078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 245651078Speter } else { 245751078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 245851078Speter && com->state & CS_RTS_IFLOW) 245951078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 246051078Speter } 246172200Sbmilekic mtx_unlock_spin(&sio_lock); 246251078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 246351078Speter ttwwakeup(tp); 246451078Speter splx(s); 246551078Speter return; 246651078Speter } 246751078Speter if (tp->t_outq.c_cc != 0) { 246851078Speter struct lbq *qp; 246951078Speter struct lbq *next; 247051078Speter 247151078Speter if (!com->obufs[0].l_queued) { 247251078Speter com->obufs[0].l_tail 247351078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 247451078Speter sizeof com->obuf1); 247551078Speter com->obufs[0].l_next = NULL; 247651078Speter com->obufs[0].l_queued = TRUE; 247772200Sbmilekic mtx_lock_spin(&sio_lock); 247851078Speter if (com->state & CS_BUSY) { 247951078Speter qp = com->obufq.l_next; 248051078Speter while ((next = qp->l_next) != NULL) 248151078Speter qp = next; 248251078Speter qp->l_next = &com->obufs[0]; 248351078Speter } else { 248451078Speter com->obufq.l_head = com->obufs[0].l_head; 248551078Speter com->obufq.l_tail = com->obufs[0].l_tail; 248651078Speter com->obufq.l_next = &com->obufs[0]; 248751078Speter com->state |= CS_BUSY; 248851078Speter } 248972200Sbmilekic mtx_unlock_spin(&sio_lock); 249051078Speter } 249151078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 249251078Speter com->obufs[1].l_tail 249351078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 249451078Speter sizeof com->obuf2); 249551078Speter com->obufs[1].l_next = NULL; 249651078Speter com->obufs[1].l_queued = TRUE; 249772200Sbmilekic mtx_lock_spin(&sio_lock); 249851078Speter if (com->state & CS_BUSY) { 249951078Speter qp = com->obufq.l_next; 250051078Speter while ((next = qp->l_next) != NULL) 250151078Speter qp = next; 250251078Speter qp->l_next = &com->obufs[1]; 250351078Speter } else { 250451078Speter com->obufq.l_head = com->obufs[1].l_head; 250551078Speter com->obufq.l_tail = com->obufs[1].l_tail; 250651078Speter com->obufq.l_next = &com->obufs[1]; 250751078Speter com->state |= CS_BUSY; 250851078Speter } 250972200Sbmilekic mtx_unlock_spin(&sio_lock); 251051078Speter } 251151078Speter tp->t_state |= TS_BUSY; 251251078Speter } 251372200Sbmilekic mtx_lock_spin(&sio_lock); 251451078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 251551078Speter siointr1(com); /* fake interrupt to start output */ 251672200Sbmilekic mtx_unlock_spin(&sio_lock); 251751078Speter ttwwakeup(tp); 251851078Speter splx(s); 251951078Speter} 252051078Speter 252151078Speterstatic void 252251654Sphkcomstop(tp, rw) 252351078Speter struct tty *tp; 252451078Speter int rw; 252551078Speter{ 252651078Speter struct com_s *com; 252751078Speter 252851078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 252957915Simp if (com == NULL || com->gone) 253051078Speter return; 253172200Sbmilekic mtx_lock_spin(&sio_lock); 253251078Speter if (rw & FWRITE) { 253351078Speter if (com->hasfifo) 253451078Speter#ifdef COM_ESP 253551078Speter /* XXX avoid h/w bug. */ 253651078Speter if (!com->esp) 253751078Speter#endif 253860471Snyan sio_setreg(com, com_fifo, 253960471Snyan FIFO_XMT_RST | com->fifo_image); 254051078Speter com->obufs[0].l_queued = FALSE; 254151078Speter com->obufs[1].l_queued = FALSE; 254251078Speter if (com->state & CS_ODONE) 254351078Speter com_events -= LOTS_OF_EVENTS; 254451078Speter com->state &= ~(CS_ODONE | CS_BUSY); 254551078Speter com->tp->t_state &= ~TS_BUSY; 254651078Speter } 254751078Speter if (rw & FREAD) { 254851078Speter if (com->hasfifo) 254951078Speter#ifdef COM_ESP 255051078Speter /* XXX avoid h/w bug. */ 255151078Speter if (!com->esp) 255251078Speter#endif 255360471Snyan sio_setreg(com, com_fifo, 255460471Snyan FIFO_RCV_RST | com->fifo_image); 255551078Speter com_events -= (com->iptr - com->ibuf); 255651078Speter com->iptr = com->ibuf; 255751078Speter } 255872200Sbmilekic mtx_unlock_spin(&sio_lock); 255951078Speter comstart(tp); 256051078Speter} 256151078Speter 256251078Speterstatic int 256351078Spetercommctl(com, bits, how) 256451078Speter struct com_s *com; 256551078Speter int bits; 256651078Speter int how; 256751078Speter{ 256851078Speter int mcr; 256951078Speter int msr; 257051078Speter 257151078Speter if (how == DMGET) { 257251078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 257351078Speter mcr = com->mcr_image; 257451078Speter if (mcr & MCR_DTR) 257551078Speter bits |= TIOCM_DTR; 257651078Speter if (mcr & MCR_RTS) 257751078Speter bits |= TIOCM_RTS; 257851078Speter msr = com->prev_modem_status; 257951078Speter if (msr & MSR_CTS) 258051078Speter bits |= TIOCM_CTS; 258151078Speter if (msr & MSR_DCD) 258251078Speter bits |= TIOCM_CD; 258351078Speter if (msr & MSR_DSR) 258451078Speter bits |= TIOCM_DSR; 258551078Speter /* 258651078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 258751078Speter * more volatile by reading the modem status a lot. Perhaps 258851078Speter * we should latch both bits until the status is read here. 258951078Speter */ 259051078Speter if (msr & (MSR_RI | MSR_TERI)) 259151078Speter bits |= TIOCM_RI; 259251078Speter return (bits); 259351078Speter } 259451078Speter mcr = 0; 259551078Speter if (bits & TIOCM_DTR) 259651078Speter mcr |= MCR_DTR; 259751078Speter if (bits & TIOCM_RTS) 259851078Speter mcr |= MCR_RTS; 259951078Speter if (com->gone) 260051078Speter return(0); 260172200Sbmilekic mtx_lock_spin(&sio_lock); 260251078Speter switch (how) { 260351078Speter case DMSET: 260451078Speter outb(com->modem_ctl_port, 260551078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 260651078Speter break; 260751078Speter case DMBIS: 260851078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 260951078Speter break; 261051078Speter case DMBIC: 261151078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 261251078Speter break; 261351078Speter } 261472200Sbmilekic mtx_unlock_spin(&sio_lock); 261551078Speter return (0); 261651078Speter} 261751078Speter 261851078Speterstatic void 261951078Spetersiosettimeout() 262051078Speter{ 262151078Speter struct com_s *com; 262251078Speter bool_t someopen; 262351078Speter int unit; 262451078Speter 262551078Speter /* 262651078Speter * Set our timeout period to 1 second if no polled devices are open. 262751078Speter * Otherwise set it to max(1/200, 1/hz). 262851078Speter * Enable timeouts iff some device is open. 262951078Speter */ 263051078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 263151078Speter sio_timeout = hz; 263251078Speter someopen = FALSE; 263353344Speter for (unit = 0; unit < sio_numunits; ++unit) { 263451078Speter com = com_addr(unit); 263551078Speter if (com != NULL && com->tp != NULL 263651078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 263751078Speter someopen = TRUE; 263851078Speter if (com->poll || com->poll_output) { 263951078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 264051078Speter break; 264151078Speter } 264251078Speter } 264351078Speter } 264451078Speter if (someopen) { 264551078Speter sio_timeouts_until_log = hz / sio_timeout; 264651078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 264751078Speter sio_timeout); 264851078Speter } else { 264951078Speter /* Flush error messages, if any. */ 265051078Speter sio_timeouts_until_log = 1; 265151078Speter comwakeup((void *)NULL); 265251078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 265351078Speter } 265451078Speter} 265551078Speter 265651078Speterstatic void 265751078Spetercomwakeup(chan) 265851078Speter void *chan; 265951078Speter{ 266051078Speter struct com_s *com; 266151078Speter int unit; 266251078Speter 266351078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 266451078Speter 266551078Speter /* 266651078Speter * Recover from lost output interrupts. 266751078Speter * Poll any lines that don't use interrupts. 266851078Speter */ 266953344Speter for (unit = 0; unit < sio_numunits; ++unit) { 267051078Speter com = com_addr(unit); 267151078Speter if (com != NULL && !com->gone 267251078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 267372200Sbmilekic mtx_lock_spin(&sio_lock); 267451078Speter siointr1(com); 267572200Sbmilekic mtx_unlock_spin(&sio_lock); 267651078Speter } 267751078Speter } 267851078Speter 267951078Speter /* 268051078Speter * Check for and log errors, but not too often. 268151078Speter */ 268251078Speter if (--sio_timeouts_until_log > 0) 268351078Speter return; 268451078Speter sio_timeouts_until_log = hz / sio_timeout; 268553344Speter for (unit = 0; unit < sio_numunits; ++unit) { 268651078Speter int errnum; 268751078Speter 268851078Speter com = com_addr(unit); 268951078Speter if (com == NULL) 269051078Speter continue; 269151078Speter if (com->gone) 269251078Speter continue; 269351078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 269451078Speter u_int delta; 269551078Speter u_long total; 269651078Speter 269772200Sbmilekic mtx_lock_spin(&sio_lock); 269851078Speter delta = com->delta_error_counts[errnum]; 269951078Speter com->delta_error_counts[errnum] = 0; 270072200Sbmilekic mtx_unlock_spin(&sio_lock); 270151078Speter if (delta == 0) 270251078Speter continue; 270351078Speter total = com->error_counts[errnum] += delta; 270451078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 270551078Speter unit, delta, error_desc[errnum], 270651078Speter delta == 1 ? "" : "s", total); 270751078Speter } 270851078Speter } 270951078Speter} 271051078Speter 271151078Speterstatic void 271251078Speterdisc_optim(tp, t, com) 271351078Speter struct tty *tp; 271451078Speter struct termios *t; 271551078Speter struct com_s *com; 271651078Speter{ 271751078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 271851078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 271951078Speter && (!(t->c_iflag & PARMRK) 272051078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 272151078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 272251078Speter && linesw[tp->t_line].l_rint == ttyinput) 272351078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 272451078Speter else 272551078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 272651078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 272751078Speter} 272851078Speter 272951078Speter/* 273051078Speter * Following are all routines needed for SIO to act as console 273151078Speter */ 273251078Speterstruct siocnstate { 273351078Speter u_char dlbl; 273451078Speter u_char dlbh; 273551078Speter u_char ier; 273651078Speter u_char cfcr; 273751078Speter u_char mcr; 273851078Speter}; 273951078Speter 2740120457Sphk/* 2741120457Sphk * This is a function in order to not replicate "ttyd%d" more 2742120457Sphk * places than absolutely necessary. 2743120457Sphk */ 2744120457Sphkstatic void 2745120457Sphksiocnset(struct consdev *cd, int unit) 2746120457Sphk{ 2747120457Sphk 2748120457Sphk cd->cn_unit = unit; 2749120457Sphk sprintf(cd->cn_name, "ttyd%d", unit); 2750120457Sphk} 2751120457Sphk 275266230Sjhb#ifndef __alpha__ 275392739Salfredstatic speed_t siocngetspeed(Port_t, u_long rclk); 275466230Sjhb#endif 275593010Sbdestatic void siocnclose(struct siocnstate *sp, Port_t iobase); 275693010Sbdestatic void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 275793010Sbdestatic void siocntxwait(Port_t iobase); 275851078Speter 275966230Sjhb#ifdef __alpha__ 276092739Salfredint siocnattach(int port, int speed); 276192739Salfredint siogdbattach(int port, int speed); 276292739Salfredint siogdbgetc(void); 276392739Salfredvoid siogdbputc(int c); 276466230Sjhb#else 276551078Speterstatic cn_probe_t siocnprobe; 276651078Speterstatic cn_init_t siocninit; 276785371Sjlemonstatic cn_term_t siocnterm; 276866230Sjhb#endif 276951078Speterstatic cn_checkc_t siocncheckc; 277051078Speterstatic cn_getc_t siocngetc; 277151078Speterstatic cn_putc_t siocnputc; 277251078Speter 277383832Sdfr#ifndef __alpha__ 277485371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 277555823Syokota siocnputc, NULL); 277651078Speter#endif 277751078Speter 277851078Speter#if DDB > 0 2779111194Sphkstatic struct consdev gdbconsdev; 278051078Speter#endif 278151078Speter 278251078Speterstatic void 278351078Spetersiocntxwait(iobase) 278451078Speter Port_t iobase; 278551078Speter{ 278651078Speter int timo; 278751078Speter 278851078Speter /* 278951078Speter * Wait for any pending transmission to finish. Required to avoid 279051078Speter * the UART lockup bug when the speed is changed, and for normal 279151078Speter * transmits. 279251078Speter */ 279351078Speter timo = 100000; 279451078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 279551078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 279651078Speter ; 279751078Speter} 279851078Speter 279966230Sjhb#ifndef __alpha__ 280066230Sjhb 280151078Speter/* 280251078Speter * Read the serial port specified and try to figure out what speed 280351078Speter * it's currently running at. We're assuming the serial port has 280451078Speter * been initialized and is basicly idle. This routine is only intended 280551078Speter * to be run at system startup. 280651078Speter * 280751078Speter * If the value read from the serial port doesn't make sense, return 0. 280851078Speter */ 280951078Speter 281051078Speterstatic speed_t 281189986Sjhaysiocngetspeed(iobase, rclk) 281289986Sjhay Port_t iobase; 281389986Sjhay u_long rclk; 281451078Speter{ 281589986Sjhay u_int divisor; 281651078Speter u_char dlbh; 281751078Speter u_char dlbl; 281851078Speter u_char cfcr; 281951078Speter 282051078Speter cfcr = inb(iobase + com_cfcr); 282151078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 282251078Speter 282351078Speter dlbl = inb(iobase + com_dlbl); 282451078Speter dlbh = inb(iobase + com_dlbh); 282551078Speter 282651078Speter outb(iobase + com_cfcr, cfcr); 282751078Speter 282889986Sjhay divisor = dlbh << 8 | dlbl; 282951078Speter 283089986Sjhay /* XXX there should be more sanity checking. */ 283189986Sjhay if (divisor == 0) 283289986Sjhay return (CONSPEED); 283389986Sjhay return (rclk / (16UL * divisor)); 283451078Speter} 283551078Speter 283666230Sjhb#endif 283766230Sjhb 283851078Speterstatic void 283951078Spetersiocnopen(sp, iobase, speed) 284051078Speter struct siocnstate *sp; 284151078Speter Port_t iobase; 284251078Speter int speed; 284351078Speter{ 284489986Sjhay u_int divisor; 284551078Speter u_char dlbh; 284651078Speter u_char dlbl; 284751078Speter 284851078Speter /* 284951078Speter * Save all the device control registers except the fifo register 285051078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 285151078Speter * We can't save the fifo register since it is read-only. 285251078Speter */ 285351078Speter sp->ier = inb(iobase + com_ier); 285451078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 285551078Speter siocntxwait(iobase); 285651078Speter sp->cfcr = inb(iobase + com_cfcr); 285751078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 285851078Speter sp->dlbl = inb(iobase + com_dlbl); 285951078Speter sp->dlbh = inb(iobase + com_dlbh); 286051078Speter /* 286151078Speter * Only set the divisor registers if they would change, since on 286251078Speter * some 16550 incompatibles (Startech), setting them clears the 286351078Speter * data input register. This also reduces the effects of the 286451078Speter * UMC8669F bug. 286551078Speter */ 286689986Sjhay divisor = siodivisor(comdefaultrclk, speed); 286751078Speter dlbl = divisor & 0xFF; 286851078Speter if (sp->dlbl != dlbl) 286951078Speter outb(iobase + com_dlbl, dlbl); 287089986Sjhay dlbh = divisor >> 8; 287151078Speter if (sp->dlbh != dlbh) 287251078Speter outb(iobase + com_dlbh, dlbh); 287351078Speter outb(iobase + com_cfcr, CFCR_8BITS); 287451078Speter sp->mcr = inb(iobase + com_mcr); 287551078Speter /* 287651078Speter * We don't want interrupts, but must be careful not to "disable" 287751078Speter * them by clearing the MCR_IENABLE bit, since that might cause 287851078Speter * an interrupt by floating the IRQ line. 287951078Speter */ 288051078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 288151078Speter} 288251078Speter 288351078Speterstatic void 288451078Spetersiocnclose(sp, iobase) 288551078Speter struct siocnstate *sp; 288651078Speter Port_t iobase; 288751078Speter{ 288851078Speter /* 288951078Speter * Restore the device control registers. 289051078Speter */ 289151078Speter siocntxwait(iobase); 289251078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 289351078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 289451078Speter outb(iobase + com_dlbl, sp->dlbl); 289551078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 289651078Speter outb(iobase + com_dlbh, sp->dlbh); 289751078Speter outb(iobase + com_cfcr, sp->cfcr); 289851078Speter /* 289951078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 290051078Speter */ 290151078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 290251078Speter outb(iobase + com_ier, sp->ier); 290351078Speter} 290451078Speter 290566230Sjhb#ifndef __alpha__ 290666230Sjhb 290751078Speterstatic void 290851078Spetersiocnprobe(cp) 290951078Speter struct consdev *cp; 291051078Speter{ 291151078Speter speed_t boot_speed; 291251078Speter u_char cfcr; 291389986Sjhay u_int divisor; 291451078Speter int s, unit; 291551078Speter struct siocnstate sp; 291651078Speter 291751078Speter /* 291851078Speter * Find our first enabled console, if any. If it is a high-level 291951078Speter * console device, then initialize it and return successfully. 292051078Speter * If it is a low-level console device, then initialize it and 292151078Speter * return unsuccessfully. It must be initialized in both cases 292251078Speter * for early use by console drivers and debuggers. Initializing 292351078Speter * the hardware is not necessary in all cases, since the i/o 292451078Speter * routines initialize it on the fly, but it is necessary if 292551078Speter * input might arrive while the hardware is switched back to an 292651078Speter * uninitialized state. We can't handle multiple console devices 292751078Speter * yet because our low-level routines don't take a device arg. 292851078Speter * We trust the user to set the console flags properly so that we 292951078Speter * don't need to probe. 293051078Speter */ 293151078Speter cp->cn_pri = CN_DEAD; 293251078Speter 293351078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 293451078Speter int flags; 2935117167Sjhb 2936117167Sjhb if (resource_disabled("sio", unit)) 2937117167Sjhb continue; 293851078Speter if (resource_int_value("sio", unit, "flags", &flags)) 293951078Speter continue; 294051078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 294151078Speter int port; 294251078Speter Port_t iobase; 294351078Speter 294451078Speter if (resource_int_value("sio", unit, "port", &port)) 294551078Speter continue; 294651078Speter iobase = port; 294751078Speter s = spltty(); 294851078Speter if (boothowto & RB_SERIAL) { 294989986Sjhay boot_speed = 295089986Sjhay siocngetspeed(iobase, comdefaultrclk); 295151078Speter if (boot_speed) 295251078Speter comdefaultrate = boot_speed; 295351078Speter } 295451078Speter 295551078Speter /* 295651078Speter * Initialize the divisor latch. We can't rely on 295751078Speter * siocnopen() to do this the first time, since it 295851078Speter * avoids writing to the latch if the latch appears 295951078Speter * to have the correct value. Also, if we didn't 296051078Speter * just read the speed from the hardware, then we 296151078Speter * need to set the speed in hardware so that 296251078Speter * switching it later is null. 296351078Speter */ 296451078Speter cfcr = inb(iobase + com_cfcr); 296551078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 296689986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 296789986Sjhay outb(iobase + com_dlbl, divisor & 0xff); 296889986Sjhay outb(iobase + com_dlbh, divisor >> 8); 296951078Speter outb(iobase + com_cfcr, cfcr); 297051078Speter 297151078Speter siocnopen(&sp, iobase, comdefaultrate); 297251078Speter 297351078Speter splx(s); 297451078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2975120457Sphk siocnset(cp, unit); 297651078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 297751078Speter || boothowto & RB_SERIAL 297851078Speter ? CN_REMOTE : CN_NORMAL; 297951078Speter siocniobase = iobase; 298051078Speter siocnunit = unit; 298151078Speter } 298251078Speter if (COM_DEBUGGER(flags)) { 298351078Speter printf("sio%d: gdb debugging port\n", unit); 298451078Speter siogdbiobase = iobase; 298551078Speter siogdbunit = unit; 298651078Speter#if DDB > 0 2987120457Sphk siocnset(&gdbconsdev, unit); 2988111194Sphk gdb_arg = &gdbconsdev; 298951078Speter gdb_getc = siocngetc; 299051078Speter gdb_putc = siocnputc; 299151078Speter#endif 299251078Speter } 299351078Speter } 299451078Speter } 299551078Speter#ifdef __i386__ 299651078Speter#if DDB > 0 299751078Speter /* 299851078Speter * XXX Ugly Compatability. 299951078Speter * If no gdb port has been specified, set it to be the console 300051078Speter * as some configuration files don't specify the gdb port. 300151078Speter */ 3002111017Sphk if (gdb_arg == NULL && (boothowto & RB_GDB)) { 300351078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 300451078Speter siocnunit); 300551078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 300651078Speter printf("configuration file (currently sio only).\n"); 300751078Speter siogdbiobase = siocniobase; 300851078Speter siogdbunit = siocnunit; 3009120457Sphk siocnset(&gdbconsdev, siocnunit); 3010111194Sphk gdb_arg = &gdbconsdev; 301151078Speter gdb_getc = siocngetc; 301251078Speter gdb_putc = siocnputc; 301351078Speter } 301451078Speter#endif 301551078Speter#endif 301651078Speter} 301751078Speter 301866230Sjhbstatic void 301966230Sjhbsiocninit(cp) 302066230Sjhb struct consdev *cp; 302166230Sjhb{ 3022120457Sphk comconsole = cp->cn_unit; 302366230Sjhb} 302466230Sjhb 302585371Sjlemonstatic void 302685371Sjlemonsiocnterm(cp) 302785371Sjlemon struct consdev *cp; 302885371Sjlemon{ 302985371Sjlemon comconsole = -1; 303085371Sjlemon} 303185371Sjlemon 303266230Sjhb#endif 303366230Sjhb 303451078Speter#ifdef __alpha__ 303551078Speter 303655868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 303751078Speter 303851078Speterint 303951078Spetersiocnattach(port, speed) 304051078Speter int port; 304151078Speter int speed; 304251078Speter{ 304351078Speter int s; 304451078Speter u_char cfcr; 304589986Sjhay u_int divisor; 304651078Speter struct siocnstate sp; 304798691Sn_hibma int unit = 0; /* XXX random value! */ 304851078Speter 304951078Speter siocniobase = port; 305098691Sn_hibma siocnunit = unit; 305151078Speter comdefaultrate = speed; 305251078Speter sio_consdev.cn_pri = CN_NORMAL; 3053120457Sphk siocnset(&sio_consdev, unit); 305451078Speter 305551078Speter s = spltty(); 305651078Speter 305751078Speter /* 305851078Speter * Initialize the divisor latch. We can't rely on 305951078Speter * siocnopen() to do this the first time, since it 306051078Speter * avoids writing to the latch if the latch appears 306151078Speter * to have the correct value. Also, if we didn't 306251078Speter * just read the speed from the hardware, then we 306351078Speter * need to set the speed in hardware so that 306451078Speter * switching it later is null. 306551078Speter */ 306651078Speter cfcr = inb(siocniobase + com_cfcr); 306751078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 306889986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 306989986Sjhay outb(siocniobase + com_dlbl, divisor & 0xff); 307089986Sjhay outb(siocniobase + com_dlbh, divisor >> 8); 307151078Speter outb(siocniobase + com_cfcr, cfcr); 307251078Speter 307351078Speter siocnopen(&sp, siocniobase, comdefaultrate); 307451078Speter splx(s); 307551078Speter 307685426Sjlemon cnadd(&sio_consdev); 307758885Simp return (0); 307851078Speter} 307951078Speter 308051078Speterint 308151078Spetersiogdbattach(port, speed) 308251078Speter int port; 308351078Speter int speed; 308451078Speter{ 308551078Speter int s; 308651078Speter u_char cfcr; 308789986Sjhay u_int divisor; 308851078Speter struct siocnstate sp; 308998691Sn_hibma int unit = 1; /* XXX random value! */ 309051078Speter 309151078Speter siogdbiobase = port; 309251078Speter gdbdefaultrate = speed; 309351078Speter 309465714Sjhb printf("sio%d: gdb debugging port\n", unit); 309565714Sjhb siogdbunit = unit; 309665714Sjhb#if DDB > 0 3097120495Sphk siocnset(&gdbconsdev, unit); 3098111194Sphk gdb_arg = &gdbconsdev; 309965714Sjhb gdb_getc = siocngetc; 310065714Sjhb gdb_putc = siocnputc; 310165714Sjhb#endif 310265714Sjhb 310351078Speter s = spltty(); 310451078Speter 310551078Speter /* 310651078Speter * Initialize the divisor latch. We can't rely on 310751078Speter * siocnopen() to do this the first time, since it 310851078Speter * avoids writing to the latch if the latch appears 310951078Speter * to have the correct value. Also, if we didn't 311051078Speter * just read the speed from the hardware, then we 311151078Speter * need to set the speed in hardware so that 311251078Speter * switching it later is null. 311351078Speter */ 311451078Speter cfcr = inb(siogdbiobase + com_cfcr); 311551078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 311689986Sjhay divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 311789986Sjhay outb(siogdbiobase + com_dlbl, divisor & 0xff); 311889986Sjhay outb(siogdbiobase + com_dlbh, divisor >> 8); 311951078Speter outb(siogdbiobase + com_cfcr, cfcr); 312051078Speter 312151078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 312251078Speter splx(s); 312351078Speter 312458885Simp return (0); 312551078Speter} 312651078Speter 312751078Speter#endif 312851078Speter 312951078Speterstatic int 3130111194Sphksiocncheckc(struct consdev *cd) 313151078Speter{ 313251078Speter int c; 313351078Speter Port_t iobase; 313451078Speter int s; 313551078Speter struct siocnstate sp; 313698401Sn_hibma speed_t speed; 3137111194Sphk 3138120457Sphk if (cd->cn_unit == siocnunit) { 313998401Sn_hibma iobase = siocniobase; 314098401Sn_hibma speed = comdefaultrate; 314198401Sn_hibma } else { 314251078Speter iobase = siogdbiobase; 314398401Sn_hibma speed = gdbdefaultrate; 314498401Sn_hibma } 314551078Speter s = spltty(); 314698401Sn_hibma siocnopen(&sp, iobase, speed); 314751078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 314851078Speter c = inb(iobase + com_data); 314951078Speter else 315051078Speter c = -1; 315151078Speter siocnclose(&sp, iobase); 315251078Speter splx(s); 315351078Speter return (c); 315451078Speter} 315551078Speter 3156104094Sphkstatic int 3157111194Sphksiocngetc(struct consdev *cd) 315851078Speter{ 315951078Speter int c; 316051078Speter Port_t iobase; 316151078Speter int s; 316251078Speter struct siocnstate sp; 316398401Sn_hibma speed_t speed; 316451078Speter 3165120457Sphk if (cd->cn_unit == siocnunit) { 316698401Sn_hibma iobase = siocniobase; 316798401Sn_hibma speed = comdefaultrate; 316898401Sn_hibma } else { 316951078Speter iobase = siogdbiobase; 317098401Sn_hibma speed = gdbdefaultrate; 317198401Sn_hibma } 317251078Speter s = spltty(); 317398401Sn_hibma siocnopen(&sp, iobase, speed); 317451078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 317551078Speter ; 317651078Speter c = inb(iobase + com_data); 317751078Speter siocnclose(&sp, iobase); 317851078Speter splx(s); 317951078Speter return (c); 318051078Speter} 318151078Speter 3182104094Sphkstatic void 3183111194Sphksiocnputc(struct consdev *cd, int c) 318451078Speter{ 318588582Sbde int need_unlock; 318651078Speter int s; 318751078Speter struct siocnstate sp; 318851078Speter Port_t iobase; 318998401Sn_hibma speed_t speed; 319051078Speter 3191120457Sphk if (cd->cn_unit == siocnunit) { 319298401Sn_hibma iobase = siocniobase; 319398401Sn_hibma speed = comdefaultrate; 319498401Sn_hibma } else { 319551078Speter iobase = siogdbiobase; 319698401Sn_hibma speed = gdbdefaultrate; 319798401Sn_hibma } 319851078Speter s = spltty(); 319988582Sbde need_unlock = 0; 320088582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 320184029Sjlemon mtx_lock_spin(&sio_lock); 320288582Sbde need_unlock = 1; 320388582Sbde } 320498401Sn_hibma siocnopen(&sp, iobase, speed); 320551078Speter siocntxwait(iobase); 320651078Speter outb(iobase + com_data, c); 320751078Speter siocnclose(&sp, iobase); 320888582Sbde if (need_unlock) 320984029Sjlemon mtx_unlock_spin(&sio_lock); 321051078Speter splx(s); 321151078Speter} 321251078Speter 321351078Speter#ifdef __alpha__ 321451078Speterint 321551078Spetersiogdbgetc() 321651078Speter{ 321751078Speter int c; 321851078Speter Port_t iobase; 321998401Sn_hibma speed_t speed; 322051078Speter int s; 322151078Speter struct siocnstate sp; 322251078Speter 322398619Sn_hibma if (siogdbunit == siocnunit) { 322498401Sn_hibma iobase = siocniobase; 322598401Sn_hibma speed = comdefaultrate; 322698401Sn_hibma } else { 322798401Sn_hibma iobase = siogdbiobase; 322898401Sn_hibma speed = gdbdefaultrate; 322998401Sn_hibma } 323098401Sn_hibma 323151078Speter s = spltty(); 323298401Sn_hibma siocnopen(&sp, iobase, speed); 323351078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 323451078Speter ; 323551078Speter c = inb(iobase + com_data); 323651078Speter siocnclose(&sp, iobase); 323751078Speter splx(s); 323851078Speter return (c); 323951078Speter} 324051078Speter 324151078Spetervoid 324251078Spetersiogdbputc(c) 324351078Speter int c; 324451078Speter{ 324598401Sn_hibma Port_t iobase; 324698401Sn_hibma speed_t speed; 324751078Speter int s; 324851078Speter struct siocnstate sp; 324951078Speter 325098619Sn_hibma if (siogdbunit == siocnunit) { 325198401Sn_hibma iobase = siocniobase; 325298401Sn_hibma speed = comdefaultrate; 325398401Sn_hibma } else { 325498401Sn_hibma iobase = siogdbiobase; 325598401Sn_hibma speed = gdbdefaultrate; 325698401Sn_hibma } 325798401Sn_hibma 325851078Speter s = spltty(); 325998401Sn_hibma siocnopen(&sp, iobase, speed); 326051078Speter siocntxwait(siogdbiobase); 326151078Speter outb(siogdbiobase + com_data, c); 326251078Speter siocnclose(&sp, siogdbiobase); 326351078Speter splx(s); 326451078Speter} 326551078Speter#endif 3266