sio.c revision 119485
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3451078Speter * from: i386/isa sio.c,v 1.234 3551078Speter */ 3651078Speter 37119419Sobrien#include <sys/cdefs.h> 38119419Sobrien__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 119485 2003-08-26 05:37:48Z njl $"); 39119419Sobrien 4051078Speter#include "opt_comconsole.h" 4151078Speter#include "opt_compat.h" 4251078Speter#include "opt_ddb.h" 4351078Speter#include "opt_sio.h" 4451078Speter 4551078Speter/* 4651078Speter * Serial driver, based on 386BSD-0.1 com driver. 4751078Speter * Mostly rewritten to use pseudo-DMA. 4851078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4951078Speter * COM driver, based on HP dca driver. 5051078Speter * 5151078Speter * Changes for PC-Card integration: 5251078Speter * - Added PC-Card driver table and handlers 5351078Speter */ 5451078Speter#include <sys/param.h> 5576166Smarkm#include <sys/systm.h> 5665822Sjhb#include <sys/bus.h> 5751078Speter#include <sys/conf.h> 5851078Speter#include <sys/fcntl.h> 5951078Speter#include <sys/interrupt.h> 6051078Speter#include <sys/kernel.h> 61114216Skan#include <sys/limits.h> 6276166Smarkm#include <sys/lock.h> 6376166Smarkm#include <sys/malloc.h> 6476166Smarkm#include <sys/module.h> 6576166Smarkm#include <sys/mutex.h> 6676166Smarkm#include <sys/proc.h> 6776166Smarkm#include <sys/reboot.h> 6876166Smarkm#include <sys/sysctl.h> 6951078Speter#include <sys/syslog.h> 7076166Smarkm#include <sys/tty.h> 7160471Snyan#include <machine/bus_pio.h> 7251078Speter#include <machine/bus.h> 7351078Speter#include <sys/rman.h> 7451078Speter#include <sys/timepps.h> 7593466Sbde#include <sys/uio.h> 76119485Snjl#include <sys/cons.h> 77119485Snjl#if DDB > 0 78119485Snjl#include <ddb/ddb.h> 79119485Snjl#endif 8051078Speter 8186909Simp#include <isa/isavar.h> 8286909Simp 8351078Speter#include <machine/resource.h> 8451078Speter 8585302Simp#include <dev/sio/sioreg.h> 8685365Simp#include <dev/sio/siovar.h> 8751078Speter 8851078Speter#ifdef COM_ESP 8977726Sjoerg#include <dev/ic/esp.h> 9051078Speter#endif 9177726Sjoerg#include <dev/ic/ns16550.h> 9251078Speter 9351078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 9451078Speter 9551078Speter#define CALLOUT_MASK 0x80 9651078Speter#define CONTROL_MASK 0x60 9751078Speter#define CONTROL_INIT_STATE 0x20 9851078Speter#define CONTROL_LOCK_STATE 0x40 9951078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 10093470Sbde#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 10193470Sbde | ((mynor) & 0x1f)) 10293470Sbde#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 10393470Sbde | ((unit) & 0x1f)) 10451078Speter 10551078Speter#ifdef COM_MULTIPORT 10651078Speter/* checks in flags for multiport and which is multiport "master chip" 10751078Speter * for a given card 10851078Speter */ 10951078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 11051078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 11151078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 112104067Sphk#else 113104067Sphk#define COM_ISMULTIPORT(flags) (0) 11451078Speter#endif /* COM_MULTIPORT */ 11551078Speter 11651078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 11751078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 11851078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 11951078Speter#define COM_DEBUGGER(flags) ((flags) & 0x80) 12051078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 12151078Speter#define COM_NOFIFO(flags) ((flags) & 0x02) 122111613Sphk#define COM_PPSCTS(flags) ((flags) & 0x10000) 12351078Speter#define COM_ST16650A(flags) ((flags) & 0x20000) 12486909Simp#define COM_C_NOPROBE (0x40000) 12586909Simp#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 12651078Speter#define COM_C_IIR_TXRDYBUG (0x80000) 12751078Speter#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 128104067Sphk#define COM_NOSCR(flags) ((flags) & 0x100000) 129112384Ssobomax#define COM_TI16754(flags) ((flags) & 0x200000) 13051078Speter#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 13151078Speter 13260471Snyan#define sio_getreg(com, off) \ 13360471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 13460471Snyan#define sio_setreg(com, off, value) \ 13560471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 13660471Snyan 13751078Speter/* 13851078Speter * com state bits. 13951078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 14051078Speter * than the other bits so that they can be tested as a group without masking 14151078Speter * off the low bits. 14251078Speter * 14351078Speter * The following com and tty flags correspond closely: 14451078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 14553344Speter * comstop()) 14651078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 14751078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14851078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14951078Speter * TS_FLUSH is not used. 15051078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 15151078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 15251078Speter */ 15351078Speter#define CS_BUSY 0x80 /* output in progress */ 15451078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 15551078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 15651078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 15751078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15851078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15951078Speter#define CS_ODONE 4 /* output completed */ 16051078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 16151078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 16251078Speter 16351078Speterstatic char const * const error_desc[] = { 16451078Speter#define CE_OVERRUN 0 16551078Speter "silo overflow", 16651078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 16751078Speter "interrupt-level buffer overflow", 16851078Speter#define CE_TTY_BUF_OVERFLOW 2 16951078Speter "tty-level buffer overflow", 17051078Speter}; 17151078Speter 17286909Simp#define CE_NTYPES 3 17351078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 17451078Speter 17586909Simp/* types. XXX - should be elsewhere */ 17686909Simptypedef u_int Port_t; /* hardware port */ 17786909Simptypedef u_char bool_t; /* boolean */ 17886909Simp 17986909Simp/* queue of linear buffers */ 18086909Simpstruct lbq { 18186909Simp u_char *l_head; /* next char to process */ 18286909Simp u_char *l_tail; /* one past the last char to process */ 18386909Simp struct lbq *l_next; /* next in queue */ 18486909Simp bool_t l_queued; /* nonzero if queued */ 18586909Simp}; 18686909Simp 18786909Simp/* com device structure */ 18886909Simpstruct com_s { 18986909Simp u_int flags; /* Copy isa device flags */ 19086909Simp u_char state; /* miscellaneous flag bits */ 19186909Simp bool_t active_out; /* nonzero if the callout device is open */ 19286909Simp u_char cfcr_image; /* copy of value written to CFCR */ 19351078Speter#ifdef COM_ESP 19486909Simp bool_t esp; /* is this unit a hayes esp board? */ 19586909Simp#endif 19686909Simp u_char extra_state; /* more flag bits, separate for order trick */ 19786909Simp u_char fifo_image; /* copy of value written to FIFO */ 19886909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 19986909Simp bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 20086909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 20186909Simp u_char mcr_image; /* copy of value written to MCR */ 20286909Simp#ifdef COM_MULTIPORT 20386909Simp bool_t multiport; /* is this unit part of a multiport device? */ 20486909Simp#endif /* COM_MULTIPORT */ 20586909Simp bool_t no_irq; /* nonzero if irq is not attached */ 20686909Simp bool_t gone; /* hardware disappeared */ 20786909Simp bool_t poll; /* nonzero if polling is required */ 20886909Simp bool_t poll_output; /* nonzero if polling for output is required */ 20986909Simp int unit; /* unit number */ 21086909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 21186909Simp u_int tx_fifo_size; 21286909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 21386909Simp 21486909Simp /* 21586909Simp * The high level of the driver never reads status registers directly 21686909Simp * because there would be too many side effects to handle conveniently. 21786909Simp * Instead, it reads copies of the registers stored here by the 21886909Simp * interrupt handler. 21986909Simp */ 22086909Simp u_char last_modem_status; /* last MSR read by intr handler */ 22186909Simp u_char prev_modem_status; /* last MSR handled by high level */ 22286909Simp 22386909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 22486909Simp u_char *ibuf; /* start of input buffer */ 22586909Simp u_char *ibufend; /* end of input buffer */ 22686909Simp u_char *ibufold; /* old input buffer, to be freed */ 22786909Simp u_char *ihighwater; /* threshold in input buffer */ 22886909Simp u_char *iptr; /* next free spot in input buffer */ 22986909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 23086909Simp int ierroff; /* offset of error bytes in ibuf */ 23186909Simp 23286909Simp struct lbq obufq; /* head of queue of output buffers */ 23386909Simp struct lbq obufs[2]; /* output buffers */ 23486909Simp 23586909Simp bus_space_tag_t bst; 23686909Simp bus_space_handle_t bsh; 23786909Simp 23886909Simp Port_t data_port; /* i/o ports */ 23986909Simp#ifdef COM_ESP 24086909Simp Port_t esp_port; 24186909Simp#endif 24286909Simp Port_t int_id_port; 24386909Simp Port_t modem_ctl_port; 24486909Simp Port_t line_status_port; 24586909Simp Port_t modem_status_port; 24686909Simp Port_t intr_ctl_port; /* Ports of IIR register */ 24786909Simp 24886909Simp struct tty *tp; /* cross reference */ 24986909Simp 25086909Simp /* Initial state. */ 25186909Simp struct termios it_in; /* should be in struct tty */ 25286909Simp struct termios it_out; 25386909Simp 25486909Simp /* Lock state. */ 25586909Simp struct termios lt_in; /* should be in struct tty */ 25686909Simp struct termios lt_out; 25786909Simp 25886909Simp bool_t do_timestamp; 25986909Simp bool_t do_dcd_timestamp; 26086909Simp struct timeval timestamp; 26186909Simp struct timeval dcd_timestamp; 26286909Simp struct pps_state pps; 263111613Sphk int pps_bit; 264119485Snjl#ifdef ALT_BREAK_TO_DEBUGGER 265119485Snjl int alt_brk_state; 266119485Snjl#endif 26786909Simp 26886909Simp u_long bytes_in; /* statistics */ 26986909Simp u_long bytes_out; 27086909Simp u_int delta_error_counts[CE_NTYPES]; 27186909Simp u_long error_counts[CE_NTYPES]; 27286909Simp 27389986Sjhay u_long rclk; 27489986Sjhay 27586909Simp struct resource *irqres; 27686909Simp struct resource *ioportres; 277116120Sscottl int ioportrid; 278116120Sscottl void *cookie; 279116120Sscottl dev_t devs[6]; 28086909Simp 28186909Simp /* 28286909Simp * Data area for output buffers. Someday we should build the output 28386909Simp * buffer queue without copying data. 28486909Simp */ 28586909Simp u_char obuf1[256]; 28686909Simp u_char obuf2[256]; 28786909Simp}; 28886909Simp 28986909Simp#ifdef COM_ESP 29093010Sbdestatic int espattach(struct com_s *com, Port_t esp_port); 29151078Speter#endif 29251078Speter 29351078Speterstatic timeout_t siobusycheck; 29493010Sbdestatic u_int siodivisor(u_long rclk, speed_t speed); 29551078Speterstatic timeout_t siodtrwakeup; 29693010Sbdestatic void comhardclose(struct com_s *com); 29793010Sbdestatic void sioinput(struct com_s *com); 29893010Sbdestatic void siointr1(struct com_s *com); 29993010Sbdestatic void siointr(void *arg); 30093010Sbdestatic int commctl(struct com_s *com, int bits, int how); 30193010Sbdestatic int comparam(struct tty *tp, struct termios *t); 30293010Sbdestatic void siopoll(void *); 30393010Sbdestatic void siosettimeout(void); 30493010Sbdestatic int siosetwater(struct com_s *com, speed_t speed); 30593010Sbdestatic void comstart(struct tty *tp); 30693010Sbdestatic void comstop(struct tty *tp, int rw); 30751078Speterstatic timeout_t comwakeup; 30893010Sbdestatic void disc_optim(struct tty *tp, struct termios *t, 30993010Sbde struct com_s *com); 31051078Speter 31185365Simpchar sio_driver_name[] = "sio"; 31270174Sjhbstatic struct mtx sio_lock; 31370174Sjhbstatic int sio_inited; 31451078Speter 31551078Speter/* table and macro for fast conversion from a unit number to its com struct */ 31685365Simpdevclass_t sio_devclass; 31751078Speter#define com_addr(unit) ((struct com_s *) \ 31886909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 31951078Speter 32051078Speterstatic d_open_t sioopen; 32151078Speterstatic d_close_t sioclose; 32251078Speterstatic d_read_t sioread; 32351078Speterstatic d_write_t siowrite; 32451078Speterstatic d_ioctl_t sioioctl; 32551078Speter 32651078Speter#define CDEV_MAJOR 28 32751078Speterstatic struct cdevsw sio_cdevsw = { 328111815Sphk .d_open = sioopen, 329111815Sphk .d_close = sioclose, 330111815Sphk .d_read = sioread, 331111815Sphk .d_write = siowrite, 332111815Sphk .d_ioctl = sioioctl, 333111815Sphk .d_poll = ttypoll, 334111815Sphk .d_name = sio_driver_name, 335111815Sphk .d_maj = CDEV_MAJOR, 336111821Sphk .d_flags = D_TTY, 337111815Sphk .d_kqfilter = ttykqfilter, 33851078Speter}; 33951078Speter 340114722Sobrienint comconsole = -1; 34151078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 34289986Sjhaystatic u_long comdefaultrclk = DEFAULT_RCLK; 34389986SjhaySYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 34498401Sn_hibmastatic speed_t gdbdefaultrate = GDBSPEED; 34598401Sn_hibmaSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 34698401Sn_hibma &gdbdefaultrate, GDBSPEED, ""); 34751078Speterstatic u_int com_events; /* input chars + weighted output completions */ 34851078Speterstatic Port_t siocniobase; 34998401Sn_hibmastatic int siocnunit = -1; 35051078Speterstatic Port_t siogdbiobase; 35151078Speterstatic int siogdbunit = -1; 35272238Sjhbstatic void *sio_slow_ih; 35372238Sjhbstatic void *sio_fast_ih; 35451078Speterstatic int sio_timeout; 35551078Speterstatic int sio_timeouts_until_log; 35651078Speterstatic struct callout_handle sio_timeout_handle 35751078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 35853344Speterstatic int sio_numunits; 35951078Speter 36051078Speter#ifdef COM_ESP 36151078Speter/* XXX configure this properly. */ 36286909Simp/* XXX quite broken for new-bus. */ 36351078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 36451078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 36551078Speter#endif 36651078Speter 36751078Speter/* 36851078Speter * handle sysctl read/write requests for console speed 36951078Speter * 37051078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 37151078Speter * also set the initial and lock values for the /dev/ttyXX device 37251078Speter * if there is one associated with the console. Finally, if the /dev/tty 37351078Speter * device has already been open, change the speed on the open running port 37451078Speter * itself. 37551078Speter */ 37651078Speter 37751078Speterstatic int 37862573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 37951078Speter{ 38051078Speter int error, s; 38151078Speter speed_t newspeed; 38251078Speter struct com_s *com; 38351078Speter struct tty *tp; 38451078Speter 38551078Speter newspeed = comdefaultrate; 38651078Speter 38751078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 38851078Speter if (error || !req->newptr) 38951078Speter return (error); 39051078Speter 39151078Speter comdefaultrate = newspeed; 39251078Speter 39351078Speter if (comconsole < 0) /* serial console not selected? */ 39451078Speter return (0); 39551078Speter 39651078Speter com = com_addr(comconsole); 39757915Simp if (com == NULL) 39851078Speter return (ENXIO); 39951078Speter 40051078Speter /* 40151078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 40251078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 40351078Speter * speed changes) 40451078Speter */ 40551078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 40651078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 40751078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 40851078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 40951078Speter 41051078Speter /* 41151078Speter * if we're open, change the running rate too 41251078Speter */ 41351078Speter tp = com->tp; 41451078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 41551078Speter tp->t_termios.c_ispeed = 41651078Speter tp->t_termios.c_ospeed = comdefaultrate; 41751078Speter s = spltty(); 41851078Speter error = comparam(tp, &tp->t_termios); 41951078Speter splx(s); 42051078Speter } 42151078Speter return error; 42251078Speter} 42351078Speter 42451078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 42551078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 42691280Simp/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 42751078Speter 42886909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 42986909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 43086909Simp 43186909Simp/* 43286909Simp * Unload the driver and clear the table. 43386909Simp * XXX this is mostly wrong. 43486909Simp * XXX TODO: 43586909Simp * This is usually called when the card is ejected, but 436104933Simp * can be caused by a kldunload of a controller driver. 43786909Simp * The idea is to reset the driver's view of the device 43886909Simp * and ensure that any driver entry points such as 43986909Simp * read and write do not hang. 44086909Simp */ 44185365Simpint 44285365Simpsiodetach(dev) 44352471Simp device_t dev; 44451078Speter{ 44551078Speter struct com_s *com; 44665131Sphk int i; 44751078Speter 44852471Simp com = (struct com_s *) device_get_softc(dev); 44957915Simp if (com == NULL) { 45052471Simp device_printf(dev, "NULL com in siounload\n"); 45154386Simp return (0); 45251078Speter } 45354386Simp com->gone = 1; 45465131Sphk for (i = 0 ; i < 6; i++) 45565131Sphk destroy_dev(com->devs[i]); 45654386Simp if (com->irqres) { 45754386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 45854386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 45954386Simp } 46054386Simp if (com->ioportres) 461116120Sscottl bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid, 462116120Sscottl com->ioportres); 46351078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 46457915Simp device_printf(dev, "still open, forcing close\n"); 46577750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 46651078Speter com->tp->t_gen++; 46751078Speter ttyclose(com->tp); 46851078Speter ttwakeup(com->tp); 46951078Speter ttwwakeup(com->tp); 47051078Speter } else { 47151078Speter if (com->ibuf != NULL) 47251078Speter free(com->ibuf, M_DEVBUF); 47386909Simp device_set_softc(dev, NULL); 47486909Simp free(com, M_DEVBUF); 47551078Speter } 47653978Simp return (0); 47751078Speter} 47851078Speter 47985365Simpint 48089986Sjhaysioprobe(dev, xrid, rclk, noprobe) 48158885Simp device_t dev; 48258885Simp int xrid; 48389986Sjhay u_long rclk; 48485365Simp int noprobe; 48551078Speter{ 48653344Speter#if 0 48751078Speter static bool_t already_init; 48853344Speter device_t xdev; 48953344Speter#endif 49060471Snyan struct com_s *com; 49189986Sjhay u_int divisor; 49251078Speter bool_t failures[10]; 49351078Speter int fn; 49451078Speter device_t idev; 49551078Speter Port_t iobase; 49651078Speter intrmask_t irqmap[4]; 49751078Speter intrmask_t irqs; 49851078Speter u_char mcr_image; 49951078Speter int result; 50054206Speter u_long xirq; 50151088Speter u_int flags = device_get_flags(dev); 50251078Speter int rid; 50351078Speter struct resource *port; 50451078Speter 50558885Simp rid = xrid; 50651078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 50751078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 50851078Speter if (!port) 50957915Simp return (ENXIO); 51051078Speter 51186909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 51286909Simp if (com == NULL) 51386909Simp return (ENOMEM); 51486909Simp device_set_softc(dev, com); 51560471Snyan com->bst = rman_get_bustag(port); 51660471Snyan com->bsh = rman_get_bushandle(port); 51789986Sjhay if (rclk == 0) 51889986Sjhay rclk = DEFAULT_RCLK; 51989986Sjhay com->rclk = rclk; 52060471Snyan 52185209Sjhb while (sio_inited != 2) 52285209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 52393818Sjhb mtx_init(&sio_lock, sio_driver_name, NULL, 52493818Sjhb (comconsole != -1) ? 52585209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 52685209Sjhb atomic_store_rel_int(&sio_inited, 2); 52785209Sjhb } 52870174Sjhb 52953344Speter#if 0 53053344Speter /* 53153344Speter * XXX this is broken - when we are first called, there are no 53253344Speter * previously configured IO ports. We could hard code 53353344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 53453344Speter * This code has been doing nothing since the conversion since 53553344Speter * "count" is zero the first time around. 53653344Speter */ 53751078Speter if (!already_init) { 53851078Speter /* 53951078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 54051078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 54151078Speter * from any used port that shares the interrupt vector. 54251078Speter * XXX the gate enable is elsewhere for some multiports. 54351078Speter */ 54451078Speter device_t *devs; 54553344Speter int count, i, xioport; 54651078Speter 54751078Speter devclass_get_devices(sio_devclass, &devs, &count); 54851078Speter for (i = 0; i < count; i++) { 54951078Speter xdev = devs[i]; 55054194Speter if (device_is_enabled(xdev) && 55154194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 55254194Speter NULL) == 0) 55353344Speter outb(xioport + com_mcr, 0); 55451078Speter } 55551078Speter free(devs, M_TEMP); 55651078Speter already_init = TRUE; 55751078Speter } 55853344Speter#endif 55951078Speter 56051078Speter if (COM_LLCONSOLE(flags)) { 56151078Speter printf("sio%d: reserved for low-level i/o\n", 56251078Speter device_get_unit(dev)); 56356788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 56486909Simp device_set_softc(dev, NULL); 56586909Simp free(com, M_DEVBUF); 56651078Speter return (ENXIO); 56751078Speter } 56851078Speter 56951078Speter /* 57051078Speter * If the device is on a multiport card and has an AST/4 57151078Speter * compatible interrupt control register, initialize this 57251078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 57351078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 57451078Speter * Point idev to the device struct giving the correct id_irq. 57551078Speter * This is the struct for the master device if there is one. 57651078Speter */ 57751078Speter idev = dev; 57851078Speter mcr_image = MCR_IENABLE; 57951078Speter#ifdef COM_MULTIPORT 58057234Sbde if (COM_ISMULTIPORT(flags)) { 58154206Speter Port_t xiobase; 58254206Speter u_long io; 58354206Speter 58451078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 58551078Speter if (idev == NULL) { 58651078Speter printf("sio%d: master device %d not configured\n", 58751078Speter device_get_unit(dev), COM_MPMASTER(flags)); 58851078Speter idev = dev; 58951078Speter } 59057234Sbde if (!COM_NOTAST4(flags)) { 59157234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 59257234Sbde NULL) == 0) { 59357234Sbde xiobase = io; 59457234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 59557234Sbde NULL, NULL) == 0) 59657234Sbde outb(xiobase + com_scr, 0x80); 59757234Sbde else 59857234Sbde outb(xiobase + com_scr, 0); 59957234Sbde } 60057234Sbde mcr_image = 0; 60151078Speter } 60251078Speter } 60351078Speter#endif /* COM_MULTIPORT */ 60454194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 60551078Speter mcr_image = 0; 60651078Speter 60751078Speter bzero(failures, sizeof failures); 60851078Speter iobase = rman_get_start(port); 60951078Speter 61051078Speter /* 61151078Speter * We don't want to get actual interrupts, just masked ones. 61251078Speter * Interrupts from this line should already be masked in the ICU, 61351078Speter * but mask them in the processor as well in case there are some 61451078Speter * (misconfigured) shared interrupts. 61551078Speter */ 61672200Sbmilekic mtx_lock_spin(&sio_lock); 61751078Speter/* EXTRA DELAY? */ 61851078Speter 61951078Speter /* 620112384Ssobomax * For the TI16754 chips, set prescaler to 1 (4 is often the 621112384Ssobomax * default after-reset value) as otherwise it's impossible to 622112270Ssobomax * get highest baudrates. 623112270Ssobomax */ 624112270Ssobomax if (COM_TI16754(flags)) { 625112384Ssobomax u_char cfcr, efr; 626112270Ssobomax 627112384Ssobomax cfcr = sio_getreg(com, com_cfcr); 628112384Ssobomax sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 629112384Ssobomax efr = sio_getreg(com, com_efr); 630112384Ssobomax /* Unlock extended features to turn off prescaler. */ 631112384Ssobomax sio_setreg(com, com_efr, efr | EFR_EFE); 632112384Ssobomax /* Disable EFR. */ 633112384Ssobomax sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 634112384Ssobomax /* Turn off prescaler. */ 635112384Ssobomax sio_setreg(com, com_mcr, 636112384Ssobomax sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 637112384Ssobomax sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 638112384Ssobomax sio_setreg(com, com_efr, efr); 639112384Ssobomax sio_setreg(com, com_cfcr, cfcr); 640112270Ssobomax } 641112384Ssobomax 642112270Ssobomax /* 64351078Speter * Initialize the speed and the word size and wait long enough to 64451078Speter * drain the maximum of 16 bytes of junk in device output queues. 64551078Speter * The speed is undefined after a master reset and must be set 64651078Speter * before relying on anything related to output. There may be 64751078Speter * junk after a (very fast) soft reboot and (apparently) after 64851078Speter * master reset. 64951078Speter * XXX what about the UART bug avoided by waiting in comparam()? 65051078Speter * We don't want to to wait long enough to drain at 2 bps. 65151078Speter */ 65251078Speter if (iobase == siocniobase) 65351078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 65451078Speter else { 65560471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 65689986Sjhay divisor = siodivisor(rclk, SIO_TEST_SPEED); 65789986Sjhay sio_setreg(com, com_dlbl, divisor & 0xff); 65889986Sjhay sio_setreg(com, com_dlbh, divisor >> 8); 65960471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 66051078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 66151078Speter } 66251078Speter 66351078Speter /* 66451078Speter * Enable the interrupt gate and disable device interupts. This 66551078Speter * should leave the device driving the interrupt line low and 66651078Speter * guarantee an edge trigger if an interrupt can be generated. 66751078Speter */ 66851078Speter/* EXTRA DELAY? */ 66960471Snyan sio_setreg(com, com_mcr, mcr_image); 67060471Snyan sio_setreg(com, com_ier, 0); 67151078Speter DELAY(1000); /* XXX */ 67251078Speter irqmap[0] = isa_irq_pending(); 67351078Speter 67451078Speter /* 67551078Speter * Attempt to set loopback mode so that we can send a null byte 67651078Speter * without annoying any external device. 67751078Speter */ 67851078Speter/* EXTRA DELAY? */ 67960471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 68051078Speter 68151078Speter /* 68251078Speter * Attempt to generate an output interrupt. On 8250's, setting 68351078Speter * IER_ETXRDY generates an interrupt independent of the current 68451078Speter * setting and independent of whether the THR is empty. On 16450's, 68551078Speter * setting IER_ETXRDY generates an interrupt independent of the 68651078Speter * current setting. On 16550A's, setting IER_ETXRDY only 68751078Speter * generates an interrupt when IER_ETXRDY is not already set. 68851078Speter */ 68960471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 69051078Speter 69151078Speter /* 69251078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 69351078Speter * an interrupt. They'd better generate one for actually doing 69451078Speter * output. Loopback may be broken on the same incompatibles but 69551078Speter * it's unlikely to do more than allow the null byte out. 69651078Speter */ 69760471Snyan sio_setreg(com, com_data, 0); 69851078Speter DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 69951078Speter 70051078Speter /* 70151078Speter * Turn off loopback mode so that the interrupt gate works again 70251078Speter * (MCR_IENABLE was hidden). This should leave the device driving 70351078Speter * an interrupt line high. It doesn't matter if the interrupt 70451078Speter * line oscillates while we are not looking at it, since interrupts 70551078Speter * are disabled. 70651078Speter */ 70751078Speter/* EXTRA DELAY? */ 70860471Snyan sio_setreg(com, com_mcr, mcr_image); 70992401Simp 71092401Simp /* 71192401Simp * It seems my Xircom CBEM56G Cardbus modem wants to be reset 71292401Simp * to 8 bits *again*, or else probe test 0 will fail. 71392401Simp * gwk@sgi.com, 4/19/2001 71492401Simp */ 71592401Simp sio_setreg(com, com_cfcr, CFCR_8BITS); 71651078Speter 71751078Speter /* 71852471Simp * Some pcmcia cards have the "TXRDY bug", so we check everyone 71951078Speter * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 72051078Speter */ 72185365Simp if (noprobe) { 72253370Speter /* Reading IIR register twice */ 72353370Speter for (fn = 0; fn < 2; fn ++) { 72453370Speter DELAY(10000); 72560471Snyan failures[6] = sio_getreg(com, com_iir); 72653370Speter } 72753370Speter /* Check IIR_TXRDY clear ? */ 72853370Speter result = 0; 72953370Speter if (failures[6] & IIR_TXRDY) { 73092401Simp /* No, Double check with clearing IER */ 73160471Snyan sio_setreg(com, com_ier, 0); 73260471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 73392401Simp /* Ok. We discovered TXRDY bug! */ 73453370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 73553370Speter } else { 73653370Speter /* Unknown, Just omit this chip.. XXX */ 73753370Speter result = ENXIO; 73881793Simp sio_setreg(com, com_mcr, 0); 73953370Speter } 74051078Speter } else { 74153370Speter /* OK. this is well-known guys */ 74253370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 74351078Speter } 74481793Simp sio_setreg(com, com_ier, 0); 74560471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 74672200Sbmilekic mtx_unlock_spin(&sio_lock); 74753344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 74886909Simp if (iobase == siocniobase) 74986909Simp result = 0; 75086909Simp if (result != 0) { 75186909Simp device_set_softc(dev, NULL); 75286909Simp free(com, M_DEVBUF); 75386909Simp } 75486909Simp return (result); 75553344Speter } 75653344Speter 75751078Speter /* 75851078Speter * Check that 75951078Speter * o the CFCR, IER and MCR in UART hold the values written to them 76051078Speter * (the values happen to be all distinct - this is good for 76151078Speter * avoiding false positive tests from bus echoes). 76251078Speter * o an output interrupt is generated and its vector is correct. 76351078Speter * o the interrupt goes away when the IIR in the UART is read. 76451078Speter */ 76551078Speter/* EXTRA DELAY? */ 76660471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 76760471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 768112270Ssobomax failures[2] = sio_getreg(com, com_mcr) - mcr_image; 76951078Speter DELAY(10000); /* Some internal modems need this time */ 77051078Speter irqmap[1] = isa_irq_pending(); 77160471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 77251078Speter DELAY(1000); /* XXX */ 77351078Speter irqmap[2] = isa_irq_pending(); 77460471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 77551078Speter 77651078Speter /* 77751078Speter * Turn off all device interrupts and check that they go off properly. 77851078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 77951078Speter * the OUT2 output of the UART to 78051078Speter * the ICU input. Closing the gate would give a floating ICU input 78151078Speter * (unless there is another device driving it) and spurious interrupts. 78251078Speter * (On the system that this was first tested on, the input floats high 78351078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 78451078Speter */ 78560471Snyan sio_setreg(com, com_ier, 0); 78660471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 78760471Snyan failures[7] = sio_getreg(com, com_ier); 78851078Speter DELAY(1000); /* XXX */ 78951078Speter irqmap[3] = isa_irq_pending(); 79060471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 79151078Speter 79272200Sbmilekic mtx_unlock_spin(&sio_lock); 79351078Speter 79451078Speter irqs = irqmap[1] & ~irqmap[0]; 79554194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 79689463Simp ((1 << xirq) & irqs) == 0) { 79751078Speter printf( 79854206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 79953344Speter device_get_unit(dev), xirq, irqs); 80089447Sbmah printf( 80189470Sbmah "sio%d: port may not be enabled\n", 80289447Sbmah device_get_unit(dev)); 80389463Simp } 80451078Speter if (bootverbose) 80551078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 80651078Speter device_get_unit(dev), 80751078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 80851078Speter 80951078Speter result = 0; 81051078Speter for (fn = 0; fn < sizeof failures; ++fn) 81151078Speter if (failures[fn]) { 81260471Snyan sio_setreg(com, com_mcr, 0); 81351078Speter result = ENXIO; 81451078Speter if (bootverbose) { 81551078Speter printf("sio%d: probe failed test(s):", 81651078Speter device_get_unit(dev)); 81751078Speter for (fn = 0; fn < sizeof failures; ++fn) 81851078Speter if (failures[fn]) 81951078Speter printf(" %d", fn); 82051078Speter printf("\n"); 82151078Speter } 82251078Speter break; 82351078Speter } 82451078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 82586909Simp if (iobase == siocniobase) 82686909Simp result = 0; 82786909Simp if (result != 0) { 82886909Simp device_set_softc(dev, NULL); 82986909Simp free(com, M_DEVBUF); 83086909Simp } 83186909Simp return (result); 83251078Speter} 83351078Speter 83451078Speter#ifdef COM_ESP 83551078Speterstatic int 83651078Speterespattach(com, esp_port) 83751078Speter struct com_s *com; 83851078Speter Port_t esp_port; 83951078Speter{ 84051078Speter u_char dips; 84151078Speter u_char val; 84251078Speter 84351078Speter /* 84451078Speter * Check the ESP-specific I/O port to see if we're an ESP 84551078Speter * card. If not, return failure immediately. 84651078Speter */ 84751078Speter if ((inb(esp_port) & 0xf3) == 0) { 84851078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 84951078Speter return (0); 85051078Speter } 85151078Speter 85251078Speter /* 85351078Speter * We've got something that claims to be a Hayes ESP card. 85451078Speter * Let's hope so. 85551078Speter */ 85651078Speter 85751078Speter /* Get the dip-switch configuration */ 85851078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 85951078Speter dips = inb(esp_port + ESP_STATUS1); 86051078Speter 86151078Speter /* 86251078Speter * Bits 0,1 of dips say which COM port we are. 86351078Speter */ 86460471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 86551078Speter printf(" : ESP"); 86651078Speter else { 86751078Speter printf(" esp_port has com %d\n", dips & 0x03); 86851078Speter return (0); 86951078Speter } 87051078Speter 87151078Speter /* 87251078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 87351078Speter */ 87451078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 87551078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 87651078Speter val = inb(esp_port + ESP_STATUS2); 87751078Speter if ((val & 0x70) < 0x20) { 87851078Speter printf("-old (%o)", val & 0x70); 87951078Speter return (0); 88051078Speter } 88151078Speter 88251078Speter /* 88351078Speter * Check for ability to emulate 16550: bit 7 == 1 88451078Speter */ 88551078Speter if ((dips & 0x80) == 0) { 88651078Speter printf(" slave"); 88751078Speter return (0); 88851078Speter } 88951078Speter 89051078Speter /* 89151078Speter * Okay, we seem to be a Hayes ESP card. Whee. 89251078Speter */ 89351078Speter com->esp = TRUE; 89451078Speter com->esp_port = esp_port; 89551078Speter return (1); 89651078Speter} 89751078Speter#endif /* COM_ESP */ 89851078Speter 89985365Simpint 90089986Sjhaysioattach(dev, xrid, rclk) 90151078Speter device_t dev; 90258885Simp int xrid; 90389986Sjhay u_long rclk; 90451078Speter{ 90551078Speter struct com_s *com; 90651078Speter#ifdef COM_ESP 90751078Speter Port_t *espp; 90851078Speter#endif 90951078Speter Port_t iobase; 91093470Sbde int minorbase; 91151078Speter int unit; 91253344Speter u_int flags; 91351078Speter int rid; 91451078Speter struct resource *port; 91553344Speter int ret; 91651078Speter 91758885Simp rid = xrid; 91851078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 91951078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 92051078Speter if (!port) 92157915Simp return (ENXIO); 92251078Speter 92351078Speter iobase = rman_get_start(port); 92451078Speter unit = device_get_unit(dev); 92551078Speter com = device_get_softc(dev); 92653344Speter flags = device_get_flags(dev); 92751078Speter 92853344Speter if (unit >= sio_numunits) 92953344Speter sio_numunits = unit + 1; 93051078Speter /* 93151078Speter * sioprobe() has initialized the device registers as follows: 93251078Speter * o cfcr = CFCR_8BITS. 93351078Speter * It is most important that CFCR_DLAB is off, so that the 93451078Speter * data port is not hidden when we enable interrupts. 93551078Speter * o ier = 0. 93651078Speter * Interrupts are only enabled when the line is open. 93751078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 93851078Speter * interrupt control register or the config specifies no irq. 93951078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 94051078Speter * device from sending before we are ready. 94151078Speter */ 94251078Speter bzero(com, sizeof *com); 94351078Speter com->unit = unit; 94451078Speter com->ioportres = port; 945116120Sscottl com->ioportrid = rid; 94660471Snyan com->bst = rman_get_bustag(port); 94760471Snyan com->bsh = rman_get_bushandle(port); 94851078Speter com->cfcr_image = CFCR_8BITS; 94951078Speter com->dtr_wait = 3 * hz; 95051078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 95157234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 95251078Speter com->tx_fifo_size = 1; 95351078Speter com->obufs[0].l_head = com->obuf1; 95451078Speter com->obufs[1].l_head = com->obuf2; 95551078Speter 95651078Speter com->data_port = iobase + com_data; 95751078Speter com->int_id_port = iobase + com_iir; 95851078Speter com->modem_ctl_port = iobase + com_mcr; 95951078Speter com->mcr_image = inb(com->modem_ctl_port); 96051078Speter com->line_status_port = iobase + com_lsr; 96151078Speter com->modem_status_port = iobase + com_msr; 96251078Speter com->intr_ctl_port = iobase + com_ier; 96351078Speter 96489986Sjhay if (rclk == 0) 96589986Sjhay rclk = DEFAULT_RCLK; 96689986Sjhay com->rclk = rclk; 96789986Sjhay 96851078Speter /* 96951078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 97051078Speter * are only relevant for logins. It's important to have echo off 97151078Speter * initially so that the line doesn't start blathering before the 97251078Speter * echo flag can be turned off. 97351078Speter */ 97451078Speter com->it_in.c_iflag = 0; 97551078Speter com->it_in.c_oflag = 0; 97651078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 97751078Speter com->it_in.c_lflag = 0; 97851078Speter if (unit == comconsole) { 97951078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 98051078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 98151078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 98251078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 98351078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 98451078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 98551078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 98651078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 98751078Speter } else 98851078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 98965605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 99072200Sbmilekic mtx_unlock_spin(&sio_lock); 99156788Sbde /* 99256788Sbde * Leave i/o resources allocated if this is a `cn'-level 99356788Sbde * console, so that other devices can't snarf them. 99456788Sbde */ 99556788Sbde if (iobase != siocniobase) 99656788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 99756788Sbde return (ENOMEM); 99851078Speter } 99972200Sbmilekic mtx_unlock_spin(&sio_lock); 100051078Speter termioschars(&com->it_in); 100151078Speter com->it_out = com->it_in; 100251078Speter 100351078Speter /* attempt to determine UART type */ 100451078Speter printf("sio%d: type", unit); 100551078Speter 100651078Speter 1007104067Sphk if (!COM_ISMULTIPORT(flags) && 1008104067Sphk !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 100951078Speter u_char scr; 101051078Speter u_char scr1; 101151078Speter u_char scr2; 101251078Speter 101360471Snyan scr = sio_getreg(com, com_scr); 101460471Snyan sio_setreg(com, com_scr, 0xa5); 101560471Snyan scr1 = sio_getreg(com, com_scr); 101660471Snyan sio_setreg(com, com_scr, 0x5a); 101760471Snyan scr2 = sio_getreg(com, com_scr); 101860471Snyan sio_setreg(com, com_scr, scr); 101951078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 102089447Sbmah printf(" 8250 or not responding"); 102151078Speter goto determined_type; 102251078Speter } 102351078Speter } 102460471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 102551078Speter DELAY(100); 102651078Speter com->st16650a = 0; 102751078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 102851078Speter case FIFO_RX_LOW: 102951078Speter printf(" 16450"); 103051078Speter break; 103151078Speter case FIFO_RX_MEDL: 103251078Speter printf(" 16450?"); 103351078Speter break; 103451078Speter case FIFO_RX_MEDH: 103551078Speter printf(" 16550?"); 103651078Speter break; 103751078Speter case FIFO_RX_HIGH: 103851078Speter if (COM_NOFIFO(flags)) { 103951078Speter printf(" 16550A fifo disabled"); 104051078Speter } else { 104151078Speter com->hasfifo = TRUE; 104251078Speter if (COM_ST16650A(flags)) { 104351078Speter com->st16650a = 1; 104451078Speter com->tx_fifo_size = 32; 104551078Speter printf(" ST16650A"); 1046112270Ssobomax } else if (COM_TI16754(flags)) { 1047112270Ssobomax com->tx_fifo_size = 64; 1048112270Ssobomax printf(" TI16754"); 104951078Speter } else { 105051078Speter com->tx_fifo_size = COM_FIFOSIZE(flags); 105151078Speter printf(" 16550A"); 105251078Speter } 105351078Speter } 105451078Speter#ifdef COM_ESP 105551078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 105651078Speter if (espattach(com, *espp)) { 105751078Speter com->tx_fifo_size = 1024; 105851078Speter break; 105951078Speter } 106051078Speter#endif 1061112270Ssobomax if (!com->st16650a && !COM_TI16754(flags)) { 106251078Speter if (!com->tx_fifo_size) 106351078Speter com->tx_fifo_size = 16; 106451078Speter else 106551078Speter printf(" lookalike with %d bytes FIFO", 106651078Speter com->tx_fifo_size); 106751078Speter } 106851078Speter 106951078Speter break; 107051078Speter } 107151078Speter 107251078Speter#ifdef COM_ESP 107351078Speter if (com->esp) { 107451078Speter /* 107551078Speter * Set 16550 compatibility mode. 107651078Speter * We don't use the ESP_MODE_SCALE bit to increase the 107751078Speter * fifo trigger levels because we can't handle large 107851078Speter * bursts of input. 107951078Speter * XXX flow control should be set in comparam(), not here. 108051078Speter */ 108151078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 108251078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 108351078Speter 108451078Speter /* Set RTS/CTS flow control. */ 108551078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 108651078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 108751078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 108851078Speter 108951078Speter /* Set flow-control levels. */ 109051078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 109151078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 109251078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 109351078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 109451078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 109551078Speter } 109651078Speter#endif /* COM_ESP */ 109760471Snyan sio_setreg(com, com_fifo, 0); 109851078Speterdetermined_type: ; 109951078Speter 110051078Speter#ifdef COM_MULTIPORT 110151078Speter if (COM_ISMULTIPORT(flags)) { 110253344Speter device_t masterdev; 110353344Speter 110451078Speter com->multiport = TRUE; 110551078Speter printf(" (multiport"); 110651078Speter if (unit == COM_MPMASTER(flags)) 110751078Speter printf(" master"); 110851078Speter printf(")"); 110953344Speter masterdev = devclass_get_device(sio_devclass, 111053344Speter COM_MPMASTER(flags)); 111157234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 111257234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 111351078Speter } 111451078Speter#endif /* COM_MULTIPORT */ 111551078Speter if (unit == comconsole) 111651078Speter printf(", console"); 111753344Speter if (COM_IIR_TXRDYBUG(flags)) 111851078Speter printf(" with a bogus IIR_TXRDY register"); 111951078Speter printf("\n"); 112051078Speter 112167551Sjhb if (sio_fast_ih == NULL) { 112272238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 112372238Sjhb &sio_fast_ih); 112472238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 112572238Sjhb &sio_slow_ih); 112651078Speter } 112793470Sbde minorbase = UNIT_TO_MINOR(unit); 112893470Sbde com->devs[0] = make_dev(&sio_cdevsw, minorbase, 112951078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 113093470Sbde com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 113151078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 113293470Sbde com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 113351078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 113493470Sbde com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 113551078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 113665131Sphk com->devs[4] = make_dev(&sio_cdevsw, 113793470Sbde minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 113851078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 113965131Sphk com->devs[5] = make_dev(&sio_cdevsw, 114093470Sbde minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 114151078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1142110249Sphk for (rid = 0; rid < 6; rid++) 1143110249Sphk com->devs[rid]->si_drv1 = com; 114451078Speter com->flags = flags; 114551078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1146111613Sphk 1147111613Sphk if (COM_PPSCTS(flags)) 1148111613Sphk com->pps_bit = MSR_CTS; 1149111613Sphk else 1150111613Sphk com->pps_bit = MSR_DCD; 115151078Speter pps_init(&com->pps); 115251078Speter 115351078Speter rid = 0; 115451078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 115553344Speter RF_ACTIVE); 115653344Speter if (com->irqres) { 115753344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 115865557Sjasone INTR_TYPE_TTY | INTR_FAST, 115954386Simp siointr, com, &com->cookie); 116054194Speter if (ret) { 116154194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 116254194Speter com->irqres, INTR_TYPE_TTY, 116354386Simp siointr, com, &com->cookie); 116454194Speter if (ret == 0) 116583246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 116654194Speter } 116753344Speter if (ret) 116853344Speter device_printf(dev, "could not activate interrupt\n"); 116978504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 117078504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 117178504Siedowse /* 117278504Siedowse * Enable interrupts for early break-to-debugger support 117378504Siedowse * on the console. 117478504Siedowse */ 117578504Siedowse if (ret == 0 && unit == comconsole) 117678504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 117778504Siedowse IER_EMSC); 117878504Siedowse#endif 117953344Speter } 118051078Speter 118151078Speter return (0); 118251078Speter} 118351078Speter 118451078Speterstatic int 118583366Sjuliansioopen(dev, flag, mode, td) 118651078Speter dev_t dev; 118751078Speter int flag; 118851078Speter int mode; 118983366Sjulian struct thread *td; 119051078Speter{ 119151078Speter struct com_s *com; 119251078Speter int error; 119351078Speter int mynor; 119451078Speter int s; 119551078Speter struct tty *tp; 119651078Speter int unit; 119751078Speter 119851078Speter mynor = minor(dev); 119951078Speter unit = MINOR_TO_UNIT(mynor); 120053344Speter com = com_addr(unit); 120153344Speter if (com == NULL) 120251078Speter return (ENXIO); 120351078Speter if (com->gone) 120451078Speter return (ENXIO); 120551078Speter if (mynor & CONTROL_MASK) 120651078Speter return (0); 120751078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 120851078Speter s = spltty(); 120951078Speter /* 121051078Speter * We jump to this label after all non-interrupted sleeps to pick 121151078Speter * up any changes of the device state. 121251078Speter */ 121351078Speteropen_top: 121451078Speter while (com->state & CS_DTR_OFF) { 121551078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 121651078Speter if (com_addr(unit) == NULL) 121751078Speter return (ENXIO); 121851078Speter if (error != 0 || com->gone) 121951078Speter goto out; 122051078Speter } 122151078Speter if (tp->t_state & TS_ISOPEN) { 122251078Speter /* 122351078Speter * The device is open, so everything has been initialized. 122451078Speter * Handle conflicts. 122551078Speter */ 122651078Speter if (mynor & CALLOUT_MASK) { 122751078Speter if (!com->active_out) { 122851078Speter error = EBUSY; 122951078Speter goto out; 123051078Speter } 123151078Speter } else { 123251078Speter if (com->active_out) { 123351078Speter if (flag & O_NONBLOCK) { 123451078Speter error = EBUSY; 123551078Speter goto out; 123651078Speter } 123751078Speter error = tsleep(&com->active_out, 123851078Speter TTIPRI | PCATCH, "siobi", 0); 123951078Speter if (com_addr(unit) == NULL) 124051078Speter return (ENXIO); 124151078Speter if (error != 0 || com->gone) 124251078Speter goto out; 124351078Speter goto open_top; 124451078Speter } 124551078Speter } 124651078Speter if (tp->t_state & TS_XCLUDE && 124793593Sjhb suser(td)) { 124851078Speter error = EBUSY; 124951078Speter goto out; 125051078Speter } 125151078Speter } else { 125251078Speter /* 125351078Speter * The device isn't open, so there are no conflicts. 125451078Speter * Initialize it. Initialization is done twice in many 125551078Speter * cases: to preempt sleeping callin opens if we are 125651078Speter * callout, and to complete a callin open after DCD rises. 125751078Speter */ 125851078Speter tp->t_oproc = comstart; 125951078Speter tp->t_param = comparam; 126051654Sphk tp->t_stop = comstop; 126151078Speter tp->t_dev = dev; 126251078Speter tp->t_termios = mynor & CALLOUT_MASK 126351078Speter ? com->it_out : com->it_in; 126451078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 126551078Speter com->poll = com->no_irq; 126651078Speter com->poll_output = com->loses_outints; 126751078Speter ++com->wopeners; 126851078Speter error = comparam(tp, &tp->t_termios); 126951078Speter --com->wopeners; 127051078Speter if (error != 0) 127151078Speter goto out; 127251078Speter /* 127351078Speter * XXX we should goto open_top if comparam() slept. 127451078Speter */ 127551078Speter if (com->hasfifo) { 1276102542Sphk int i; 127751078Speter /* 127851078Speter * (Re)enable and drain fifos. 127951078Speter * 128051078Speter * Certain SMC chips cause problems if the fifos 128151078Speter * are enabled while input is ready. Turn off the 128251078Speter * fifo if necessary to clear the input. We test 128351078Speter * the input ready bit after enabling the fifos 128451078Speter * since we've already enabled them in comparam() 128551078Speter * and to handle races between enabling and fresh 128651078Speter * input. 128751078Speter */ 1288102542Sphk for (i = 0; i < 500; i++) { 128960471Snyan sio_setreg(com, com_fifo, 129060471Snyan FIFO_RCV_RST | FIFO_XMT_RST 129160471Snyan | com->fifo_image); 129251078Speter /* 129351078Speter * XXX the delays are for superstitious 129451078Speter * historical reasons. It must be less than 129551078Speter * the character time at the maximum 129651078Speter * supported speed (87 usec at 115200 bps 129751078Speter * 8N1). Otherwise we might loop endlessly 129851078Speter * if data is streaming in. We used to use 129951078Speter * delays of 100. That usually worked 130051078Speter * because DELAY(100) used to usually delay 130151078Speter * for about 85 usec instead of 100. 130251078Speter */ 130351078Speter DELAY(50); 130451078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 130551078Speter break; 130660471Snyan sio_setreg(com, com_fifo, 0); 130751078Speter DELAY(50); 130851078Speter (void) inb(com->data_port); 130951078Speter } 1310102542Sphk if (i == 500) { 1311102542Sphk error = EIO; 1312102542Sphk goto out; 1313102542Sphk } 131451078Speter } 131551078Speter 131672200Sbmilekic mtx_lock_spin(&sio_lock); 131751078Speter (void) inb(com->line_status_port); 131851078Speter (void) inb(com->data_port); 131951078Speter com->prev_modem_status = com->last_modem_status 132051078Speter = inb(com->modem_status_port); 132151078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 132251078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 132351078Speter | IER_EMSC); 132451078Speter } else { 132551078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 132651078Speter | IER_ERLS | IER_EMSC); 132751078Speter } 132872200Sbmilekic mtx_unlock_spin(&sio_lock); 132951078Speter /* 133051078Speter * Handle initial DCD. Callout devices get a fake initial 133151078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 133251078Speter * callin opens get woken up and resume sleeping on "siobi" 133351078Speter * instead of "siodcd". 133451078Speter */ 133551078Speter /* 133651078Speter * XXX `mynor & CALLOUT_MASK' should be 133751078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 133851078Speter * TRAPDOOR_CARRIER is the default initial state for callout 133951078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 134051078Speter * the true carrier. 134151078Speter */ 134251078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 134351078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 134451078Speter } 134551078Speter /* 134651078Speter * Wait for DCD if necessary. 134751078Speter */ 134851078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 134951078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 135051078Speter ++com->wopeners; 135151078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 135251078Speter if (com_addr(unit) == NULL) 135351078Speter return (ENXIO); 135451078Speter --com->wopeners; 135551078Speter if (error != 0 || com->gone) 135651078Speter goto out; 135751078Speter goto open_top; 135851078Speter } 135951078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 136051078Speter disc_optim(tp, &tp->t_termios, com); 136151078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 136251078Speter com->active_out = TRUE; 136351078Speter siosettimeout(); 136451078Speterout: 136551078Speter splx(s); 136651078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 136751078Speter comhardclose(com); 136851078Speter return (error); 136951078Speter} 137051078Speter 137151078Speterstatic int 137283366Sjuliansioclose(dev, flag, mode, td) 137351078Speter dev_t dev; 137451078Speter int flag; 137551078Speter int mode; 137683366Sjulian struct thread *td; 137751078Speter{ 137851078Speter struct com_s *com; 137951078Speter int mynor; 138051078Speter int s; 138151078Speter struct tty *tp; 138251078Speter 138351078Speter mynor = minor(dev); 138451078Speter if (mynor & CONTROL_MASK) 138551078Speter return (0); 138651078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 138757915Simp if (com == NULL) 138857915Simp return (ENODEV); 138951078Speter tp = com->tp; 139051078Speter s = spltty(); 139151078Speter (*linesw[tp->t_line].l_close)(tp, flag); 139251078Speter disc_optim(tp, &tp->t_termios, com); 139351654Sphk comstop(tp, FREAD | FWRITE); 139451078Speter comhardclose(com); 139551078Speter ttyclose(tp); 139651078Speter siosettimeout(); 139751078Speter splx(s); 139851078Speter if (com->gone) { 139951078Speter printf("sio%d: gone\n", com->unit); 140051078Speter s = spltty(); 140151078Speter if (com->ibuf != NULL) 140251078Speter free(com->ibuf, M_DEVBUF); 140351078Speter bzero(tp, sizeof *tp); 140451078Speter splx(s); 140551078Speter } 140651078Speter return (0); 140751078Speter} 140851078Speter 140951078Speterstatic void 141051078Spetercomhardclose(com) 141151078Speter struct com_s *com; 141251078Speter{ 141351078Speter int s; 141451078Speter struct tty *tp; 141551078Speter 141651078Speter s = spltty(); 141751078Speter com->poll = FALSE; 141851078Speter com->poll_output = FALSE; 141951078Speter com->do_timestamp = FALSE; 142051078Speter com->do_dcd_timestamp = FALSE; 142151078Speter com->pps.ppsparam.mode = 0; 142260471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 142378504Siedowse tp = com->tp; 142478504Siedowse 142578504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 142678504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 142778504Siedowse /* 142878504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 142978504Siedowse * console. This allows us to detect break-to-debugger events 143078504Siedowse * while the console device is closed. 143178504Siedowse */ 143278504Siedowse if (com->unit != comconsole) 143378504Siedowse#endif 143451078Speter { 143560471Snyan sio_setreg(com, com_ier, 0); 143651078Speter if (tp->t_cflag & HUPCL 143751078Speter /* 143851078Speter * XXX we will miss any carrier drop between here and the 143951078Speter * next open. Perhaps we should watch DCD even when the 144051078Speter * port is closed; it is not sufficient to check it at 144151078Speter * the next open because it might go up and down while 144251078Speter * we're not watching. 144351078Speter */ 144451078Speter || (!com->active_out 144551078Speter && !(com->prev_modem_status & MSR_DCD) 144651078Speter && !(com->it_in.c_cflag & CLOCAL)) 144751078Speter || !(tp->t_state & TS_ISOPEN)) { 144851078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 144951078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 145051078Speter timeout(siodtrwakeup, com, com->dtr_wait); 145151078Speter com->state |= CS_DTR_OFF; 145251078Speter } 145351078Speter } 145451078Speter } 145551078Speter if (com->hasfifo) { 145651078Speter /* 145751078Speter * Disable fifos so that they are off after controlled 145851078Speter * reboots. Some BIOSes fail to detect 16550s when the 145951078Speter * fifos are enabled. 146051078Speter */ 146160471Snyan sio_setreg(com, com_fifo, 0); 146251078Speter } 146351078Speter com->active_out = FALSE; 146451078Speter wakeup(&com->active_out); 146551078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 146651078Speter splx(s); 146751078Speter} 146851078Speter 146951078Speterstatic int 147051078Spetersioread(dev, uio, flag) 147151078Speter dev_t dev; 147251078Speter struct uio *uio; 147351078Speter int flag; 147451078Speter{ 147551078Speter int mynor; 147651078Speter struct com_s *com; 147751078Speter 147851078Speter mynor = minor(dev); 147951078Speter if (mynor & CONTROL_MASK) 148051078Speter return (ENODEV); 148151078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 148257915Simp if (com == NULL || com->gone) 148351078Speter return (ENODEV); 148451078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 148551078Speter} 148651078Speter 148751078Speterstatic int 148851078Spetersiowrite(dev, uio, flag) 148951078Speter dev_t dev; 149051078Speter struct uio *uio; 149151078Speter int flag; 149251078Speter{ 149351078Speter int mynor; 149451078Speter struct com_s *com; 149551078Speter int unit; 149651078Speter 149751078Speter mynor = minor(dev); 149851078Speter if (mynor & CONTROL_MASK) 149951078Speter return (ENODEV); 150051078Speter 150151078Speter unit = MINOR_TO_UNIT(mynor); 150251078Speter com = com_addr(unit); 150357915Simp if (com == NULL || com->gone) 150451078Speter return (ENODEV); 150551078Speter /* 150651078Speter * (XXX) We disallow virtual consoles if the physical console is 150751078Speter * a serial port. This is in case there is a display attached that 150851078Speter * is not the console. In that situation we don't need/want the X 150951078Speter * server taking over the console. 151051078Speter */ 151151078Speter if (constty != NULL && unit == comconsole) 151251078Speter constty = NULL; 151351078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 151451078Speter} 151551078Speter 151651078Speterstatic void 151751078Spetersiobusycheck(chan) 151851078Speter void *chan; 151951078Speter{ 152051078Speter struct com_s *com; 152151078Speter int s; 152251078Speter 152351078Speter com = (struct com_s *)chan; 152451078Speter 152551078Speter /* 152651078Speter * Clear TS_BUSY if low-level output is complete. 152751078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 152851078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 152951078Speter * called again. Reading the line status port outside of siointr1() 153051078Speter * is safe because CS_BUSY is clear so there are no output interrupts 153151078Speter * to lose. 153251078Speter */ 153351078Speter s = spltty(); 153451078Speter if (com->state & CS_BUSY) 153551078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 153651078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 153751078Speter == (LSR_TSRE | LSR_TXRDY)) { 153851078Speter com->tp->t_state &= ~TS_BUSY; 153951078Speter ttwwakeup(com->tp); 154051078Speter com->extra_state &= ~CSE_BUSYCHECK; 154151078Speter } else 154251078Speter timeout(siobusycheck, com, hz / 100); 154351078Speter splx(s); 154451078Speter} 154551078Speter 154689986Sjhaystatic u_int 154789986Sjhaysiodivisor(rclk, speed) 154889986Sjhay u_long rclk; 154989986Sjhay speed_t speed; 155089986Sjhay{ 155189986Sjhay long actual_speed; 155289986Sjhay u_int divisor; 155389986Sjhay int error; 155489986Sjhay 1555114334Speter if (speed == 0) 155689986Sjhay return (0); 1557114334Speter#if UINT_MAX > (ULONG_MAX - 1) / 8 1558114334Speter if (speed > (ULONG_MAX - 1) / 8) 1559114334Speter return (0); 1560114334Speter#endif 156189986Sjhay divisor = (rclk / (8UL * speed) + 1) / 2; 156289986Sjhay if (divisor == 0 || divisor >= 65536) 156389986Sjhay return (0); 156489986Sjhay actual_speed = rclk / (16UL * divisor); 156589986Sjhay 156689986Sjhay /* 10 times error in percent: */ 156789986Sjhay error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 156889986Sjhay 156989986Sjhay /* 3.0% maximum error tolerance: */ 157089986Sjhay if (error < -30 || error > 30) 157189986Sjhay return (0); 157289986Sjhay 157389986Sjhay return (divisor); 157489986Sjhay} 157589986Sjhay 157651078Speterstatic void 157751078Spetersiodtrwakeup(chan) 157851078Speter void *chan; 157951078Speter{ 158051078Speter struct com_s *com; 158151078Speter 158251078Speter com = (struct com_s *)chan; 158351078Speter com->state &= ~CS_DTR_OFF; 158451078Speter wakeup(&com->dtr_wait); 158551078Speter} 158651078Speter 158765557Sjasone/* 158870174Sjhb * Call this function with the sio_lock mutex held. It will return with the 158970174Sjhb * lock still held. 159065557Sjasone */ 159151078Speterstatic void 159251078Spetersioinput(com) 159351078Speter struct com_s *com; 159451078Speter{ 159551078Speter u_char *buf; 159651078Speter int incc; 159751078Speter u_char line_status; 159851078Speter int recv_data; 159951078Speter struct tty *tp; 160051078Speter 160151078Speter buf = com->ibuf; 160251078Speter tp = com->tp; 160351078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 160451078Speter com_events -= (com->iptr - com->ibuf); 160551078Speter com->iptr = com->ibuf; 160651078Speter return; 160751078Speter } 160851078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 160951078Speter /* 161051078Speter * Avoid the grotesquely inefficient lineswitch routine 161151078Speter * (ttyinput) in "raw" mode. It usually takes about 450 161251078Speter * instructions (that's without canonical processing or echo!). 161351078Speter * slinput is reasonably fast (usually 40 instructions plus 161451078Speter * call overhead). 161551078Speter */ 161651078Speter do { 161765557Sjasone /* 161865557Sjasone * This may look odd, but it is using save-and-enable 161965557Sjasone * semantics instead of the save-and-disable semantics 162065557Sjasone * that are used everywhere else. 162165557Sjasone */ 162272200Sbmilekic mtx_unlock_spin(&sio_lock); 162351078Speter incc = com->iptr - buf; 162451078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 162551078Speter && (com->state & CS_RTS_IFLOW 162651078Speter || tp->t_iflag & IXOFF) 162751078Speter && !(tp->t_state & TS_TBLOCK)) 162851078Speter ttyblock(tp); 162951078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 163051078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 163151078Speter buf += incc; 163251078Speter tk_nin += incc; 163351078Speter tk_rawcc += incc; 163451078Speter tp->t_rawcc += incc; 163551078Speter ttwakeup(tp); 163651078Speter if (tp->t_state & TS_TTSTOP 163751078Speter && (tp->t_iflag & IXANY 163851078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 163951078Speter tp->t_state &= ~TS_TTSTOP; 164051078Speter tp->t_lflag &= ~FLUSHO; 164151078Speter comstart(tp); 164251078Speter } 164372200Sbmilekic mtx_lock_spin(&sio_lock); 164451078Speter } while (buf < com->iptr); 164551078Speter } else { 164651078Speter do { 164765557Sjasone /* 164865557Sjasone * This may look odd, but it is using save-and-enable 164965557Sjasone * semantics instead of the save-and-disable semantics 165065557Sjasone * that are used everywhere else. 165165557Sjasone */ 165272200Sbmilekic mtx_unlock_spin(&sio_lock); 165351078Speter line_status = buf[com->ierroff]; 165451078Speter recv_data = *buf++; 165551078Speter if (line_status 165651078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 165751078Speter if (line_status & LSR_BI) 165851078Speter recv_data |= TTY_BI; 165951078Speter if (line_status & LSR_FE) 166051078Speter recv_data |= TTY_FE; 166151078Speter if (line_status & LSR_OE) 166251078Speter recv_data |= TTY_OE; 166351078Speter if (line_status & LSR_PE) 166451078Speter recv_data |= TTY_PE; 166551078Speter } 166651078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 166772200Sbmilekic mtx_lock_spin(&sio_lock); 166851078Speter } while (buf < com->iptr); 166951078Speter } 167051078Speter com_events -= (com->iptr - com->ibuf); 167151078Speter com->iptr = com->ibuf; 167251078Speter 167351078Speter /* 167451078Speter * There is now room for another low-level buffer full of input, 167551078Speter * so enable RTS if it is now disabled and there is room in the 167651078Speter * high-level buffer. 167751078Speter */ 167851078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 167951078Speter !(tp->t_state & TS_TBLOCK)) 168051078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 168151078Speter} 168251078Speter 1683104094Sphkstatic void 168451078Spetersiointr(arg) 168551078Speter void *arg; 168651078Speter{ 168770174Sjhb struct com_s *com; 168870174Sjhb 168951078Speter#ifndef COM_MULTIPORT 169070174Sjhb com = (struct com_s *)arg; 169170174Sjhb 169272200Sbmilekic mtx_lock_spin(&sio_lock); 169370174Sjhb siointr1(com); 169472200Sbmilekic mtx_unlock_spin(&sio_lock); 169551078Speter#else /* COM_MULTIPORT */ 169651078Speter bool_t possibly_more_intrs; 169751078Speter int unit; 169851078Speter 169951078Speter /* 170051078Speter * Loop until there is no activity on any port. This is necessary 170151078Speter * to get an interrupt edge more than to avoid another interrupt. 170251078Speter * If the IRQ signal is just an OR of the IRQ signals from several 170351078Speter * devices, then the edge from one may be lost because another is 170451078Speter * on. 170551078Speter */ 170672200Sbmilekic mtx_lock_spin(&sio_lock); 170751078Speter do { 170851078Speter possibly_more_intrs = FALSE; 170953344Speter for (unit = 0; unit < sio_numunits; ++unit) { 171051078Speter com = com_addr(unit); 171151078Speter /* 171251078Speter * XXX COM_LOCK(); 171351078Speter * would it work here, or be counter-productive? 171451078Speter */ 171551078Speter if (com != NULL 171651078Speter && !com->gone 171751078Speter && (inb(com->int_id_port) & IIR_IMASK) 171851078Speter != IIR_NOPEND) { 171951078Speter siointr1(com); 172051078Speter possibly_more_intrs = TRUE; 172151078Speter } 172251078Speter /* XXX COM_UNLOCK(); */ 172351078Speter } 172451078Speter } while (possibly_more_intrs); 172572200Sbmilekic mtx_unlock_spin(&sio_lock); 172651078Speter#endif /* COM_MULTIPORT */ 172751078Speter} 172851078Speter 172993466Sbdestatic struct timespec siots[8192]; 173093466Sbdestatic int siotso; 173193466Sbdestatic int volatile siotsunit = -1; 173293466Sbde 173393466Sbdestatic int 173493466Sbdesysctl_siots(SYSCTL_HANDLER_ARGS) 173593466Sbde{ 173693466Sbde char buf[128]; 173793466Sbde long long delta; 173893466Sbde size_t len; 173993466Sbde int error, i; 174093466Sbde 174193466Sbde for (i = 1; i < siotso; i++) { 174293466Sbde delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 174393466Sbde 1000000000 + 174493466Sbde (siots[i].tv_nsec - siots[i - 1].tv_nsec); 174593466Sbde len = sprintf(buf, "%lld\n", delta); 174693466Sbde if (delta >= 110000) 174793466Sbde len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 174893466Sbde (long)siots[i].tv_sec, siots[i].tv_nsec); 174993466Sbde if (i == siotso - 1) 175093466Sbde buf[len - 1] = '\0'; 175193466Sbde error = SYSCTL_OUT(req, buf, len); 175293466Sbde if (error != 0) 175393466Sbde return (error); 175493466Sbde uio_yield(); 175593466Sbde } 175693466Sbde return (0); 175793466Sbde} 175893466Sbde 175993466SbdeSYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 176093466Sbde 0, 0, sysctl_siots, "A", "sio timestamps"); 176193466Sbde 176251078Speterstatic void 176351078Spetersiointr1(com) 176451078Speter struct com_s *com; 176551078Speter{ 176651078Speter u_char line_status; 176751078Speter u_char modem_status; 176851078Speter u_char *ioptr; 176951078Speter u_char recv_data; 177051078Speter u_char int_ctl; 177151078Speter u_char int_ctl_new; 177251078Speter 177351078Speter int_ctl = inb(com->intr_ctl_port); 177451078Speter int_ctl_new = int_ctl; 177551078Speter 177651078Speter while (!com->gone) { 177751078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 177851078Speter modem_status = inb(com->modem_status_port); 1779111613Sphk if ((modem_status ^ com->last_modem_status) & 1780111613Sphk com->pps_bit) { 178195523Sphk pps_capture(&com->pps); 1782111613Sphk pps_event(&com->pps, 1783111616Sphk (modem_status & com->pps_bit) ? 178451078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 178551078Speter } 178651078Speter } 178751078Speter line_status = inb(com->line_status_port); 178851078Speter 178951078Speter /* input event? (check first to help avoid overruns) */ 179051078Speter while (line_status & LSR_RCV_MASK) { 179151078Speter /* break/unnattached error bits or real input? */ 179251078Speter if (!(line_status & LSR_RXRDY)) 179351078Speter recv_data = 0; 179451078Speter else 179551078Speter recv_data = inb(com->data_port); 1796119485Snjl#ifdef DDB 1797119485Snjl#ifdef ALT_BREAK_TO_DEBUGGER 179861649Sps /* 179961649Sps * Solaris implements a new BREAK which is initiated 180061649Sps * by a character sequence CR ~ ^b which is similar 180161649Sps * to a familiar pattern used on Sun servers by the 180261649Sps * Remote Console. 180361649Sps */ 1804119485Snjl if (com->unit == comconsole && 1805119485Snjl db_alt_break(recv_data, &com->alt_brk_state) != 0) 1806119485Snjl breakpoint(); 1807119485Snjl#endif /* ALT_BREAK_TO_DEBUGGER */ 1808119485Snjl#endif /* DDB */ 180951078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 181051078Speter /* 181151078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 181251078Speter * Otherwise, push the work to a higher level 181351078Speter * (to handle PARMRK) if we're bypassing. 181451078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 181551078Speter * 181651078Speter * This makes bypassing work right in the 181751078Speter * usual "raw" case (IGNBRK set, and IGNPAR 181851078Speter * and INPCK clear). 181951078Speter * 182051078Speter * Note: BI together with FE/PE means just BI. 182151078Speter */ 182251078Speter if (line_status & LSR_BI) { 182351078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 182451078Speter if (com->unit == comconsole) { 182551078Speter breakpoint(); 182651078Speter goto cont; 182751078Speter } 182851078Speter#endif 182951078Speter if (com->tp == NULL 183051078Speter || com->tp->t_iflag & IGNBRK) 183151078Speter goto cont; 183251078Speter } else { 183351078Speter if (com->tp == NULL 183451078Speter || com->tp->t_iflag & IGNPAR) 183551078Speter goto cont; 183651078Speter } 183751078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 183851078Speter && (line_status & (LSR_BI | LSR_FE) 183951078Speter || com->tp->t_iflag & INPCK)) 184051078Speter recv_data = 0; 184151078Speter } 184251078Speter ++com->bytes_in; 184351078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 184488900Sjhb swi_sched(sio_fast_ih, 0); 184551078Speter ioptr = com->iptr; 184651078Speter if (ioptr >= com->ibufend) 184751078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 184851078Speter else { 184951078Speter if (com->do_timestamp) 185051078Speter microtime(&com->timestamp); 185151078Speter ++com_events; 185272238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 185351078Speter#if 0 /* for testing input latency vs efficiency */ 185451078Speterif (com->iptr - com->ibuf == 8) 185588900Sjhb swi_sched(sio_fast_ih, 0); 185651078Speter#endif 185751078Speter ioptr[0] = recv_data; 185851078Speter ioptr[com->ierroff] = line_status; 185951078Speter com->iptr = ++ioptr; 186051078Speter if (ioptr == com->ihighwater 186151078Speter && com->state & CS_RTS_IFLOW) 186251078Speter outb(com->modem_ctl_port, 186351078Speter com->mcr_image &= ~MCR_RTS); 186451078Speter if (line_status & LSR_OE) 186551078Speter CE_RECORD(com, CE_OVERRUN); 186651078Speter } 186751078Spetercont: 186851078Speter /* 186951078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 187051078Speter * jump from the top of the loop to here 187151078Speter */ 187251078Speter line_status = inb(com->line_status_port) & 0x7F; 187351078Speter } 187451078Speter 187551078Speter /* modem status change? (always check before doing output) */ 187651078Speter modem_status = inb(com->modem_status_port); 187751078Speter if (modem_status != com->last_modem_status) { 187851078Speter if (com->do_dcd_timestamp 187951078Speter && !(com->last_modem_status & MSR_DCD) 188051078Speter && modem_status & MSR_DCD) 188151078Speter microtime(&com->dcd_timestamp); 188251078Speter 188351078Speter /* 188451078Speter * Schedule high level to handle DCD changes. Note 188551078Speter * that we don't use the delta bits anywhere. Some 188651078Speter * UARTs mess them up, and it's easy to remember the 188751078Speter * previous bits and calculate the delta. 188851078Speter */ 188951078Speter com->last_modem_status = modem_status; 189051078Speter if (!(com->state & CS_CHECKMSR)) { 189151078Speter com_events += LOTS_OF_EVENTS; 189251078Speter com->state |= CS_CHECKMSR; 189388900Sjhb swi_sched(sio_fast_ih, 0); 189451078Speter } 189551078Speter 189651078Speter /* handle CTS change immediately for crisp flow ctl */ 189751078Speter if (com->state & CS_CTS_OFLOW) { 189851078Speter if (modem_status & MSR_CTS) 189951078Speter com->state |= CS_ODEVREADY; 190051078Speter else 190151078Speter com->state &= ~CS_ODEVREADY; 190251078Speter } 190351078Speter } 190451078Speter 190551078Speter /* output queued and everything ready? */ 190651078Speter if (line_status & LSR_TXRDY 190751078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 190851078Speter ioptr = com->obufq.l_head; 190993466Sbde if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 191051078Speter u_int ocount; 191151078Speter 191251078Speter ocount = com->obufq.l_tail - ioptr; 191351078Speter if (ocount > com->tx_fifo_size) 191451078Speter ocount = com->tx_fifo_size; 191551078Speter com->bytes_out += ocount; 191651078Speter do 191751078Speter outb(com->data_port, *ioptr++); 191851078Speter while (--ocount != 0); 191951078Speter } else { 192051078Speter outb(com->data_port, *ioptr++); 192151078Speter ++com->bytes_out; 192293466Sbde if (com->unit == siotsunit) { 192393466Sbde nanouptime(&siots[siotso]); 192493466Sbde siotso = (siotso + 1) % 192593466Sbde (sizeof siots / sizeof siots[0]); 192693466Sbde } 192751078Speter } 192851078Speter com->obufq.l_head = ioptr; 192951078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 193051078Speter int_ctl_new = int_ctl | IER_ETXRDY; 193151078Speter } 193251078Speter if (ioptr >= com->obufq.l_tail) { 193351078Speter struct lbq *qp; 193451078Speter 193551078Speter qp = com->obufq.l_next; 193651078Speter qp->l_queued = FALSE; 193751078Speter qp = qp->l_next; 193851078Speter if (qp != NULL) { 193951078Speter com->obufq.l_head = qp->l_head; 194051078Speter com->obufq.l_tail = qp->l_tail; 194151078Speter com->obufq.l_next = qp; 194251078Speter } else { 194351078Speter /* output just completed */ 194453344Speter if (COM_IIR_TXRDYBUG(com->flags)) { 194551078Speter int_ctl_new = int_ctl & ~IER_ETXRDY; 194651078Speter } 194751078Speter com->state &= ~CS_BUSY; 194851078Speter } 194951078Speter if (!(com->state & CS_ODONE)) { 195051078Speter com_events += LOTS_OF_EVENTS; 195151078Speter com->state |= CS_ODONE; 195267551Sjhb /* handle at high level ASAP */ 195388900Sjhb swi_sched(sio_fast_ih, 0); 195451078Speter } 195551078Speter } 195653344Speter if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 195751078Speter outb(com->intr_ctl_port, int_ctl_new); 195851078Speter } 195951078Speter } 196051078Speter 196151078Speter /* finished? */ 196251078Speter#ifndef COM_MULTIPORT 196351078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 196451078Speter#endif /* COM_MULTIPORT */ 196551078Speter return; 196651078Speter } 196751078Speter} 196851078Speter 196951078Speterstatic int 197083366Sjuliansioioctl(dev, cmd, data, flag, td) 197151078Speter dev_t dev; 197251078Speter u_long cmd; 197351078Speter caddr_t data; 197451078Speter int flag; 197583366Sjulian struct thread *td; 197651078Speter{ 197751078Speter struct com_s *com; 197851078Speter int error; 197951078Speter int mynor; 198051078Speter int s; 198151078Speter struct tty *tp; 198251078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 198351078Speter u_long oldcmd; 198451078Speter struct termios term; 198551078Speter#endif 198651078Speter 198751078Speter mynor = minor(dev); 198851078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 198957915Simp if (com == NULL || com->gone) 199051078Speter return (ENODEV); 199151078Speter if (mynor & CONTROL_MASK) { 199251078Speter struct termios *ct; 199351078Speter 199451078Speter switch (mynor & CONTROL_MASK) { 199551078Speter case CONTROL_INIT_STATE: 199651078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 199751078Speter break; 199851078Speter case CONTROL_LOCK_STATE: 199951078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 200051078Speter break; 200151078Speter default: 200251078Speter return (ENODEV); /* /dev/nodev */ 200351078Speter } 200451078Speter switch (cmd) { 200551078Speter case TIOCSETA: 200693593Sjhb error = suser(td); 200751078Speter if (error != 0) 200851078Speter return (error); 200951078Speter *ct = *(struct termios *)data; 201051078Speter return (0); 201151078Speter case TIOCGETA: 201251078Speter *(struct termios *)data = *ct; 201351078Speter return (0); 201451078Speter case TIOCGETD: 201551078Speter *(int *)data = TTYDISC; 201651078Speter return (0); 201751078Speter case TIOCGWINSZ: 201851078Speter bzero(data, sizeof(struct winsize)); 201951078Speter return (0); 202051078Speter default: 202151078Speter return (ENOTTY); 202251078Speter } 202351078Speter } 202451078Speter tp = com->tp; 202551078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 202651078Speter term = tp->t_termios; 202751078Speter oldcmd = cmd; 202851078Speter error = ttsetcompat(tp, &cmd, data, &term); 202951078Speter if (error != 0) 203051078Speter return (error); 203151078Speter if (cmd != oldcmd) 203251078Speter data = (caddr_t)&term; 203351078Speter#endif 203451078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 203551078Speter int cc; 203651078Speter struct termios *dt = (struct termios *)data; 203751078Speter struct termios *lt = mynor & CALLOUT_MASK 203851078Speter ? &com->lt_out : &com->lt_in; 203951078Speter 204051078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 204151078Speter | (dt->c_iflag & ~lt->c_iflag); 204251078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 204351078Speter | (dt->c_oflag & ~lt->c_oflag); 204451078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 204551078Speter | (dt->c_cflag & ~lt->c_cflag); 204651078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 204751078Speter | (dt->c_lflag & ~lt->c_lflag); 204851078Speter for (cc = 0; cc < NCCS; ++cc) 204951078Speter if (lt->c_cc[cc] != 0) 205051078Speter dt->c_cc[cc] = tp->t_cc[cc]; 205151078Speter if (lt->c_ispeed != 0) 205251078Speter dt->c_ispeed = tp->t_ispeed; 205351078Speter if (lt->c_ospeed != 0) 205451078Speter dt->c_ospeed = tp->t_ospeed; 205551078Speter } 205683366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 205751078Speter if (error != ENOIOCTL) 205851078Speter return (error); 205951078Speter s = spltty(); 206051078Speter error = ttioctl(tp, cmd, data, flag); 206151078Speter disc_optim(tp, &tp->t_termios, com); 206251078Speter if (error != ENOIOCTL) { 206351078Speter splx(s); 206451078Speter return (error); 206551078Speter } 206651078Speter switch (cmd) { 206751078Speter case TIOCSBRK: 206860471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 206951078Speter break; 207051078Speter case TIOCCBRK: 207160471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 207251078Speter break; 207351078Speter case TIOCSDTR: 207451078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 207551078Speter break; 207651078Speter case TIOCCDTR: 207751078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 207851078Speter break; 207951078Speter /* 208051078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 208151078Speter * changes get undone on the next call to comparam(). 208251078Speter */ 208351078Speter case TIOCMSET: 208451078Speter (void)commctl(com, *(int *)data, DMSET); 208551078Speter break; 208651078Speter case TIOCMBIS: 208751078Speter (void)commctl(com, *(int *)data, DMBIS); 208851078Speter break; 208951078Speter case TIOCMBIC: 209051078Speter (void)commctl(com, *(int *)data, DMBIC); 209151078Speter break; 209251078Speter case TIOCMGET: 209351078Speter *(int *)data = commctl(com, 0, DMGET); 209451078Speter break; 209551078Speter case TIOCMSDTRWAIT: 209651078Speter /* must be root since the wait applies to following logins */ 209793593Sjhb error = suser(td); 209851078Speter if (error != 0) { 209951078Speter splx(s); 210051078Speter return (error); 210151078Speter } 210251078Speter com->dtr_wait = *(int *)data * hz / 100; 210351078Speter break; 210451078Speter case TIOCMGDTRWAIT: 210551078Speter *(int *)data = com->dtr_wait * 100 / hz; 210651078Speter break; 210751078Speter case TIOCTIMESTAMP: 210851078Speter com->do_timestamp = TRUE; 210951078Speter *(struct timeval *)data = com->timestamp; 211051078Speter break; 211151078Speter case TIOCDCDTIMESTAMP: 211251078Speter com->do_dcd_timestamp = TRUE; 211351078Speter *(struct timeval *)data = com->dcd_timestamp; 211451078Speter break; 211551078Speter default: 211651078Speter splx(s); 211751078Speter error = pps_ioctl(cmd, data, &com->pps); 211851078Speter if (error == ENODEV) 211951078Speter error = ENOTTY; 212051078Speter return (error); 212151078Speter } 212251078Speter splx(s); 212351078Speter return (0); 212451078Speter} 212551078Speter 212665557Sjasone/* software interrupt handler for SWI_TTY */ 212751078Speterstatic void 212867551Sjhbsiopoll(void *dummy) 212951078Speter{ 213051078Speter int unit; 213151078Speter 213251078Speter if (com_events == 0) 213351078Speter return; 213451078Speterrepeat: 213553344Speter for (unit = 0; unit < sio_numunits; ++unit) { 213651078Speter struct com_s *com; 213751078Speter int incc; 213851078Speter struct tty *tp; 213951078Speter 214051078Speter com = com_addr(unit); 214151078Speter if (com == NULL) 214251078Speter continue; 214351078Speter tp = com->tp; 214451078Speter if (tp == NULL || com->gone) { 214551078Speter /* 214651078Speter * Discard any events related to never-opened or 214751078Speter * going-away devices. 214851078Speter */ 214972200Sbmilekic mtx_lock_spin(&sio_lock); 215051078Speter incc = com->iptr - com->ibuf; 215151078Speter com->iptr = com->ibuf; 215251078Speter if (com->state & CS_CHECKMSR) { 215351078Speter incc += LOTS_OF_EVENTS; 215451078Speter com->state &= ~CS_CHECKMSR; 215551078Speter } 215651078Speter com_events -= incc; 215772200Sbmilekic mtx_unlock_spin(&sio_lock); 215851078Speter continue; 215951078Speter } 216051078Speter if (com->iptr != com->ibuf) { 216172200Sbmilekic mtx_lock_spin(&sio_lock); 216251078Speter sioinput(com); 216372200Sbmilekic mtx_unlock_spin(&sio_lock); 216451078Speter } 216551078Speter if (com->state & CS_CHECKMSR) { 216651078Speter u_char delta_modem_status; 216751078Speter 216872200Sbmilekic mtx_lock_spin(&sio_lock); 216951078Speter delta_modem_status = com->last_modem_status 217051078Speter ^ com->prev_modem_status; 217151078Speter com->prev_modem_status = com->last_modem_status; 217251078Speter com_events -= LOTS_OF_EVENTS; 217351078Speter com->state &= ~CS_CHECKMSR; 217472200Sbmilekic mtx_unlock_spin(&sio_lock); 217551078Speter if (delta_modem_status & MSR_DCD) 217651078Speter (*linesw[tp->t_line].l_modem) 217751078Speter (tp, com->prev_modem_status & MSR_DCD); 217851078Speter } 217951078Speter if (com->state & CS_ODONE) { 218072200Sbmilekic mtx_lock_spin(&sio_lock); 218151078Speter com_events -= LOTS_OF_EVENTS; 218251078Speter com->state &= ~CS_ODONE; 218372200Sbmilekic mtx_unlock_spin(&sio_lock); 218451078Speter if (!(com->state & CS_BUSY) 218551078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 218651078Speter timeout(siobusycheck, com, hz / 100); 218751078Speter com->extra_state |= CSE_BUSYCHECK; 218851078Speter } 218951078Speter (*linesw[tp->t_line].l_start)(tp); 219051078Speter } 219151078Speter if (com_events == 0) 219251078Speter break; 219351078Speter } 219451078Speter if (com_events >= LOTS_OF_EVENTS) 219551078Speter goto repeat; 219651078Speter} 219751078Speter 219851078Speterstatic int 219951078Spetercomparam(tp, t) 220051078Speter struct tty *tp; 220151078Speter struct termios *t; 220251078Speter{ 220351078Speter u_int cfcr; 220451078Speter int cflag; 220551078Speter struct com_s *com; 220689986Sjhay u_int divisor; 220751078Speter u_char dlbh; 220851078Speter u_char dlbl; 220951078Speter int s; 221051078Speter int unit; 221151078Speter 221289986Sjhay unit = DEV_TO_UNIT(tp->t_dev); 221389986Sjhay com = com_addr(unit); 221489986Sjhay if (com == NULL) 221589986Sjhay return (ENODEV); 221689986Sjhay 221751078Speter /* do historical conversions */ 221851078Speter if (t->c_ispeed == 0) 221951078Speter t->c_ispeed = t->c_ospeed; 222051078Speter 222151078Speter /* check requested parameters */ 222289986Sjhay if (t->c_ospeed == 0) 222389986Sjhay divisor = 0; 222489986Sjhay else { 222589986Sjhay if (t->c_ispeed != t->c_ospeed) 222689986Sjhay return (EINVAL); 222789986Sjhay divisor = siodivisor(com->rclk, t->c_ispeed); 222889986Sjhay if (divisor == 0) 222989986Sjhay return (EINVAL); 223089986Sjhay } 223151078Speter 223251078Speter /* parameters are OK, convert them to the com struct and the device */ 223351078Speter s = spltty(); 223451078Speter if (divisor == 0) 223551078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 223651078Speter else 223751078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 223851078Speter cflag = t->c_cflag; 223951078Speter switch (cflag & CSIZE) { 224051078Speter case CS5: 224151078Speter cfcr = CFCR_5BITS; 224251078Speter break; 224351078Speter case CS6: 224451078Speter cfcr = CFCR_6BITS; 224551078Speter break; 224651078Speter case CS7: 224751078Speter cfcr = CFCR_7BITS; 224851078Speter break; 224951078Speter default: 225051078Speter cfcr = CFCR_8BITS; 225151078Speter break; 225251078Speter } 225351078Speter if (cflag & PARENB) { 225451078Speter cfcr |= CFCR_PENAB; 225551078Speter if (!(cflag & PARODD)) 225651078Speter cfcr |= CFCR_PEVEN; 225751078Speter } 225851078Speter if (cflag & CSTOPB) 225951078Speter cfcr |= CFCR_STOPB; 226051078Speter 226151078Speter if (com->hasfifo && divisor != 0) { 226251078Speter /* 226351078Speter * Use a fifo trigger level low enough so that the input 226451078Speter * latency from the fifo is less than about 16 msec and 226551078Speter * the total latency is less than about 30 msec. These 226651078Speter * latencies are reasonable for humans. Serial comms 226751078Speter * protocols shouldn't expect anything better since modem 226851078Speter * latencies are larger. 226988433Sdillon * 227088433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 227188433Sdillon * speed connections without further work on reducing 227288433Sdillon * interrupt disablement times in other parts of the system, 227388433Sdillon * without producing silo overflow errors. 227451078Speter */ 227593466Sbde com->fifo_image = com->unit == siotsunit ? 0 227693466Sbde : t->c_ospeed <= 4800 227788451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 227851078Speter#ifdef COM_ESP 227951078Speter /* 228051078Speter * The Hayes ESP card needs the fifo DMA mode bit set 228151078Speter * in compatibility mode. If not, it will interrupt 228251078Speter * for each character received. 228351078Speter */ 228451078Speter if (com->esp) 228551078Speter com->fifo_image |= FIFO_DMA_MODE; 228651078Speter#endif 228760471Snyan sio_setreg(com, com_fifo, com->fifo_image); 228851078Speter } 228951078Speter 229065605Sjhb /* 229165605Sjhb * This returns with interrupts disabled so that we can complete 229265605Sjhb * the speed change atomically. Keeping interrupts disabled is 229365605Sjhb * especially important while com_data is hidden. 229465605Sjhb */ 229565605Sjhb (void) siosetwater(com, t->c_ispeed); 229665557Sjasone 229751078Speter if (divisor != 0) { 229860471Snyan sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 229951078Speter /* 230051078Speter * Only set the divisor registers if they would change, 230151078Speter * since on some 16550 incompatibles (UMC8669F), setting 230251078Speter * them while input is arriving them loses sync until 230351078Speter * data stops arriving. 230451078Speter */ 230551078Speter dlbl = divisor & 0xFF; 230660471Snyan if (sio_getreg(com, com_dlbl) != dlbl) 230760471Snyan sio_setreg(com, com_dlbl, dlbl); 230889986Sjhay dlbh = divisor >> 8; 230960471Snyan if (sio_getreg(com, com_dlbh) != dlbh) 231060471Snyan sio_setreg(com, com_dlbh, dlbh); 231151078Speter } 231251078Speter 231360471Snyan sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 231451078Speter 231551078Speter if (!(tp->t_state & TS_TTSTOP)) 231651078Speter com->state |= CS_TTGO; 231751078Speter 231851078Speter if (cflag & CRTS_IFLOW) { 231951078Speter if (com->st16650a) { 232060471Snyan sio_setreg(com, com_cfcr, 0xbf); 232160471Snyan sio_setreg(com, com_fifo, 232260471Snyan sio_getreg(com, com_fifo) | 0x40); 232351078Speter } 232451078Speter com->state |= CS_RTS_IFLOW; 232551078Speter /* 232651078Speter * If CS_RTS_IFLOW just changed from off to on, the change 232751078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 232851078Speter * so do it later by calling comstart() instead of repeating 232951078Speter * a lot of code from comstart() here. 233051078Speter */ 233151078Speter } else if (com->state & CS_RTS_IFLOW) { 233251078Speter com->state &= ~CS_RTS_IFLOW; 233351078Speter /* 233451078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 233551078Speter * on here, since comstart() won't do it later. 233651078Speter */ 233751078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 233851078Speter if (com->st16650a) { 233960471Snyan sio_setreg(com, com_cfcr, 0xbf); 234060471Snyan sio_setreg(com, com_fifo, 234160471Snyan sio_getreg(com, com_fifo) & ~0x40); 234251078Speter } 234351078Speter } 234451078Speter 234551078Speter 234651078Speter /* 234751078Speter * Set up state to handle output flow control. 234851078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 234951078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 235051078Speter */ 235151078Speter com->state |= CS_ODEVREADY; 235251078Speter com->state &= ~CS_CTS_OFLOW; 235351078Speter if (cflag & CCTS_OFLOW) { 235451078Speter com->state |= CS_CTS_OFLOW; 235551078Speter if (!(com->last_modem_status & MSR_CTS)) 235651078Speter com->state &= ~CS_ODEVREADY; 235751078Speter if (com->st16650a) { 235860471Snyan sio_setreg(com, com_cfcr, 0xbf); 235960471Snyan sio_setreg(com, com_fifo, 236060471Snyan sio_getreg(com, com_fifo) | 0x80); 236151078Speter } 236251078Speter } else { 236351078Speter if (com->st16650a) { 236460471Snyan sio_setreg(com, com_cfcr, 0xbf); 236560471Snyan sio_setreg(com, com_fifo, 236660471Snyan sio_getreg(com, com_fifo) & ~0x80); 236751078Speter } 236851078Speter } 236951078Speter 237060471Snyan sio_setreg(com, com_cfcr, com->cfcr_image); 237151078Speter 237251078Speter /* XXX shouldn't call functions while intrs are disabled. */ 237351078Speter disc_optim(tp, t, com); 237451078Speter /* 237551078Speter * Recover from fiddling with CS_TTGO. We used to call siointr1() 237651078Speter * unconditionally, but that defeated the careful discarding of 237751078Speter * stale input in sioopen(). 237851078Speter */ 237951078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 238051078Speter siointr1(com); 238151078Speter 238272200Sbmilekic mtx_unlock_spin(&sio_lock); 238351078Speter splx(s); 238451078Speter comstart(tp); 238551078Speter if (com->ibufold != NULL) { 238651078Speter free(com->ibufold, M_DEVBUF); 238751078Speter com->ibufold = NULL; 238851078Speter } 238951078Speter return (0); 239051078Speter} 239151078Speter 239265605Sjhb/* 239370174Sjhb * This function must be called with the sio_lock mutex released and will 239470174Sjhb * return with it obtained. 239565605Sjhb */ 239651078Speterstatic int 239765605Sjhbsiosetwater(com, speed) 239851078Speter struct com_s *com; 239951078Speter speed_t speed; 240051078Speter{ 240151078Speter int cp4ticks; 240251078Speter u_char *ibuf; 240351078Speter int ibufsize; 240451078Speter struct tty *tp; 240551078Speter 240651078Speter /* 240751078Speter * Make the buffer size large enough to handle a softtty interrupt 240851078Speter * latency of about 2 ticks without loss of throughput or data 240951078Speter * (about 3 ticks if input flow control is not used or not honoured, 241051078Speter * but a bit less for CS5-CS7 modes). 241151078Speter */ 241251078Speter cp4ticks = speed / 10 / hz * 4; 241351078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 241451078Speter ibufsize <<= 1; 241565605Sjhb if (ibufsize == com->ibufsize) { 241672200Sbmilekic mtx_lock_spin(&sio_lock); 241751078Speter return (0); 241865605Sjhb } 241951078Speter 242051078Speter /* 242151078Speter * Allocate input buffer. The extra factor of 2 in the size is 242251078Speter * to allow for an error byte for each input byte. 242351078Speter */ 242451078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 242565605Sjhb if (ibuf == NULL) { 242672200Sbmilekic mtx_lock_spin(&sio_lock); 242751078Speter return (ENOMEM); 242865605Sjhb } 242951078Speter 243051078Speter /* Initialize non-critical variables. */ 243151078Speter com->ibufold = com->ibuf; 243251078Speter com->ibufsize = ibufsize; 243351078Speter tp = com->tp; 243451078Speter if (tp != NULL) { 243551078Speter tp->t_ififosize = 2 * ibufsize; 243651078Speter tp->t_ispeedwat = (speed_t)-1; 243751078Speter tp->t_ospeedwat = (speed_t)-1; 243851078Speter } 243951078Speter 244051078Speter /* 244151078Speter * Read current input buffer, if any. Continue with interrupts 244251078Speter * disabled. 244351078Speter */ 244472200Sbmilekic mtx_lock_spin(&sio_lock); 244551078Speter if (com->iptr != com->ibuf) 244651078Speter sioinput(com); 244751078Speter 244851078Speter /*- 244951078Speter * Initialize critical variables, including input buffer watermarks. 245051078Speter * The external device is asked to stop sending when the buffer 245151078Speter * exactly reaches high water, or when the high level requests it. 245251078Speter * The high level is notified immediately (rather than at a later 245351078Speter * clock tick) when this watermark is reached. 245451078Speter * The buffer size is chosen so the watermark should almost never 245551078Speter * be reached. 245651078Speter * The low watermark is invisibly 0 since the buffer is always 245751078Speter * emptied all at once. 245851078Speter */ 245951078Speter com->iptr = com->ibuf = ibuf; 246051078Speter com->ibufend = ibuf + ibufsize; 246151078Speter com->ierroff = ibufsize; 246251078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 246351078Speter return (0); 246451078Speter} 246551078Speter 246651078Speterstatic void 246751078Spetercomstart(tp) 246851078Speter struct tty *tp; 246951078Speter{ 247051078Speter struct com_s *com; 247151078Speter int s; 247251078Speter int unit; 247351078Speter 247451078Speter unit = DEV_TO_UNIT(tp->t_dev); 247551078Speter com = com_addr(unit); 247657915Simp if (com == NULL) 247757915Simp return; 247851078Speter s = spltty(); 247972200Sbmilekic mtx_lock_spin(&sio_lock); 248051078Speter if (tp->t_state & TS_TTSTOP) 248151078Speter com->state &= ~CS_TTGO; 248251078Speter else 248351078Speter com->state |= CS_TTGO; 248451078Speter if (tp->t_state & TS_TBLOCK) { 248551078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 248651078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 248751078Speter } else { 248851078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 248951078Speter && com->state & CS_RTS_IFLOW) 249051078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 249151078Speter } 249272200Sbmilekic mtx_unlock_spin(&sio_lock); 249351078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 249451078Speter ttwwakeup(tp); 249551078Speter splx(s); 249651078Speter return; 249751078Speter } 249851078Speter if (tp->t_outq.c_cc != 0) { 249951078Speter struct lbq *qp; 250051078Speter struct lbq *next; 250151078Speter 250251078Speter if (!com->obufs[0].l_queued) { 250351078Speter com->obufs[0].l_tail 250451078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 250551078Speter sizeof com->obuf1); 250651078Speter com->obufs[0].l_next = NULL; 250751078Speter com->obufs[0].l_queued = TRUE; 250872200Sbmilekic mtx_lock_spin(&sio_lock); 250951078Speter if (com->state & CS_BUSY) { 251051078Speter qp = com->obufq.l_next; 251151078Speter while ((next = qp->l_next) != NULL) 251251078Speter qp = next; 251351078Speter qp->l_next = &com->obufs[0]; 251451078Speter } else { 251551078Speter com->obufq.l_head = com->obufs[0].l_head; 251651078Speter com->obufq.l_tail = com->obufs[0].l_tail; 251751078Speter com->obufq.l_next = &com->obufs[0]; 251851078Speter com->state |= CS_BUSY; 251951078Speter } 252072200Sbmilekic mtx_unlock_spin(&sio_lock); 252151078Speter } 252251078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 252351078Speter com->obufs[1].l_tail 252451078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 252551078Speter sizeof com->obuf2); 252651078Speter com->obufs[1].l_next = NULL; 252751078Speter com->obufs[1].l_queued = TRUE; 252872200Sbmilekic mtx_lock_spin(&sio_lock); 252951078Speter if (com->state & CS_BUSY) { 253051078Speter qp = com->obufq.l_next; 253151078Speter while ((next = qp->l_next) != NULL) 253251078Speter qp = next; 253351078Speter qp->l_next = &com->obufs[1]; 253451078Speter } else { 253551078Speter com->obufq.l_head = com->obufs[1].l_head; 253651078Speter com->obufq.l_tail = com->obufs[1].l_tail; 253751078Speter com->obufq.l_next = &com->obufs[1]; 253851078Speter com->state |= CS_BUSY; 253951078Speter } 254072200Sbmilekic mtx_unlock_spin(&sio_lock); 254151078Speter } 254251078Speter tp->t_state |= TS_BUSY; 254351078Speter } 254472200Sbmilekic mtx_lock_spin(&sio_lock); 254551078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 254651078Speter siointr1(com); /* fake interrupt to start output */ 254772200Sbmilekic mtx_unlock_spin(&sio_lock); 254851078Speter ttwwakeup(tp); 254951078Speter splx(s); 255051078Speter} 255151078Speter 255251078Speterstatic void 255351654Sphkcomstop(tp, rw) 255451078Speter struct tty *tp; 255551078Speter int rw; 255651078Speter{ 255751078Speter struct com_s *com; 255851078Speter 255951078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 256057915Simp if (com == NULL || com->gone) 256151078Speter return; 256272200Sbmilekic mtx_lock_spin(&sio_lock); 256351078Speter if (rw & FWRITE) { 256451078Speter if (com->hasfifo) 256551078Speter#ifdef COM_ESP 256651078Speter /* XXX avoid h/w bug. */ 256751078Speter if (!com->esp) 256851078Speter#endif 256960471Snyan sio_setreg(com, com_fifo, 257060471Snyan FIFO_XMT_RST | com->fifo_image); 257151078Speter com->obufs[0].l_queued = FALSE; 257251078Speter com->obufs[1].l_queued = FALSE; 257351078Speter if (com->state & CS_ODONE) 257451078Speter com_events -= LOTS_OF_EVENTS; 257551078Speter com->state &= ~(CS_ODONE | CS_BUSY); 257651078Speter com->tp->t_state &= ~TS_BUSY; 257751078Speter } 257851078Speter if (rw & FREAD) { 257951078Speter if (com->hasfifo) 258051078Speter#ifdef COM_ESP 258151078Speter /* XXX avoid h/w bug. */ 258251078Speter if (!com->esp) 258351078Speter#endif 258460471Snyan sio_setreg(com, com_fifo, 258560471Snyan FIFO_RCV_RST | com->fifo_image); 258651078Speter com_events -= (com->iptr - com->ibuf); 258751078Speter com->iptr = com->ibuf; 258851078Speter } 258972200Sbmilekic mtx_unlock_spin(&sio_lock); 259051078Speter comstart(tp); 259151078Speter} 259251078Speter 259351078Speterstatic int 259451078Spetercommctl(com, bits, how) 259551078Speter struct com_s *com; 259651078Speter int bits; 259751078Speter int how; 259851078Speter{ 259951078Speter int mcr; 260051078Speter int msr; 260151078Speter 260251078Speter if (how == DMGET) { 260351078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 260451078Speter mcr = com->mcr_image; 260551078Speter if (mcr & MCR_DTR) 260651078Speter bits |= TIOCM_DTR; 260751078Speter if (mcr & MCR_RTS) 260851078Speter bits |= TIOCM_RTS; 260951078Speter msr = com->prev_modem_status; 261051078Speter if (msr & MSR_CTS) 261151078Speter bits |= TIOCM_CTS; 261251078Speter if (msr & MSR_DCD) 261351078Speter bits |= TIOCM_CD; 261451078Speter if (msr & MSR_DSR) 261551078Speter bits |= TIOCM_DSR; 261651078Speter /* 261751078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 261851078Speter * more volatile by reading the modem status a lot. Perhaps 261951078Speter * we should latch both bits until the status is read here. 262051078Speter */ 262151078Speter if (msr & (MSR_RI | MSR_TERI)) 262251078Speter bits |= TIOCM_RI; 262351078Speter return (bits); 262451078Speter } 262551078Speter mcr = 0; 262651078Speter if (bits & TIOCM_DTR) 262751078Speter mcr |= MCR_DTR; 262851078Speter if (bits & TIOCM_RTS) 262951078Speter mcr |= MCR_RTS; 263051078Speter if (com->gone) 263151078Speter return(0); 263272200Sbmilekic mtx_lock_spin(&sio_lock); 263351078Speter switch (how) { 263451078Speter case DMSET: 263551078Speter outb(com->modem_ctl_port, 263651078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 263751078Speter break; 263851078Speter case DMBIS: 263951078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 264051078Speter break; 264151078Speter case DMBIC: 264251078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 264351078Speter break; 264451078Speter } 264572200Sbmilekic mtx_unlock_spin(&sio_lock); 264651078Speter return (0); 264751078Speter} 264851078Speter 264951078Speterstatic void 265051078Spetersiosettimeout() 265151078Speter{ 265251078Speter struct com_s *com; 265351078Speter bool_t someopen; 265451078Speter int unit; 265551078Speter 265651078Speter /* 265751078Speter * Set our timeout period to 1 second if no polled devices are open. 265851078Speter * Otherwise set it to max(1/200, 1/hz). 265951078Speter * Enable timeouts iff some device is open. 266051078Speter */ 266151078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 266251078Speter sio_timeout = hz; 266351078Speter someopen = FALSE; 266453344Speter for (unit = 0; unit < sio_numunits; ++unit) { 266551078Speter com = com_addr(unit); 266651078Speter if (com != NULL && com->tp != NULL 266751078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 266851078Speter someopen = TRUE; 266951078Speter if (com->poll || com->poll_output) { 267051078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 267151078Speter break; 267251078Speter } 267351078Speter } 267451078Speter } 267551078Speter if (someopen) { 267651078Speter sio_timeouts_until_log = hz / sio_timeout; 267751078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 267851078Speter sio_timeout); 267951078Speter } else { 268051078Speter /* Flush error messages, if any. */ 268151078Speter sio_timeouts_until_log = 1; 268251078Speter comwakeup((void *)NULL); 268351078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 268451078Speter } 268551078Speter} 268651078Speter 268751078Speterstatic void 268851078Spetercomwakeup(chan) 268951078Speter void *chan; 269051078Speter{ 269151078Speter struct com_s *com; 269251078Speter int unit; 269351078Speter 269451078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 269551078Speter 269651078Speter /* 269751078Speter * Recover from lost output interrupts. 269851078Speter * Poll any lines that don't use interrupts. 269951078Speter */ 270053344Speter for (unit = 0; unit < sio_numunits; ++unit) { 270151078Speter com = com_addr(unit); 270251078Speter if (com != NULL && !com->gone 270351078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 270472200Sbmilekic mtx_lock_spin(&sio_lock); 270551078Speter siointr1(com); 270672200Sbmilekic mtx_unlock_spin(&sio_lock); 270751078Speter } 270851078Speter } 270951078Speter 271051078Speter /* 271151078Speter * Check for and log errors, but not too often. 271251078Speter */ 271351078Speter if (--sio_timeouts_until_log > 0) 271451078Speter return; 271551078Speter sio_timeouts_until_log = hz / sio_timeout; 271653344Speter for (unit = 0; unit < sio_numunits; ++unit) { 271751078Speter int errnum; 271851078Speter 271951078Speter com = com_addr(unit); 272051078Speter if (com == NULL) 272151078Speter continue; 272251078Speter if (com->gone) 272351078Speter continue; 272451078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 272551078Speter u_int delta; 272651078Speter u_long total; 272751078Speter 272872200Sbmilekic mtx_lock_spin(&sio_lock); 272951078Speter delta = com->delta_error_counts[errnum]; 273051078Speter com->delta_error_counts[errnum] = 0; 273172200Sbmilekic mtx_unlock_spin(&sio_lock); 273251078Speter if (delta == 0) 273351078Speter continue; 273451078Speter total = com->error_counts[errnum] += delta; 273551078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 273651078Speter unit, delta, error_desc[errnum], 273751078Speter delta == 1 ? "" : "s", total); 273851078Speter } 273951078Speter } 274051078Speter} 274151078Speter 274251078Speterstatic void 274351078Speterdisc_optim(tp, t, com) 274451078Speter struct tty *tp; 274551078Speter struct termios *t; 274651078Speter struct com_s *com; 274751078Speter{ 274851078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 274951078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 275051078Speter && (!(t->c_iflag & PARMRK) 275151078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 275251078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 275351078Speter && linesw[tp->t_line].l_rint == ttyinput) 275451078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 275551078Speter else 275651078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 275751078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 275851078Speter} 275951078Speter 276051078Speter/* 276151078Speter * Following are all routines needed for SIO to act as console 276251078Speter */ 276351078Speterstruct siocnstate { 276451078Speter u_char dlbl; 276551078Speter u_char dlbh; 276651078Speter u_char ier; 276751078Speter u_char cfcr; 276851078Speter u_char mcr; 276951078Speter}; 277051078Speter 277166230Sjhb#ifndef __alpha__ 277292739Salfredstatic speed_t siocngetspeed(Port_t, u_long rclk); 277366230Sjhb#endif 277493010Sbdestatic void siocnclose(struct siocnstate *sp, Port_t iobase); 277593010Sbdestatic void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 277693010Sbdestatic void siocntxwait(Port_t iobase); 277751078Speter 277866230Sjhb#ifdef __alpha__ 277992739Salfredint siocnattach(int port, int speed); 278092739Salfredint siogdbattach(int port, int speed); 278192739Salfredint siogdbgetc(void); 278292739Salfredvoid siogdbputc(int c); 278366230Sjhb#else 278451078Speterstatic cn_probe_t siocnprobe; 278551078Speterstatic cn_init_t siocninit; 278685371Sjlemonstatic cn_term_t siocnterm; 278766230Sjhb#endif 278851078Speterstatic cn_checkc_t siocncheckc; 278951078Speterstatic cn_getc_t siocngetc; 279051078Speterstatic cn_putc_t siocnputc; 279151078Speter 279283832Sdfr#ifndef __alpha__ 279385371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 279455823Syokota siocnputc, NULL); 279551078Speter#endif 279651078Speter 279751078Speter#if DDB > 0 2798111194Sphkstatic struct consdev gdbconsdev; 279951078Speter#endif 280051078Speter 280151078Speterstatic void 280251078Spetersiocntxwait(iobase) 280351078Speter Port_t iobase; 280451078Speter{ 280551078Speter int timo; 280651078Speter 280751078Speter /* 280851078Speter * Wait for any pending transmission to finish. Required to avoid 280951078Speter * the UART lockup bug when the speed is changed, and for normal 281051078Speter * transmits. 281151078Speter */ 281251078Speter timo = 100000; 281351078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 281451078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 281551078Speter ; 281651078Speter} 281751078Speter 281866230Sjhb#ifndef __alpha__ 281966230Sjhb 282051078Speter/* 282151078Speter * Read the serial port specified and try to figure out what speed 282251078Speter * it's currently running at. We're assuming the serial port has 282351078Speter * been initialized and is basicly idle. This routine is only intended 282451078Speter * to be run at system startup. 282551078Speter * 282651078Speter * If the value read from the serial port doesn't make sense, return 0. 282751078Speter */ 282851078Speter 282951078Speterstatic speed_t 283089986Sjhaysiocngetspeed(iobase, rclk) 283189986Sjhay Port_t iobase; 283289986Sjhay u_long rclk; 283351078Speter{ 283489986Sjhay u_int divisor; 283551078Speter u_char dlbh; 283651078Speter u_char dlbl; 283751078Speter u_char cfcr; 283851078Speter 283951078Speter cfcr = inb(iobase + com_cfcr); 284051078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 284151078Speter 284251078Speter dlbl = inb(iobase + com_dlbl); 284351078Speter dlbh = inb(iobase + com_dlbh); 284451078Speter 284551078Speter outb(iobase + com_cfcr, cfcr); 284651078Speter 284789986Sjhay divisor = dlbh << 8 | dlbl; 284851078Speter 284989986Sjhay /* XXX there should be more sanity checking. */ 285089986Sjhay if (divisor == 0) 285189986Sjhay return (CONSPEED); 285289986Sjhay return (rclk / (16UL * divisor)); 285351078Speter} 285451078Speter 285566230Sjhb#endif 285666230Sjhb 285751078Speterstatic void 285851078Spetersiocnopen(sp, iobase, speed) 285951078Speter struct siocnstate *sp; 286051078Speter Port_t iobase; 286151078Speter int speed; 286251078Speter{ 286389986Sjhay u_int divisor; 286451078Speter u_char dlbh; 286551078Speter u_char dlbl; 286651078Speter 286751078Speter /* 286851078Speter * Save all the device control registers except the fifo register 286951078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 287051078Speter * We can't save the fifo register since it is read-only. 287151078Speter */ 287251078Speter sp->ier = inb(iobase + com_ier); 287351078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 287451078Speter siocntxwait(iobase); 287551078Speter sp->cfcr = inb(iobase + com_cfcr); 287651078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 287751078Speter sp->dlbl = inb(iobase + com_dlbl); 287851078Speter sp->dlbh = inb(iobase + com_dlbh); 287951078Speter /* 288051078Speter * Only set the divisor registers if they would change, since on 288151078Speter * some 16550 incompatibles (Startech), setting them clears the 288251078Speter * data input register. This also reduces the effects of the 288351078Speter * UMC8669F bug. 288451078Speter */ 288589986Sjhay divisor = siodivisor(comdefaultrclk, speed); 288651078Speter dlbl = divisor & 0xFF; 288751078Speter if (sp->dlbl != dlbl) 288851078Speter outb(iobase + com_dlbl, dlbl); 288989986Sjhay dlbh = divisor >> 8; 289051078Speter if (sp->dlbh != dlbh) 289151078Speter outb(iobase + com_dlbh, dlbh); 289251078Speter outb(iobase + com_cfcr, CFCR_8BITS); 289351078Speter sp->mcr = inb(iobase + com_mcr); 289451078Speter /* 289551078Speter * We don't want interrupts, but must be careful not to "disable" 289651078Speter * them by clearing the MCR_IENABLE bit, since that might cause 289751078Speter * an interrupt by floating the IRQ line. 289851078Speter */ 289951078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 290051078Speter} 290151078Speter 290251078Speterstatic void 290351078Spetersiocnclose(sp, iobase) 290451078Speter struct siocnstate *sp; 290551078Speter Port_t iobase; 290651078Speter{ 290751078Speter /* 290851078Speter * Restore the device control registers. 290951078Speter */ 291051078Speter siocntxwait(iobase); 291151078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 291251078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 291351078Speter outb(iobase + com_dlbl, sp->dlbl); 291451078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 291551078Speter outb(iobase + com_dlbh, sp->dlbh); 291651078Speter outb(iobase + com_cfcr, sp->cfcr); 291751078Speter /* 291851078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 291951078Speter */ 292051078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 292151078Speter outb(iobase + com_ier, sp->ier); 292251078Speter} 292351078Speter 292466230Sjhb#ifndef __alpha__ 292566230Sjhb 292651078Speterstatic void 292751078Spetersiocnprobe(cp) 292851078Speter struct consdev *cp; 292951078Speter{ 293051078Speter speed_t boot_speed; 293151078Speter u_char cfcr; 293289986Sjhay u_int divisor; 293351078Speter int s, unit; 293451078Speter struct siocnstate sp; 293551078Speter 293651078Speter /* 293751078Speter * Find our first enabled console, if any. If it is a high-level 293851078Speter * console device, then initialize it and return successfully. 293951078Speter * If it is a low-level console device, then initialize it and 294051078Speter * return unsuccessfully. It must be initialized in both cases 294151078Speter * for early use by console drivers and debuggers. Initializing 294251078Speter * the hardware is not necessary in all cases, since the i/o 294351078Speter * routines initialize it on the fly, but it is necessary if 294451078Speter * input might arrive while the hardware is switched back to an 294551078Speter * uninitialized state. We can't handle multiple console devices 294651078Speter * yet because our low-level routines don't take a device arg. 294751078Speter * We trust the user to set the console flags properly so that we 294851078Speter * don't need to probe. 294951078Speter */ 295051078Speter cp->cn_pri = CN_DEAD; 295151078Speter 295251078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 295351078Speter int flags; 2954117167Sjhb 2955117167Sjhb if (resource_disabled("sio", unit)) 2956117167Sjhb continue; 295751078Speter if (resource_int_value("sio", unit, "flags", &flags)) 295851078Speter continue; 295951078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 296051078Speter int port; 296151078Speter Port_t iobase; 296251078Speter 296351078Speter if (resource_int_value("sio", unit, "port", &port)) 296451078Speter continue; 296551078Speter iobase = port; 296651078Speter s = spltty(); 296751078Speter if (boothowto & RB_SERIAL) { 296889986Sjhay boot_speed = 296989986Sjhay siocngetspeed(iobase, comdefaultrclk); 297051078Speter if (boot_speed) 297151078Speter comdefaultrate = boot_speed; 297251078Speter } 297351078Speter 297451078Speter /* 297551078Speter * Initialize the divisor latch. We can't rely on 297651078Speter * siocnopen() to do this the first time, since it 297751078Speter * avoids writing to the latch if the latch appears 297851078Speter * to have the correct value. Also, if we didn't 297951078Speter * just read the speed from the hardware, then we 298051078Speter * need to set the speed in hardware so that 298151078Speter * switching it later is null. 298251078Speter */ 298351078Speter cfcr = inb(iobase + com_cfcr); 298451078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 298589986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 298689986Sjhay outb(iobase + com_dlbl, divisor & 0xff); 298789986Sjhay outb(iobase + com_dlbh, divisor >> 8); 298851078Speter outb(iobase + com_cfcr, cfcr); 298951078Speter 299051078Speter siocnopen(&sp, iobase, comdefaultrate); 299151078Speter 299251078Speter splx(s); 299351078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 299451078Speter cp->cn_dev = makedev(CDEV_MAJOR, unit); 299551078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 299651078Speter || boothowto & RB_SERIAL 299751078Speter ? CN_REMOTE : CN_NORMAL; 299851078Speter siocniobase = iobase; 299951078Speter siocnunit = unit; 300051078Speter } 300151078Speter if (COM_DEBUGGER(flags)) { 300251078Speter printf("sio%d: gdb debugging port\n", unit); 300351078Speter siogdbiobase = iobase; 300451078Speter siogdbunit = unit; 300551078Speter#if DDB > 0 3006111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, unit); 3007111194Sphk gdb_arg = &gdbconsdev; 300851078Speter gdb_getc = siocngetc; 300951078Speter gdb_putc = siocnputc; 301051078Speter#endif 301151078Speter } 301251078Speter } 301351078Speter } 301451078Speter#ifdef __i386__ 301551078Speter#if DDB > 0 301651078Speter /* 301751078Speter * XXX Ugly Compatability. 301851078Speter * If no gdb port has been specified, set it to be the console 301951078Speter * as some configuration files don't specify the gdb port. 302051078Speter */ 3021111017Sphk if (gdb_arg == NULL && (boothowto & RB_GDB)) { 302251078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 302351078Speter siocnunit); 302451078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 302551078Speter printf("configuration file (currently sio only).\n"); 302651078Speter siogdbiobase = siocniobase; 302751078Speter siogdbunit = siocnunit; 3028111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, siocnunit); 3029111194Sphk gdb_arg = &gdbconsdev; 303051078Speter gdb_getc = siocngetc; 303151078Speter gdb_putc = siocnputc; 303251078Speter } 303351078Speter#endif 303451078Speter#endif 303551078Speter} 303651078Speter 303766230Sjhbstatic void 303866230Sjhbsiocninit(cp) 303966230Sjhb struct consdev *cp; 304066230Sjhb{ 304166230Sjhb comconsole = DEV_TO_UNIT(cp->cn_dev); 304266230Sjhb} 304366230Sjhb 304485371Sjlemonstatic void 304585371Sjlemonsiocnterm(cp) 304685371Sjlemon struct consdev *cp; 304785371Sjlemon{ 304885371Sjlemon comconsole = -1; 304985371Sjlemon} 305085371Sjlemon 305166230Sjhb#endif 305266230Sjhb 305351078Speter#ifdef __alpha__ 305451078Speter 305555868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 305651078Speter 305751078Speterint 305851078Spetersiocnattach(port, speed) 305951078Speter int port; 306051078Speter int speed; 306151078Speter{ 306251078Speter int s; 306351078Speter u_char cfcr; 306489986Sjhay u_int divisor; 306551078Speter struct siocnstate sp; 306698691Sn_hibma int unit = 0; /* XXX random value! */ 306751078Speter 306851078Speter siocniobase = port; 306998691Sn_hibma siocnunit = unit; 307051078Speter comdefaultrate = speed; 307151078Speter sio_consdev.cn_pri = CN_NORMAL; 307298691Sn_hibma sio_consdev.cn_dev = makedev(CDEV_MAJOR, unit); 307351078Speter 307451078Speter s = spltty(); 307551078Speter 307651078Speter /* 307751078Speter * Initialize the divisor latch. We can't rely on 307851078Speter * siocnopen() to do this the first time, since it 307951078Speter * avoids writing to the latch if the latch appears 308051078Speter * to have the correct value. Also, if we didn't 308151078Speter * just read the speed from the hardware, then we 308251078Speter * need to set the speed in hardware so that 308351078Speter * switching it later is null. 308451078Speter */ 308551078Speter cfcr = inb(siocniobase + com_cfcr); 308651078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 308789986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 308889986Sjhay outb(siocniobase + com_dlbl, divisor & 0xff); 308989986Sjhay outb(siocniobase + com_dlbh, divisor >> 8); 309051078Speter outb(siocniobase + com_cfcr, cfcr); 309151078Speter 309251078Speter siocnopen(&sp, siocniobase, comdefaultrate); 309351078Speter splx(s); 309451078Speter 309585426Sjlemon cnadd(&sio_consdev); 309658885Simp return (0); 309751078Speter} 309851078Speter 309951078Speterint 310051078Spetersiogdbattach(port, speed) 310151078Speter int port; 310251078Speter int speed; 310351078Speter{ 310451078Speter int s; 310551078Speter u_char cfcr; 310689986Sjhay u_int divisor; 310751078Speter struct siocnstate sp; 310898691Sn_hibma int unit = 1; /* XXX random value! */ 310951078Speter 311051078Speter siogdbiobase = port; 311151078Speter gdbdefaultrate = speed; 311251078Speter 311365714Sjhb printf("sio%d: gdb debugging port\n", unit); 311465714Sjhb siogdbunit = unit; 311565714Sjhb#if DDB > 0 3116111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, unit); 3117111194Sphk gdb_arg = &gdbconsdev; 311865714Sjhb gdb_getc = siocngetc; 311965714Sjhb gdb_putc = siocnputc; 312065714Sjhb#endif 312165714Sjhb 312251078Speter s = spltty(); 312351078Speter 312451078Speter /* 312551078Speter * Initialize the divisor latch. We can't rely on 312651078Speter * siocnopen() to do this the first time, since it 312751078Speter * avoids writing to the latch if the latch appears 312851078Speter * to have the correct value. Also, if we didn't 312951078Speter * just read the speed from the hardware, then we 313051078Speter * need to set the speed in hardware so that 313151078Speter * switching it later is null. 313251078Speter */ 313351078Speter cfcr = inb(siogdbiobase + com_cfcr); 313451078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 313589986Sjhay divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 313689986Sjhay outb(siogdbiobase + com_dlbl, divisor & 0xff); 313789986Sjhay outb(siogdbiobase + com_dlbh, divisor >> 8); 313851078Speter outb(siogdbiobase + com_cfcr, cfcr); 313951078Speter 314051078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 314151078Speter splx(s); 314251078Speter 314358885Simp return (0); 314451078Speter} 314551078Speter 314651078Speter#endif 314751078Speter 314851078Speterstatic int 3149111194Sphksiocncheckc(struct consdev *cd) 315051078Speter{ 315151078Speter int c; 3152111194Sphk dev_t dev; 315351078Speter Port_t iobase; 315451078Speter int s; 315551078Speter struct siocnstate sp; 315698401Sn_hibma speed_t speed; 3157111194Sphk 3158111194Sphk dev = cd->cn_dev; 315998401Sn_hibma if (minor(dev) == siocnunit) { 316098401Sn_hibma iobase = siocniobase; 316198401Sn_hibma speed = comdefaultrate; 316298401Sn_hibma } else { 316351078Speter iobase = siogdbiobase; 316498401Sn_hibma speed = gdbdefaultrate; 316598401Sn_hibma } 316651078Speter s = spltty(); 316798401Sn_hibma siocnopen(&sp, iobase, speed); 316851078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 316951078Speter c = inb(iobase + com_data); 317051078Speter else 317151078Speter c = -1; 317251078Speter siocnclose(&sp, iobase); 317351078Speter splx(s); 317451078Speter return (c); 317551078Speter} 317651078Speter 317751078Speter 3178104094Sphkstatic int 3179111194Sphksiocngetc(struct consdev *cd) 318051078Speter{ 318151078Speter int c; 3182111194Sphk dev_t dev; 318351078Speter Port_t iobase; 318451078Speter int s; 318551078Speter struct siocnstate sp; 318698401Sn_hibma speed_t speed; 318751078Speter 3188111194Sphk dev = cd->cn_dev; 318998401Sn_hibma if (minor(dev) == siocnunit) { 319098401Sn_hibma iobase = siocniobase; 319198401Sn_hibma speed = comdefaultrate; 319298401Sn_hibma } else { 319351078Speter iobase = siogdbiobase; 319498401Sn_hibma speed = gdbdefaultrate; 319598401Sn_hibma } 319651078Speter s = spltty(); 319798401Sn_hibma siocnopen(&sp, iobase, speed); 319851078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 319951078Speter ; 320051078Speter c = inb(iobase + com_data); 320151078Speter siocnclose(&sp, iobase); 320251078Speter splx(s); 320351078Speter return (c); 320451078Speter} 320551078Speter 3206104094Sphkstatic void 3207111194Sphksiocnputc(struct consdev *cd, int c) 320851078Speter{ 320988582Sbde int need_unlock; 321051078Speter int s; 3211111194Sphk dev_t dev; 321251078Speter struct siocnstate sp; 321351078Speter Port_t iobase; 321498401Sn_hibma speed_t speed; 321551078Speter 3216111194Sphk dev = cd->cn_dev; 321798401Sn_hibma if (minor(dev) == siocnunit) { 321898401Sn_hibma iobase = siocniobase; 321998401Sn_hibma speed = comdefaultrate; 322098401Sn_hibma } else { 322151078Speter iobase = siogdbiobase; 322298401Sn_hibma speed = gdbdefaultrate; 322398401Sn_hibma } 322451078Speter s = spltty(); 322588582Sbde need_unlock = 0; 322688582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 322784029Sjlemon mtx_lock_spin(&sio_lock); 322888582Sbde need_unlock = 1; 322988582Sbde } 323098401Sn_hibma siocnopen(&sp, iobase, speed); 323151078Speter siocntxwait(iobase); 323251078Speter outb(iobase + com_data, c); 323351078Speter siocnclose(&sp, iobase); 323488582Sbde if (need_unlock) 323584029Sjlemon mtx_unlock_spin(&sio_lock); 323651078Speter splx(s); 323751078Speter} 323851078Speter 323951078Speter#ifdef __alpha__ 324051078Speterint 324151078Spetersiogdbgetc() 324251078Speter{ 324351078Speter int c; 324451078Speter Port_t iobase; 324598401Sn_hibma speed_t speed; 324651078Speter int s; 324751078Speter struct siocnstate sp; 324851078Speter 324998619Sn_hibma if (siogdbunit == siocnunit) { 325098401Sn_hibma iobase = siocniobase; 325198401Sn_hibma speed = comdefaultrate; 325298401Sn_hibma } else { 325398401Sn_hibma iobase = siogdbiobase; 325498401Sn_hibma speed = gdbdefaultrate; 325598401Sn_hibma } 325698401Sn_hibma 325751078Speter s = spltty(); 325898401Sn_hibma siocnopen(&sp, iobase, speed); 325951078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 326051078Speter ; 326151078Speter c = inb(iobase + com_data); 326251078Speter siocnclose(&sp, iobase); 326351078Speter splx(s); 326451078Speter return (c); 326551078Speter} 326651078Speter 326751078Spetervoid 326851078Spetersiogdbputc(c) 326951078Speter int c; 327051078Speter{ 327198401Sn_hibma Port_t iobase; 327298401Sn_hibma speed_t speed; 327351078Speter int s; 327451078Speter struct siocnstate sp; 327551078Speter 327698619Sn_hibma if (siogdbunit == siocnunit) { 327798401Sn_hibma iobase = siocniobase; 327898401Sn_hibma speed = comdefaultrate; 327998401Sn_hibma } else { 328098401Sn_hibma iobase = siogdbiobase; 328198401Sn_hibma speed = gdbdefaultrate; 328298401Sn_hibma } 328398401Sn_hibma 328451078Speter s = spltty(); 328598401Sn_hibma siocnopen(&sp, iobase, speed); 328651078Speter siocntxwait(siogdbiobase); 328751078Speter outb(siogdbiobase + com_data, c); 328851078Speter siocnclose(&sp, siogdbiobase); 328951078Speter splx(s); 329051078Speter} 329151078Speter#endif 3292