sio.c revision 119419
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3451078Speter * from: i386/isa sio.c,v 1.234 3551078Speter */ 3651078Speter 37119419Sobrien#include <sys/cdefs.h> 38119419Sobrien__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 119419 2003-08-24 18:03:45Z obrien $"); 39119419Sobrien 4051078Speter#include "opt_comconsole.h" 4151078Speter#include "opt_compat.h" 4251078Speter#include "opt_ddb.h" 4351078Speter#include "opt_sio.h" 4451078Speter 4551078Speter/* 4651078Speter * Serial driver, based on 386BSD-0.1 com driver. 4751078Speter * Mostly rewritten to use pseudo-DMA. 4851078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4951078Speter * COM driver, based on HP dca driver. 5051078Speter * 5151078Speter * Changes for PC-Card integration: 5251078Speter * - Added PC-Card driver table and handlers 5351078Speter */ 5451078Speter#include <sys/param.h> 5576166Smarkm#include <sys/systm.h> 5665822Sjhb#include <sys/bus.h> 5751078Speter#include <sys/conf.h> 5851078Speter#include <sys/fcntl.h> 5951078Speter#include <sys/interrupt.h> 6051078Speter#include <sys/kernel.h> 61114216Skan#include <sys/limits.h> 6276166Smarkm#include <sys/lock.h> 6376166Smarkm#include <sys/malloc.h> 6476166Smarkm#include <sys/module.h> 6576166Smarkm#include <sys/mutex.h> 6676166Smarkm#include <sys/proc.h> 6776166Smarkm#include <sys/reboot.h> 6876166Smarkm#include <sys/sysctl.h> 6951078Speter#include <sys/syslog.h> 7076166Smarkm#include <sys/tty.h> 7160471Snyan#include <machine/bus_pio.h> 7251078Speter#include <machine/bus.h> 7351078Speter#include <sys/rman.h> 7451078Speter#include <sys/timepps.h> 7593466Sbde#include <sys/uio.h> 7651078Speter 7786909Simp#include <isa/isavar.h> 7886909Simp 7951078Speter#include <machine/resource.h> 8051078Speter 8185302Simp#include <dev/sio/sioreg.h> 8285365Simp#include <dev/sio/siovar.h> 8351078Speter 8451078Speter#ifdef COM_ESP 8577726Sjoerg#include <dev/ic/esp.h> 8651078Speter#endif 8777726Sjoerg#include <dev/ic/ns16550.h> 8851078Speter 8951078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 9051078Speter 9151078Speter#define CALLOUT_MASK 0x80 9251078Speter#define CONTROL_MASK 0x60 9351078Speter#define CONTROL_INIT_STATE 0x20 9451078Speter#define CONTROL_LOCK_STATE 0x40 9551078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 9693470Sbde#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 9793470Sbde | ((mynor) & 0x1f)) 9893470Sbde#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 9993470Sbde | ((unit) & 0x1f)) 10051078Speter 10151078Speter#ifdef COM_MULTIPORT 10251078Speter/* checks in flags for multiport and which is multiport "master chip" 10351078Speter * for a given card 10451078Speter */ 10551078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 10651078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 10751078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 108104067Sphk#else 109104067Sphk#define COM_ISMULTIPORT(flags) (0) 11051078Speter#endif /* COM_MULTIPORT */ 11151078Speter 11251078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 11351078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 11451078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 11551078Speter#define COM_DEBUGGER(flags) ((flags) & 0x80) 11651078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 11751078Speter#define COM_NOFIFO(flags) ((flags) & 0x02) 118111613Sphk#define COM_PPSCTS(flags) ((flags) & 0x10000) 11951078Speter#define COM_ST16650A(flags) ((flags) & 0x20000) 12086909Simp#define COM_C_NOPROBE (0x40000) 12186909Simp#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 12251078Speter#define COM_C_IIR_TXRDYBUG (0x80000) 12351078Speter#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 124104067Sphk#define COM_NOSCR(flags) ((flags) & 0x100000) 125112384Ssobomax#define COM_TI16754(flags) ((flags) & 0x200000) 12651078Speter#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 12751078Speter 12860471Snyan#define sio_getreg(com, off) \ 12960471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 13060471Snyan#define sio_setreg(com, off, value) \ 13160471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 13260471Snyan 13351078Speter/* 13451078Speter * com state bits. 13551078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 13651078Speter * than the other bits so that they can be tested as a group without masking 13751078Speter * off the low bits. 13851078Speter * 13951078Speter * The following com and tty flags correspond closely: 14051078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 14153344Speter * comstop()) 14251078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 14351078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14451078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14551078Speter * TS_FLUSH is not used. 14651078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 14751078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 14851078Speter */ 14951078Speter#define CS_BUSY 0x80 /* output in progress */ 15051078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 15151078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 15251078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 15351078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15451078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15551078Speter#define CS_ODONE 4 /* output completed */ 15651078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 15751078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 15851078Speter 15951078Speterstatic char const * const error_desc[] = { 16051078Speter#define CE_OVERRUN 0 16151078Speter "silo overflow", 16251078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 16351078Speter "interrupt-level buffer overflow", 16451078Speter#define CE_TTY_BUF_OVERFLOW 2 16551078Speter "tty-level buffer overflow", 16651078Speter}; 16751078Speter 16886909Simp#define CE_NTYPES 3 16951078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 17051078Speter 17186909Simp/* types. XXX - should be elsewhere */ 17286909Simptypedef u_int Port_t; /* hardware port */ 17386909Simptypedef u_char bool_t; /* boolean */ 17486909Simp 17586909Simp/* queue of linear buffers */ 17686909Simpstruct lbq { 17786909Simp u_char *l_head; /* next char to process */ 17886909Simp u_char *l_tail; /* one past the last char to process */ 17986909Simp struct lbq *l_next; /* next in queue */ 18086909Simp bool_t l_queued; /* nonzero if queued */ 18186909Simp}; 18286909Simp 18386909Simp/* com device structure */ 18486909Simpstruct com_s { 18586909Simp u_int flags; /* Copy isa device flags */ 18686909Simp u_char state; /* miscellaneous flag bits */ 18786909Simp bool_t active_out; /* nonzero if the callout device is open */ 18886909Simp u_char cfcr_image; /* copy of value written to CFCR */ 18951078Speter#ifdef COM_ESP 19086909Simp bool_t esp; /* is this unit a hayes esp board? */ 19186909Simp#endif 19286909Simp u_char extra_state; /* more flag bits, separate for order trick */ 19386909Simp u_char fifo_image; /* copy of value written to FIFO */ 19486909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 19586909Simp bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 19686909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 19786909Simp u_char mcr_image; /* copy of value written to MCR */ 19886909Simp#ifdef COM_MULTIPORT 19986909Simp bool_t multiport; /* is this unit part of a multiport device? */ 20086909Simp#endif /* COM_MULTIPORT */ 20186909Simp bool_t no_irq; /* nonzero if irq is not attached */ 20286909Simp bool_t gone; /* hardware disappeared */ 20386909Simp bool_t poll; /* nonzero if polling is required */ 20486909Simp bool_t poll_output; /* nonzero if polling for output is required */ 20586909Simp int unit; /* unit number */ 20686909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 20786909Simp u_int tx_fifo_size; 20886909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 20986909Simp 21086909Simp /* 21186909Simp * The high level of the driver never reads status registers directly 21286909Simp * because there would be too many side effects to handle conveniently. 21386909Simp * Instead, it reads copies of the registers stored here by the 21486909Simp * interrupt handler. 21586909Simp */ 21686909Simp u_char last_modem_status; /* last MSR read by intr handler */ 21786909Simp u_char prev_modem_status; /* last MSR handled by high level */ 21886909Simp 21986909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 22086909Simp u_char *ibuf; /* start of input buffer */ 22186909Simp u_char *ibufend; /* end of input buffer */ 22286909Simp u_char *ibufold; /* old input buffer, to be freed */ 22386909Simp u_char *ihighwater; /* threshold in input buffer */ 22486909Simp u_char *iptr; /* next free spot in input buffer */ 22586909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 22686909Simp int ierroff; /* offset of error bytes in ibuf */ 22786909Simp 22886909Simp struct lbq obufq; /* head of queue of output buffers */ 22986909Simp struct lbq obufs[2]; /* output buffers */ 23086909Simp 23186909Simp bus_space_tag_t bst; 23286909Simp bus_space_handle_t bsh; 23386909Simp 23486909Simp Port_t data_port; /* i/o ports */ 23586909Simp#ifdef COM_ESP 23686909Simp Port_t esp_port; 23786909Simp#endif 23886909Simp Port_t int_id_port; 23986909Simp Port_t modem_ctl_port; 24086909Simp Port_t line_status_port; 24186909Simp Port_t modem_status_port; 24286909Simp Port_t intr_ctl_port; /* Ports of IIR register */ 24386909Simp 24486909Simp struct tty *tp; /* cross reference */ 24586909Simp 24686909Simp /* Initial state. */ 24786909Simp struct termios it_in; /* should be in struct tty */ 24886909Simp struct termios it_out; 24986909Simp 25086909Simp /* Lock state. */ 25186909Simp struct termios lt_in; /* should be in struct tty */ 25286909Simp struct termios lt_out; 25386909Simp 25486909Simp bool_t do_timestamp; 25586909Simp bool_t do_dcd_timestamp; 25686909Simp struct timeval timestamp; 25786909Simp struct timeval dcd_timestamp; 25886909Simp struct pps_state pps; 259111613Sphk int pps_bit; 26086909Simp 26186909Simp u_long bytes_in; /* statistics */ 26286909Simp u_long bytes_out; 26386909Simp u_int delta_error_counts[CE_NTYPES]; 26486909Simp u_long error_counts[CE_NTYPES]; 26586909Simp 26689986Sjhay u_long rclk; 26789986Sjhay 26886909Simp struct resource *irqres; 26986909Simp struct resource *ioportres; 270116120Sscottl int ioportrid; 271116120Sscottl void *cookie; 272116120Sscottl dev_t devs[6]; 27386909Simp 27486909Simp /* 27586909Simp * Data area for output buffers. Someday we should build the output 27686909Simp * buffer queue without copying data. 27786909Simp */ 27886909Simp u_char obuf1[256]; 27986909Simp u_char obuf2[256]; 28086909Simp}; 28186909Simp 28286909Simp#ifdef COM_ESP 28393010Sbdestatic int espattach(struct com_s *com, Port_t esp_port); 28451078Speter#endif 28551078Speter 28651078Speterstatic timeout_t siobusycheck; 28793010Sbdestatic u_int siodivisor(u_long rclk, speed_t speed); 28851078Speterstatic timeout_t siodtrwakeup; 28993010Sbdestatic void comhardclose(struct com_s *com); 29093010Sbdestatic void sioinput(struct com_s *com); 29193010Sbdestatic void siointr1(struct com_s *com); 29293010Sbdestatic void siointr(void *arg); 29393010Sbdestatic int commctl(struct com_s *com, int bits, int how); 29493010Sbdestatic int comparam(struct tty *tp, struct termios *t); 29593010Sbdestatic void siopoll(void *); 29693010Sbdestatic void siosettimeout(void); 29793010Sbdestatic int siosetwater(struct com_s *com, speed_t speed); 29893010Sbdestatic void comstart(struct tty *tp); 29993010Sbdestatic void comstop(struct tty *tp, int rw); 30051078Speterstatic timeout_t comwakeup; 30193010Sbdestatic void disc_optim(struct tty *tp, struct termios *t, 30293010Sbde struct com_s *com); 30351078Speter 30485365Simpchar sio_driver_name[] = "sio"; 30570174Sjhbstatic struct mtx sio_lock; 30670174Sjhbstatic int sio_inited; 30751078Speter 30851078Speter/* table and macro for fast conversion from a unit number to its com struct */ 30985365Simpdevclass_t sio_devclass; 31051078Speter#define com_addr(unit) ((struct com_s *) \ 31186909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 31251078Speter 31351078Speterstatic d_open_t sioopen; 31451078Speterstatic d_close_t sioclose; 31551078Speterstatic d_read_t sioread; 31651078Speterstatic d_write_t siowrite; 31751078Speterstatic d_ioctl_t sioioctl; 31851078Speter 31951078Speter#define CDEV_MAJOR 28 32051078Speterstatic struct cdevsw sio_cdevsw = { 321111815Sphk .d_open = sioopen, 322111815Sphk .d_close = sioclose, 323111815Sphk .d_read = sioread, 324111815Sphk .d_write = siowrite, 325111815Sphk .d_ioctl = sioioctl, 326111815Sphk .d_poll = ttypoll, 327111815Sphk .d_name = sio_driver_name, 328111815Sphk .d_maj = CDEV_MAJOR, 329111821Sphk .d_flags = D_TTY, 330111815Sphk .d_kqfilter = ttykqfilter, 33151078Speter}; 33251078Speter 333114722Sobrienint comconsole = -1; 33451078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 33589986Sjhaystatic u_long comdefaultrclk = DEFAULT_RCLK; 33689986SjhaySYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 33798401Sn_hibmastatic speed_t gdbdefaultrate = GDBSPEED; 33898401Sn_hibmaSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 33998401Sn_hibma &gdbdefaultrate, GDBSPEED, ""); 34051078Speterstatic u_int com_events; /* input chars + weighted output completions */ 34151078Speterstatic Port_t siocniobase; 34298401Sn_hibmastatic int siocnunit = -1; 34351078Speterstatic Port_t siogdbiobase; 34451078Speterstatic int siogdbunit = -1; 34572238Sjhbstatic void *sio_slow_ih; 34672238Sjhbstatic void *sio_fast_ih; 34751078Speterstatic int sio_timeout; 34851078Speterstatic int sio_timeouts_until_log; 34951078Speterstatic struct callout_handle sio_timeout_handle 35051078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 35153344Speterstatic int sio_numunits; 35251078Speter 35351078Speter#ifdef COM_ESP 35451078Speter/* XXX configure this properly. */ 35586909Simp/* XXX quite broken for new-bus. */ 35651078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 35751078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 35851078Speter#endif 35951078Speter 36051078Speter/* 36151078Speter * handle sysctl read/write requests for console speed 36251078Speter * 36351078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 36451078Speter * also set the initial and lock values for the /dev/ttyXX device 36551078Speter * if there is one associated with the console. Finally, if the /dev/tty 36651078Speter * device has already been open, change the speed on the open running port 36751078Speter * itself. 36851078Speter */ 36951078Speter 37051078Speterstatic int 37162573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 37251078Speter{ 37351078Speter int error, s; 37451078Speter speed_t newspeed; 37551078Speter struct com_s *com; 37651078Speter struct tty *tp; 37751078Speter 37851078Speter newspeed = comdefaultrate; 37951078Speter 38051078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 38151078Speter if (error || !req->newptr) 38251078Speter return (error); 38351078Speter 38451078Speter comdefaultrate = newspeed; 38551078Speter 38651078Speter if (comconsole < 0) /* serial console not selected? */ 38751078Speter return (0); 38851078Speter 38951078Speter com = com_addr(comconsole); 39057915Simp if (com == NULL) 39151078Speter return (ENXIO); 39251078Speter 39351078Speter /* 39451078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 39551078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 39651078Speter * speed changes) 39751078Speter */ 39851078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 39951078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 40051078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 40151078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 40251078Speter 40351078Speter /* 40451078Speter * if we're open, change the running rate too 40551078Speter */ 40651078Speter tp = com->tp; 40751078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 40851078Speter tp->t_termios.c_ispeed = 40951078Speter tp->t_termios.c_ospeed = comdefaultrate; 41051078Speter s = spltty(); 41151078Speter error = comparam(tp, &tp->t_termios); 41251078Speter splx(s); 41351078Speter } 41451078Speter return error; 41551078Speter} 41651078Speter 41751078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 41851078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 41991280Simp/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 42051078Speter 42186909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 42286909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 42386909Simp 42486909Simp/* 42586909Simp * Unload the driver and clear the table. 42686909Simp * XXX this is mostly wrong. 42786909Simp * XXX TODO: 42886909Simp * This is usually called when the card is ejected, but 429104933Simp * can be caused by a kldunload of a controller driver. 43086909Simp * The idea is to reset the driver's view of the device 43186909Simp * and ensure that any driver entry points such as 43286909Simp * read and write do not hang. 43386909Simp */ 43485365Simpint 43585365Simpsiodetach(dev) 43652471Simp device_t dev; 43751078Speter{ 43851078Speter struct com_s *com; 43965131Sphk int i; 44051078Speter 44152471Simp com = (struct com_s *) device_get_softc(dev); 44257915Simp if (com == NULL) { 44352471Simp device_printf(dev, "NULL com in siounload\n"); 44454386Simp return (0); 44551078Speter } 44654386Simp com->gone = 1; 44765131Sphk for (i = 0 ; i < 6; i++) 44865131Sphk destroy_dev(com->devs[i]); 44954386Simp if (com->irqres) { 45054386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 45154386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 45254386Simp } 45354386Simp if (com->ioportres) 454116120Sscottl bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid, 455116120Sscottl com->ioportres); 45651078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 45757915Simp device_printf(dev, "still open, forcing close\n"); 45877750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 45951078Speter com->tp->t_gen++; 46051078Speter ttyclose(com->tp); 46151078Speter ttwakeup(com->tp); 46251078Speter ttwwakeup(com->tp); 46351078Speter } else { 46451078Speter if (com->ibuf != NULL) 46551078Speter free(com->ibuf, M_DEVBUF); 46686909Simp device_set_softc(dev, NULL); 46786909Simp free(com, M_DEVBUF); 46851078Speter } 46953978Simp return (0); 47051078Speter} 47151078Speter 47285365Simpint 47389986Sjhaysioprobe(dev, xrid, rclk, noprobe) 47458885Simp device_t dev; 47558885Simp int xrid; 47689986Sjhay u_long rclk; 47785365Simp int noprobe; 47851078Speter{ 47953344Speter#if 0 48051078Speter static bool_t already_init; 48153344Speter device_t xdev; 48253344Speter#endif 48360471Snyan struct com_s *com; 48489986Sjhay u_int divisor; 48551078Speter bool_t failures[10]; 48651078Speter int fn; 48751078Speter device_t idev; 48851078Speter Port_t iobase; 48951078Speter intrmask_t irqmap[4]; 49051078Speter intrmask_t irqs; 49151078Speter u_char mcr_image; 49251078Speter int result; 49354206Speter u_long xirq; 49451088Speter u_int flags = device_get_flags(dev); 49551078Speter int rid; 49651078Speter struct resource *port; 49751078Speter 49858885Simp rid = xrid; 49951078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 50051078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 50151078Speter if (!port) 50257915Simp return (ENXIO); 50351078Speter 50486909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 50586909Simp if (com == NULL) 50686909Simp return (ENOMEM); 50786909Simp device_set_softc(dev, com); 50860471Snyan com->bst = rman_get_bustag(port); 50960471Snyan com->bsh = rman_get_bushandle(port); 51089986Sjhay if (rclk == 0) 51189986Sjhay rclk = DEFAULT_RCLK; 51289986Sjhay com->rclk = rclk; 51360471Snyan 51485209Sjhb while (sio_inited != 2) 51585209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 51693818Sjhb mtx_init(&sio_lock, sio_driver_name, NULL, 51793818Sjhb (comconsole != -1) ? 51885209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 51985209Sjhb atomic_store_rel_int(&sio_inited, 2); 52085209Sjhb } 52170174Sjhb 52253344Speter#if 0 52353344Speter /* 52453344Speter * XXX this is broken - when we are first called, there are no 52553344Speter * previously configured IO ports. We could hard code 52653344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 52753344Speter * This code has been doing nothing since the conversion since 52853344Speter * "count" is zero the first time around. 52953344Speter */ 53051078Speter if (!already_init) { 53151078Speter /* 53251078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 53351078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 53451078Speter * from any used port that shares the interrupt vector. 53551078Speter * XXX the gate enable is elsewhere for some multiports. 53651078Speter */ 53751078Speter device_t *devs; 53853344Speter int count, i, xioport; 53951078Speter 54051078Speter devclass_get_devices(sio_devclass, &devs, &count); 54151078Speter for (i = 0; i < count; i++) { 54251078Speter xdev = devs[i]; 54354194Speter if (device_is_enabled(xdev) && 54454194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 54554194Speter NULL) == 0) 54653344Speter outb(xioport + com_mcr, 0); 54751078Speter } 54851078Speter free(devs, M_TEMP); 54951078Speter already_init = TRUE; 55051078Speter } 55153344Speter#endif 55251078Speter 55351078Speter if (COM_LLCONSOLE(flags)) { 55451078Speter printf("sio%d: reserved for low-level i/o\n", 55551078Speter device_get_unit(dev)); 55656788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 55786909Simp device_set_softc(dev, NULL); 55886909Simp free(com, M_DEVBUF); 55951078Speter return (ENXIO); 56051078Speter } 56151078Speter 56251078Speter /* 56351078Speter * If the device is on a multiport card and has an AST/4 56451078Speter * compatible interrupt control register, initialize this 56551078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 56651078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 56751078Speter * Point idev to the device struct giving the correct id_irq. 56851078Speter * This is the struct for the master device if there is one. 56951078Speter */ 57051078Speter idev = dev; 57151078Speter mcr_image = MCR_IENABLE; 57251078Speter#ifdef COM_MULTIPORT 57357234Sbde if (COM_ISMULTIPORT(flags)) { 57454206Speter Port_t xiobase; 57554206Speter u_long io; 57654206Speter 57751078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 57851078Speter if (idev == NULL) { 57951078Speter printf("sio%d: master device %d not configured\n", 58051078Speter device_get_unit(dev), COM_MPMASTER(flags)); 58151078Speter idev = dev; 58251078Speter } 58357234Sbde if (!COM_NOTAST4(flags)) { 58457234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 58557234Sbde NULL) == 0) { 58657234Sbde xiobase = io; 58757234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 58857234Sbde NULL, NULL) == 0) 58957234Sbde outb(xiobase + com_scr, 0x80); 59057234Sbde else 59157234Sbde outb(xiobase + com_scr, 0); 59257234Sbde } 59357234Sbde mcr_image = 0; 59451078Speter } 59551078Speter } 59651078Speter#endif /* COM_MULTIPORT */ 59754194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 59851078Speter mcr_image = 0; 59951078Speter 60051078Speter bzero(failures, sizeof failures); 60151078Speter iobase = rman_get_start(port); 60251078Speter 60351078Speter /* 60451078Speter * We don't want to get actual interrupts, just masked ones. 60551078Speter * Interrupts from this line should already be masked in the ICU, 60651078Speter * but mask them in the processor as well in case there are some 60751078Speter * (misconfigured) shared interrupts. 60851078Speter */ 60972200Sbmilekic mtx_lock_spin(&sio_lock); 61051078Speter/* EXTRA DELAY? */ 61151078Speter 61251078Speter /* 613112384Ssobomax * For the TI16754 chips, set prescaler to 1 (4 is often the 614112384Ssobomax * default after-reset value) as otherwise it's impossible to 615112270Ssobomax * get highest baudrates. 616112270Ssobomax */ 617112270Ssobomax if (COM_TI16754(flags)) { 618112384Ssobomax u_char cfcr, efr; 619112270Ssobomax 620112384Ssobomax cfcr = sio_getreg(com, com_cfcr); 621112384Ssobomax sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 622112384Ssobomax efr = sio_getreg(com, com_efr); 623112384Ssobomax /* Unlock extended features to turn off prescaler. */ 624112384Ssobomax sio_setreg(com, com_efr, efr | EFR_EFE); 625112384Ssobomax /* Disable EFR. */ 626112384Ssobomax sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 627112384Ssobomax /* Turn off prescaler. */ 628112384Ssobomax sio_setreg(com, com_mcr, 629112384Ssobomax sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 630112384Ssobomax sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 631112384Ssobomax sio_setreg(com, com_efr, efr); 632112384Ssobomax sio_setreg(com, com_cfcr, cfcr); 633112270Ssobomax } 634112384Ssobomax 635112270Ssobomax /* 63651078Speter * Initialize the speed and the word size and wait long enough to 63751078Speter * drain the maximum of 16 bytes of junk in device output queues. 63851078Speter * The speed is undefined after a master reset and must be set 63951078Speter * before relying on anything related to output. There may be 64051078Speter * junk after a (very fast) soft reboot and (apparently) after 64151078Speter * master reset. 64251078Speter * XXX what about the UART bug avoided by waiting in comparam()? 64351078Speter * We don't want to to wait long enough to drain at 2 bps. 64451078Speter */ 64551078Speter if (iobase == siocniobase) 64651078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 64751078Speter else { 64860471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 64989986Sjhay divisor = siodivisor(rclk, SIO_TEST_SPEED); 65089986Sjhay sio_setreg(com, com_dlbl, divisor & 0xff); 65189986Sjhay sio_setreg(com, com_dlbh, divisor >> 8); 65260471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 65351078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 65451078Speter } 65551078Speter 65651078Speter /* 65751078Speter * Enable the interrupt gate and disable device interupts. This 65851078Speter * should leave the device driving the interrupt line low and 65951078Speter * guarantee an edge trigger if an interrupt can be generated. 66051078Speter */ 66151078Speter/* EXTRA DELAY? */ 66260471Snyan sio_setreg(com, com_mcr, mcr_image); 66360471Snyan sio_setreg(com, com_ier, 0); 66451078Speter DELAY(1000); /* XXX */ 66551078Speter irqmap[0] = isa_irq_pending(); 66651078Speter 66751078Speter /* 66851078Speter * Attempt to set loopback mode so that we can send a null byte 66951078Speter * without annoying any external device. 67051078Speter */ 67151078Speter/* EXTRA DELAY? */ 67260471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 67351078Speter 67451078Speter /* 67551078Speter * Attempt to generate an output interrupt. On 8250's, setting 67651078Speter * IER_ETXRDY generates an interrupt independent of the current 67751078Speter * setting and independent of whether the THR is empty. On 16450's, 67851078Speter * setting IER_ETXRDY generates an interrupt independent of the 67951078Speter * current setting. On 16550A's, setting IER_ETXRDY only 68051078Speter * generates an interrupt when IER_ETXRDY is not already set. 68151078Speter */ 68260471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 68351078Speter 68451078Speter /* 68551078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 68651078Speter * an interrupt. They'd better generate one for actually doing 68751078Speter * output. Loopback may be broken on the same incompatibles but 68851078Speter * it's unlikely to do more than allow the null byte out. 68951078Speter */ 69060471Snyan sio_setreg(com, com_data, 0); 69151078Speter DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 69251078Speter 69351078Speter /* 69451078Speter * Turn off loopback mode so that the interrupt gate works again 69551078Speter * (MCR_IENABLE was hidden). This should leave the device driving 69651078Speter * an interrupt line high. It doesn't matter if the interrupt 69751078Speter * line oscillates while we are not looking at it, since interrupts 69851078Speter * are disabled. 69951078Speter */ 70051078Speter/* EXTRA DELAY? */ 70160471Snyan sio_setreg(com, com_mcr, mcr_image); 70292401Simp 70392401Simp /* 70492401Simp * It seems my Xircom CBEM56G Cardbus modem wants to be reset 70592401Simp * to 8 bits *again*, or else probe test 0 will fail. 70692401Simp * gwk@sgi.com, 4/19/2001 70792401Simp */ 70892401Simp sio_setreg(com, com_cfcr, CFCR_8BITS); 70951078Speter 71051078Speter /* 71152471Simp * Some pcmcia cards have the "TXRDY bug", so we check everyone 71251078Speter * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 71351078Speter */ 71485365Simp if (noprobe) { 71553370Speter /* Reading IIR register twice */ 71653370Speter for (fn = 0; fn < 2; fn ++) { 71753370Speter DELAY(10000); 71860471Snyan failures[6] = sio_getreg(com, com_iir); 71953370Speter } 72053370Speter /* Check IIR_TXRDY clear ? */ 72153370Speter result = 0; 72253370Speter if (failures[6] & IIR_TXRDY) { 72392401Simp /* No, Double check with clearing IER */ 72460471Snyan sio_setreg(com, com_ier, 0); 72560471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 72692401Simp /* Ok. We discovered TXRDY bug! */ 72753370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 72853370Speter } else { 72953370Speter /* Unknown, Just omit this chip.. XXX */ 73053370Speter result = ENXIO; 73181793Simp sio_setreg(com, com_mcr, 0); 73253370Speter } 73351078Speter } else { 73453370Speter /* OK. this is well-known guys */ 73553370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 73651078Speter } 73781793Simp sio_setreg(com, com_ier, 0); 73860471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 73972200Sbmilekic mtx_unlock_spin(&sio_lock); 74053344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 74186909Simp if (iobase == siocniobase) 74286909Simp result = 0; 74386909Simp if (result != 0) { 74486909Simp device_set_softc(dev, NULL); 74586909Simp free(com, M_DEVBUF); 74686909Simp } 74786909Simp return (result); 74853344Speter } 74953344Speter 75051078Speter /* 75151078Speter * Check that 75251078Speter * o the CFCR, IER and MCR in UART hold the values written to them 75351078Speter * (the values happen to be all distinct - this is good for 75451078Speter * avoiding false positive tests from bus echoes). 75551078Speter * o an output interrupt is generated and its vector is correct. 75651078Speter * o the interrupt goes away when the IIR in the UART is read. 75751078Speter */ 75851078Speter/* EXTRA DELAY? */ 75960471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 76060471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 761112270Ssobomax failures[2] = sio_getreg(com, com_mcr) - mcr_image; 76251078Speter DELAY(10000); /* Some internal modems need this time */ 76351078Speter irqmap[1] = isa_irq_pending(); 76460471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 76551078Speter DELAY(1000); /* XXX */ 76651078Speter irqmap[2] = isa_irq_pending(); 76760471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 76851078Speter 76951078Speter /* 77051078Speter * Turn off all device interrupts and check that they go off properly. 77151078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 77251078Speter * the OUT2 output of the UART to 77351078Speter * the ICU input. Closing the gate would give a floating ICU input 77451078Speter * (unless there is another device driving it) and spurious interrupts. 77551078Speter * (On the system that this was first tested on, the input floats high 77651078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 77751078Speter */ 77860471Snyan sio_setreg(com, com_ier, 0); 77960471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 78060471Snyan failures[7] = sio_getreg(com, com_ier); 78151078Speter DELAY(1000); /* XXX */ 78251078Speter irqmap[3] = isa_irq_pending(); 78360471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 78451078Speter 78572200Sbmilekic mtx_unlock_spin(&sio_lock); 78651078Speter 78751078Speter irqs = irqmap[1] & ~irqmap[0]; 78854194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 78989463Simp ((1 << xirq) & irqs) == 0) { 79051078Speter printf( 79154206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 79253344Speter device_get_unit(dev), xirq, irqs); 79389447Sbmah printf( 79489470Sbmah "sio%d: port may not be enabled\n", 79589447Sbmah device_get_unit(dev)); 79689463Simp } 79751078Speter if (bootverbose) 79851078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 79951078Speter device_get_unit(dev), 80051078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 80151078Speter 80251078Speter result = 0; 80351078Speter for (fn = 0; fn < sizeof failures; ++fn) 80451078Speter if (failures[fn]) { 80560471Snyan sio_setreg(com, com_mcr, 0); 80651078Speter result = ENXIO; 80751078Speter if (bootverbose) { 80851078Speter printf("sio%d: probe failed test(s):", 80951078Speter device_get_unit(dev)); 81051078Speter for (fn = 0; fn < sizeof failures; ++fn) 81151078Speter if (failures[fn]) 81251078Speter printf(" %d", fn); 81351078Speter printf("\n"); 81451078Speter } 81551078Speter break; 81651078Speter } 81751078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 81886909Simp if (iobase == siocniobase) 81986909Simp result = 0; 82086909Simp if (result != 0) { 82186909Simp device_set_softc(dev, NULL); 82286909Simp free(com, M_DEVBUF); 82386909Simp } 82486909Simp return (result); 82551078Speter} 82651078Speter 82751078Speter#ifdef COM_ESP 82851078Speterstatic int 82951078Speterespattach(com, esp_port) 83051078Speter struct com_s *com; 83151078Speter Port_t esp_port; 83251078Speter{ 83351078Speter u_char dips; 83451078Speter u_char val; 83551078Speter 83651078Speter /* 83751078Speter * Check the ESP-specific I/O port to see if we're an ESP 83851078Speter * card. If not, return failure immediately. 83951078Speter */ 84051078Speter if ((inb(esp_port) & 0xf3) == 0) { 84151078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 84251078Speter return (0); 84351078Speter } 84451078Speter 84551078Speter /* 84651078Speter * We've got something that claims to be a Hayes ESP card. 84751078Speter * Let's hope so. 84851078Speter */ 84951078Speter 85051078Speter /* Get the dip-switch configuration */ 85151078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 85251078Speter dips = inb(esp_port + ESP_STATUS1); 85351078Speter 85451078Speter /* 85551078Speter * Bits 0,1 of dips say which COM port we are. 85651078Speter */ 85760471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 85851078Speter printf(" : ESP"); 85951078Speter else { 86051078Speter printf(" esp_port has com %d\n", dips & 0x03); 86151078Speter return (0); 86251078Speter } 86351078Speter 86451078Speter /* 86551078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 86651078Speter */ 86751078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 86851078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 86951078Speter val = inb(esp_port + ESP_STATUS2); 87051078Speter if ((val & 0x70) < 0x20) { 87151078Speter printf("-old (%o)", val & 0x70); 87251078Speter return (0); 87351078Speter } 87451078Speter 87551078Speter /* 87651078Speter * Check for ability to emulate 16550: bit 7 == 1 87751078Speter */ 87851078Speter if ((dips & 0x80) == 0) { 87951078Speter printf(" slave"); 88051078Speter return (0); 88151078Speter } 88251078Speter 88351078Speter /* 88451078Speter * Okay, we seem to be a Hayes ESP card. Whee. 88551078Speter */ 88651078Speter com->esp = TRUE; 88751078Speter com->esp_port = esp_port; 88851078Speter return (1); 88951078Speter} 89051078Speter#endif /* COM_ESP */ 89151078Speter 89285365Simpint 89389986Sjhaysioattach(dev, xrid, rclk) 89451078Speter device_t dev; 89558885Simp int xrid; 89689986Sjhay u_long rclk; 89751078Speter{ 89851078Speter struct com_s *com; 89951078Speter#ifdef COM_ESP 90051078Speter Port_t *espp; 90151078Speter#endif 90251078Speter Port_t iobase; 90393470Sbde int minorbase; 90451078Speter int unit; 90553344Speter u_int flags; 90651078Speter int rid; 90751078Speter struct resource *port; 90853344Speter int ret; 90951078Speter 91058885Simp rid = xrid; 91151078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 91251078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 91351078Speter if (!port) 91457915Simp return (ENXIO); 91551078Speter 91651078Speter iobase = rman_get_start(port); 91751078Speter unit = device_get_unit(dev); 91851078Speter com = device_get_softc(dev); 91953344Speter flags = device_get_flags(dev); 92051078Speter 92153344Speter if (unit >= sio_numunits) 92253344Speter sio_numunits = unit + 1; 92351078Speter /* 92451078Speter * sioprobe() has initialized the device registers as follows: 92551078Speter * o cfcr = CFCR_8BITS. 92651078Speter * It is most important that CFCR_DLAB is off, so that the 92751078Speter * data port is not hidden when we enable interrupts. 92851078Speter * o ier = 0. 92951078Speter * Interrupts are only enabled when the line is open. 93051078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 93151078Speter * interrupt control register or the config specifies no irq. 93251078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 93351078Speter * device from sending before we are ready. 93451078Speter */ 93551078Speter bzero(com, sizeof *com); 93651078Speter com->unit = unit; 93751078Speter com->ioportres = port; 938116120Sscottl com->ioportrid = rid; 93960471Snyan com->bst = rman_get_bustag(port); 94060471Snyan com->bsh = rman_get_bushandle(port); 94151078Speter com->cfcr_image = CFCR_8BITS; 94251078Speter com->dtr_wait = 3 * hz; 94351078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 94457234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 94551078Speter com->tx_fifo_size = 1; 94651078Speter com->obufs[0].l_head = com->obuf1; 94751078Speter com->obufs[1].l_head = com->obuf2; 94851078Speter 94951078Speter com->data_port = iobase + com_data; 95051078Speter com->int_id_port = iobase + com_iir; 95151078Speter com->modem_ctl_port = iobase + com_mcr; 95251078Speter com->mcr_image = inb(com->modem_ctl_port); 95351078Speter com->line_status_port = iobase + com_lsr; 95451078Speter com->modem_status_port = iobase + com_msr; 95551078Speter com->intr_ctl_port = iobase + com_ier; 95651078Speter 95789986Sjhay if (rclk == 0) 95889986Sjhay rclk = DEFAULT_RCLK; 95989986Sjhay com->rclk = rclk; 96089986Sjhay 96151078Speter /* 96251078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 96351078Speter * are only relevant for logins. It's important to have echo off 96451078Speter * initially so that the line doesn't start blathering before the 96551078Speter * echo flag can be turned off. 96651078Speter */ 96751078Speter com->it_in.c_iflag = 0; 96851078Speter com->it_in.c_oflag = 0; 96951078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 97051078Speter com->it_in.c_lflag = 0; 97151078Speter if (unit == comconsole) { 97251078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 97351078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 97451078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 97551078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 97651078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 97751078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 97851078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 97951078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 98051078Speter } else 98151078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 98265605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 98372200Sbmilekic mtx_unlock_spin(&sio_lock); 98456788Sbde /* 98556788Sbde * Leave i/o resources allocated if this is a `cn'-level 98656788Sbde * console, so that other devices can't snarf them. 98756788Sbde */ 98856788Sbde if (iobase != siocniobase) 98956788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 99056788Sbde return (ENOMEM); 99151078Speter } 99272200Sbmilekic mtx_unlock_spin(&sio_lock); 99351078Speter termioschars(&com->it_in); 99451078Speter com->it_out = com->it_in; 99551078Speter 99651078Speter /* attempt to determine UART type */ 99751078Speter printf("sio%d: type", unit); 99851078Speter 99951078Speter 1000104067Sphk if (!COM_ISMULTIPORT(flags) && 1001104067Sphk !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 100251078Speter u_char scr; 100351078Speter u_char scr1; 100451078Speter u_char scr2; 100551078Speter 100660471Snyan scr = sio_getreg(com, com_scr); 100760471Snyan sio_setreg(com, com_scr, 0xa5); 100860471Snyan scr1 = sio_getreg(com, com_scr); 100960471Snyan sio_setreg(com, com_scr, 0x5a); 101060471Snyan scr2 = sio_getreg(com, com_scr); 101160471Snyan sio_setreg(com, com_scr, scr); 101251078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 101389447Sbmah printf(" 8250 or not responding"); 101451078Speter goto determined_type; 101551078Speter } 101651078Speter } 101760471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 101851078Speter DELAY(100); 101951078Speter com->st16650a = 0; 102051078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 102151078Speter case FIFO_RX_LOW: 102251078Speter printf(" 16450"); 102351078Speter break; 102451078Speter case FIFO_RX_MEDL: 102551078Speter printf(" 16450?"); 102651078Speter break; 102751078Speter case FIFO_RX_MEDH: 102851078Speter printf(" 16550?"); 102951078Speter break; 103051078Speter case FIFO_RX_HIGH: 103151078Speter if (COM_NOFIFO(flags)) { 103251078Speter printf(" 16550A fifo disabled"); 103351078Speter } else { 103451078Speter com->hasfifo = TRUE; 103551078Speter if (COM_ST16650A(flags)) { 103651078Speter com->st16650a = 1; 103751078Speter com->tx_fifo_size = 32; 103851078Speter printf(" ST16650A"); 1039112270Ssobomax } else if (COM_TI16754(flags)) { 1040112270Ssobomax com->tx_fifo_size = 64; 1041112270Ssobomax printf(" TI16754"); 104251078Speter } else { 104351078Speter com->tx_fifo_size = COM_FIFOSIZE(flags); 104451078Speter printf(" 16550A"); 104551078Speter } 104651078Speter } 104751078Speter#ifdef COM_ESP 104851078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 104951078Speter if (espattach(com, *espp)) { 105051078Speter com->tx_fifo_size = 1024; 105151078Speter break; 105251078Speter } 105351078Speter#endif 1054112270Ssobomax if (!com->st16650a && !COM_TI16754(flags)) { 105551078Speter if (!com->tx_fifo_size) 105651078Speter com->tx_fifo_size = 16; 105751078Speter else 105851078Speter printf(" lookalike with %d bytes FIFO", 105951078Speter com->tx_fifo_size); 106051078Speter } 106151078Speter 106251078Speter break; 106351078Speter } 106451078Speter 106551078Speter#ifdef COM_ESP 106651078Speter if (com->esp) { 106751078Speter /* 106851078Speter * Set 16550 compatibility mode. 106951078Speter * We don't use the ESP_MODE_SCALE bit to increase the 107051078Speter * fifo trigger levels because we can't handle large 107151078Speter * bursts of input. 107251078Speter * XXX flow control should be set in comparam(), not here. 107351078Speter */ 107451078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 107551078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 107651078Speter 107751078Speter /* Set RTS/CTS flow control. */ 107851078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 107951078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 108051078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 108151078Speter 108251078Speter /* Set flow-control levels. */ 108351078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 108451078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 108551078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 108651078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 108751078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 108851078Speter } 108951078Speter#endif /* COM_ESP */ 109060471Snyan sio_setreg(com, com_fifo, 0); 109151078Speterdetermined_type: ; 109251078Speter 109351078Speter#ifdef COM_MULTIPORT 109451078Speter if (COM_ISMULTIPORT(flags)) { 109553344Speter device_t masterdev; 109653344Speter 109751078Speter com->multiport = TRUE; 109851078Speter printf(" (multiport"); 109951078Speter if (unit == COM_MPMASTER(flags)) 110051078Speter printf(" master"); 110151078Speter printf(")"); 110253344Speter masterdev = devclass_get_device(sio_devclass, 110353344Speter COM_MPMASTER(flags)); 110457234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 110557234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 110651078Speter } 110751078Speter#endif /* COM_MULTIPORT */ 110851078Speter if (unit == comconsole) 110951078Speter printf(", console"); 111053344Speter if (COM_IIR_TXRDYBUG(flags)) 111151078Speter printf(" with a bogus IIR_TXRDY register"); 111251078Speter printf("\n"); 111351078Speter 111467551Sjhb if (sio_fast_ih == NULL) { 111572238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 111672238Sjhb &sio_fast_ih); 111772238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 111872238Sjhb &sio_slow_ih); 111951078Speter } 112093470Sbde minorbase = UNIT_TO_MINOR(unit); 112193470Sbde com->devs[0] = make_dev(&sio_cdevsw, minorbase, 112251078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 112393470Sbde com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 112451078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 112593470Sbde com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 112651078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 112793470Sbde com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 112851078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 112965131Sphk com->devs[4] = make_dev(&sio_cdevsw, 113093470Sbde minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 113151078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 113265131Sphk com->devs[5] = make_dev(&sio_cdevsw, 113393470Sbde minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 113451078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1135110249Sphk for (rid = 0; rid < 6; rid++) 1136110249Sphk com->devs[rid]->si_drv1 = com; 113751078Speter com->flags = flags; 113851078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1139111613Sphk 1140111613Sphk if (COM_PPSCTS(flags)) 1141111613Sphk com->pps_bit = MSR_CTS; 1142111613Sphk else 1143111613Sphk com->pps_bit = MSR_DCD; 114451078Speter pps_init(&com->pps); 114551078Speter 114651078Speter rid = 0; 114751078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 114853344Speter RF_ACTIVE); 114953344Speter if (com->irqres) { 115053344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 115165557Sjasone INTR_TYPE_TTY | INTR_FAST, 115254386Simp siointr, com, &com->cookie); 115354194Speter if (ret) { 115454194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 115554194Speter com->irqres, INTR_TYPE_TTY, 115654386Simp siointr, com, &com->cookie); 115754194Speter if (ret == 0) 115883246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 115954194Speter } 116053344Speter if (ret) 116153344Speter device_printf(dev, "could not activate interrupt\n"); 116278504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 116378504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 116478504Siedowse /* 116578504Siedowse * Enable interrupts for early break-to-debugger support 116678504Siedowse * on the console. 116778504Siedowse */ 116878504Siedowse if (ret == 0 && unit == comconsole) 116978504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 117078504Siedowse IER_EMSC); 117178504Siedowse#endif 117253344Speter } 117351078Speter 117451078Speter return (0); 117551078Speter} 117651078Speter 117751078Speterstatic int 117883366Sjuliansioopen(dev, flag, mode, td) 117951078Speter dev_t dev; 118051078Speter int flag; 118151078Speter int mode; 118283366Sjulian struct thread *td; 118351078Speter{ 118451078Speter struct com_s *com; 118551078Speter int error; 118651078Speter int mynor; 118751078Speter int s; 118851078Speter struct tty *tp; 118951078Speter int unit; 119051078Speter 119151078Speter mynor = minor(dev); 119251078Speter unit = MINOR_TO_UNIT(mynor); 119353344Speter com = com_addr(unit); 119453344Speter if (com == NULL) 119551078Speter return (ENXIO); 119651078Speter if (com->gone) 119751078Speter return (ENXIO); 119851078Speter if (mynor & CONTROL_MASK) 119951078Speter return (0); 120051078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 120151078Speter s = spltty(); 120251078Speter /* 120351078Speter * We jump to this label after all non-interrupted sleeps to pick 120451078Speter * up any changes of the device state. 120551078Speter */ 120651078Speteropen_top: 120751078Speter while (com->state & CS_DTR_OFF) { 120851078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 120951078Speter if (com_addr(unit) == NULL) 121051078Speter return (ENXIO); 121151078Speter if (error != 0 || com->gone) 121251078Speter goto out; 121351078Speter } 121451078Speter if (tp->t_state & TS_ISOPEN) { 121551078Speter /* 121651078Speter * The device is open, so everything has been initialized. 121751078Speter * Handle conflicts. 121851078Speter */ 121951078Speter if (mynor & CALLOUT_MASK) { 122051078Speter if (!com->active_out) { 122151078Speter error = EBUSY; 122251078Speter goto out; 122351078Speter } 122451078Speter } else { 122551078Speter if (com->active_out) { 122651078Speter if (flag & O_NONBLOCK) { 122751078Speter error = EBUSY; 122851078Speter goto out; 122951078Speter } 123051078Speter error = tsleep(&com->active_out, 123151078Speter TTIPRI | PCATCH, "siobi", 0); 123251078Speter if (com_addr(unit) == NULL) 123351078Speter return (ENXIO); 123451078Speter if (error != 0 || com->gone) 123551078Speter goto out; 123651078Speter goto open_top; 123751078Speter } 123851078Speter } 123951078Speter if (tp->t_state & TS_XCLUDE && 124093593Sjhb suser(td)) { 124151078Speter error = EBUSY; 124251078Speter goto out; 124351078Speter } 124451078Speter } else { 124551078Speter /* 124651078Speter * The device isn't open, so there are no conflicts. 124751078Speter * Initialize it. Initialization is done twice in many 124851078Speter * cases: to preempt sleeping callin opens if we are 124951078Speter * callout, and to complete a callin open after DCD rises. 125051078Speter */ 125151078Speter tp->t_oproc = comstart; 125251078Speter tp->t_param = comparam; 125351654Sphk tp->t_stop = comstop; 125451078Speter tp->t_dev = dev; 125551078Speter tp->t_termios = mynor & CALLOUT_MASK 125651078Speter ? com->it_out : com->it_in; 125751078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 125851078Speter com->poll = com->no_irq; 125951078Speter com->poll_output = com->loses_outints; 126051078Speter ++com->wopeners; 126151078Speter error = comparam(tp, &tp->t_termios); 126251078Speter --com->wopeners; 126351078Speter if (error != 0) 126451078Speter goto out; 126551078Speter /* 126651078Speter * XXX we should goto open_top if comparam() slept. 126751078Speter */ 126851078Speter if (com->hasfifo) { 1269102542Sphk int i; 127051078Speter /* 127151078Speter * (Re)enable and drain fifos. 127251078Speter * 127351078Speter * Certain SMC chips cause problems if the fifos 127451078Speter * are enabled while input is ready. Turn off the 127551078Speter * fifo if necessary to clear the input. We test 127651078Speter * the input ready bit after enabling the fifos 127751078Speter * since we've already enabled them in comparam() 127851078Speter * and to handle races between enabling and fresh 127951078Speter * input. 128051078Speter */ 1281102542Sphk for (i = 0; i < 500; i++) { 128260471Snyan sio_setreg(com, com_fifo, 128360471Snyan FIFO_RCV_RST | FIFO_XMT_RST 128460471Snyan | com->fifo_image); 128551078Speter /* 128651078Speter * XXX the delays are for superstitious 128751078Speter * historical reasons. It must be less than 128851078Speter * the character time at the maximum 128951078Speter * supported speed (87 usec at 115200 bps 129051078Speter * 8N1). Otherwise we might loop endlessly 129151078Speter * if data is streaming in. We used to use 129251078Speter * delays of 100. That usually worked 129351078Speter * because DELAY(100) used to usually delay 129451078Speter * for about 85 usec instead of 100. 129551078Speter */ 129651078Speter DELAY(50); 129751078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 129851078Speter break; 129960471Snyan sio_setreg(com, com_fifo, 0); 130051078Speter DELAY(50); 130151078Speter (void) inb(com->data_port); 130251078Speter } 1303102542Sphk if (i == 500) { 1304102542Sphk error = EIO; 1305102542Sphk goto out; 1306102542Sphk } 130751078Speter } 130851078Speter 130972200Sbmilekic mtx_lock_spin(&sio_lock); 131051078Speter (void) inb(com->line_status_port); 131151078Speter (void) inb(com->data_port); 131251078Speter com->prev_modem_status = com->last_modem_status 131351078Speter = inb(com->modem_status_port); 131451078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 131551078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 131651078Speter | IER_EMSC); 131751078Speter } else { 131851078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 131951078Speter | IER_ERLS | IER_EMSC); 132051078Speter } 132172200Sbmilekic mtx_unlock_spin(&sio_lock); 132251078Speter /* 132351078Speter * Handle initial DCD. Callout devices get a fake initial 132451078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 132551078Speter * callin opens get woken up and resume sleeping on "siobi" 132651078Speter * instead of "siodcd". 132751078Speter */ 132851078Speter /* 132951078Speter * XXX `mynor & CALLOUT_MASK' should be 133051078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 133151078Speter * TRAPDOOR_CARRIER is the default initial state for callout 133251078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 133351078Speter * the true carrier. 133451078Speter */ 133551078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 133651078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 133751078Speter } 133851078Speter /* 133951078Speter * Wait for DCD if necessary. 134051078Speter */ 134151078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 134251078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 134351078Speter ++com->wopeners; 134451078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 134551078Speter if (com_addr(unit) == NULL) 134651078Speter return (ENXIO); 134751078Speter --com->wopeners; 134851078Speter if (error != 0 || com->gone) 134951078Speter goto out; 135051078Speter goto open_top; 135151078Speter } 135251078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 135351078Speter disc_optim(tp, &tp->t_termios, com); 135451078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 135551078Speter com->active_out = TRUE; 135651078Speter siosettimeout(); 135751078Speterout: 135851078Speter splx(s); 135951078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 136051078Speter comhardclose(com); 136151078Speter return (error); 136251078Speter} 136351078Speter 136451078Speterstatic int 136583366Sjuliansioclose(dev, flag, mode, td) 136651078Speter dev_t dev; 136751078Speter int flag; 136851078Speter int mode; 136983366Sjulian struct thread *td; 137051078Speter{ 137151078Speter struct com_s *com; 137251078Speter int mynor; 137351078Speter int s; 137451078Speter struct tty *tp; 137551078Speter 137651078Speter mynor = minor(dev); 137751078Speter if (mynor & CONTROL_MASK) 137851078Speter return (0); 137951078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 138057915Simp if (com == NULL) 138157915Simp return (ENODEV); 138251078Speter tp = com->tp; 138351078Speter s = spltty(); 138451078Speter (*linesw[tp->t_line].l_close)(tp, flag); 138551078Speter disc_optim(tp, &tp->t_termios, com); 138651654Sphk comstop(tp, FREAD | FWRITE); 138751078Speter comhardclose(com); 138851078Speter ttyclose(tp); 138951078Speter siosettimeout(); 139051078Speter splx(s); 139151078Speter if (com->gone) { 139251078Speter printf("sio%d: gone\n", com->unit); 139351078Speter s = spltty(); 139451078Speter if (com->ibuf != NULL) 139551078Speter free(com->ibuf, M_DEVBUF); 139651078Speter bzero(tp, sizeof *tp); 139751078Speter splx(s); 139851078Speter } 139951078Speter return (0); 140051078Speter} 140151078Speter 140251078Speterstatic void 140351078Spetercomhardclose(com) 140451078Speter struct com_s *com; 140551078Speter{ 140651078Speter int s; 140751078Speter struct tty *tp; 140851078Speter 140951078Speter s = spltty(); 141051078Speter com->poll = FALSE; 141151078Speter com->poll_output = FALSE; 141251078Speter com->do_timestamp = FALSE; 141351078Speter com->do_dcd_timestamp = FALSE; 141451078Speter com->pps.ppsparam.mode = 0; 141560471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 141678504Siedowse tp = com->tp; 141778504Siedowse 141878504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 141978504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 142078504Siedowse /* 142178504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 142278504Siedowse * console. This allows us to detect break-to-debugger events 142378504Siedowse * while the console device is closed. 142478504Siedowse */ 142578504Siedowse if (com->unit != comconsole) 142678504Siedowse#endif 142751078Speter { 142860471Snyan sio_setreg(com, com_ier, 0); 142951078Speter if (tp->t_cflag & HUPCL 143051078Speter /* 143151078Speter * XXX we will miss any carrier drop between here and the 143251078Speter * next open. Perhaps we should watch DCD even when the 143351078Speter * port is closed; it is not sufficient to check it at 143451078Speter * the next open because it might go up and down while 143551078Speter * we're not watching. 143651078Speter */ 143751078Speter || (!com->active_out 143851078Speter && !(com->prev_modem_status & MSR_DCD) 143951078Speter && !(com->it_in.c_cflag & CLOCAL)) 144051078Speter || !(tp->t_state & TS_ISOPEN)) { 144151078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 144251078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 144351078Speter timeout(siodtrwakeup, com, com->dtr_wait); 144451078Speter com->state |= CS_DTR_OFF; 144551078Speter } 144651078Speter } 144751078Speter } 144851078Speter if (com->hasfifo) { 144951078Speter /* 145051078Speter * Disable fifos so that they are off after controlled 145151078Speter * reboots. Some BIOSes fail to detect 16550s when the 145251078Speter * fifos are enabled. 145351078Speter */ 145460471Snyan sio_setreg(com, com_fifo, 0); 145551078Speter } 145651078Speter com->active_out = FALSE; 145751078Speter wakeup(&com->active_out); 145851078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 145951078Speter splx(s); 146051078Speter} 146151078Speter 146251078Speterstatic int 146351078Spetersioread(dev, uio, flag) 146451078Speter dev_t dev; 146551078Speter struct uio *uio; 146651078Speter int flag; 146751078Speter{ 146851078Speter int mynor; 146951078Speter struct com_s *com; 147051078Speter 147151078Speter mynor = minor(dev); 147251078Speter if (mynor & CONTROL_MASK) 147351078Speter return (ENODEV); 147451078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 147557915Simp if (com == NULL || com->gone) 147651078Speter return (ENODEV); 147751078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 147851078Speter} 147951078Speter 148051078Speterstatic int 148151078Spetersiowrite(dev, uio, flag) 148251078Speter dev_t dev; 148351078Speter struct uio *uio; 148451078Speter int flag; 148551078Speter{ 148651078Speter int mynor; 148751078Speter struct com_s *com; 148851078Speter int unit; 148951078Speter 149051078Speter mynor = minor(dev); 149151078Speter if (mynor & CONTROL_MASK) 149251078Speter return (ENODEV); 149351078Speter 149451078Speter unit = MINOR_TO_UNIT(mynor); 149551078Speter com = com_addr(unit); 149657915Simp if (com == NULL || com->gone) 149751078Speter return (ENODEV); 149851078Speter /* 149951078Speter * (XXX) We disallow virtual consoles if the physical console is 150051078Speter * a serial port. This is in case there is a display attached that 150151078Speter * is not the console. In that situation we don't need/want the X 150251078Speter * server taking over the console. 150351078Speter */ 150451078Speter if (constty != NULL && unit == comconsole) 150551078Speter constty = NULL; 150651078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 150751078Speter} 150851078Speter 150951078Speterstatic void 151051078Spetersiobusycheck(chan) 151151078Speter void *chan; 151251078Speter{ 151351078Speter struct com_s *com; 151451078Speter int s; 151551078Speter 151651078Speter com = (struct com_s *)chan; 151751078Speter 151851078Speter /* 151951078Speter * Clear TS_BUSY if low-level output is complete. 152051078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 152151078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 152251078Speter * called again. Reading the line status port outside of siointr1() 152351078Speter * is safe because CS_BUSY is clear so there are no output interrupts 152451078Speter * to lose. 152551078Speter */ 152651078Speter s = spltty(); 152751078Speter if (com->state & CS_BUSY) 152851078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 152951078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 153051078Speter == (LSR_TSRE | LSR_TXRDY)) { 153151078Speter com->tp->t_state &= ~TS_BUSY; 153251078Speter ttwwakeup(com->tp); 153351078Speter com->extra_state &= ~CSE_BUSYCHECK; 153451078Speter } else 153551078Speter timeout(siobusycheck, com, hz / 100); 153651078Speter splx(s); 153751078Speter} 153851078Speter 153989986Sjhaystatic u_int 154089986Sjhaysiodivisor(rclk, speed) 154189986Sjhay u_long rclk; 154289986Sjhay speed_t speed; 154389986Sjhay{ 154489986Sjhay long actual_speed; 154589986Sjhay u_int divisor; 154689986Sjhay int error; 154789986Sjhay 1548114334Speter if (speed == 0) 154989986Sjhay return (0); 1550114334Speter#if UINT_MAX > (ULONG_MAX - 1) / 8 1551114334Speter if (speed > (ULONG_MAX - 1) / 8) 1552114334Speter return (0); 1553114334Speter#endif 155489986Sjhay divisor = (rclk / (8UL * speed) + 1) / 2; 155589986Sjhay if (divisor == 0 || divisor >= 65536) 155689986Sjhay return (0); 155789986Sjhay actual_speed = rclk / (16UL * divisor); 155889986Sjhay 155989986Sjhay /* 10 times error in percent: */ 156089986Sjhay error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 156189986Sjhay 156289986Sjhay /* 3.0% maximum error tolerance: */ 156389986Sjhay if (error < -30 || error > 30) 156489986Sjhay return (0); 156589986Sjhay 156689986Sjhay return (divisor); 156789986Sjhay} 156889986Sjhay 156951078Speterstatic void 157051078Spetersiodtrwakeup(chan) 157151078Speter void *chan; 157251078Speter{ 157351078Speter struct com_s *com; 157451078Speter 157551078Speter com = (struct com_s *)chan; 157651078Speter com->state &= ~CS_DTR_OFF; 157751078Speter wakeup(&com->dtr_wait); 157851078Speter} 157951078Speter 158065557Sjasone/* 158170174Sjhb * Call this function with the sio_lock mutex held. It will return with the 158270174Sjhb * lock still held. 158365557Sjasone */ 158451078Speterstatic void 158551078Spetersioinput(com) 158651078Speter struct com_s *com; 158751078Speter{ 158851078Speter u_char *buf; 158951078Speter int incc; 159051078Speter u_char line_status; 159151078Speter int recv_data; 159251078Speter struct tty *tp; 159351078Speter 159451078Speter buf = com->ibuf; 159551078Speter tp = com->tp; 159651078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 159751078Speter com_events -= (com->iptr - com->ibuf); 159851078Speter com->iptr = com->ibuf; 159951078Speter return; 160051078Speter } 160151078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 160251078Speter /* 160351078Speter * Avoid the grotesquely inefficient lineswitch routine 160451078Speter * (ttyinput) in "raw" mode. It usually takes about 450 160551078Speter * instructions (that's without canonical processing or echo!). 160651078Speter * slinput is reasonably fast (usually 40 instructions plus 160751078Speter * call overhead). 160851078Speter */ 160951078Speter do { 161065557Sjasone /* 161165557Sjasone * This may look odd, but it is using save-and-enable 161265557Sjasone * semantics instead of the save-and-disable semantics 161365557Sjasone * that are used everywhere else. 161465557Sjasone */ 161572200Sbmilekic mtx_unlock_spin(&sio_lock); 161651078Speter incc = com->iptr - buf; 161751078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 161851078Speter && (com->state & CS_RTS_IFLOW 161951078Speter || tp->t_iflag & IXOFF) 162051078Speter && !(tp->t_state & TS_TBLOCK)) 162151078Speter ttyblock(tp); 162251078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 162351078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 162451078Speter buf += incc; 162551078Speter tk_nin += incc; 162651078Speter tk_rawcc += incc; 162751078Speter tp->t_rawcc += incc; 162851078Speter ttwakeup(tp); 162951078Speter if (tp->t_state & TS_TTSTOP 163051078Speter && (tp->t_iflag & IXANY 163151078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 163251078Speter tp->t_state &= ~TS_TTSTOP; 163351078Speter tp->t_lflag &= ~FLUSHO; 163451078Speter comstart(tp); 163551078Speter } 163672200Sbmilekic mtx_lock_spin(&sio_lock); 163751078Speter } while (buf < com->iptr); 163851078Speter } else { 163951078Speter do { 164065557Sjasone /* 164165557Sjasone * This may look odd, but it is using save-and-enable 164265557Sjasone * semantics instead of the save-and-disable semantics 164365557Sjasone * that are used everywhere else. 164465557Sjasone */ 164572200Sbmilekic mtx_unlock_spin(&sio_lock); 164651078Speter line_status = buf[com->ierroff]; 164751078Speter recv_data = *buf++; 164851078Speter if (line_status 164951078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 165051078Speter if (line_status & LSR_BI) 165151078Speter recv_data |= TTY_BI; 165251078Speter if (line_status & LSR_FE) 165351078Speter recv_data |= TTY_FE; 165451078Speter if (line_status & LSR_OE) 165551078Speter recv_data |= TTY_OE; 165651078Speter if (line_status & LSR_PE) 165751078Speter recv_data |= TTY_PE; 165851078Speter } 165951078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 166072200Sbmilekic mtx_lock_spin(&sio_lock); 166151078Speter } while (buf < com->iptr); 166251078Speter } 166351078Speter com_events -= (com->iptr - com->ibuf); 166451078Speter com->iptr = com->ibuf; 166551078Speter 166651078Speter /* 166751078Speter * There is now room for another low-level buffer full of input, 166851078Speter * so enable RTS if it is now disabled and there is room in the 166951078Speter * high-level buffer. 167051078Speter */ 167151078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 167251078Speter !(tp->t_state & TS_TBLOCK)) 167351078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 167451078Speter} 167551078Speter 1676104094Sphkstatic void 167751078Spetersiointr(arg) 167851078Speter void *arg; 167951078Speter{ 168070174Sjhb struct com_s *com; 168170174Sjhb 168251078Speter#ifndef COM_MULTIPORT 168370174Sjhb com = (struct com_s *)arg; 168470174Sjhb 168572200Sbmilekic mtx_lock_spin(&sio_lock); 168670174Sjhb siointr1(com); 168772200Sbmilekic mtx_unlock_spin(&sio_lock); 168851078Speter#else /* COM_MULTIPORT */ 168951078Speter bool_t possibly_more_intrs; 169051078Speter int unit; 169151078Speter 169251078Speter /* 169351078Speter * Loop until there is no activity on any port. This is necessary 169451078Speter * to get an interrupt edge more than to avoid another interrupt. 169551078Speter * If the IRQ signal is just an OR of the IRQ signals from several 169651078Speter * devices, then the edge from one may be lost because another is 169751078Speter * on. 169851078Speter */ 169972200Sbmilekic mtx_lock_spin(&sio_lock); 170051078Speter do { 170151078Speter possibly_more_intrs = FALSE; 170253344Speter for (unit = 0; unit < sio_numunits; ++unit) { 170351078Speter com = com_addr(unit); 170451078Speter /* 170551078Speter * XXX COM_LOCK(); 170651078Speter * would it work here, or be counter-productive? 170751078Speter */ 170851078Speter if (com != NULL 170951078Speter && !com->gone 171051078Speter && (inb(com->int_id_port) & IIR_IMASK) 171151078Speter != IIR_NOPEND) { 171251078Speter siointr1(com); 171351078Speter possibly_more_intrs = TRUE; 171451078Speter } 171551078Speter /* XXX COM_UNLOCK(); */ 171651078Speter } 171751078Speter } while (possibly_more_intrs); 171872200Sbmilekic mtx_unlock_spin(&sio_lock); 171951078Speter#endif /* COM_MULTIPORT */ 172051078Speter} 172151078Speter 172293466Sbdestatic struct timespec siots[8192]; 172393466Sbdestatic int siotso; 172493466Sbdestatic int volatile siotsunit = -1; 172593466Sbde 172693466Sbdestatic int 172793466Sbdesysctl_siots(SYSCTL_HANDLER_ARGS) 172893466Sbde{ 172993466Sbde char buf[128]; 173093466Sbde long long delta; 173193466Sbde size_t len; 173293466Sbde int error, i; 173393466Sbde 173493466Sbde for (i = 1; i < siotso; i++) { 173593466Sbde delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 173693466Sbde 1000000000 + 173793466Sbde (siots[i].tv_nsec - siots[i - 1].tv_nsec); 173893466Sbde len = sprintf(buf, "%lld\n", delta); 173993466Sbde if (delta >= 110000) 174093466Sbde len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 174193466Sbde (long)siots[i].tv_sec, siots[i].tv_nsec); 174293466Sbde if (i == siotso - 1) 174393466Sbde buf[len - 1] = '\0'; 174493466Sbde error = SYSCTL_OUT(req, buf, len); 174593466Sbde if (error != 0) 174693466Sbde return (error); 174793466Sbde uio_yield(); 174893466Sbde } 174993466Sbde return (0); 175093466Sbde} 175193466Sbde 175293466SbdeSYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 175393466Sbde 0, 0, sysctl_siots, "A", "sio timestamps"); 175493466Sbde 175551078Speterstatic void 175651078Spetersiointr1(com) 175751078Speter struct com_s *com; 175851078Speter{ 175951078Speter u_char line_status; 176051078Speter u_char modem_status; 176151078Speter u_char *ioptr; 176251078Speter u_char recv_data; 176351078Speter u_char int_ctl; 176451078Speter u_char int_ctl_new; 176551078Speter 176651078Speter int_ctl = inb(com->intr_ctl_port); 176751078Speter int_ctl_new = int_ctl; 176851078Speter 176951078Speter while (!com->gone) { 177051078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 177151078Speter modem_status = inb(com->modem_status_port); 1772111613Sphk if ((modem_status ^ com->last_modem_status) & 1773111613Sphk com->pps_bit) { 177495523Sphk pps_capture(&com->pps); 1775111613Sphk pps_event(&com->pps, 1776111616Sphk (modem_status & com->pps_bit) ? 177751078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 177851078Speter } 177951078Speter } 178051078Speter line_status = inb(com->line_status_port); 178151078Speter 178251078Speter /* input event? (check first to help avoid overruns) */ 178351078Speter while (line_status & LSR_RCV_MASK) { 178451078Speter /* break/unnattached error bits or real input? */ 178551078Speter if (!(line_status & LSR_RXRDY)) 178651078Speter recv_data = 0; 178751078Speter else 178851078Speter recv_data = inb(com->data_port); 178961649Sps#if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 179061649Sps /* 179161649Sps * Solaris implements a new BREAK which is initiated 179261649Sps * by a character sequence CR ~ ^b which is similar 179361649Sps * to a familiar pattern used on Sun servers by the 179461649Sps * Remote Console. 179561649Sps */ 179661649Sps#define KEY_CRTLB 2 /* ^B */ 179761649Sps#define KEY_CR 13 /* CR '\r' */ 179861649Sps#define KEY_TILDE 126 /* ~ */ 179961649Sps 180061649Sps if (com->unit == comconsole) { 180161649Sps static int brk_state1 = 0, brk_state2 = 0; 180261649Sps if (recv_data == KEY_CR) { 180361649Sps brk_state1 = recv_data; 180461649Sps brk_state2 = 0; 180565557Sjasone } else if (brk_state1 == KEY_CR 180665557Sjasone && (recv_data == KEY_TILDE 180765557Sjasone || recv_data == KEY_CRTLB)) { 180861649Sps if (recv_data == KEY_TILDE) 180961649Sps brk_state2 = recv_data; 181065557Sjasone else if (brk_state2 == KEY_TILDE 181165557Sjasone && recv_data == KEY_CRTLB) { 181261649Sps breakpoint(); 181365557Sjasone brk_state1 = 0; 181465557Sjasone brk_state2 = 0; 181561649Sps goto cont; 181661649Sps } else 181761649Sps brk_state2 = 0; 181861649Sps } else 181961649Sps brk_state1 = 0; 182061649Sps } 182161649Sps#endif 182251078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 182351078Speter /* 182451078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 182551078Speter * Otherwise, push the work to a higher level 182651078Speter * (to handle PARMRK) if we're bypassing. 182751078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 182851078Speter * 182951078Speter * This makes bypassing work right in the 183051078Speter * usual "raw" case (IGNBRK set, and IGNPAR 183151078Speter * and INPCK clear). 183251078Speter * 183351078Speter * Note: BI together with FE/PE means just BI. 183451078Speter */ 183551078Speter if (line_status & LSR_BI) { 183651078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 183751078Speter if (com->unit == comconsole) { 183851078Speter breakpoint(); 183951078Speter goto cont; 184051078Speter } 184151078Speter#endif 184251078Speter if (com->tp == NULL 184351078Speter || com->tp->t_iflag & IGNBRK) 184451078Speter goto cont; 184551078Speter } else { 184651078Speter if (com->tp == NULL 184751078Speter || com->tp->t_iflag & IGNPAR) 184851078Speter goto cont; 184951078Speter } 185051078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 185151078Speter && (line_status & (LSR_BI | LSR_FE) 185251078Speter || com->tp->t_iflag & INPCK)) 185351078Speter recv_data = 0; 185451078Speter } 185551078Speter ++com->bytes_in; 185651078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 185788900Sjhb swi_sched(sio_fast_ih, 0); 185851078Speter ioptr = com->iptr; 185951078Speter if (ioptr >= com->ibufend) 186051078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 186151078Speter else { 186251078Speter if (com->do_timestamp) 186351078Speter microtime(&com->timestamp); 186451078Speter ++com_events; 186572238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 186651078Speter#if 0 /* for testing input latency vs efficiency */ 186751078Speterif (com->iptr - com->ibuf == 8) 186888900Sjhb swi_sched(sio_fast_ih, 0); 186951078Speter#endif 187051078Speter ioptr[0] = recv_data; 187151078Speter ioptr[com->ierroff] = line_status; 187251078Speter com->iptr = ++ioptr; 187351078Speter if (ioptr == com->ihighwater 187451078Speter && com->state & CS_RTS_IFLOW) 187551078Speter outb(com->modem_ctl_port, 187651078Speter com->mcr_image &= ~MCR_RTS); 187751078Speter if (line_status & LSR_OE) 187851078Speter CE_RECORD(com, CE_OVERRUN); 187951078Speter } 188051078Spetercont: 188151078Speter /* 188251078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 188351078Speter * jump from the top of the loop to here 188451078Speter */ 188551078Speter line_status = inb(com->line_status_port) & 0x7F; 188651078Speter } 188751078Speter 188851078Speter /* modem status change? (always check before doing output) */ 188951078Speter modem_status = inb(com->modem_status_port); 189051078Speter if (modem_status != com->last_modem_status) { 189151078Speter if (com->do_dcd_timestamp 189251078Speter && !(com->last_modem_status & MSR_DCD) 189351078Speter && modem_status & MSR_DCD) 189451078Speter microtime(&com->dcd_timestamp); 189551078Speter 189651078Speter /* 189751078Speter * Schedule high level to handle DCD changes. Note 189851078Speter * that we don't use the delta bits anywhere. Some 189951078Speter * UARTs mess them up, and it's easy to remember the 190051078Speter * previous bits and calculate the delta. 190151078Speter */ 190251078Speter com->last_modem_status = modem_status; 190351078Speter if (!(com->state & CS_CHECKMSR)) { 190451078Speter com_events += LOTS_OF_EVENTS; 190551078Speter com->state |= CS_CHECKMSR; 190688900Sjhb swi_sched(sio_fast_ih, 0); 190751078Speter } 190851078Speter 190951078Speter /* handle CTS change immediately for crisp flow ctl */ 191051078Speter if (com->state & CS_CTS_OFLOW) { 191151078Speter if (modem_status & MSR_CTS) 191251078Speter com->state |= CS_ODEVREADY; 191351078Speter else 191451078Speter com->state &= ~CS_ODEVREADY; 191551078Speter } 191651078Speter } 191751078Speter 191851078Speter /* output queued and everything ready? */ 191951078Speter if (line_status & LSR_TXRDY 192051078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 192151078Speter ioptr = com->obufq.l_head; 192293466Sbde if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 192351078Speter u_int ocount; 192451078Speter 192551078Speter ocount = com->obufq.l_tail - ioptr; 192651078Speter if (ocount > com->tx_fifo_size) 192751078Speter ocount = com->tx_fifo_size; 192851078Speter com->bytes_out += ocount; 192951078Speter do 193051078Speter outb(com->data_port, *ioptr++); 193151078Speter while (--ocount != 0); 193251078Speter } else { 193351078Speter outb(com->data_port, *ioptr++); 193451078Speter ++com->bytes_out; 193593466Sbde if (com->unit == siotsunit) { 193693466Sbde nanouptime(&siots[siotso]); 193793466Sbde siotso = (siotso + 1) % 193893466Sbde (sizeof siots / sizeof siots[0]); 193993466Sbde } 194051078Speter } 194151078Speter com->obufq.l_head = ioptr; 194251078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 194351078Speter int_ctl_new = int_ctl | IER_ETXRDY; 194451078Speter } 194551078Speter if (ioptr >= com->obufq.l_tail) { 194651078Speter struct lbq *qp; 194751078Speter 194851078Speter qp = com->obufq.l_next; 194951078Speter qp->l_queued = FALSE; 195051078Speter qp = qp->l_next; 195151078Speter if (qp != NULL) { 195251078Speter com->obufq.l_head = qp->l_head; 195351078Speter com->obufq.l_tail = qp->l_tail; 195451078Speter com->obufq.l_next = qp; 195551078Speter } else { 195651078Speter /* output just completed */ 195753344Speter if (COM_IIR_TXRDYBUG(com->flags)) { 195851078Speter int_ctl_new = int_ctl & ~IER_ETXRDY; 195951078Speter } 196051078Speter com->state &= ~CS_BUSY; 196151078Speter } 196251078Speter if (!(com->state & CS_ODONE)) { 196351078Speter com_events += LOTS_OF_EVENTS; 196451078Speter com->state |= CS_ODONE; 196567551Sjhb /* handle at high level ASAP */ 196688900Sjhb swi_sched(sio_fast_ih, 0); 196751078Speter } 196851078Speter } 196953344Speter if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 197051078Speter outb(com->intr_ctl_port, int_ctl_new); 197151078Speter } 197251078Speter } 197351078Speter 197451078Speter /* finished? */ 197551078Speter#ifndef COM_MULTIPORT 197651078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 197751078Speter#endif /* COM_MULTIPORT */ 197851078Speter return; 197951078Speter } 198051078Speter} 198151078Speter 198251078Speterstatic int 198383366Sjuliansioioctl(dev, cmd, data, flag, td) 198451078Speter dev_t dev; 198551078Speter u_long cmd; 198651078Speter caddr_t data; 198751078Speter int flag; 198883366Sjulian struct thread *td; 198951078Speter{ 199051078Speter struct com_s *com; 199151078Speter int error; 199251078Speter int mynor; 199351078Speter int s; 199451078Speter struct tty *tp; 199551078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 199651078Speter u_long oldcmd; 199751078Speter struct termios term; 199851078Speter#endif 199951078Speter 200051078Speter mynor = minor(dev); 200151078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 200257915Simp if (com == NULL || com->gone) 200351078Speter return (ENODEV); 200451078Speter if (mynor & CONTROL_MASK) { 200551078Speter struct termios *ct; 200651078Speter 200751078Speter switch (mynor & CONTROL_MASK) { 200851078Speter case CONTROL_INIT_STATE: 200951078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 201051078Speter break; 201151078Speter case CONTROL_LOCK_STATE: 201251078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 201351078Speter break; 201451078Speter default: 201551078Speter return (ENODEV); /* /dev/nodev */ 201651078Speter } 201751078Speter switch (cmd) { 201851078Speter case TIOCSETA: 201993593Sjhb error = suser(td); 202051078Speter if (error != 0) 202151078Speter return (error); 202251078Speter *ct = *(struct termios *)data; 202351078Speter return (0); 202451078Speter case TIOCGETA: 202551078Speter *(struct termios *)data = *ct; 202651078Speter return (0); 202751078Speter case TIOCGETD: 202851078Speter *(int *)data = TTYDISC; 202951078Speter return (0); 203051078Speter case TIOCGWINSZ: 203151078Speter bzero(data, sizeof(struct winsize)); 203251078Speter return (0); 203351078Speter default: 203451078Speter return (ENOTTY); 203551078Speter } 203651078Speter } 203751078Speter tp = com->tp; 203851078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 203951078Speter term = tp->t_termios; 204051078Speter oldcmd = cmd; 204151078Speter error = ttsetcompat(tp, &cmd, data, &term); 204251078Speter if (error != 0) 204351078Speter return (error); 204451078Speter if (cmd != oldcmd) 204551078Speter data = (caddr_t)&term; 204651078Speter#endif 204751078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 204851078Speter int cc; 204951078Speter struct termios *dt = (struct termios *)data; 205051078Speter struct termios *lt = mynor & CALLOUT_MASK 205151078Speter ? &com->lt_out : &com->lt_in; 205251078Speter 205351078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 205451078Speter | (dt->c_iflag & ~lt->c_iflag); 205551078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 205651078Speter | (dt->c_oflag & ~lt->c_oflag); 205751078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 205851078Speter | (dt->c_cflag & ~lt->c_cflag); 205951078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 206051078Speter | (dt->c_lflag & ~lt->c_lflag); 206151078Speter for (cc = 0; cc < NCCS; ++cc) 206251078Speter if (lt->c_cc[cc] != 0) 206351078Speter dt->c_cc[cc] = tp->t_cc[cc]; 206451078Speter if (lt->c_ispeed != 0) 206551078Speter dt->c_ispeed = tp->t_ispeed; 206651078Speter if (lt->c_ospeed != 0) 206751078Speter dt->c_ospeed = tp->t_ospeed; 206851078Speter } 206983366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 207051078Speter if (error != ENOIOCTL) 207151078Speter return (error); 207251078Speter s = spltty(); 207351078Speter error = ttioctl(tp, cmd, data, flag); 207451078Speter disc_optim(tp, &tp->t_termios, com); 207551078Speter if (error != ENOIOCTL) { 207651078Speter splx(s); 207751078Speter return (error); 207851078Speter } 207951078Speter switch (cmd) { 208051078Speter case TIOCSBRK: 208160471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 208251078Speter break; 208351078Speter case TIOCCBRK: 208460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 208551078Speter break; 208651078Speter case TIOCSDTR: 208751078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 208851078Speter break; 208951078Speter case TIOCCDTR: 209051078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 209151078Speter break; 209251078Speter /* 209351078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 209451078Speter * changes get undone on the next call to comparam(). 209551078Speter */ 209651078Speter case TIOCMSET: 209751078Speter (void)commctl(com, *(int *)data, DMSET); 209851078Speter break; 209951078Speter case TIOCMBIS: 210051078Speter (void)commctl(com, *(int *)data, DMBIS); 210151078Speter break; 210251078Speter case TIOCMBIC: 210351078Speter (void)commctl(com, *(int *)data, DMBIC); 210451078Speter break; 210551078Speter case TIOCMGET: 210651078Speter *(int *)data = commctl(com, 0, DMGET); 210751078Speter break; 210851078Speter case TIOCMSDTRWAIT: 210951078Speter /* must be root since the wait applies to following logins */ 211093593Sjhb error = suser(td); 211151078Speter if (error != 0) { 211251078Speter splx(s); 211351078Speter return (error); 211451078Speter } 211551078Speter com->dtr_wait = *(int *)data * hz / 100; 211651078Speter break; 211751078Speter case TIOCMGDTRWAIT: 211851078Speter *(int *)data = com->dtr_wait * 100 / hz; 211951078Speter break; 212051078Speter case TIOCTIMESTAMP: 212151078Speter com->do_timestamp = TRUE; 212251078Speter *(struct timeval *)data = com->timestamp; 212351078Speter break; 212451078Speter case TIOCDCDTIMESTAMP: 212551078Speter com->do_dcd_timestamp = TRUE; 212651078Speter *(struct timeval *)data = com->dcd_timestamp; 212751078Speter break; 212851078Speter default: 212951078Speter splx(s); 213051078Speter error = pps_ioctl(cmd, data, &com->pps); 213151078Speter if (error == ENODEV) 213251078Speter error = ENOTTY; 213351078Speter return (error); 213451078Speter } 213551078Speter splx(s); 213651078Speter return (0); 213751078Speter} 213851078Speter 213965557Sjasone/* software interrupt handler for SWI_TTY */ 214051078Speterstatic void 214167551Sjhbsiopoll(void *dummy) 214251078Speter{ 214351078Speter int unit; 214451078Speter 214551078Speter if (com_events == 0) 214651078Speter return; 214751078Speterrepeat: 214853344Speter for (unit = 0; unit < sio_numunits; ++unit) { 214951078Speter struct com_s *com; 215051078Speter int incc; 215151078Speter struct tty *tp; 215251078Speter 215351078Speter com = com_addr(unit); 215451078Speter if (com == NULL) 215551078Speter continue; 215651078Speter tp = com->tp; 215751078Speter if (tp == NULL || com->gone) { 215851078Speter /* 215951078Speter * Discard any events related to never-opened or 216051078Speter * going-away devices. 216151078Speter */ 216272200Sbmilekic mtx_lock_spin(&sio_lock); 216351078Speter incc = com->iptr - com->ibuf; 216451078Speter com->iptr = com->ibuf; 216551078Speter if (com->state & CS_CHECKMSR) { 216651078Speter incc += LOTS_OF_EVENTS; 216751078Speter com->state &= ~CS_CHECKMSR; 216851078Speter } 216951078Speter com_events -= incc; 217072200Sbmilekic mtx_unlock_spin(&sio_lock); 217151078Speter continue; 217251078Speter } 217351078Speter if (com->iptr != com->ibuf) { 217472200Sbmilekic mtx_lock_spin(&sio_lock); 217551078Speter sioinput(com); 217672200Sbmilekic mtx_unlock_spin(&sio_lock); 217751078Speter } 217851078Speter if (com->state & CS_CHECKMSR) { 217951078Speter u_char delta_modem_status; 218051078Speter 218172200Sbmilekic mtx_lock_spin(&sio_lock); 218251078Speter delta_modem_status = com->last_modem_status 218351078Speter ^ com->prev_modem_status; 218451078Speter com->prev_modem_status = com->last_modem_status; 218551078Speter com_events -= LOTS_OF_EVENTS; 218651078Speter com->state &= ~CS_CHECKMSR; 218772200Sbmilekic mtx_unlock_spin(&sio_lock); 218851078Speter if (delta_modem_status & MSR_DCD) 218951078Speter (*linesw[tp->t_line].l_modem) 219051078Speter (tp, com->prev_modem_status & MSR_DCD); 219151078Speter } 219251078Speter if (com->state & CS_ODONE) { 219372200Sbmilekic mtx_lock_spin(&sio_lock); 219451078Speter com_events -= LOTS_OF_EVENTS; 219551078Speter com->state &= ~CS_ODONE; 219672200Sbmilekic mtx_unlock_spin(&sio_lock); 219751078Speter if (!(com->state & CS_BUSY) 219851078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 219951078Speter timeout(siobusycheck, com, hz / 100); 220051078Speter com->extra_state |= CSE_BUSYCHECK; 220151078Speter } 220251078Speter (*linesw[tp->t_line].l_start)(tp); 220351078Speter } 220451078Speter if (com_events == 0) 220551078Speter break; 220651078Speter } 220751078Speter if (com_events >= LOTS_OF_EVENTS) 220851078Speter goto repeat; 220951078Speter} 221051078Speter 221151078Speterstatic int 221251078Spetercomparam(tp, t) 221351078Speter struct tty *tp; 221451078Speter struct termios *t; 221551078Speter{ 221651078Speter u_int cfcr; 221751078Speter int cflag; 221851078Speter struct com_s *com; 221989986Sjhay u_int divisor; 222051078Speter u_char dlbh; 222151078Speter u_char dlbl; 222251078Speter int s; 222351078Speter int unit; 222451078Speter 222589986Sjhay unit = DEV_TO_UNIT(tp->t_dev); 222689986Sjhay com = com_addr(unit); 222789986Sjhay if (com == NULL) 222889986Sjhay return (ENODEV); 222989986Sjhay 223051078Speter /* do historical conversions */ 223151078Speter if (t->c_ispeed == 0) 223251078Speter t->c_ispeed = t->c_ospeed; 223351078Speter 223451078Speter /* check requested parameters */ 223589986Sjhay if (t->c_ospeed == 0) 223689986Sjhay divisor = 0; 223789986Sjhay else { 223889986Sjhay if (t->c_ispeed != t->c_ospeed) 223989986Sjhay return (EINVAL); 224089986Sjhay divisor = siodivisor(com->rclk, t->c_ispeed); 224189986Sjhay if (divisor == 0) 224289986Sjhay return (EINVAL); 224389986Sjhay } 224451078Speter 224551078Speter /* parameters are OK, convert them to the com struct and the device */ 224651078Speter s = spltty(); 224751078Speter if (divisor == 0) 224851078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 224951078Speter else 225051078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 225151078Speter cflag = t->c_cflag; 225251078Speter switch (cflag & CSIZE) { 225351078Speter case CS5: 225451078Speter cfcr = CFCR_5BITS; 225551078Speter break; 225651078Speter case CS6: 225751078Speter cfcr = CFCR_6BITS; 225851078Speter break; 225951078Speter case CS7: 226051078Speter cfcr = CFCR_7BITS; 226151078Speter break; 226251078Speter default: 226351078Speter cfcr = CFCR_8BITS; 226451078Speter break; 226551078Speter } 226651078Speter if (cflag & PARENB) { 226751078Speter cfcr |= CFCR_PENAB; 226851078Speter if (!(cflag & PARODD)) 226951078Speter cfcr |= CFCR_PEVEN; 227051078Speter } 227151078Speter if (cflag & CSTOPB) 227251078Speter cfcr |= CFCR_STOPB; 227351078Speter 227451078Speter if (com->hasfifo && divisor != 0) { 227551078Speter /* 227651078Speter * Use a fifo trigger level low enough so that the input 227751078Speter * latency from the fifo is less than about 16 msec and 227851078Speter * the total latency is less than about 30 msec. These 227951078Speter * latencies are reasonable for humans. Serial comms 228051078Speter * protocols shouldn't expect anything better since modem 228151078Speter * latencies are larger. 228288433Sdillon * 228388433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 228488433Sdillon * speed connections without further work on reducing 228588433Sdillon * interrupt disablement times in other parts of the system, 228688433Sdillon * without producing silo overflow errors. 228751078Speter */ 228893466Sbde com->fifo_image = com->unit == siotsunit ? 0 228993466Sbde : t->c_ospeed <= 4800 229088451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 229151078Speter#ifdef COM_ESP 229251078Speter /* 229351078Speter * The Hayes ESP card needs the fifo DMA mode bit set 229451078Speter * in compatibility mode. If not, it will interrupt 229551078Speter * for each character received. 229651078Speter */ 229751078Speter if (com->esp) 229851078Speter com->fifo_image |= FIFO_DMA_MODE; 229951078Speter#endif 230060471Snyan sio_setreg(com, com_fifo, com->fifo_image); 230151078Speter } 230251078Speter 230365605Sjhb /* 230465605Sjhb * This returns with interrupts disabled so that we can complete 230565605Sjhb * the speed change atomically. Keeping interrupts disabled is 230665605Sjhb * especially important while com_data is hidden. 230765605Sjhb */ 230865605Sjhb (void) siosetwater(com, t->c_ispeed); 230965557Sjasone 231051078Speter if (divisor != 0) { 231160471Snyan sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 231251078Speter /* 231351078Speter * Only set the divisor registers if they would change, 231451078Speter * since on some 16550 incompatibles (UMC8669F), setting 231551078Speter * them while input is arriving them loses sync until 231651078Speter * data stops arriving. 231751078Speter */ 231851078Speter dlbl = divisor & 0xFF; 231960471Snyan if (sio_getreg(com, com_dlbl) != dlbl) 232060471Snyan sio_setreg(com, com_dlbl, dlbl); 232189986Sjhay dlbh = divisor >> 8; 232260471Snyan if (sio_getreg(com, com_dlbh) != dlbh) 232360471Snyan sio_setreg(com, com_dlbh, dlbh); 232451078Speter } 232551078Speter 232660471Snyan sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 232751078Speter 232851078Speter if (!(tp->t_state & TS_TTSTOP)) 232951078Speter com->state |= CS_TTGO; 233051078Speter 233151078Speter if (cflag & CRTS_IFLOW) { 233251078Speter if (com->st16650a) { 233360471Snyan sio_setreg(com, com_cfcr, 0xbf); 233460471Snyan sio_setreg(com, com_fifo, 233560471Snyan sio_getreg(com, com_fifo) | 0x40); 233651078Speter } 233751078Speter com->state |= CS_RTS_IFLOW; 233851078Speter /* 233951078Speter * If CS_RTS_IFLOW just changed from off to on, the change 234051078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 234151078Speter * so do it later by calling comstart() instead of repeating 234251078Speter * a lot of code from comstart() here. 234351078Speter */ 234451078Speter } else if (com->state & CS_RTS_IFLOW) { 234551078Speter com->state &= ~CS_RTS_IFLOW; 234651078Speter /* 234751078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 234851078Speter * on here, since comstart() won't do it later. 234951078Speter */ 235051078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 235151078Speter if (com->st16650a) { 235260471Snyan sio_setreg(com, com_cfcr, 0xbf); 235360471Snyan sio_setreg(com, com_fifo, 235460471Snyan sio_getreg(com, com_fifo) & ~0x40); 235551078Speter } 235651078Speter } 235751078Speter 235851078Speter 235951078Speter /* 236051078Speter * Set up state to handle output flow control. 236151078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 236251078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 236351078Speter */ 236451078Speter com->state |= CS_ODEVREADY; 236551078Speter com->state &= ~CS_CTS_OFLOW; 236651078Speter if (cflag & CCTS_OFLOW) { 236751078Speter com->state |= CS_CTS_OFLOW; 236851078Speter if (!(com->last_modem_status & MSR_CTS)) 236951078Speter com->state &= ~CS_ODEVREADY; 237051078Speter if (com->st16650a) { 237160471Snyan sio_setreg(com, com_cfcr, 0xbf); 237260471Snyan sio_setreg(com, com_fifo, 237360471Snyan sio_getreg(com, com_fifo) | 0x80); 237451078Speter } 237551078Speter } else { 237651078Speter if (com->st16650a) { 237760471Snyan sio_setreg(com, com_cfcr, 0xbf); 237860471Snyan sio_setreg(com, com_fifo, 237960471Snyan sio_getreg(com, com_fifo) & ~0x80); 238051078Speter } 238151078Speter } 238251078Speter 238360471Snyan sio_setreg(com, com_cfcr, com->cfcr_image); 238451078Speter 238551078Speter /* XXX shouldn't call functions while intrs are disabled. */ 238651078Speter disc_optim(tp, t, com); 238751078Speter /* 238851078Speter * Recover from fiddling with CS_TTGO. We used to call siointr1() 238951078Speter * unconditionally, but that defeated the careful discarding of 239051078Speter * stale input in sioopen(). 239151078Speter */ 239251078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 239351078Speter siointr1(com); 239451078Speter 239572200Sbmilekic mtx_unlock_spin(&sio_lock); 239651078Speter splx(s); 239751078Speter comstart(tp); 239851078Speter if (com->ibufold != NULL) { 239951078Speter free(com->ibufold, M_DEVBUF); 240051078Speter com->ibufold = NULL; 240151078Speter } 240251078Speter return (0); 240351078Speter} 240451078Speter 240565605Sjhb/* 240670174Sjhb * This function must be called with the sio_lock mutex released and will 240770174Sjhb * return with it obtained. 240865605Sjhb */ 240951078Speterstatic int 241065605Sjhbsiosetwater(com, speed) 241151078Speter struct com_s *com; 241251078Speter speed_t speed; 241351078Speter{ 241451078Speter int cp4ticks; 241551078Speter u_char *ibuf; 241651078Speter int ibufsize; 241751078Speter struct tty *tp; 241851078Speter 241951078Speter /* 242051078Speter * Make the buffer size large enough to handle a softtty interrupt 242151078Speter * latency of about 2 ticks without loss of throughput or data 242251078Speter * (about 3 ticks if input flow control is not used or not honoured, 242351078Speter * but a bit less for CS5-CS7 modes). 242451078Speter */ 242551078Speter cp4ticks = speed / 10 / hz * 4; 242651078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 242751078Speter ibufsize <<= 1; 242865605Sjhb if (ibufsize == com->ibufsize) { 242972200Sbmilekic mtx_lock_spin(&sio_lock); 243051078Speter return (0); 243165605Sjhb } 243251078Speter 243351078Speter /* 243451078Speter * Allocate input buffer. The extra factor of 2 in the size is 243551078Speter * to allow for an error byte for each input byte. 243651078Speter */ 243751078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 243865605Sjhb if (ibuf == NULL) { 243972200Sbmilekic mtx_lock_spin(&sio_lock); 244051078Speter return (ENOMEM); 244165605Sjhb } 244251078Speter 244351078Speter /* Initialize non-critical variables. */ 244451078Speter com->ibufold = com->ibuf; 244551078Speter com->ibufsize = ibufsize; 244651078Speter tp = com->tp; 244751078Speter if (tp != NULL) { 244851078Speter tp->t_ififosize = 2 * ibufsize; 244951078Speter tp->t_ispeedwat = (speed_t)-1; 245051078Speter tp->t_ospeedwat = (speed_t)-1; 245151078Speter } 245251078Speter 245351078Speter /* 245451078Speter * Read current input buffer, if any. Continue with interrupts 245551078Speter * disabled. 245651078Speter */ 245772200Sbmilekic mtx_lock_spin(&sio_lock); 245851078Speter if (com->iptr != com->ibuf) 245951078Speter sioinput(com); 246051078Speter 246151078Speter /*- 246251078Speter * Initialize critical variables, including input buffer watermarks. 246351078Speter * The external device is asked to stop sending when the buffer 246451078Speter * exactly reaches high water, or when the high level requests it. 246551078Speter * The high level is notified immediately (rather than at a later 246651078Speter * clock tick) when this watermark is reached. 246751078Speter * The buffer size is chosen so the watermark should almost never 246851078Speter * be reached. 246951078Speter * The low watermark is invisibly 0 since the buffer is always 247051078Speter * emptied all at once. 247151078Speter */ 247251078Speter com->iptr = com->ibuf = ibuf; 247351078Speter com->ibufend = ibuf + ibufsize; 247451078Speter com->ierroff = ibufsize; 247551078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 247651078Speter return (0); 247751078Speter} 247851078Speter 247951078Speterstatic void 248051078Spetercomstart(tp) 248151078Speter struct tty *tp; 248251078Speter{ 248351078Speter struct com_s *com; 248451078Speter int s; 248551078Speter int unit; 248651078Speter 248751078Speter unit = DEV_TO_UNIT(tp->t_dev); 248851078Speter com = com_addr(unit); 248957915Simp if (com == NULL) 249057915Simp return; 249151078Speter s = spltty(); 249272200Sbmilekic mtx_lock_spin(&sio_lock); 249351078Speter if (tp->t_state & TS_TTSTOP) 249451078Speter com->state &= ~CS_TTGO; 249551078Speter else 249651078Speter com->state |= CS_TTGO; 249751078Speter if (tp->t_state & TS_TBLOCK) { 249851078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 249951078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 250051078Speter } else { 250151078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 250251078Speter && com->state & CS_RTS_IFLOW) 250351078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 250451078Speter } 250572200Sbmilekic mtx_unlock_spin(&sio_lock); 250651078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 250751078Speter ttwwakeup(tp); 250851078Speter splx(s); 250951078Speter return; 251051078Speter } 251151078Speter if (tp->t_outq.c_cc != 0) { 251251078Speter struct lbq *qp; 251351078Speter struct lbq *next; 251451078Speter 251551078Speter if (!com->obufs[0].l_queued) { 251651078Speter com->obufs[0].l_tail 251751078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 251851078Speter sizeof com->obuf1); 251951078Speter com->obufs[0].l_next = NULL; 252051078Speter com->obufs[0].l_queued = TRUE; 252172200Sbmilekic mtx_lock_spin(&sio_lock); 252251078Speter if (com->state & CS_BUSY) { 252351078Speter qp = com->obufq.l_next; 252451078Speter while ((next = qp->l_next) != NULL) 252551078Speter qp = next; 252651078Speter qp->l_next = &com->obufs[0]; 252751078Speter } else { 252851078Speter com->obufq.l_head = com->obufs[0].l_head; 252951078Speter com->obufq.l_tail = com->obufs[0].l_tail; 253051078Speter com->obufq.l_next = &com->obufs[0]; 253151078Speter com->state |= CS_BUSY; 253251078Speter } 253372200Sbmilekic mtx_unlock_spin(&sio_lock); 253451078Speter } 253551078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 253651078Speter com->obufs[1].l_tail 253751078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 253851078Speter sizeof com->obuf2); 253951078Speter com->obufs[1].l_next = NULL; 254051078Speter com->obufs[1].l_queued = TRUE; 254172200Sbmilekic mtx_lock_spin(&sio_lock); 254251078Speter if (com->state & CS_BUSY) { 254351078Speter qp = com->obufq.l_next; 254451078Speter while ((next = qp->l_next) != NULL) 254551078Speter qp = next; 254651078Speter qp->l_next = &com->obufs[1]; 254751078Speter } else { 254851078Speter com->obufq.l_head = com->obufs[1].l_head; 254951078Speter com->obufq.l_tail = com->obufs[1].l_tail; 255051078Speter com->obufq.l_next = &com->obufs[1]; 255151078Speter com->state |= CS_BUSY; 255251078Speter } 255372200Sbmilekic mtx_unlock_spin(&sio_lock); 255451078Speter } 255551078Speter tp->t_state |= TS_BUSY; 255651078Speter } 255772200Sbmilekic mtx_lock_spin(&sio_lock); 255851078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 255951078Speter siointr1(com); /* fake interrupt to start output */ 256072200Sbmilekic mtx_unlock_spin(&sio_lock); 256151078Speter ttwwakeup(tp); 256251078Speter splx(s); 256351078Speter} 256451078Speter 256551078Speterstatic void 256651654Sphkcomstop(tp, rw) 256751078Speter struct tty *tp; 256851078Speter int rw; 256951078Speter{ 257051078Speter struct com_s *com; 257151078Speter 257251078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 257357915Simp if (com == NULL || com->gone) 257451078Speter return; 257572200Sbmilekic mtx_lock_spin(&sio_lock); 257651078Speter if (rw & FWRITE) { 257751078Speter if (com->hasfifo) 257851078Speter#ifdef COM_ESP 257951078Speter /* XXX avoid h/w bug. */ 258051078Speter if (!com->esp) 258151078Speter#endif 258260471Snyan sio_setreg(com, com_fifo, 258360471Snyan FIFO_XMT_RST | com->fifo_image); 258451078Speter com->obufs[0].l_queued = FALSE; 258551078Speter com->obufs[1].l_queued = FALSE; 258651078Speter if (com->state & CS_ODONE) 258751078Speter com_events -= LOTS_OF_EVENTS; 258851078Speter com->state &= ~(CS_ODONE | CS_BUSY); 258951078Speter com->tp->t_state &= ~TS_BUSY; 259051078Speter } 259151078Speter if (rw & FREAD) { 259251078Speter if (com->hasfifo) 259351078Speter#ifdef COM_ESP 259451078Speter /* XXX avoid h/w bug. */ 259551078Speter if (!com->esp) 259651078Speter#endif 259760471Snyan sio_setreg(com, com_fifo, 259860471Snyan FIFO_RCV_RST | com->fifo_image); 259951078Speter com_events -= (com->iptr - com->ibuf); 260051078Speter com->iptr = com->ibuf; 260151078Speter } 260272200Sbmilekic mtx_unlock_spin(&sio_lock); 260351078Speter comstart(tp); 260451078Speter} 260551078Speter 260651078Speterstatic int 260751078Spetercommctl(com, bits, how) 260851078Speter struct com_s *com; 260951078Speter int bits; 261051078Speter int how; 261151078Speter{ 261251078Speter int mcr; 261351078Speter int msr; 261451078Speter 261551078Speter if (how == DMGET) { 261651078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 261751078Speter mcr = com->mcr_image; 261851078Speter if (mcr & MCR_DTR) 261951078Speter bits |= TIOCM_DTR; 262051078Speter if (mcr & MCR_RTS) 262151078Speter bits |= TIOCM_RTS; 262251078Speter msr = com->prev_modem_status; 262351078Speter if (msr & MSR_CTS) 262451078Speter bits |= TIOCM_CTS; 262551078Speter if (msr & MSR_DCD) 262651078Speter bits |= TIOCM_CD; 262751078Speter if (msr & MSR_DSR) 262851078Speter bits |= TIOCM_DSR; 262951078Speter /* 263051078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 263151078Speter * more volatile by reading the modem status a lot. Perhaps 263251078Speter * we should latch both bits until the status is read here. 263351078Speter */ 263451078Speter if (msr & (MSR_RI | MSR_TERI)) 263551078Speter bits |= TIOCM_RI; 263651078Speter return (bits); 263751078Speter } 263851078Speter mcr = 0; 263951078Speter if (bits & TIOCM_DTR) 264051078Speter mcr |= MCR_DTR; 264151078Speter if (bits & TIOCM_RTS) 264251078Speter mcr |= MCR_RTS; 264351078Speter if (com->gone) 264451078Speter return(0); 264572200Sbmilekic mtx_lock_spin(&sio_lock); 264651078Speter switch (how) { 264751078Speter case DMSET: 264851078Speter outb(com->modem_ctl_port, 264951078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 265051078Speter break; 265151078Speter case DMBIS: 265251078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 265351078Speter break; 265451078Speter case DMBIC: 265551078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 265651078Speter break; 265751078Speter } 265872200Sbmilekic mtx_unlock_spin(&sio_lock); 265951078Speter return (0); 266051078Speter} 266151078Speter 266251078Speterstatic void 266351078Spetersiosettimeout() 266451078Speter{ 266551078Speter struct com_s *com; 266651078Speter bool_t someopen; 266751078Speter int unit; 266851078Speter 266951078Speter /* 267051078Speter * Set our timeout period to 1 second if no polled devices are open. 267151078Speter * Otherwise set it to max(1/200, 1/hz). 267251078Speter * Enable timeouts iff some device is open. 267351078Speter */ 267451078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 267551078Speter sio_timeout = hz; 267651078Speter someopen = FALSE; 267753344Speter for (unit = 0; unit < sio_numunits; ++unit) { 267851078Speter com = com_addr(unit); 267951078Speter if (com != NULL && com->tp != NULL 268051078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 268151078Speter someopen = TRUE; 268251078Speter if (com->poll || com->poll_output) { 268351078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 268451078Speter break; 268551078Speter } 268651078Speter } 268751078Speter } 268851078Speter if (someopen) { 268951078Speter sio_timeouts_until_log = hz / sio_timeout; 269051078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 269151078Speter sio_timeout); 269251078Speter } else { 269351078Speter /* Flush error messages, if any. */ 269451078Speter sio_timeouts_until_log = 1; 269551078Speter comwakeup((void *)NULL); 269651078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 269751078Speter } 269851078Speter} 269951078Speter 270051078Speterstatic void 270151078Spetercomwakeup(chan) 270251078Speter void *chan; 270351078Speter{ 270451078Speter struct com_s *com; 270551078Speter int unit; 270651078Speter 270751078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 270851078Speter 270951078Speter /* 271051078Speter * Recover from lost output interrupts. 271151078Speter * Poll any lines that don't use interrupts. 271251078Speter */ 271353344Speter for (unit = 0; unit < sio_numunits; ++unit) { 271451078Speter com = com_addr(unit); 271551078Speter if (com != NULL && !com->gone 271651078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 271772200Sbmilekic mtx_lock_spin(&sio_lock); 271851078Speter siointr1(com); 271972200Sbmilekic mtx_unlock_spin(&sio_lock); 272051078Speter } 272151078Speter } 272251078Speter 272351078Speter /* 272451078Speter * Check for and log errors, but not too often. 272551078Speter */ 272651078Speter if (--sio_timeouts_until_log > 0) 272751078Speter return; 272851078Speter sio_timeouts_until_log = hz / sio_timeout; 272953344Speter for (unit = 0; unit < sio_numunits; ++unit) { 273051078Speter int errnum; 273151078Speter 273251078Speter com = com_addr(unit); 273351078Speter if (com == NULL) 273451078Speter continue; 273551078Speter if (com->gone) 273651078Speter continue; 273751078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 273851078Speter u_int delta; 273951078Speter u_long total; 274051078Speter 274172200Sbmilekic mtx_lock_spin(&sio_lock); 274251078Speter delta = com->delta_error_counts[errnum]; 274351078Speter com->delta_error_counts[errnum] = 0; 274472200Sbmilekic mtx_unlock_spin(&sio_lock); 274551078Speter if (delta == 0) 274651078Speter continue; 274751078Speter total = com->error_counts[errnum] += delta; 274851078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 274951078Speter unit, delta, error_desc[errnum], 275051078Speter delta == 1 ? "" : "s", total); 275151078Speter } 275251078Speter } 275351078Speter} 275451078Speter 275551078Speterstatic void 275651078Speterdisc_optim(tp, t, com) 275751078Speter struct tty *tp; 275851078Speter struct termios *t; 275951078Speter struct com_s *com; 276051078Speter{ 276151078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 276251078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 276351078Speter && (!(t->c_iflag & PARMRK) 276451078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 276551078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 276651078Speter && linesw[tp->t_line].l_rint == ttyinput) 276751078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 276851078Speter else 276951078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 277051078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 277151078Speter} 277251078Speter 277351078Speter/* 277451078Speter * Following are all routines needed for SIO to act as console 277551078Speter */ 277651078Speter#include <sys/cons.h> 277751078Speter 277851078Speterstruct siocnstate { 277951078Speter u_char dlbl; 278051078Speter u_char dlbh; 278151078Speter u_char ier; 278251078Speter u_char cfcr; 278351078Speter u_char mcr; 278451078Speter}; 278551078Speter 278666230Sjhb#ifndef __alpha__ 278792739Salfredstatic speed_t siocngetspeed(Port_t, u_long rclk); 278866230Sjhb#endif 278993010Sbdestatic void siocnclose(struct siocnstate *sp, Port_t iobase); 279093010Sbdestatic void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 279193010Sbdestatic void siocntxwait(Port_t iobase); 279251078Speter 279366230Sjhb#ifdef __alpha__ 279492739Salfredint siocnattach(int port, int speed); 279592739Salfredint siogdbattach(int port, int speed); 279692739Salfredint siogdbgetc(void); 279792739Salfredvoid siogdbputc(int c); 279866230Sjhb#else 279951078Speterstatic cn_probe_t siocnprobe; 280051078Speterstatic cn_init_t siocninit; 280185371Sjlemonstatic cn_term_t siocnterm; 280266230Sjhb#endif 280351078Speterstatic cn_checkc_t siocncheckc; 280451078Speterstatic cn_getc_t siocngetc; 280551078Speterstatic cn_putc_t siocnputc; 280651078Speter 280783832Sdfr#ifndef __alpha__ 280885371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 280955823Syokota siocnputc, NULL); 281051078Speter#endif 281151078Speter 281251078Speter/* To get the GDB related variables */ 281351078Speter#if DDB > 0 281451078Speter#include <ddb/ddb.h> 2815111194Sphkstatic struct consdev gdbconsdev; 2816111194Sphk 281751078Speter#endif 281851078Speter 281951078Speterstatic void 282051078Spetersiocntxwait(iobase) 282151078Speter Port_t iobase; 282251078Speter{ 282351078Speter int timo; 282451078Speter 282551078Speter /* 282651078Speter * Wait for any pending transmission to finish. Required to avoid 282751078Speter * the UART lockup bug when the speed is changed, and for normal 282851078Speter * transmits. 282951078Speter */ 283051078Speter timo = 100000; 283151078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 283251078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 283351078Speter ; 283451078Speter} 283551078Speter 283666230Sjhb#ifndef __alpha__ 283766230Sjhb 283851078Speter/* 283951078Speter * Read the serial port specified and try to figure out what speed 284051078Speter * it's currently running at. We're assuming the serial port has 284151078Speter * been initialized and is basicly idle. This routine is only intended 284251078Speter * to be run at system startup. 284351078Speter * 284451078Speter * If the value read from the serial port doesn't make sense, return 0. 284551078Speter */ 284651078Speter 284751078Speterstatic speed_t 284889986Sjhaysiocngetspeed(iobase, rclk) 284989986Sjhay Port_t iobase; 285089986Sjhay u_long rclk; 285151078Speter{ 285289986Sjhay u_int divisor; 285351078Speter u_char dlbh; 285451078Speter u_char dlbl; 285551078Speter u_char cfcr; 285651078Speter 285751078Speter cfcr = inb(iobase + com_cfcr); 285851078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 285951078Speter 286051078Speter dlbl = inb(iobase + com_dlbl); 286151078Speter dlbh = inb(iobase + com_dlbh); 286251078Speter 286351078Speter outb(iobase + com_cfcr, cfcr); 286451078Speter 286589986Sjhay divisor = dlbh << 8 | dlbl; 286651078Speter 286789986Sjhay /* XXX there should be more sanity checking. */ 286889986Sjhay if (divisor == 0) 286989986Sjhay return (CONSPEED); 287089986Sjhay return (rclk / (16UL * divisor)); 287151078Speter} 287251078Speter 287366230Sjhb#endif 287466230Sjhb 287551078Speterstatic void 287651078Spetersiocnopen(sp, iobase, speed) 287751078Speter struct siocnstate *sp; 287851078Speter Port_t iobase; 287951078Speter int speed; 288051078Speter{ 288189986Sjhay u_int divisor; 288251078Speter u_char dlbh; 288351078Speter u_char dlbl; 288451078Speter 288551078Speter /* 288651078Speter * Save all the device control registers except the fifo register 288751078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 288851078Speter * We can't save the fifo register since it is read-only. 288951078Speter */ 289051078Speter sp->ier = inb(iobase + com_ier); 289151078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 289251078Speter siocntxwait(iobase); 289351078Speter sp->cfcr = inb(iobase + com_cfcr); 289451078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 289551078Speter sp->dlbl = inb(iobase + com_dlbl); 289651078Speter sp->dlbh = inb(iobase + com_dlbh); 289751078Speter /* 289851078Speter * Only set the divisor registers if they would change, since on 289951078Speter * some 16550 incompatibles (Startech), setting them clears the 290051078Speter * data input register. This also reduces the effects of the 290151078Speter * UMC8669F bug. 290251078Speter */ 290389986Sjhay divisor = siodivisor(comdefaultrclk, speed); 290451078Speter dlbl = divisor & 0xFF; 290551078Speter if (sp->dlbl != dlbl) 290651078Speter outb(iobase + com_dlbl, dlbl); 290789986Sjhay dlbh = divisor >> 8; 290851078Speter if (sp->dlbh != dlbh) 290951078Speter outb(iobase + com_dlbh, dlbh); 291051078Speter outb(iobase + com_cfcr, CFCR_8BITS); 291151078Speter sp->mcr = inb(iobase + com_mcr); 291251078Speter /* 291351078Speter * We don't want interrupts, but must be careful not to "disable" 291451078Speter * them by clearing the MCR_IENABLE bit, since that might cause 291551078Speter * an interrupt by floating the IRQ line. 291651078Speter */ 291751078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 291851078Speter} 291951078Speter 292051078Speterstatic void 292151078Spetersiocnclose(sp, iobase) 292251078Speter struct siocnstate *sp; 292351078Speter Port_t iobase; 292451078Speter{ 292551078Speter /* 292651078Speter * Restore the device control registers. 292751078Speter */ 292851078Speter siocntxwait(iobase); 292951078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 293051078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 293151078Speter outb(iobase + com_dlbl, sp->dlbl); 293251078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 293351078Speter outb(iobase + com_dlbh, sp->dlbh); 293451078Speter outb(iobase + com_cfcr, sp->cfcr); 293551078Speter /* 293651078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 293751078Speter */ 293851078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 293951078Speter outb(iobase + com_ier, sp->ier); 294051078Speter} 294151078Speter 294266230Sjhb#ifndef __alpha__ 294366230Sjhb 294451078Speterstatic void 294551078Spetersiocnprobe(cp) 294651078Speter struct consdev *cp; 294751078Speter{ 294851078Speter speed_t boot_speed; 294951078Speter u_char cfcr; 295089986Sjhay u_int divisor; 295151078Speter int s, unit; 295251078Speter struct siocnstate sp; 295351078Speter 295451078Speter /* 295551078Speter * Find our first enabled console, if any. If it is a high-level 295651078Speter * console device, then initialize it and return successfully. 295751078Speter * If it is a low-level console device, then initialize it and 295851078Speter * return unsuccessfully. It must be initialized in both cases 295951078Speter * for early use by console drivers and debuggers. Initializing 296051078Speter * the hardware is not necessary in all cases, since the i/o 296151078Speter * routines initialize it on the fly, but it is necessary if 296251078Speter * input might arrive while the hardware is switched back to an 296351078Speter * uninitialized state. We can't handle multiple console devices 296451078Speter * yet because our low-level routines don't take a device arg. 296551078Speter * We trust the user to set the console flags properly so that we 296651078Speter * don't need to probe. 296751078Speter */ 296851078Speter cp->cn_pri = CN_DEAD; 296951078Speter 297051078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 297151078Speter int flags; 2972117167Sjhb 2973117167Sjhb if (resource_disabled("sio", unit)) 2974117167Sjhb continue; 297551078Speter if (resource_int_value("sio", unit, "flags", &flags)) 297651078Speter continue; 297751078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 297851078Speter int port; 297951078Speter Port_t iobase; 298051078Speter 298151078Speter if (resource_int_value("sio", unit, "port", &port)) 298251078Speter continue; 298351078Speter iobase = port; 298451078Speter s = spltty(); 298551078Speter if (boothowto & RB_SERIAL) { 298689986Sjhay boot_speed = 298789986Sjhay siocngetspeed(iobase, comdefaultrclk); 298851078Speter if (boot_speed) 298951078Speter comdefaultrate = boot_speed; 299051078Speter } 299151078Speter 299251078Speter /* 299351078Speter * Initialize the divisor latch. We can't rely on 299451078Speter * siocnopen() to do this the first time, since it 299551078Speter * avoids writing to the latch if the latch appears 299651078Speter * to have the correct value. Also, if we didn't 299751078Speter * just read the speed from the hardware, then we 299851078Speter * need to set the speed in hardware so that 299951078Speter * switching it later is null. 300051078Speter */ 300151078Speter cfcr = inb(iobase + com_cfcr); 300251078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 300389986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 300489986Sjhay outb(iobase + com_dlbl, divisor & 0xff); 300589986Sjhay outb(iobase + com_dlbh, divisor >> 8); 300651078Speter outb(iobase + com_cfcr, cfcr); 300751078Speter 300851078Speter siocnopen(&sp, iobase, comdefaultrate); 300951078Speter 301051078Speter splx(s); 301151078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 301251078Speter cp->cn_dev = makedev(CDEV_MAJOR, unit); 301351078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 301451078Speter || boothowto & RB_SERIAL 301551078Speter ? CN_REMOTE : CN_NORMAL; 301651078Speter siocniobase = iobase; 301751078Speter siocnunit = unit; 301851078Speter } 301951078Speter if (COM_DEBUGGER(flags)) { 302051078Speter printf("sio%d: gdb debugging port\n", unit); 302151078Speter siogdbiobase = iobase; 302251078Speter siogdbunit = unit; 302351078Speter#if DDB > 0 3024111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, unit); 3025111194Sphk gdb_arg = &gdbconsdev; 302651078Speter gdb_getc = siocngetc; 302751078Speter gdb_putc = siocnputc; 302851078Speter#endif 302951078Speter } 303051078Speter } 303151078Speter } 303251078Speter#ifdef __i386__ 303351078Speter#if DDB > 0 303451078Speter /* 303551078Speter * XXX Ugly Compatability. 303651078Speter * If no gdb port has been specified, set it to be the console 303751078Speter * as some configuration files don't specify the gdb port. 303851078Speter */ 3039111017Sphk if (gdb_arg == NULL && (boothowto & RB_GDB)) { 304051078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 304151078Speter siocnunit); 304251078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 304351078Speter printf("configuration file (currently sio only).\n"); 304451078Speter siogdbiobase = siocniobase; 304551078Speter siogdbunit = siocnunit; 3046111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, siocnunit); 3047111194Sphk gdb_arg = &gdbconsdev; 304851078Speter gdb_getc = siocngetc; 304951078Speter gdb_putc = siocnputc; 305051078Speter } 305151078Speter#endif 305251078Speter#endif 305351078Speter} 305451078Speter 305566230Sjhbstatic void 305666230Sjhbsiocninit(cp) 305766230Sjhb struct consdev *cp; 305866230Sjhb{ 305966230Sjhb comconsole = DEV_TO_UNIT(cp->cn_dev); 306066230Sjhb} 306166230Sjhb 306285371Sjlemonstatic void 306385371Sjlemonsiocnterm(cp) 306485371Sjlemon struct consdev *cp; 306585371Sjlemon{ 306685371Sjlemon comconsole = -1; 306785371Sjlemon} 306885371Sjlemon 306966230Sjhb#endif 307066230Sjhb 307151078Speter#ifdef __alpha__ 307251078Speter 307355868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 307451078Speter 307551078Speterint 307651078Spetersiocnattach(port, speed) 307751078Speter int port; 307851078Speter int speed; 307951078Speter{ 308051078Speter int s; 308151078Speter u_char cfcr; 308289986Sjhay u_int divisor; 308351078Speter struct siocnstate sp; 308498691Sn_hibma int unit = 0; /* XXX random value! */ 308551078Speter 308651078Speter siocniobase = port; 308798691Sn_hibma siocnunit = unit; 308851078Speter comdefaultrate = speed; 308951078Speter sio_consdev.cn_pri = CN_NORMAL; 309098691Sn_hibma sio_consdev.cn_dev = makedev(CDEV_MAJOR, unit); 309151078Speter 309251078Speter s = spltty(); 309351078Speter 309451078Speter /* 309551078Speter * Initialize the divisor latch. We can't rely on 309651078Speter * siocnopen() to do this the first time, since it 309751078Speter * avoids writing to the latch if the latch appears 309851078Speter * to have the correct value. Also, if we didn't 309951078Speter * just read the speed from the hardware, then we 310051078Speter * need to set the speed in hardware so that 310151078Speter * switching it later is null. 310251078Speter */ 310351078Speter cfcr = inb(siocniobase + com_cfcr); 310451078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 310589986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 310689986Sjhay outb(siocniobase + com_dlbl, divisor & 0xff); 310789986Sjhay outb(siocniobase + com_dlbh, divisor >> 8); 310851078Speter outb(siocniobase + com_cfcr, cfcr); 310951078Speter 311051078Speter siocnopen(&sp, siocniobase, comdefaultrate); 311151078Speter splx(s); 311251078Speter 311385426Sjlemon cnadd(&sio_consdev); 311458885Simp return (0); 311551078Speter} 311651078Speter 311751078Speterint 311851078Spetersiogdbattach(port, speed) 311951078Speter int port; 312051078Speter int speed; 312151078Speter{ 312251078Speter int s; 312351078Speter u_char cfcr; 312489986Sjhay u_int divisor; 312551078Speter struct siocnstate sp; 312698691Sn_hibma int unit = 1; /* XXX random value! */ 312751078Speter 312851078Speter siogdbiobase = port; 312951078Speter gdbdefaultrate = speed; 313051078Speter 313165714Sjhb printf("sio%d: gdb debugging port\n", unit); 313265714Sjhb siogdbunit = unit; 313365714Sjhb#if DDB > 0 3134111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, unit); 3135111194Sphk gdb_arg = &gdbconsdev; 313665714Sjhb gdb_getc = siocngetc; 313765714Sjhb gdb_putc = siocnputc; 313865714Sjhb#endif 313965714Sjhb 314051078Speter s = spltty(); 314151078Speter 314251078Speter /* 314351078Speter * Initialize the divisor latch. We can't rely on 314451078Speter * siocnopen() to do this the first time, since it 314551078Speter * avoids writing to the latch if the latch appears 314651078Speter * to have the correct value. Also, if we didn't 314751078Speter * just read the speed from the hardware, then we 314851078Speter * need to set the speed in hardware so that 314951078Speter * switching it later is null. 315051078Speter */ 315151078Speter cfcr = inb(siogdbiobase + com_cfcr); 315251078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 315389986Sjhay divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 315489986Sjhay outb(siogdbiobase + com_dlbl, divisor & 0xff); 315589986Sjhay outb(siogdbiobase + com_dlbh, divisor >> 8); 315651078Speter outb(siogdbiobase + com_cfcr, cfcr); 315751078Speter 315851078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 315951078Speter splx(s); 316051078Speter 316158885Simp return (0); 316251078Speter} 316351078Speter 316451078Speter#endif 316551078Speter 316651078Speterstatic int 3167111194Sphksiocncheckc(struct consdev *cd) 316851078Speter{ 316951078Speter int c; 3170111194Sphk dev_t dev; 317151078Speter Port_t iobase; 317251078Speter int s; 317351078Speter struct siocnstate sp; 317498401Sn_hibma speed_t speed; 3175111194Sphk 3176111194Sphk dev = cd->cn_dev; 317798401Sn_hibma if (minor(dev) == siocnunit) { 317898401Sn_hibma iobase = siocniobase; 317998401Sn_hibma speed = comdefaultrate; 318098401Sn_hibma } else { 318151078Speter iobase = siogdbiobase; 318298401Sn_hibma speed = gdbdefaultrate; 318398401Sn_hibma } 318451078Speter s = spltty(); 318598401Sn_hibma siocnopen(&sp, iobase, speed); 318651078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 318751078Speter c = inb(iobase + com_data); 318851078Speter else 318951078Speter c = -1; 319051078Speter siocnclose(&sp, iobase); 319151078Speter splx(s); 319251078Speter return (c); 319351078Speter} 319451078Speter 319551078Speter 3196104094Sphkstatic int 3197111194Sphksiocngetc(struct consdev *cd) 319851078Speter{ 319951078Speter int c; 3200111194Sphk dev_t dev; 320151078Speter Port_t iobase; 320251078Speter int s; 320351078Speter struct siocnstate sp; 320498401Sn_hibma speed_t speed; 320551078Speter 3206111194Sphk dev = cd->cn_dev; 320798401Sn_hibma if (minor(dev) == siocnunit) { 320898401Sn_hibma iobase = siocniobase; 320998401Sn_hibma speed = comdefaultrate; 321098401Sn_hibma } else { 321151078Speter iobase = siogdbiobase; 321298401Sn_hibma speed = gdbdefaultrate; 321398401Sn_hibma } 321451078Speter s = spltty(); 321598401Sn_hibma siocnopen(&sp, iobase, speed); 321651078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 321751078Speter ; 321851078Speter c = inb(iobase + com_data); 321951078Speter siocnclose(&sp, iobase); 322051078Speter splx(s); 322151078Speter return (c); 322251078Speter} 322351078Speter 3224104094Sphkstatic void 3225111194Sphksiocnputc(struct consdev *cd, int c) 322651078Speter{ 322788582Sbde int need_unlock; 322851078Speter int s; 3229111194Sphk dev_t dev; 323051078Speter struct siocnstate sp; 323151078Speter Port_t iobase; 323298401Sn_hibma speed_t speed; 323351078Speter 3234111194Sphk dev = cd->cn_dev; 323598401Sn_hibma if (minor(dev) == siocnunit) { 323698401Sn_hibma iobase = siocniobase; 323798401Sn_hibma speed = comdefaultrate; 323898401Sn_hibma } else { 323951078Speter iobase = siogdbiobase; 324098401Sn_hibma speed = gdbdefaultrate; 324198401Sn_hibma } 324251078Speter s = spltty(); 324388582Sbde need_unlock = 0; 324488582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 324584029Sjlemon mtx_lock_spin(&sio_lock); 324688582Sbde need_unlock = 1; 324788582Sbde } 324898401Sn_hibma siocnopen(&sp, iobase, speed); 324951078Speter siocntxwait(iobase); 325051078Speter outb(iobase + com_data, c); 325151078Speter siocnclose(&sp, iobase); 325288582Sbde if (need_unlock) 325384029Sjlemon mtx_unlock_spin(&sio_lock); 325451078Speter splx(s); 325551078Speter} 325651078Speter 325751078Speter#ifdef __alpha__ 325851078Speterint 325951078Spetersiogdbgetc() 326051078Speter{ 326151078Speter int c; 326251078Speter Port_t iobase; 326398401Sn_hibma speed_t speed; 326451078Speter int s; 326551078Speter struct siocnstate sp; 326651078Speter 326798619Sn_hibma if (siogdbunit == siocnunit) { 326898401Sn_hibma iobase = siocniobase; 326998401Sn_hibma speed = comdefaultrate; 327098401Sn_hibma } else { 327198401Sn_hibma iobase = siogdbiobase; 327298401Sn_hibma speed = gdbdefaultrate; 327398401Sn_hibma } 327498401Sn_hibma 327551078Speter s = spltty(); 327698401Sn_hibma siocnopen(&sp, iobase, speed); 327751078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 327851078Speter ; 327951078Speter c = inb(iobase + com_data); 328051078Speter siocnclose(&sp, iobase); 328151078Speter splx(s); 328251078Speter return (c); 328351078Speter} 328451078Speter 328551078Spetervoid 328651078Spetersiogdbputc(c) 328751078Speter int c; 328851078Speter{ 328998401Sn_hibma Port_t iobase; 329098401Sn_hibma speed_t speed; 329151078Speter int s; 329251078Speter struct siocnstate sp; 329351078Speter 329498619Sn_hibma if (siogdbunit == siocnunit) { 329598401Sn_hibma iobase = siocniobase; 329698401Sn_hibma speed = comdefaultrate; 329798401Sn_hibma } else { 329898401Sn_hibma iobase = siogdbiobase; 329998401Sn_hibma speed = gdbdefaultrate; 330098401Sn_hibma } 330198401Sn_hibma 330251078Speter s = spltty(); 330398401Sn_hibma siocnopen(&sp, iobase, speed); 330451078Speter siocntxwait(siogdbiobase); 330551078Speter outb(siogdbiobase + com_data, c); 330651078Speter siocnclose(&sp, siogdbiobase); 330751078Speter splx(s); 330851078Speter} 330951078Speter#endif 3310