sio.c revision 112270
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * $FreeBSD: head/sys/dev/sio/sio.c 112270 2003-03-15 16:25:40Z sobomax $ 3451078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3551078Speter * from: i386/isa sio.c,v 1.234 3651078Speter */ 3751078Speter 3851078Speter#include "opt_comconsole.h" 3951078Speter#include "opt_compat.h" 4051078Speter#include "opt_ddb.h" 4151078Speter#include "opt_sio.h" 4251078Speter 4351078Speter/* 4451078Speter * Serial driver, based on 386BSD-0.1 com driver. 4551078Speter * Mostly rewritten to use pseudo-DMA. 4651078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4751078Speter * COM driver, based on HP dca driver. 4851078Speter * 4951078Speter * Changes for PC-Card integration: 5051078Speter * - Added PC-Card driver table and handlers 5151078Speter */ 5251078Speter#include <sys/param.h> 5376166Smarkm#include <sys/systm.h> 5465822Sjhb#include <sys/bus.h> 5551078Speter#include <sys/conf.h> 5651078Speter#include <sys/fcntl.h> 5751078Speter#include <sys/interrupt.h> 5851078Speter#include <sys/kernel.h> 5976166Smarkm#include <sys/lock.h> 6076166Smarkm#include <sys/malloc.h> 6176166Smarkm#include <sys/module.h> 6276166Smarkm#include <sys/mutex.h> 6376166Smarkm#include <sys/proc.h> 6476166Smarkm#include <sys/reboot.h> 6576166Smarkm#include <sys/sysctl.h> 6651078Speter#include <sys/syslog.h> 6776166Smarkm#include <sys/tty.h> 6860471Snyan#include <machine/bus_pio.h> 6951078Speter#include <machine/bus.h> 7051078Speter#include <sys/rman.h> 7151078Speter#include <sys/timepps.h> 7293466Sbde#include <sys/uio.h> 7351078Speter 7486909Simp#include <isa/isavar.h> 7586909Simp 7693126Smike#include <machine/limits.h> 7751078Speter#include <machine/resource.h> 7851078Speter 7985302Simp#include <dev/sio/sioreg.h> 8085365Simp#include <dev/sio/siovar.h> 8151078Speter 8251078Speter#ifdef COM_ESP 8377726Sjoerg#include <dev/ic/esp.h> 8451078Speter#endif 8577726Sjoerg#include <dev/ic/ns16550.h> 8651078Speter 8751078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 8851078Speter 8951078Speter#define CALLOUT_MASK 0x80 9051078Speter#define CONTROL_MASK 0x60 9151078Speter#define CONTROL_INIT_STATE 0x20 9251078Speter#define CONTROL_LOCK_STATE 0x40 9351078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 9493470Sbde#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 9593470Sbde | ((mynor) & 0x1f)) 9693470Sbde#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 9793470Sbde | ((unit) & 0x1f)) 9851078Speter 9951078Speter#ifdef COM_MULTIPORT 10051078Speter/* checks in flags for multiport and which is multiport "master chip" 10151078Speter * for a given card 10251078Speter */ 10351078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 10451078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 10551078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 106104067Sphk#else 107104067Sphk#define COM_ISMULTIPORT(flags) (0) 10851078Speter#endif /* COM_MULTIPORT */ 10951078Speter 11051078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 11151078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 11251078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 11351078Speter#define COM_DEBUGGER(flags) ((flags) & 0x80) 11451078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 11551078Speter#define COM_NOFIFO(flags) ((flags) & 0x02) 116111613Sphk#define COM_PPSCTS(flags) ((flags) & 0x10000) 11751078Speter#define COM_ST16650A(flags) ((flags) & 0x20000) 11886909Simp#define COM_C_NOPROBE (0x40000) 11986909Simp#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 12051078Speter#define COM_C_IIR_TXRDYBUG (0x80000) 12151078Speter#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 122104067Sphk#define COM_NOSCR(flags) ((flags) & 0x100000) 123112270Ssobomax#define COM_TI16754(flags) ((flags) & 0x200000) 12451078Speter#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 12551078Speter 12660471Snyan#define sio_getreg(com, off) \ 12760471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 12860471Snyan#define sio_setreg(com, off, value) \ 12960471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 13060471Snyan 13151078Speter/* 13251078Speter * com state bits. 13351078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 13451078Speter * than the other bits so that they can be tested as a group without masking 13551078Speter * off the low bits. 13651078Speter * 13751078Speter * The following com and tty flags correspond closely: 13851078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 13953344Speter * comstop()) 14051078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 14151078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14251078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14351078Speter * TS_FLUSH is not used. 14451078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 14551078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 14651078Speter */ 14751078Speter#define CS_BUSY 0x80 /* output in progress */ 14851078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 14951078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 15051078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 15151078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15251078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15351078Speter#define CS_ODONE 4 /* output completed */ 15451078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 15551078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 15651078Speter 15751078Speterstatic char const * const error_desc[] = { 15851078Speter#define CE_OVERRUN 0 15951078Speter "silo overflow", 16051078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 16151078Speter "interrupt-level buffer overflow", 16251078Speter#define CE_TTY_BUF_OVERFLOW 2 16351078Speter "tty-level buffer overflow", 16451078Speter}; 16551078Speter 16686909Simp#define CE_NTYPES 3 16751078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 16851078Speter 16986909Simp/* types. XXX - should be elsewhere */ 17086909Simptypedef u_int Port_t; /* hardware port */ 17186909Simptypedef u_char bool_t; /* boolean */ 17286909Simp 17386909Simp/* queue of linear buffers */ 17486909Simpstruct lbq { 17586909Simp u_char *l_head; /* next char to process */ 17686909Simp u_char *l_tail; /* one past the last char to process */ 17786909Simp struct lbq *l_next; /* next in queue */ 17886909Simp bool_t l_queued; /* nonzero if queued */ 17986909Simp}; 18086909Simp 18186909Simp/* com device structure */ 18286909Simpstruct com_s { 18386909Simp u_int flags; /* Copy isa device flags */ 18486909Simp u_char state; /* miscellaneous flag bits */ 18586909Simp bool_t active_out; /* nonzero if the callout device is open */ 18686909Simp u_char cfcr_image; /* copy of value written to CFCR */ 18751078Speter#ifdef COM_ESP 18886909Simp bool_t esp; /* is this unit a hayes esp board? */ 18986909Simp#endif 19086909Simp u_char extra_state; /* more flag bits, separate for order trick */ 19186909Simp u_char fifo_image; /* copy of value written to FIFO */ 19286909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 19386909Simp bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 19486909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 19586909Simp u_char mcr_image; /* copy of value written to MCR */ 19686909Simp#ifdef COM_MULTIPORT 19786909Simp bool_t multiport; /* is this unit part of a multiport device? */ 19886909Simp#endif /* COM_MULTIPORT */ 19986909Simp bool_t no_irq; /* nonzero if irq is not attached */ 20086909Simp bool_t gone; /* hardware disappeared */ 20186909Simp bool_t poll; /* nonzero if polling is required */ 20286909Simp bool_t poll_output; /* nonzero if polling for output is required */ 20386909Simp int unit; /* unit number */ 20486909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 20586909Simp u_int tx_fifo_size; 20686909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 20786909Simp 20886909Simp /* 20986909Simp * The high level of the driver never reads status registers directly 21086909Simp * because there would be too many side effects to handle conveniently. 21186909Simp * Instead, it reads copies of the registers stored here by the 21286909Simp * interrupt handler. 21386909Simp */ 21486909Simp u_char last_modem_status; /* last MSR read by intr handler */ 21586909Simp u_char prev_modem_status; /* last MSR handled by high level */ 21686909Simp 21786909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 21886909Simp u_char *ibuf; /* start of input buffer */ 21986909Simp u_char *ibufend; /* end of input buffer */ 22086909Simp u_char *ibufold; /* old input buffer, to be freed */ 22186909Simp u_char *ihighwater; /* threshold in input buffer */ 22286909Simp u_char *iptr; /* next free spot in input buffer */ 22386909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 22486909Simp int ierroff; /* offset of error bytes in ibuf */ 22586909Simp 22686909Simp struct lbq obufq; /* head of queue of output buffers */ 22786909Simp struct lbq obufs[2]; /* output buffers */ 22886909Simp 22986909Simp bus_space_tag_t bst; 23086909Simp bus_space_handle_t bsh; 23186909Simp 23286909Simp Port_t data_port; /* i/o ports */ 23386909Simp#ifdef COM_ESP 23486909Simp Port_t esp_port; 23586909Simp#endif 23686909Simp Port_t int_id_port; 23786909Simp Port_t modem_ctl_port; 23886909Simp Port_t line_status_port; 23986909Simp Port_t modem_status_port; 24086909Simp Port_t intr_ctl_port; /* Ports of IIR register */ 24186909Simp 24286909Simp struct tty *tp; /* cross reference */ 24386909Simp 24486909Simp /* Initial state. */ 24586909Simp struct termios it_in; /* should be in struct tty */ 24686909Simp struct termios it_out; 24786909Simp 24886909Simp /* Lock state. */ 24986909Simp struct termios lt_in; /* should be in struct tty */ 25086909Simp struct termios lt_out; 25186909Simp 25286909Simp bool_t do_timestamp; 25386909Simp bool_t do_dcd_timestamp; 25486909Simp struct timeval timestamp; 25586909Simp struct timeval dcd_timestamp; 25686909Simp struct pps_state pps; 257111613Sphk int pps_bit; 25886909Simp 25986909Simp u_long bytes_in; /* statistics */ 26086909Simp u_long bytes_out; 26186909Simp u_int delta_error_counts[CE_NTYPES]; 26286909Simp u_long error_counts[CE_NTYPES]; 26386909Simp 26489986Sjhay u_long rclk; 26589986Sjhay 26686909Simp struct resource *irqres; 26786909Simp struct resource *ioportres; 26886909Simp void *cookie; 26986909Simp dev_t devs[6]; 27086909Simp 27186909Simp /* 27286909Simp * Data area for output buffers. Someday we should build the output 27386909Simp * buffer queue without copying data. 27486909Simp */ 27586909Simp u_char obuf1[256]; 27686909Simp u_char obuf2[256]; 27786909Simp}; 27886909Simp 27986909Simp#ifdef COM_ESP 28093010Sbdestatic int espattach(struct com_s *com, Port_t esp_port); 28151078Speter#endif 28251078Speter 28351078Speterstatic timeout_t siobusycheck; 28493010Sbdestatic u_int siodivisor(u_long rclk, speed_t speed); 28551078Speterstatic timeout_t siodtrwakeup; 28693010Sbdestatic void comhardclose(struct com_s *com); 28793010Sbdestatic void sioinput(struct com_s *com); 28893010Sbdestatic void siointr1(struct com_s *com); 28993010Sbdestatic void siointr(void *arg); 29093010Sbdestatic int commctl(struct com_s *com, int bits, int how); 29193010Sbdestatic int comparam(struct tty *tp, struct termios *t); 29293010Sbdestatic void siopoll(void *); 29393010Sbdestatic void siosettimeout(void); 29493010Sbdestatic int siosetwater(struct com_s *com, speed_t speed); 29593010Sbdestatic void comstart(struct tty *tp); 29693010Sbdestatic void comstop(struct tty *tp, int rw); 29751078Speterstatic timeout_t comwakeup; 29893010Sbdestatic void disc_optim(struct tty *tp, struct termios *t, 29993010Sbde struct com_s *com); 30051078Speter 30185365Simpchar sio_driver_name[] = "sio"; 30270174Sjhbstatic struct mtx sio_lock; 30370174Sjhbstatic int sio_inited; 30451078Speter 30551078Speter/* table and macro for fast conversion from a unit number to its com struct */ 30685365Simpdevclass_t sio_devclass; 30751078Speter#define com_addr(unit) ((struct com_s *) \ 30886909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 30951078Speter 31051078Speterstatic d_open_t sioopen; 31151078Speterstatic d_close_t sioclose; 31251078Speterstatic d_read_t sioread; 31351078Speterstatic d_write_t siowrite; 31451078Speterstatic d_ioctl_t sioioctl; 31551078Speter 31651078Speter#define CDEV_MAJOR 28 31751078Speterstatic struct cdevsw sio_cdevsw = { 318111815Sphk .d_open = sioopen, 319111815Sphk .d_close = sioclose, 320111815Sphk .d_read = sioread, 321111815Sphk .d_write = siowrite, 322111815Sphk .d_ioctl = sioioctl, 323111815Sphk .d_poll = ttypoll, 324111815Sphk .d_name = sio_driver_name, 325111815Sphk .d_maj = CDEV_MAJOR, 326111821Sphk .d_flags = D_TTY, 327111815Sphk .d_kqfilter = ttykqfilter, 32851078Speter}; 32951078Speter 33051078Speterint comconsole = -1; 33151078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 33289986Sjhaystatic u_long comdefaultrclk = DEFAULT_RCLK; 33389986SjhaySYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 33498401Sn_hibmastatic speed_t gdbdefaultrate = GDBSPEED; 33598401Sn_hibmaSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 33698401Sn_hibma &gdbdefaultrate, GDBSPEED, ""); 33751078Speterstatic u_int com_events; /* input chars + weighted output completions */ 33851078Speterstatic Port_t siocniobase; 33998401Sn_hibmastatic int siocnunit = -1; 34051078Speterstatic Port_t siogdbiobase; 34151078Speterstatic int siogdbunit = -1; 34272238Sjhbstatic void *sio_slow_ih; 34372238Sjhbstatic void *sio_fast_ih; 34451078Speterstatic int sio_timeout; 34551078Speterstatic int sio_timeouts_until_log; 34651078Speterstatic struct callout_handle sio_timeout_handle 34751078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 34853344Speterstatic int sio_numunits; 34951078Speter 35051078Speter#ifdef COM_ESP 35151078Speter/* XXX configure this properly. */ 35286909Simp/* XXX quite broken for new-bus. */ 35351078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 35451078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 35551078Speter#endif 35651078Speter 35751078Speter/* 35851078Speter * handle sysctl read/write requests for console speed 35951078Speter * 36051078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 36151078Speter * also set the initial and lock values for the /dev/ttyXX device 36251078Speter * if there is one associated with the console. Finally, if the /dev/tty 36351078Speter * device has already been open, change the speed on the open running port 36451078Speter * itself. 36551078Speter */ 36651078Speter 36751078Speterstatic int 36862573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 36951078Speter{ 37051078Speter int error, s; 37151078Speter speed_t newspeed; 37251078Speter struct com_s *com; 37351078Speter struct tty *tp; 37451078Speter 37551078Speter newspeed = comdefaultrate; 37651078Speter 37751078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 37851078Speter if (error || !req->newptr) 37951078Speter return (error); 38051078Speter 38151078Speter comdefaultrate = newspeed; 38251078Speter 38351078Speter if (comconsole < 0) /* serial console not selected? */ 38451078Speter return (0); 38551078Speter 38651078Speter com = com_addr(comconsole); 38757915Simp if (com == NULL) 38851078Speter return (ENXIO); 38951078Speter 39051078Speter /* 39151078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 39251078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 39351078Speter * speed changes) 39451078Speter */ 39551078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 39651078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 39751078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 39851078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 39951078Speter 40051078Speter /* 40151078Speter * if we're open, change the running rate too 40251078Speter */ 40351078Speter tp = com->tp; 40451078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 40551078Speter tp->t_termios.c_ispeed = 40651078Speter tp->t_termios.c_ospeed = comdefaultrate; 40751078Speter s = spltty(); 40851078Speter error = comparam(tp, &tp->t_termios); 40951078Speter splx(s); 41051078Speter } 41151078Speter return error; 41251078Speter} 41351078Speter 41451078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 41551078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 41691280Simp/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 41751078Speter 41886909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 41986909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 42086909Simp 42186909Simp/* 42286909Simp * Unload the driver and clear the table. 42386909Simp * XXX this is mostly wrong. 42486909Simp * XXX TODO: 42586909Simp * This is usually called when the card is ejected, but 426104933Simp * can be caused by a kldunload of a controller driver. 42786909Simp * The idea is to reset the driver's view of the device 42886909Simp * and ensure that any driver entry points such as 42986909Simp * read and write do not hang. 43086909Simp */ 43185365Simpint 43285365Simpsiodetach(dev) 43352471Simp device_t dev; 43451078Speter{ 43551078Speter struct com_s *com; 43665131Sphk int i; 43751078Speter 43852471Simp com = (struct com_s *) device_get_softc(dev); 43957915Simp if (com == NULL) { 44052471Simp device_printf(dev, "NULL com in siounload\n"); 44154386Simp return (0); 44251078Speter } 44354386Simp com->gone = 1; 44465131Sphk for (i = 0 ; i < 6; i++) 44565131Sphk destroy_dev(com->devs[i]); 44654386Simp if (com->irqres) { 44754386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 44854386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 44954386Simp } 45054386Simp if (com->ioportres) 45154386Simp bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres); 45251078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 45357915Simp device_printf(dev, "still open, forcing close\n"); 45477750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 45551078Speter com->tp->t_gen++; 45651078Speter ttyclose(com->tp); 45751078Speter ttwakeup(com->tp); 45851078Speter ttwwakeup(com->tp); 45951078Speter } else { 46051078Speter if (com->ibuf != NULL) 46151078Speter free(com->ibuf, M_DEVBUF); 46286909Simp device_set_softc(dev, NULL); 46386909Simp free(com, M_DEVBUF); 46451078Speter } 46553978Simp return (0); 46651078Speter} 46751078Speter 46885365Simpint 46989986Sjhaysioprobe(dev, xrid, rclk, noprobe) 47058885Simp device_t dev; 47158885Simp int xrid; 47289986Sjhay u_long rclk; 47385365Simp int noprobe; 47451078Speter{ 47553344Speter#if 0 47651078Speter static bool_t already_init; 47753344Speter device_t xdev; 47853344Speter#endif 47960471Snyan struct com_s *com; 48089986Sjhay u_int divisor; 48151078Speter bool_t failures[10]; 48251078Speter int fn; 48351078Speter device_t idev; 48451078Speter Port_t iobase; 48551078Speter intrmask_t irqmap[4]; 48651078Speter intrmask_t irqs; 48751078Speter u_char mcr_image; 48851078Speter int result; 48954206Speter u_long xirq; 49051088Speter u_int flags = device_get_flags(dev); 49151078Speter int rid; 49251078Speter struct resource *port; 49351078Speter 49458885Simp rid = xrid; 49551078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 49651078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 49751078Speter if (!port) 49857915Simp return (ENXIO); 49951078Speter 50086909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 50186909Simp if (com == NULL) 50286909Simp return (ENOMEM); 50386909Simp device_set_softc(dev, com); 50460471Snyan com->bst = rman_get_bustag(port); 50560471Snyan com->bsh = rman_get_bushandle(port); 50689986Sjhay if (rclk == 0) 50789986Sjhay rclk = DEFAULT_RCLK; 50889986Sjhay com->rclk = rclk; 50960471Snyan 51085209Sjhb while (sio_inited != 2) 51185209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 51293818Sjhb mtx_init(&sio_lock, sio_driver_name, NULL, 51393818Sjhb (comconsole != -1) ? 51485209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 51585209Sjhb atomic_store_rel_int(&sio_inited, 2); 51685209Sjhb } 51770174Sjhb 51853344Speter#if 0 51953344Speter /* 52053344Speter * XXX this is broken - when we are first called, there are no 52153344Speter * previously configured IO ports. We could hard code 52253344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 52353344Speter * This code has been doing nothing since the conversion since 52453344Speter * "count" is zero the first time around. 52553344Speter */ 52651078Speter if (!already_init) { 52751078Speter /* 52851078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 52951078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 53051078Speter * from any used port that shares the interrupt vector. 53151078Speter * XXX the gate enable is elsewhere for some multiports. 53251078Speter */ 53351078Speter device_t *devs; 53453344Speter int count, i, xioport; 53551078Speter 53651078Speter devclass_get_devices(sio_devclass, &devs, &count); 53751078Speter for (i = 0; i < count; i++) { 53851078Speter xdev = devs[i]; 53954194Speter if (device_is_enabled(xdev) && 54054194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 54154194Speter NULL) == 0) 54253344Speter outb(xioport + com_mcr, 0); 54351078Speter } 54451078Speter free(devs, M_TEMP); 54551078Speter already_init = TRUE; 54651078Speter } 54753344Speter#endif 54851078Speter 54951078Speter if (COM_LLCONSOLE(flags)) { 55051078Speter printf("sio%d: reserved for low-level i/o\n", 55151078Speter device_get_unit(dev)); 55256788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 55386909Simp device_set_softc(dev, NULL); 55486909Simp free(com, M_DEVBUF); 55551078Speter return (ENXIO); 55651078Speter } 55751078Speter 55851078Speter /* 55951078Speter * If the device is on a multiport card and has an AST/4 56051078Speter * compatible interrupt control register, initialize this 56151078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 56251078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 56351078Speter * Point idev to the device struct giving the correct id_irq. 56451078Speter * This is the struct for the master device if there is one. 56551078Speter */ 56651078Speter idev = dev; 56751078Speter mcr_image = MCR_IENABLE; 56851078Speter#ifdef COM_MULTIPORT 56957234Sbde if (COM_ISMULTIPORT(flags)) { 57054206Speter Port_t xiobase; 57154206Speter u_long io; 57254206Speter 57351078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 57451078Speter if (idev == NULL) { 57551078Speter printf("sio%d: master device %d not configured\n", 57651078Speter device_get_unit(dev), COM_MPMASTER(flags)); 57751078Speter idev = dev; 57851078Speter } 57957234Sbde if (!COM_NOTAST4(flags)) { 58057234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 58157234Sbde NULL) == 0) { 58257234Sbde xiobase = io; 58357234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 58457234Sbde NULL, NULL) == 0) 58557234Sbde outb(xiobase + com_scr, 0x80); 58657234Sbde else 58757234Sbde outb(xiobase + com_scr, 0); 58857234Sbde } 58957234Sbde mcr_image = 0; 59051078Speter } 59151078Speter } 59251078Speter#endif /* COM_MULTIPORT */ 59354194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 59451078Speter mcr_image = 0; 59551078Speter 59651078Speter bzero(failures, sizeof failures); 59751078Speter iobase = rman_get_start(port); 59851078Speter 59951078Speter /* 60051078Speter * We don't want to get actual interrupts, just masked ones. 60151078Speter * Interrupts from this line should already be masked in the ICU, 60251078Speter * but mask them in the processor as well in case there are some 60351078Speter * (misconfigured) shared interrupts. 60451078Speter */ 60572200Sbmilekic mtx_lock_spin(&sio_lock); 60651078Speter/* EXTRA DELAY? */ 60751078Speter 60851078Speter /* 609112270Ssobomax * For the TI16754 chips set prescaler to 1 (4 is often the 610112270Ssobomax * default after-reset value), otherwise it's impossible to 611112270Ssobomax * get highest baudrates. 612112270Ssobomax */ 613112270Ssobomax if (COM_TI16754(flags)) { 614112270Ssobomax u_char t1, t2; 615112270Ssobomax 616112270Ssobomax /* Save LCR */ 617112270Ssobomax t1 = sio_getreg(com, com_lctl); 618112270Ssobomax /* Enable EFR */ 619112270Ssobomax sio_setreg(com, com_lctl, 0xbf); 620112270Ssobomax /* Save EFR */ 621112270Ssobomax t2 = sio_getreg(com, com_iir); 622112270Ssobomax /* Unlock MCR[7] */ 623112270Ssobomax sio_setreg(com, com_iir, t2 | 0x10); 624112270Ssobomax /* Disable EFR */ 625112270Ssobomax sio_setreg(com, com_lctl, 0); 626112270Ssobomax /* Set prescaler to 1 */ 627112270Ssobomax sio_setreg(com, com_mcr, sio_getreg(com, com_mcr) & 0x7f); 628112270Ssobomax /* Enable EFR */ 629112270Ssobomax sio_setreg(com, com_lctl, 0xbf); 630112270Ssobomax /* Restore EFR */ 631112270Ssobomax sio_setreg(com, com_iir, t2); 632112270Ssobomax /* Restore LCR */ 633112270Ssobomax sio_setreg(com, com_lctl, t1); 634112270Ssobomax } 635112270Ssobomax /* 63651078Speter * Initialize the speed and the word size and wait long enough to 63751078Speter * drain the maximum of 16 bytes of junk in device output queues. 63851078Speter * The speed is undefined after a master reset and must be set 63951078Speter * before relying on anything related to output. There may be 64051078Speter * junk after a (very fast) soft reboot and (apparently) after 64151078Speter * master reset. 64251078Speter * XXX what about the UART bug avoided by waiting in comparam()? 64351078Speter * We don't want to to wait long enough to drain at 2 bps. 64451078Speter */ 64551078Speter if (iobase == siocniobase) 64651078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 64751078Speter else { 64860471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 64989986Sjhay divisor = siodivisor(rclk, SIO_TEST_SPEED); 65089986Sjhay sio_setreg(com, com_dlbl, divisor & 0xff); 65189986Sjhay sio_setreg(com, com_dlbh, divisor >> 8); 65260471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 65351078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 65451078Speter } 65551078Speter 65651078Speter /* 65751078Speter * Enable the interrupt gate and disable device interupts. This 65851078Speter * should leave the device driving the interrupt line low and 65951078Speter * guarantee an edge trigger if an interrupt can be generated. 66051078Speter */ 66151078Speter/* EXTRA DELAY? */ 66260471Snyan sio_setreg(com, com_mcr, mcr_image); 66360471Snyan sio_setreg(com, com_ier, 0); 66451078Speter DELAY(1000); /* XXX */ 66551078Speter irqmap[0] = isa_irq_pending(); 66651078Speter 66751078Speter /* 66851078Speter * Attempt to set loopback mode so that we can send a null byte 66951078Speter * without annoying any external device. 67051078Speter */ 67151078Speter/* EXTRA DELAY? */ 67260471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 67351078Speter 67451078Speter /* 67551078Speter * Attempt to generate an output interrupt. On 8250's, setting 67651078Speter * IER_ETXRDY generates an interrupt independent of the current 67751078Speter * setting and independent of whether the THR is empty. On 16450's, 67851078Speter * setting IER_ETXRDY generates an interrupt independent of the 67951078Speter * current setting. On 16550A's, setting IER_ETXRDY only 68051078Speter * generates an interrupt when IER_ETXRDY is not already set. 68151078Speter */ 68260471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 68351078Speter 68451078Speter /* 68551078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 68651078Speter * an interrupt. They'd better generate one for actually doing 68751078Speter * output. Loopback may be broken on the same incompatibles but 68851078Speter * it's unlikely to do more than allow the null byte out. 68951078Speter */ 69060471Snyan sio_setreg(com, com_data, 0); 69151078Speter DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 69251078Speter 69351078Speter /* 69451078Speter * Turn off loopback mode so that the interrupt gate works again 69551078Speter * (MCR_IENABLE was hidden). This should leave the device driving 69651078Speter * an interrupt line high. It doesn't matter if the interrupt 69751078Speter * line oscillates while we are not looking at it, since interrupts 69851078Speter * are disabled. 69951078Speter */ 70051078Speter/* EXTRA DELAY? */ 70160471Snyan sio_setreg(com, com_mcr, mcr_image); 70292401Simp 70392401Simp /* 70492401Simp * It seems my Xircom CBEM56G Cardbus modem wants to be reset 70592401Simp * to 8 bits *again*, or else probe test 0 will fail. 70692401Simp * gwk@sgi.com, 4/19/2001 70792401Simp */ 70892401Simp sio_setreg(com, com_cfcr, CFCR_8BITS); 70951078Speter 71051078Speter /* 71152471Simp * Some pcmcia cards have the "TXRDY bug", so we check everyone 71251078Speter * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 71351078Speter */ 71485365Simp if (noprobe) { 71553370Speter /* Reading IIR register twice */ 71653370Speter for (fn = 0; fn < 2; fn ++) { 71753370Speter DELAY(10000); 71860471Snyan failures[6] = sio_getreg(com, com_iir); 71953370Speter } 72053370Speter /* Check IIR_TXRDY clear ? */ 72153370Speter result = 0; 72253370Speter if (failures[6] & IIR_TXRDY) { 72392401Simp /* No, Double check with clearing IER */ 72460471Snyan sio_setreg(com, com_ier, 0); 72560471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 72692401Simp /* Ok. We discovered TXRDY bug! */ 72753370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 72853370Speter } else { 72953370Speter /* Unknown, Just omit this chip.. XXX */ 73053370Speter result = ENXIO; 73181793Simp sio_setreg(com, com_mcr, 0); 73253370Speter } 73351078Speter } else { 73453370Speter /* OK. this is well-known guys */ 73553370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 73651078Speter } 73781793Simp sio_setreg(com, com_ier, 0); 73860471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 73972200Sbmilekic mtx_unlock_spin(&sio_lock); 74053344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 74186909Simp if (iobase == siocniobase) 74286909Simp result = 0; 74386909Simp if (result != 0) { 74486909Simp device_set_softc(dev, NULL); 74586909Simp free(com, M_DEVBUF); 74686909Simp } 74786909Simp return (result); 74853344Speter } 74953344Speter 75051078Speter /* 75151078Speter * Check that 75251078Speter * o the CFCR, IER and MCR in UART hold the values written to them 75351078Speter * (the values happen to be all distinct - this is good for 75451078Speter * avoiding false positive tests from bus echoes). 75551078Speter * o an output interrupt is generated and its vector is correct. 75651078Speter * o the interrupt goes away when the IIR in the UART is read. 75751078Speter */ 75851078Speter/* EXTRA DELAY? */ 75960471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 76060471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 761112154Ssobomax failures[2] = (sio_getreg(com, com_mcr) & 0x7f) - mcr_image; 762112270Ssobomax failures[2] = sio_getreg(com, com_mcr) - mcr_image; 76351078Speter DELAY(10000); /* Some internal modems need this time */ 76451078Speter irqmap[1] = isa_irq_pending(); 76560471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 76651078Speter DELAY(1000); /* XXX */ 76751078Speter irqmap[2] = isa_irq_pending(); 76860471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 76951078Speter 77051078Speter /* 77151078Speter * Turn off all device interrupts and check that they go off properly. 77251078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 77351078Speter * the OUT2 output of the UART to 77451078Speter * the ICU input. Closing the gate would give a floating ICU input 77551078Speter * (unless there is another device driving it) and spurious interrupts. 77651078Speter * (On the system that this was first tested on, the input floats high 77751078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 77851078Speter */ 77960471Snyan sio_setreg(com, com_ier, 0); 78060471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 78160471Snyan failures[7] = sio_getreg(com, com_ier); 78251078Speter DELAY(1000); /* XXX */ 78351078Speter irqmap[3] = isa_irq_pending(); 78460471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 78551078Speter 78672200Sbmilekic mtx_unlock_spin(&sio_lock); 78751078Speter 78851078Speter irqs = irqmap[1] & ~irqmap[0]; 78954194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 79089463Simp ((1 << xirq) & irqs) == 0) { 79151078Speter printf( 79254206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 79353344Speter device_get_unit(dev), xirq, irqs); 79489447Sbmah printf( 79589470Sbmah "sio%d: port may not be enabled\n", 79689447Sbmah device_get_unit(dev)); 79789463Simp } 79851078Speter if (bootverbose) 79951078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 80051078Speter device_get_unit(dev), 80151078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 80251078Speter 80351078Speter result = 0; 80451078Speter for (fn = 0; fn < sizeof failures; ++fn) 80551078Speter if (failures[fn]) { 80660471Snyan sio_setreg(com, com_mcr, 0); 80751078Speter result = ENXIO; 80851078Speter if (bootverbose) { 80951078Speter printf("sio%d: probe failed test(s):", 81051078Speter device_get_unit(dev)); 81151078Speter for (fn = 0; fn < sizeof failures; ++fn) 81251078Speter if (failures[fn]) 81351078Speter printf(" %d", fn); 81451078Speter printf("\n"); 81551078Speter } 81651078Speter break; 81751078Speter } 81851078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 81986909Simp if (iobase == siocniobase) 82086909Simp result = 0; 82186909Simp if (result != 0) { 82286909Simp device_set_softc(dev, NULL); 82386909Simp free(com, M_DEVBUF); 82486909Simp } 82586909Simp return (result); 82651078Speter} 82751078Speter 82851078Speter#ifdef COM_ESP 82951078Speterstatic int 83051078Speterespattach(com, esp_port) 83151078Speter struct com_s *com; 83251078Speter Port_t esp_port; 83351078Speter{ 83451078Speter u_char dips; 83551078Speter u_char val; 83651078Speter 83751078Speter /* 83851078Speter * Check the ESP-specific I/O port to see if we're an ESP 83951078Speter * card. If not, return failure immediately. 84051078Speter */ 84151078Speter if ((inb(esp_port) & 0xf3) == 0) { 84251078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 84351078Speter return (0); 84451078Speter } 84551078Speter 84651078Speter /* 84751078Speter * We've got something that claims to be a Hayes ESP card. 84851078Speter * Let's hope so. 84951078Speter */ 85051078Speter 85151078Speter /* Get the dip-switch configuration */ 85251078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 85351078Speter dips = inb(esp_port + ESP_STATUS1); 85451078Speter 85551078Speter /* 85651078Speter * Bits 0,1 of dips say which COM port we are. 85751078Speter */ 85860471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 85951078Speter printf(" : ESP"); 86051078Speter else { 86151078Speter printf(" esp_port has com %d\n", dips & 0x03); 86251078Speter return (0); 86351078Speter } 86451078Speter 86551078Speter /* 86651078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 86751078Speter */ 86851078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 86951078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 87051078Speter val = inb(esp_port + ESP_STATUS2); 87151078Speter if ((val & 0x70) < 0x20) { 87251078Speter printf("-old (%o)", val & 0x70); 87351078Speter return (0); 87451078Speter } 87551078Speter 87651078Speter /* 87751078Speter * Check for ability to emulate 16550: bit 7 == 1 87851078Speter */ 87951078Speter if ((dips & 0x80) == 0) { 88051078Speter printf(" slave"); 88151078Speter return (0); 88251078Speter } 88351078Speter 88451078Speter /* 88551078Speter * Okay, we seem to be a Hayes ESP card. Whee. 88651078Speter */ 88751078Speter com->esp = TRUE; 88851078Speter com->esp_port = esp_port; 88951078Speter return (1); 89051078Speter} 89151078Speter#endif /* COM_ESP */ 89251078Speter 89385365Simpint 89489986Sjhaysioattach(dev, xrid, rclk) 89551078Speter device_t dev; 89658885Simp int xrid; 89789986Sjhay u_long rclk; 89851078Speter{ 89951078Speter struct com_s *com; 90051078Speter#ifdef COM_ESP 90151078Speter Port_t *espp; 90251078Speter#endif 90351078Speter Port_t iobase; 90493470Sbde int minorbase; 90551078Speter int unit; 90653344Speter u_int flags; 90751078Speter int rid; 90851078Speter struct resource *port; 90953344Speter int ret; 91051078Speter 91158885Simp rid = xrid; 91251078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 91351078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 91451078Speter if (!port) 91557915Simp return (ENXIO); 91651078Speter 91751078Speter iobase = rman_get_start(port); 91851078Speter unit = device_get_unit(dev); 91951078Speter com = device_get_softc(dev); 92053344Speter flags = device_get_flags(dev); 92151078Speter 92253344Speter if (unit >= sio_numunits) 92353344Speter sio_numunits = unit + 1; 92451078Speter /* 92551078Speter * sioprobe() has initialized the device registers as follows: 92651078Speter * o cfcr = CFCR_8BITS. 92751078Speter * It is most important that CFCR_DLAB is off, so that the 92851078Speter * data port is not hidden when we enable interrupts. 92951078Speter * o ier = 0. 93051078Speter * Interrupts are only enabled when the line is open. 93151078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 93251078Speter * interrupt control register or the config specifies no irq. 93351078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 93451078Speter * device from sending before we are ready. 93551078Speter */ 93651078Speter bzero(com, sizeof *com); 93751078Speter com->unit = unit; 93851078Speter com->ioportres = port; 93960471Snyan com->bst = rman_get_bustag(port); 94060471Snyan com->bsh = rman_get_bushandle(port); 94151078Speter com->cfcr_image = CFCR_8BITS; 94251078Speter com->dtr_wait = 3 * hz; 94351078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 94457234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 94551078Speter com->tx_fifo_size = 1; 94651078Speter com->obufs[0].l_head = com->obuf1; 94751078Speter com->obufs[1].l_head = com->obuf2; 94851078Speter 94951078Speter com->data_port = iobase + com_data; 95051078Speter com->int_id_port = iobase + com_iir; 95151078Speter com->modem_ctl_port = iobase + com_mcr; 95251078Speter com->mcr_image = inb(com->modem_ctl_port); 95351078Speter com->line_status_port = iobase + com_lsr; 95451078Speter com->modem_status_port = iobase + com_msr; 95551078Speter com->intr_ctl_port = iobase + com_ier; 95651078Speter 95789986Sjhay if (rclk == 0) 95889986Sjhay rclk = DEFAULT_RCLK; 95989986Sjhay com->rclk = rclk; 96089986Sjhay 96151078Speter /* 96251078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 96351078Speter * are only relevant for logins. It's important to have echo off 96451078Speter * initially so that the line doesn't start blathering before the 96551078Speter * echo flag can be turned off. 96651078Speter */ 96751078Speter com->it_in.c_iflag = 0; 96851078Speter com->it_in.c_oflag = 0; 96951078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 97051078Speter com->it_in.c_lflag = 0; 97151078Speter if (unit == comconsole) { 97251078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 97351078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 97451078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 97551078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 97651078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 97751078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 97851078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 97951078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 98051078Speter } else 98151078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 98265605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 98372200Sbmilekic mtx_unlock_spin(&sio_lock); 98456788Sbde /* 98556788Sbde * Leave i/o resources allocated if this is a `cn'-level 98656788Sbde * console, so that other devices can't snarf them. 98756788Sbde */ 98856788Sbde if (iobase != siocniobase) 98956788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 99056788Sbde return (ENOMEM); 99151078Speter } 99272200Sbmilekic mtx_unlock_spin(&sio_lock); 99351078Speter termioschars(&com->it_in); 99451078Speter com->it_out = com->it_in; 99551078Speter 99651078Speter /* attempt to determine UART type */ 99751078Speter printf("sio%d: type", unit); 99851078Speter 99951078Speter 1000104067Sphk if (!COM_ISMULTIPORT(flags) && 1001104067Sphk !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 100251078Speter u_char scr; 100351078Speter u_char scr1; 100451078Speter u_char scr2; 100551078Speter 100660471Snyan scr = sio_getreg(com, com_scr); 100760471Snyan sio_setreg(com, com_scr, 0xa5); 100860471Snyan scr1 = sio_getreg(com, com_scr); 100960471Snyan sio_setreg(com, com_scr, 0x5a); 101060471Snyan scr2 = sio_getreg(com, com_scr); 101160471Snyan sio_setreg(com, com_scr, scr); 101251078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 101389447Sbmah printf(" 8250 or not responding"); 101451078Speter goto determined_type; 101551078Speter } 101651078Speter } 101760471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 101851078Speter DELAY(100); 101951078Speter com->st16650a = 0; 102051078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 102151078Speter case FIFO_RX_LOW: 102251078Speter printf(" 16450"); 102351078Speter break; 102451078Speter case FIFO_RX_MEDL: 102551078Speter printf(" 16450?"); 102651078Speter break; 102751078Speter case FIFO_RX_MEDH: 102851078Speter printf(" 16550?"); 102951078Speter break; 103051078Speter case FIFO_RX_HIGH: 103151078Speter if (COM_NOFIFO(flags)) { 103251078Speter printf(" 16550A fifo disabled"); 103351078Speter } else { 103451078Speter com->hasfifo = TRUE; 103551078Speter if (COM_ST16650A(flags)) { 103651078Speter com->st16650a = 1; 103751078Speter com->tx_fifo_size = 32; 103851078Speter printf(" ST16650A"); 1039112270Ssobomax } else if (COM_TI16754(flags)) { 1040112270Ssobomax com->tx_fifo_size = 64; 1041112270Ssobomax printf(" TI16754"); 104251078Speter } else { 104351078Speter com->tx_fifo_size = COM_FIFOSIZE(flags); 104451078Speter printf(" 16550A"); 104551078Speter } 104651078Speter } 104751078Speter#ifdef COM_ESP 104851078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 104951078Speter if (espattach(com, *espp)) { 105051078Speter com->tx_fifo_size = 1024; 105151078Speter break; 105251078Speter } 105351078Speter#endif 1054112270Ssobomax if (!com->st16650a && !COM_TI16754(flags)) { 105551078Speter if (!com->tx_fifo_size) 105651078Speter com->tx_fifo_size = 16; 105751078Speter else 105851078Speter printf(" lookalike with %d bytes FIFO", 105951078Speter com->tx_fifo_size); 106051078Speter } 106151078Speter 106251078Speter break; 106351078Speter } 106451078Speter 106551078Speter#ifdef COM_ESP 106651078Speter if (com->esp) { 106751078Speter /* 106851078Speter * Set 16550 compatibility mode. 106951078Speter * We don't use the ESP_MODE_SCALE bit to increase the 107051078Speter * fifo trigger levels because we can't handle large 107151078Speter * bursts of input. 107251078Speter * XXX flow control should be set in comparam(), not here. 107351078Speter */ 107451078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 107551078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 107651078Speter 107751078Speter /* Set RTS/CTS flow control. */ 107851078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 107951078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 108051078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 108151078Speter 108251078Speter /* Set flow-control levels. */ 108351078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 108451078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 108551078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 108651078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 108751078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 108851078Speter } 108951078Speter#endif /* COM_ESP */ 109060471Snyan sio_setreg(com, com_fifo, 0); 109151078Speterdetermined_type: ; 109251078Speter 109351078Speter#ifdef COM_MULTIPORT 109451078Speter if (COM_ISMULTIPORT(flags)) { 109553344Speter device_t masterdev; 109653344Speter 109751078Speter com->multiport = TRUE; 109851078Speter printf(" (multiport"); 109951078Speter if (unit == COM_MPMASTER(flags)) 110051078Speter printf(" master"); 110151078Speter printf(")"); 110253344Speter masterdev = devclass_get_device(sio_devclass, 110353344Speter COM_MPMASTER(flags)); 110457234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 110557234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 110651078Speter } 110751078Speter#endif /* COM_MULTIPORT */ 110851078Speter if (unit == comconsole) 110951078Speter printf(", console"); 111053344Speter if (COM_IIR_TXRDYBUG(flags)) 111151078Speter printf(" with a bogus IIR_TXRDY register"); 111251078Speter printf("\n"); 111351078Speter 111467551Sjhb if (sio_fast_ih == NULL) { 111572238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 111672238Sjhb &sio_fast_ih); 111772238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 111872238Sjhb &sio_slow_ih); 111951078Speter } 112093470Sbde minorbase = UNIT_TO_MINOR(unit); 112193470Sbde com->devs[0] = make_dev(&sio_cdevsw, minorbase, 112251078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 112393470Sbde com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 112451078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 112593470Sbde com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 112651078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 112793470Sbde com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 112851078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 112965131Sphk com->devs[4] = make_dev(&sio_cdevsw, 113093470Sbde minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 113151078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 113265131Sphk com->devs[5] = make_dev(&sio_cdevsw, 113393470Sbde minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 113451078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1135110249Sphk for (rid = 0; rid < 6; rid++) 1136110249Sphk com->devs[rid]->si_drv1 = com; 113751078Speter com->flags = flags; 113851078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1139111613Sphk 1140111613Sphk if (COM_PPSCTS(flags)) 1141111613Sphk com->pps_bit = MSR_CTS; 1142111613Sphk else 1143111613Sphk com->pps_bit = MSR_DCD; 114451078Speter pps_init(&com->pps); 114551078Speter 114651078Speter rid = 0; 114751078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 114853344Speter RF_ACTIVE); 114953344Speter if (com->irqres) { 115053344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 115165557Sjasone INTR_TYPE_TTY | INTR_FAST, 115254386Simp siointr, com, &com->cookie); 115354194Speter if (ret) { 115454194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 115554194Speter com->irqres, INTR_TYPE_TTY, 115654386Simp siointr, com, &com->cookie); 115754194Speter if (ret == 0) 115883246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 115954194Speter } 116053344Speter if (ret) 116153344Speter device_printf(dev, "could not activate interrupt\n"); 116278504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 116378504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 116478504Siedowse /* 116578504Siedowse * Enable interrupts for early break-to-debugger support 116678504Siedowse * on the console. 116778504Siedowse */ 116878504Siedowse if (ret == 0 && unit == comconsole) 116978504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 117078504Siedowse IER_EMSC); 117178504Siedowse#endif 117253344Speter } 117351078Speter 117451078Speter return (0); 117551078Speter} 117651078Speter 117751078Speterstatic int 117883366Sjuliansioopen(dev, flag, mode, td) 117951078Speter dev_t dev; 118051078Speter int flag; 118151078Speter int mode; 118283366Sjulian struct thread *td; 118351078Speter{ 118451078Speter struct com_s *com; 118551078Speter int error; 118651078Speter int mynor; 118751078Speter int s; 118851078Speter struct tty *tp; 118951078Speter int unit; 119051078Speter 119151078Speter mynor = minor(dev); 119251078Speter unit = MINOR_TO_UNIT(mynor); 119353344Speter com = com_addr(unit); 119453344Speter if (com == NULL) 119551078Speter return (ENXIO); 119651078Speter if (com->gone) 119751078Speter return (ENXIO); 119851078Speter if (mynor & CONTROL_MASK) 119951078Speter return (0); 120051078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 120151078Speter s = spltty(); 120251078Speter /* 120351078Speter * We jump to this label after all non-interrupted sleeps to pick 120451078Speter * up any changes of the device state. 120551078Speter */ 120651078Speteropen_top: 120751078Speter while (com->state & CS_DTR_OFF) { 120851078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 120951078Speter if (com_addr(unit) == NULL) 121051078Speter return (ENXIO); 121151078Speter if (error != 0 || com->gone) 121251078Speter goto out; 121351078Speter } 121451078Speter if (tp->t_state & TS_ISOPEN) { 121551078Speter /* 121651078Speter * The device is open, so everything has been initialized. 121751078Speter * Handle conflicts. 121851078Speter */ 121951078Speter if (mynor & CALLOUT_MASK) { 122051078Speter if (!com->active_out) { 122151078Speter error = EBUSY; 122251078Speter goto out; 122351078Speter } 122451078Speter } else { 122551078Speter if (com->active_out) { 122651078Speter if (flag & O_NONBLOCK) { 122751078Speter error = EBUSY; 122851078Speter goto out; 122951078Speter } 123051078Speter error = tsleep(&com->active_out, 123151078Speter TTIPRI | PCATCH, "siobi", 0); 123251078Speter if (com_addr(unit) == NULL) 123351078Speter return (ENXIO); 123451078Speter if (error != 0 || com->gone) 123551078Speter goto out; 123651078Speter goto open_top; 123751078Speter } 123851078Speter } 123951078Speter if (tp->t_state & TS_XCLUDE && 124093593Sjhb suser(td)) { 124151078Speter error = EBUSY; 124251078Speter goto out; 124351078Speter } 124451078Speter } else { 124551078Speter /* 124651078Speter * The device isn't open, so there are no conflicts. 124751078Speter * Initialize it. Initialization is done twice in many 124851078Speter * cases: to preempt sleeping callin opens if we are 124951078Speter * callout, and to complete a callin open after DCD rises. 125051078Speter */ 125151078Speter tp->t_oproc = comstart; 125251078Speter tp->t_param = comparam; 125351654Sphk tp->t_stop = comstop; 125451078Speter tp->t_dev = dev; 125551078Speter tp->t_termios = mynor & CALLOUT_MASK 125651078Speter ? com->it_out : com->it_in; 125751078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 125851078Speter com->poll = com->no_irq; 125951078Speter com->poll_output = com->loses_outints; 126051078Speter ++com->wopeners; 126151078Speter error = comparam(tp, &tp->t_termios); 126251078Speter --com->wopeners; 126351078Speter if (error != 0) 126451078Speter goto out; 126551078Speter /* 126651078Speter * XXX we should goto open_top if comparam() slept. 126751078Speter */ 126851078Speter if (com->hasfifo) { 1269102542Sphk int i; 127051078Speter /* 127151078Speter * (Re)enable and drain fifos. 127251078Speter * 127351078Speter * Certain SMC chips cause problems if the fifos 127451078Speter * are enabled while input is ready. Turn off the 127551078Speter * fifo if necessary to clear the input. We test 127651078Speter * the input ready bit after enabling the fifos 127751078Speter * since we've already enabled them in comparam() 127851078Speter * and to handle races between enabling and fresh 127951078Speter * input. 128051078Speter */ 1281102542Sphk for (i = 0; i < 500; i++) { 128260471Snyan sio_setreg(com, com_fifo, 128360471Snyan FIFO_RCV_RST | FIFO_XMT_RST 128460471Snyan | com->fifo_image); 128551078Speter /* 128651078Speter * XXX the delays are for superstitious 128751078Speter * historical reasons. It must be less than 128851078Speter * the character time at the maximum 128951078Speter * supported speed (87 usec at 115200 bps 129051078Speter * 8N1). Otherwise we might loop endlessly 129151078Speter * if data is streaming in. We used to use 129251078Speter * delays of 100. That usually worked 129351078Speter * because DELAY(100) used to usually delay 129451078Speter * for about 85 usec instead of 100. 129551078Speter */ 129651078Speter DELAY(50); 129751078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 129851078Speter break; 129960471Snyan sio_setreg(com, com_fifo, 0); 130051078Speter DELAY(50); 130151078Speter (void) inb(com->data_port); 130251078Speter } 1303102542Sphk if (i == 500) { 1304102542Sphk error = EIO; 1305102542Sphk goto out; 1306102542Sphk } 130751078Speter } 130851078Speter 130972200Sbmilekic mtx_lock_spin(&sio_lock); 131051078Speter (void) inb(com->line_status_port); 131151078Speter (void) inb(com->data_port); 131251078Speter com->prev_modem_status = com->last_modem_status 131351078Speter = inb(com->modem_status_port); 131451078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 131551078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 131651078Speter | IER_EMSC); 131751078Speter } else { 131851078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 131951078Speter | IER_ERLS | IER_EMSC); 132051078Speter } 132172200Sbmilekic mtx_unlock_spin(&sio_lock); 132251078Speter /* 132351078Speter * Handle initial DCD. Callout devices get a fake initial 132451078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 132551078Speter * callin opens get woken up and resume sleeping on "siobi" 132651078Speter * instead of "siodcd". 132751078Speter */ 132851078Speter /* 132951078Speter * XXX `mynor & CALLOUT_MASK' should be 133051078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 133151078Speter * TRAPDOOR_CARRIER is the default initial state for callout 133251078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 133351078Speter * the true carrier. 133451078Speter */ 133551078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 133651078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 133751078Speter } 133851078Speter /* 133951078Speter * Wait for DCD if necessary. 134051078Speter */ 134151078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 134251078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 134351078Speter ++com->wopeners; 134451078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 134551078Speter if (com_addr(unit) == NULL) 134651078Speter return (ENXIO); 134751078Speter --com->wopeners; 134851078Speter if (error != 0 || com->gone) 134951078Speter goto out; 135051078Speter goto open_top; 135151078Speter } 135251078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 135351078Speter disc_optim(tp, &tp->t_termios, com); 135451078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 135551078Speter com->active_out = TRUE; 135651078Speter siosettimeout(); 135751078Speterout: 135851078Speter splx(s); 135951078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 136051078Speter comhardclose(com); 136151078Speter return (error); 136251078Speter} 136351078Speter 136451078Speterstatic int 136583366Sjuliansioclose(dev, flag, mode, td) 136651078Speter dev_t dev; 136751078Speter int flag; 136851078Speter int mode; 136983366Sjulian struct thread *td; 137051078Speter{ 137151078Speter struct com_s *com; 137251078Speter int mynor; 137351078Speter int s; 137451078Speter struct tty *tp; 137551078Speter 137651078Speter mynor = minor(dev); 137751078Speter if (mynor & CONTROL_MASK) 137851078Speter return (0); 137951078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 138057915Simp if (com == NULL) 138157915Simp return (ENODEV); 138251078Speter tp = com->tp; 138351078Speter s = spltty(); 138451078Speter (*linesw[tp->t_line].l_close)(tp, flag); 138551078Speter disc_optim(tp, &tp->t_termios, com); 138651654Sphk comstop(tp, FREAD | FWRITE); 138751078Speter comhardclose(com); 138851078Speter ttyclose(tp); 138951078Speter siosettimeout(); 139051078Speter splx(s); 139151078Speter if (com->gone) { 139251078Speter printf("sio%d: gone\n", com->unit); 139351078Speter s = spltty(); 139451078Speter if (com->ibuf != NULL) 139551078Speter free(com->ibuf, M_DEVBUF); 139651078Speter bzero(tp, sizeof *tp); 139751078Speter splx(s); 139851078Speter } 139951078Speter return (0); 140051078Speter} 140151078Speter 140251078Speterstatic void 140351078Spetercomhardclose(com) 140451078Speter struct com_s *com; 140551078Speter{ 140651078Speter int s; 140751078Speter struct tty *tp; 140851078Speter int unit; 140951078Speter 141051078Speter unit = com->unit; 141151078Speter s = spltty(); 141251078Speter com->poll = FALSE; 141351078Speter com->poll_output = FALSE; 141451078Speter com->do_timestamp = FALSE; 141551078Speter com->do_dcd_timestamp = FALSE; 141651078Speter com->pps.ppsparam.mode = 0; 141760471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 141878504Siedowse tp = com->tp; 141978504Siedowse 142078504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 142178504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 142278504Siedowse /* 142378504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 142478504Siedowse * console. This allows us to detect break-to-debugger events 142578504Siedowse * while the console device is closed. 142678504Siedowse */ 142778504Siedowse if (com->unit != comconsole) 142878504Siedowse#endif 142951078Speter { 143060471Snyan sio_setreg(com, com_ier, 0); 143151078Speter if (tp->t_cflag & HUPCL 143251078Speter /* 143351078Speter * XXX we will miss any carrier drop between here and the 143451078Speter * next open. Perhaps we should watch DCD even when the 143551078Speter * port is closed; it is not sufficient to check it at 143651078Speter * the next open because it might go up and down while 143751078Speter * we're not watching. 143851078Speter */ 143951078Speter || (!com->active_out 144051078Speter && !(com->prev_modem_status & MSR_DCD) 144151078Speter && !(com->it_in.c_cflag & CLOCAL)) 144251078Speter || !(tp->t_state & TS_ISOPEN)) { 144351078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 144451078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 144551078Speter timeout(siodtrwakeup, com, com->dtr_wait); 144651078Speter com->state |= CS_DTR_OFF; 144751078Speter } 144851078Speter } 144951078Speter } 145051078Speter if (com->hasfifo) { 145151078Speter /* 145251078Speter * Disable fifos so that they are off after controlled 145351078Speter * reboots. Some BIOSes fail to detect 16550s when the 145451078Speter * fifos are enabled. 145551078Speter */ 145660471Snyan sio_setreg(com, com_fifo, 0); 145751078Speter } 145851078Speter com->active_out = FALSE; 145951078Speter wakeup(&com->active_out); 146051078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 146151078Speter splx(s); 146251078Speter} 146351078Speter 146451078Speterstatic int 146551078Spetersioread(dev, uio, flag) 146651078Speter dev_t dev; 146751078Speter struct uio *uio; 146851078Speter int flag; 146951078Speter{ 147051078Speter int mynor; 147151078Speter struct com_s *com; 147251078Speter 147351078Speter mynor = minor(dev); 147451078Speter if (mynor & CONTROL_MASK) 147551078Speter return (ENODEV); 147651078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 147757915Simp if (com == NULL || com->gone) 147851078Speter return (ENODEV); 147951078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 148051078Speter} 148151078Speter 148251078Speterstatic int 148351078Spetersiowrite(dev, uio, flag) 148451078Speter dev_t dev; 148551078Speter struct uio *uio; 148651078Speter int flag; 148751078Speter{ 148851078Speter int mynor; 148951078Speter struct com_s *com; 149051078Speter int unit; 149151078Speter 149251078Speter mynor = minor(dev); 149351078Speter if (mynor & CONTROL_MASK) 149451078Speter return (ENODEV); 149551078Speter 149651078Speter unit = MINOR_TO_UNIT(mynor); 149751078Speter com = com_addr(unit); 149857915Simp if (com == NULL || com->gone) 149951078Speter return (ENODEV); 150051078Speter /* 150151078Speter * (XXX) We disallow virtual consoles if the physical console is 150251078Speter * a serial port. This is in case there is a display attached that 150351078Speter * is not the console. In that situation we don't need/want the X 150451078Speter * server taking over the console. 150551078Speter */ 150651078Speter if (constty != NULL && unit == comconsole) 150751078Speter constty = NULL; 150851078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 150951078Speter} 151051078Speter 151151078Speterstatic void 151251078Spetersiobusycheck(chan) 151351078Speter void *chan; 151451078Speter{ 151551078Speter struct com_s *com; 151651078Speter int s; 151751078Speter 151851078Speter com = (struct com_s *)chan; 151951078Speter 152051078Speter /* 152151078Speter * Clear TS_BUSY if low-level output is complete. 152251078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 152351078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 152451078Speter * called again. Reading the line status port outside of siointr1() 152551078Speter * is safe because CS_BUSY is clear so there are no output interrupts 152651078Speter * to lose. 152751078Speter */ 152851078Speter s = spltty(); 152951078Speter if (com->state & CS_BUSY) 153051078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 153151078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 153251078Speter == (LSR_TSRE | LSR_TXRDY)) { 153351078Speter com->tp->t_state &= ~TS_BUSY; 153451078Speter ttwwakeup(com->tp); 153551078Speter com->extra_state &= ~CSE_BUSYCHECK; 153651078Speter } else 153751078Speter timeout(siobusycheck, com, hz / 100); 153851078Speter splx(s); 153951078Speter} 154051078Speter 154189986Sjhaystatic u_int 154289986Sjhaysiodivisor(rclk, speed) 154389986Sjhay u_long rclk; 154489986Sjhay speed_t speed; 154589986Sjhay{ 154689986Sjhay long actual_speed; 154789986Sjhay u_int divisor; 154889986Sjhay int error; 154989986Sjhay 155089986Sjhay if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 155189986Sjhay return (0); 155289986Sjhay divisor = (rclk / (8UL * speed) + 1) / 2; 155389986Sjhay if (divisor == 0 || divisor >= 65536) 155489986Sjhay return (0); 155589986Sjhay actual_speed = rclk / (16UL * divisor); 155689986Sjhay 155789986Sjhay /* 10 times error in percent: */ 155889986Sjhay error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 155989986Sjhay 156089986Sjhay /* 3.0% maximum error tolerance: */ 156189986Sjhay if (error < -30 || error > 30) 156289986Sjhay return (0); 156389986Sjhay 156489986Sjhay return (divisor); 156589986Sjhay} 156689986Sjhay 156751078Speterstatic void 156851078Spetersiodtrwakeup(chan) 156951078Speter void *chan; 157051078Speter{ 157151078Speter struct com_s *com; 157251078Speter 157351078Speter com = (struct com_s *)chan; 157451078Speter com->state &= ~CS_DTR_OFF; 157551078Speter wakeup(&com->dtr_wait); 157651078Speter} 157751078Speter 157865557Sjasone/* 157970174Sjhb * Call this function with the sio_lock mutex held. It will return with the 158070174Sjhb * lock still held. 158165557Sjasone */ 158251078Speterstatic void 158351078Spetersioinput(com) 158451078Speter struct com_s *com; 158551078Speter{ 158651078Speter u_char *buf; 158751078Speter int incc; 158851078Speter u_char line_status; 158951078Speter int recv_data; 159051078Speter struct tty *tp; 159151078Speter 159251078Speter buf = com->ibuf; 159351078Speter tp = com->tp; 159451078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 159551078Speter com_events -= (com->iptr - com->ibuf); 159651078Speter com->iptr = com->ibuf; 159751078Speter return; 159851078Speter } 159951078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 160051078Speter /* 160151078Speter * Avoid the grotesquely inefficient lineswitch routine 160251078Speter * (ttyinput) in "raw" mode. It usually takes about 450 160351078Speter * instructions (that's without canonical processing or echo!). 160451078Speter * slinput is reasonably fast (usually 40 instructions plus 160551078Speter * call overhead). 160651078Speter */ 160751078Speter do { 160865557Sjasone /* 160965557Sjasone * This may look odd, but it is using save-and-enable 161065557Sjasone * semantics instead of the save-and-disable semantics 161165557Sjasone * that are used everywhere else. 161265557Sjasone */ 161372200Sbmilekic mtx_unlock_spin(&sio_lock); 161451078Speter incc = com->iptr - buf; 161551078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 161651078Speter && (com->state & CS_RTS_IFLOW 161751078Speter || tp->t_iflag & IXOFF) 161851078Speter && !(tp->t_state & TS_TBLOCK)) 161951078Speter ttyblock(tp); 162051078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 162151078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 162251078Speter buf += incc; 162351078Speter tk_nin += incc; 162451078Speter tk_rawcc += incc; 162551078Speter tp->t_rawcc += incc; 162651078Speter ttwakeup(tp); 162751078Speter if (tp->t_state & TS_TTSTOP 162851078Speter && (tp->t_iflag & IXANY 162951078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 163051078Speter tp->t_state &= ~TS_TTSTOP; 163151078Speter tp->t_lflag &= ~FLUSHO; 163251078Speter comstart(tp); 163351078Speter } 163472200Sbmilekic mtx_lock_spin(&sio_lock); 163551078Speter } while (buf < com->iptr); 163651078Speter } else { 163751078Speter do { 163865557Sjasone /* 163965557Sjasone * This may look odd, but it is using save-and-enable 164065557Sjasone * semantics instead of the save-and-disable semantics 164165557Sjasone * that are used everywhere else. 164265557Sjasone */ 164372200Sbmilekic mtx_unlock_spin(&sio_lock); 164451078Speter line_status = buf[com->ierroff]; 164551078Speter recv_data = *buf++; 164651078Speter if (line_status 164751078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 164851078Speter if (line_status & LSR_BI) 164951078Speter recv_data |= TTY_BI; 165051078Speter if (line_status & LSR_FE) 165151078Speter recv_data |= TTY_FE; 165251078Speter if (line_status & LSR_OE) 165351078Speter recv_data |= TTY_OE; 165451078Speter if (line_status & LSR_PE) 165551078Speter recv_data |= TTY_PE; 165651078Speter } 165751078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 165872200Sbmilekic mtx_lock_spin(&sio_lock); 165951078Speter } while (buf < com->iptr); 166051078Speter } 166151078Speter com_events -= (com->iptr - com->ibuf); 166251078Speter com->iptr = com->ibuf; 166351078Speter 166451078Speter /* 166551078Speter * There is now room for another low-level buffer full of input, 166651078Speter * so enable RTS if it is now disabled and there is room in the 166751078Speter * high-level buffer. 166851078Speter */ 166951078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 167051078Speter !(tp->t_state & TS_TBLOCK)) 167151078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 167251078Speter} 167351078Speter 1674104094Sphkstatic void 167551078Spetersiointr(arg) 167651078Speter void *arg; 167751078Speter{ 167870174Sjhb struct com_s *com; 167970174Sjhb 168051078Speter#ifndef COM_MULTIPORT 168170174Sjhb com = (struct com_s *)arg; 168270174Sjhb 168372200Sbmilekic mtx_lock_spin(&sio_lock); 168470174Sjhb siointr1(com); 168572200Sbmilekic mtx_unlock_spin(&sio_lock); 168651078Speter#else /* COM_MULTIPORT */ 168751078Speter bool_t possibly_more_intrs; 168851078Speter int unit; 168951078Speter 169051078Speter /* 169151078Speter * Loop until there is no activity on any port. This is necessary 169251078Speter * to get an interrupt edge more than to avoid another interrupt. 169351078Speter * If the IRQ signal is just an OR of the IRQ signals from several 169451078Speter * devices, then the edge from one may be lost because another is 169551078Speter * on. 169651078Speter */ 169772200Sbmilekic mtx_lock_spin(&sio_lock); 169851078Speter do { 169951078Speter possibly_more_intrs = FALSE; 170053344Speter for (unit = 0; unit < sio_numunits; ++unit) { 170151078Speter com = com_addr(unit); 170251078Speter /* 170351078Speter * XXX COM_LOCK(); 170451078Speter * would it work here, or be counter-productive? 170551078Speter */ 170651078Speter if (com != NULL 170751078Speter && !com->gone 170851078Speter && (inb(com->int_id_port) & IIR_IMASK) 170951078Speter != IIR_NOPEND) { 171051078Speter siointr1(com); 171151078Speter possibly_more_intrs = TRUE; 171251078Speter } 171351078Speter /* XXX COM_UNLOCK(); */ 171451078Speter } 171551078Speter } while (possibly_more_intrs); 171672200Sbmilekic mtx_unlock_spin(&sio_lock); 171751078Speter#endif /* COM_MULTIPORT */ 171851078Speter} 171951078Speter 172093466Sbdestatic struct timespec siots[8192]; 172193466Sbdestatic int siotso; 172293466Sbdestatic int volatile siotsunit = -1; 172393466Sbde 172493466Sbdestatic int 172593466Sbdesysctl_siots(SYSCTL_HANDLER_ARGS) 172693466Sbde{ 172793466Sbde char buf[128]; 172893466Sbde long long delta; 172993466Sbde size_t len; 173093466Sbde int error, i; 173193466Sbde 173293466Sbde for (i = 1; i < siotso; i++) { 173393466Sbde delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 173493466Sbde 1000000000 + 173593466Sbde (siots[i].tv_nsec - siots[i - 1].tv_nsec); 173693466Sbde len = sprintf(buf, "%lld\n", delta); 173793466Sbde if (delta >= 110000) 173893466Sbde len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 173993466Sbde (long)siots[i].tv_sec, siots[i].tv_nsec); 174093466Sbde if (i == siotso - 1) 174193466Sbde buf[len - 1] = '\0'; 174293466Sbde error = SYSCTL_OUT(req, buf, len); 174393466Sbde if (error != 0) 174493466Sbde return (error); 174593466Sbde uio_yield(); 174693466Sbde } 174793466Sbde return (0); 174893466Sbde} 174993466Sbde 175093466SbdeSYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 175193466Sbde 0, 0, sysctl_siots, "A", "sio timestamps"); 175293466Sbde 175351078Speterstatic void 175451078Spetersiointr1(com) 175551078Speter struct com_s *com; 175651078Speter{ 175751078Speter u_char line_status; 175851078Speter u_char modem_status; 175951078Speter u_char *ioptr; 176051078Speter u_char recv_data; 176151078Speter u_char int_ctl; 176251078Speter u_char int_ctl_new; 176351078Speter 176451078Speter int_ctl = inb(com->intr_ctl_port); 176551078Speter int_ctl_new = int_ctl; 176651078Speter 176751078Speter while (!com->gone) { 176851078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 176951078Speter modem_status = inb(com->modem_status_port); 1770111613Sphk if ((modem_status ^ com->last_modem_status) & 1771111613Sphk com->pps_bit) { 177295523Sphk pps_capture(&com->pps); 1773111613Sphk pps_event(&com->pps, 1774111616Sphk (modem_status & com->pps_bit) ? 177551078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 177651078Speter } 177751078Speter } 177851078Speter line_status = inb(com->line_status_port); 177951078Speter 178051078Speter /* input event? (check first to help avoid overruns) */ 178151078Speter while (line_status & LSR_RCV_MASK) { 178251078Speter /* break/unnattached error bits or real input? */ 178351078Speter if (!(line_status & LSR_RXRDY)) 178451078Speter recv_data = 0; 178551078Speter else 178651078Speter recv_data = inb(com->data_port); 178761649Sps#if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 178861649Sps /* 178961649Sps * Solaris implements a new BREAK which is initiated 179061649Sps * by a character sequence CR ~ ^b which is similar 179161649Sps * to a familiar pattern used on Sun servers by the 179261649Sps * Remote Console. 179361649Sps */ 179461649Sps#define KEY_CRTLB 2 /* ^B */ 179561649Sps#define KEY_CR 13 /* CR '\r' */ 179661649Sps#define KEY_TILDE 126 /* ~ */ 179761649Sps 179861649Sps if (com->unit == comconsole) { 179961649Sps static int brk_state1 = 0, brk_state2 = 0; 180061649Sps if (recv_data == KEY_CR) { 180161649Sps brk_state1 = recv_data; 180261649Sps brk_state2 = 0; 180365557Sjasone } else if (brk_state1 == KEY_CR 180465557Sjasone && (recv_data == KEY_TILDE 180565557Sjasone || recv_data == KEY_CRTLB)) { 180661649Sps if (recv_data == KEY_TILDE) 180761649Sps brk_state2 = recv_data; 180865557Sjasone else if (brk_state2 == KEY_TILDE 180965557Sjasone && recv_data == KEY_CRTLB) { 181061649Sps breakpoint(); 181165557Sjasone brk_state1 = 0; 181265557Sjasone brk_state2 = 0; 181361649Sps goto cont; 181461649Sps } else 181561649Sps brk_state2 = 0; 181661649Sps } else 181761649Sps brk_state1 = 0; 181861649Sps } 181961649Sps#endif 182051078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 182151078Speter /* 182251078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 182351078Speter * Otherwise, push the work to a higher level 182451078Speter * (to handle PARMRK) if we're bypassing. 182551078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 182651078Speter * 182751078Speter * This makes bypassing work right in the 182851078Speter * usual "raw" case (IGNBRK set, and IGNPAR 182951078Speter * and INPCK clear). 183051078Speter * 183151078Speter * Note: BI together with FE/PE means just BI. 183251078Speter */ 183351078Speter if (line_status & LSR_BI) { 183451078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 183551078Speter if (com->unit == comconsole) { 183651078Speter breakpoint(); 183751078Speter goto cont; 183851078Speter } 183951078Speter#endif 184051078Speter if (com->tp == NULL 184151078Speter || com->tp->t_iflag & IGNBRK) 184251078Speter goto cont; 184351078Speter } else { 184451078Speter if (com->tp == NULL 184551078Speter || com->tp->t_iflag & IGNPAR) 184651078Speter goto cont; 184751078Speter } 184851078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 184951078Speter && (line_status & (LSR_BI | LSR_FE) 185051078Speter || com->tp->t_iflag & INPCK)) 185151078Speter recv_data = 0; 185251078Speter } 185351078Speter ++com->bytes_in; 185451078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 185588900Sjhb swi_sched(sio_fast_ih, 0); 185651078Speter ioptr = com->iptr; 185751078Speter if (ioptr >= com->ibufend) 185851078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 185951078Speter else { 186051078Speter if (com->do_timestamp) 186151078Speter microtime(&com->timestamp); 186251078Speter ++com_events; 186372238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 186451078Speter#if 0 /* for testing input latency vs efficiency */ 186551078Speterif (com->iptr - com->ibuf == 8) 186688900Sjhb swi_sched(sio_fast_ih, 0); 186751078Speter#endif 186851078Speter ioptr[0] = recv_data; 186951078Speter ioptr[com->ierroff] = line_status; 187051078Speter com->iptr = ++ioptr; 187151078Speter if (ioptr == com->ihighwater 187251078Speter && com->state & CS_RTS_IFLOW) 187351078Speter outb(com->modem_ctl_port, 187451078Speter com->mcr_image &= ~MCR_RTS); 187551078Speter if (line_status & LSR_OE) 187651078Speter CE_RECORD(com, CE_OVERRUN); 187751078Speter } 187851078Spetercont: 187951078Speter /* 188051078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 188151078Speter * jump from the top of the loop to here 188251078Speter */ 188351078Speter line_status = inb(com->line_status_port) & 0x7F; 188451078Speter } 188551078Speter 188651078Speter /* modem status change? (always check before doing output) */ 188751078Speter modem_status = inb(com->modem_status_port); 188851078Speter if (modem_status != com->last_modem_status) { 188951078Speter if (com->do_dcd_timestamp 189051078Speter && !(com->last_modem_status & MSR_DCD) 189151078Speter && modem_status & MSR_DCD) 189251078Speter microtime(&com->dcd_timestamp); 189351078Speter 189451078Speter /* 189551078Speter * Schedule high level to handle DCD changes. Note 189651078Speter * that we don't use the delta bits anywhere. Some 189751078Speter * UARTs mess them up, and it's easy to remember the 189851078Speter * previous bits and calculate the delta. 189951078Speter */ 190051078Speter com->last_modem_status = modem_status; 190151078Speter if (!(com->state & CS_CHECKMSR)) { 190251078Speter com_events += LOTS_OF_EVENTS; 190351078Speter com->state |= CS_CHECKMSR; 190488900Sjhb swi_sched(sio_fast_ih, 0); 190551078Speter } 190651078Speter 190751078Speter /* handle CTS change immediately for crisp flow ctl */ 190851078Speter if (com->state & CS_CTS_OFLOW) { 190951078Speter if (modem_status & MSR_CTS) 191051078Speter com->state |= CS_ODEVREADY; 191151078Speter else 191251078Speter com->state &= ~CS_ODEVREADY; 191351078Speter } 191451078Speter } 191551078Speter 191651078Speter /* output queued and everything ready? */ 191751078Speter if (line_status & LSR_TXRDY 191851078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 191951078Speter ioptr = com->obufq.l_head; 192093466Sbde if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 192151078Speter u_int ocount; 192251078Speter 192351078Speter ocount = com->obufq.l_tail - ioptr; 192451078Speter if (ocount > com->tx_fifo_size) 192551078Speter ocount = com->tx_fifo_size; 192651078Speter com->bytes_out += ocount; 192751078Speter do 192851078Speter outb(com->data_port, *ioptr++); 192951078Speter while (--ocount != 0); 193051078Speter } else { 193151078Speter outb(com->data_port, *ioptr++); 193251078Speter ++com->bytes_out; 193393466Sbde if (com->unit == siotsunit) { 193493466Sbde nanouptime(&siots[siotso]); 193593466Sbde siotso = (siotso + 1) % 193693466Sbde (sizeof siots / sizeof siots[0]); 193793466Sbde } 193851078Speter } 193951078Speter com->obufq.l_head = ioptr; 194051078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 194151078Speter int_ctl_new = int_ctl | IER_ETXRDY; 194251078Speter } 194351078Speter if (ioptr >= com->obufq.l_tail) { 194451078Speter struct lbq *qp; 194551078Speter 194651078Speter qp = com->obufq.l_next; 194751078Speter qp->l_queued = FALSE; 194851078Speter qp = qp->l_next; 194951078Speter if (qp != NULL) { 195051078Speter com->obufq.l_head = qp->l_head; 195151078Speter com->obufq.l_tail = qp->l_tail; 195251078Speter com->obufq.l_next = qp; 195351078Speter } else { 195451078Speter /* output just completed */ 195553344Speter if (COM_IIR_TXRDYBUG(com->flags)) { 195651078Speter int_ctl_new = int_ctl & ~IER_ETXRDY; 195751078Speter } 195851078Speter com->state &= ~CS_BUSY; 195951078Speter } 196051078Speter if (!(com->state & CS_ODONE)) { 196151078Speter com_events += LOTS_OF_EVENTS; 196251078Speter com->state |= CS_ODONE; 196367551Sjhb /* handle at high level ASAP */ 196488900Sjhb swi_sched(sio_fast_ih, 0); 196551078Speter } 196651078Speter } 196753344Speter if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 196851078Speter outb(com->intr_ctl_port, int_ctl_new); 196951078Speter } 197051078Speter } 197151078Speter 197251078Speter /* finished? */ 197351078Speter#ifndef COM_MULTIPORT 197451078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 197551078Speter#endif /* COM_MULTIPORT */ 197651078Speter return; 197751078Speter } 197851078Speter} 197951078Speter 198051078Speterstatic int 198183366Sjuliansioioctl(dev, cmd, data, flag, td) 198251078Speter dev_t dev; 198351078Speter u_long cmd; 198451078Speter caddr_t data; 198551078Speter int flag; 198683366Sjulian struct thread *td; 198751078Speter{ 198851078Speter struct com_s *com; 198951078Speter int error; 199051078Speter int mynor; 199151078Speter int s; 199251078Speter struct tty *tp; 199351078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 199451078Speter u_long oldcmd; 199551078Speter struct termios term; 199651078Speter#endif 199751078Speter 199851078Speter mynor = minor(dev); 199951078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 200057915Simp if (com == NULL || com->gone) 200151078Speter return (ENODEV); 200251078Speter if (mynor & CONTROL_MASK) { 200351078Speter struct termios *ct; 200451078Speter 200551078Speter switch (mynor & CONTROL_MASK) { 200651078Speter case CONTROL_INIT_STATE: 200751078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 200851078Speter break; 200951078Speter case CONTROL_LOCK_STATE: 201051078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 201151078Speter break; 201251078Speter default: 201351078Speter return (ENODEV); /* /dev/nodev */ 201451078Speter } 201551078Speter switch (cmd) { 201651078Speter case TIOCSETA: 201793593Sjhb error = suser(td); 201851078Speter if (error != 0) 201951078Speter return (error); 202051078Speter *ct = *(struct termios *)data; 202151078Speter return (0); 202251078Speter case TIOCGETA: 202351078Speter *(struct termios *)data = *ct; 202451078Speter return (0); 202551078Speter case TIOCGETD: 202651078Speter *(int *)data = TTYDISC; 202751078Speter return (0); 202851078Speter case TIOCGWINSZ: 202951078Speter bzero(data, sizeof(struct winsize)); 203051078Speter return (0); 203151078Speter default: 203251078Speter return (ENOTTY); 203351078Speter } 203451078Speter } 203551078Speter tp = com->tp; 203651078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 203751078Speter term = tp->t_termios; 203851078Speter oldcmd = cmd; 203951078Speter error = ttsetcompat(tp, &cmd, data, &term); 204051078Speter if (error != 0) 204151078Speter return (error); 204251078Speter if (cmd != oldcmd) 204351078Speter data = (caddr_t)&term; 204451078Speter#endif 204551078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 204651078Speter int cc; 204751078Speter struct termios *dt = (struct termios *)data; 204851078Speter struct termios *lt = mynor & CALLOUT_MASK 204951078Speter ? &com->lt_out : &com->lt_in; 205051078Speter 205151078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 205251078Speter | (dt->c_iflag & ~lt->c_iflag); 205351078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 205451078Speter | (dt->c_oflag & ~lt->c_oflag); 205551078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 205651078Speter | (dt->c_cflag & ~lt->c_cflag); 205751078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 205851078Speter | (dt->c_lflag & ~lt->c_lflag); 205951078Speter for (cc = 0; cc < NCCS; ++cc) 206051078Speter if (lt->c_cc[cc] != 0) 206151078Speter dt->c_cc[cc] = tp->t_cc[cc]; 206251078Speter if (lt->c_ispeed != 0) 206351078Speter dt->c_ispeed = tp->t_ispeed; 206451078Speter if (lt->c_ospeed != 0) 206551078Speter dt->c_ospeed = tp->t_ospeed; 206651078Speter } 206783366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 206851078Speter if (error != ENOIOCTL) 206951078Speter return (error); 207051078Speter s = spltty(); 207151078Speter error = ttioctl(tp, cmd, data, flag); 207251078Speter disc_optim(tp, &tp->t_termios, com); 207351078Speter if (error != ENOIOCTL) { 207451078Speter splx(s); 207551078Speter return (error); 207651078Speter } 207751078Speter switch (cmd) { 207851078Speter case TIOCSBRK: 207960471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 208051078Speter break; 208151078Speter case TIOCCBRK: 208260471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 208351078Speter break; 208451078Speter case TIOCSDTR: 208551078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 208651078Speter break; 208751078Speter case TIOCCDTR: 208851078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 208951078Speter break; 209051078Speter /* 209151078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 209251078Speter * changes get undone on the next call to comparam(). 209351078Speter */ 209451078Speter case TIOCMSET: 209551078Speter (void)commctl(com, *(int *)data, DMSET); 209651078Speter break; 209751078Speter case TIOCMBIS: 209851078Speter (void)commctl(com, *(int *)data, DMBIS); 209951078Speter break; 210051078Speter case TIOCMBIC: 210151078Speter (void)commctl(com, *(int *)data, DMBIC); 210251078Speter break; 210351078Speter case TIOCMGET: 210451078Speter *(int *)data = commctl(com, 0, DMGET); 210551078Speter break; 210651078Speter case TIOCMSDTRWAIT: 210751078Speter /* must be root since the wait applies to following logins */ 210893593Sjhb error = suser(td); 210951078Speter if (error != 0) { 211051078Speter splx(s); 211151078Speter return (error); 211251078Speter } 211351078Speter com->dtr_wait = *(int *)data * hz / 100; 211451078Speter break; 211551078Speter case TIOCMGDTRWAIT: 211651078Speter *(int *)data = com->dtr_wait * 100 / hz; 211751078Speter break; 211851078Speter case TIOCTIMESTAMP: 211951078Speter com->do_timestamp = TRUE; 212051078Speter *(struct timeval *)data = com->timestamp; 212151078Speter break; 212251078Speter case TIOCDCDTIMESTAMP: 212351078Speter com->do_dcd_timestamp = TRUE; 212451078Speter *(struct timeval *)data = com->dcd_timestamp; 212551078Speter break; 212651078Speter default: 212751078Speter splx(s); 212851078Speter error = pps_ioctl(cmd, data, &com->pps); 212951078Speter if (error == ENODEV) 213051078Speter error = ENOTTY; 213151078Speter return (error); 213251078Speter } 213351078Speter splx(s); 213451078Speter return (0); 213551078Speter} 213651078Speter 213765557Sjasone/* software interrupt handler for SWI_TTY */ 213851078Speterstatic void 213967551Sjhbsiopoll(void *dummy) 214051078Speter{ 214151078Speter int unit; 214251078Speter 214351078Speter if (com_events == 0) 214451078Speter return; 214551078Speterrepeat: 214653344Speter for (unit = 0; unit < sio_numunits; ++unit) { 214751078Speter struct com_s *com; 214851078Speter int incc; 214951078Speter struct tty *tp; 215051078Speter 215151078Speter com = com_addr(unit); 215251078Speter if (com == NULL) 215351078Speter continue; 215451078Speter tp = com->tp; 215551078Speter if (tp == NULL || com->gone) { 215651078Speter /* 215751078Speter * Discard any events related to never-opened or 215851078Speter * going-away devices. 215951078Speter */ 216072200Sbmilekic mtx_lock_spin(&sio_lock); 216151078Speter incc = com->iptr - com->ibuf; 216251078Speter com->iptr = com->ibuf; 216351078Speter if (com->state & CS_CHECKMSR) { 216451078Speter incc += LOTS_OF_EVENTS; 216551078Speter com->state &= ~CS_CHECKMSR; 216651078Speter } 216751078Speter com_events -= incc; 216872200Sbmilekic mtx_unlock_spin(&sio_lock); 216951078Speter continue; 217051078Speter } 217151078Speter if (com->iptr != com->ibuf) { 217272200Sbmilekic mtx_lock_spin(&sio_lock); 217351078Speter sioinput(com); 217472200Sbmilekic mtx_unlock_spin(&sio_lock); 217551078Speter } 217651078Speter if (com->state & CS_CHECKMSR) { 217751078Speter u_char delta_modem_status; 217851078Speter 217972200Sbmilekic mtx_lock_spin(&sio_lock); 218051078Speter delta_modem_status = com->last_modem_status 218151078Speter ^ com->prev_modem_status; 218251078Speter com->prev_modem_status = com->last_modem_status; 218351078Speter com_events -= LOTS_OF_EVENTS; 218451078Speter com->state &= ~CS_CHECKMSR; 218572200Sbmilekic mtx_unlock_spin(&sio_lock); 218651078Speter if (delta_modem_status & MSR_DCD) 218751078Speter (*linesw[tp->t_line].l_modem) 218851078Speter (tp, com->prev_modem_status & MSR_DCD); 218951078Speter } 219051078Speter if (com->state & CS_ODONE) { 219172200Sbmilekic mtx_lock_spin(&sio_lock); 219251078Speter com_events -= LOTS_OF_EVENTS; 219351078Speter com->state &= ~CS_ODONE; 219472200Sbmilekic mtx_unlock_spin(&sio_lock); 219551078Speter if (!(com->state & CS_BUSY) 219651078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 219751078Speter timeout(siobusycheck, com, hz / 100); 219851078Speter com->extra_state |= CSE_BUSYCHECK; 219951078Speter } 220051078Speter (*linesw[tp->t_line].l_start)(tp); 220151078Speter } 220251078Speter if (com_events == 0) 220351078Speter break; 220451078Speter } 220551078Speter if (com_events >= LOTS_OF_EVENTS) 220651078Speter goto repeat; 220751078Speter} 220851078Speter 220951078Speterstatic int 221051078Spetercomparam(tp, t) 221151078Speter struct tty *tp; 221251078Speter struct termios *t; 221351078Speter{ 221451078Speter u_int cfcr; 221551078Speter int cflag; 221651078Speter struct com_s *com; 221789986Sjhay u_int divisor; 221851078Speter u_char dlbh; 221951078Speter u_char dlbl; 222051078Speter int s; 222151078Speter int unit; 222251078Speter 222389986Sjhay unit = DEV_TO_UNIT(tp->t_dev); 222489986Sjhay com = com_addr(unit); 222589986Sjhay if (com == NULL) 222689986Sjhay return (ENODEV); 222789986Sjhay 222851078Speter /* do historical conversions */ 222951078Speter if (t->c_ispeed == 0) 223051078Speter t->c_ispeed = t->c_ospeed; 223151078Speter 223251078Speter /* check requested parameters */ 223389986Sjhay if (t->c_ospeed == 0) 223489986Sjhay divisor = 0; 223589986Sjhay else { 223689986Sjhay if (t->c_ispeed != t->c_ospeed) 223789986Sjhay return (EINVAL); 223889986Sjhay divisor = siodivisor(com->rclk, t->c_ispeed); 223989986Sjhay if (divisor == 0) 224089986Sjhay return (EINVAL); 224189986Sjhay } 224251078Speter 224351078Speter /* parameters are OK, convert them to the com struct and the device */ 224451078Speter s = spltty(); 224551078Speter if (divisor == 0) 224651078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 224751078Speter else 224851078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 224951078Speter cflag = t->c_cflag; 225051078Speter switch (cflag & CSIZE) { 225151078Speter case CS5: 225251078Speter cfcr = CFCR_5BITS; 225351078Speter break; 225451078Speter case CS6: 225551078Speter cfcr = CFCR_6BITS; 225651078Speter break; 225751078Speter case CS7: 225851078Speter cfcr = CFCR_7BITS; 225951078Speter break; 226051078Speter default: 226151078Speter cfcr = CFCR_8BITS; 226251078Speter break; 226351078Speter } 226451078Speter if (cflag & PARENB) { 226551078Speter cfcr |= CFCR_PENAB; 226651078Speter if (!(cflag & PARODD)) 226751078Speter cfcr |= CFCR_PEVEN; 226851078Speter } 226951078Speter if (cflag & CSTOPB) 227051078Speter cfcr |= CFCR_STOPB; 227151078Speter 227251078Speter if (com->hasfifo && divisor != 0) { 227351078Speter /* 227451078Speter * Use a fifo trigger level low enough so that the input 227551078Speter * latency from the fifo is less than about 16 msec and 227651078Speter * the total latency is less than about 30 msec. These 227751078Speter * latencies are reasonable for humans. Serial comms 227851078Speter * protocols shouldn't expect anything better since modem 227951078Speter * latencies are larger. 228088433Sdillon * 228188433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 228288433Sdillon * speed connections without further work on reducing 228388433Sdillon * interrupt disablement times in other parts of the system, 228488433Sdillon * without producing silo overflow errors. 228551078Speter */ 228693466Sbde com->fifo_image = com->unit == siotsunit ? 0 228793466Sbde : t->c_ospeed <= 4800 228888451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 228951078Speter#ifdef COM_ESP 229051078Speter /* 229151078Speter * The Hayes ESP card needs the fifo DMA mode bit set 229251078Speter * in compatibility mode. If not, it will interrupt 229351078Speter * for each character received. 229451078Speter */ 229551078Speter if (com->esp) 229651078Speter com->fifo_image |= FIFO_DMA_MODE; 229751078Speter#endif 229860471Snyan sio_setreg(com, com_fifo, com->fifo_image); 229951078Speter } 230051078Speter 230165605Sjhb /* 230265605Sjhb * This returns with interrupts disabled so that we can complete 230365605Sjhb * the speed change atomically. Keeping interrupts disabled is 230465605Sjhb * especially important while com_data is hidden. 230565605Sjhb */ 230665605Sjhb (void) siosetwater(com, t->c_ispeed); 230765557Sjasone 230851078Speter if (divisor != 0) { 230960471Snyan sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 231051078Speter /* 231151078Speter * Only set the divisor registers if they would change, 231251078Speter * since on some 16550 incompatibles (UMC8669F), setting 231351078Speter * them while input is arriving them loses sync until 231451078Speter * data stops arriving. 231551078Speter */ 231651078Speter dlbl = divisor & 0xFF; 231760471Snyan if (sio_getreg(com, com_dlbl) != dlbl) 231860471Snyan sio_setreg(com, com_dlbl, dlbl); 231989986Sjhay dlbh = divisor >> 8; 232060471Snyan if (sio_getreg(com, com_dlbh) != dlbh) 232160471Snyan sio_setreg(com, com_dlbh, dlbh); 232251078Speter } 232351078Speter 232460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 232551078Speter 232651078Speter if (!(tp->t_state & TS_TTSTOP)) 232751078Speter com->state |= CS_TTGO; 232851078Speter 232951078Speter if (cflag & CRTS_IFLOW) { 233051078Speter if (com->st16650a) { 233160471Snyan sio_setreg(com, com_cfcr, 0xbf); 233260471Snyan sio_setreg(com, com_fifo, 233360471Snyan sio_getreg(com, com_fifo) | 0x40); 233451078Speter } 233551078Speter com->state |= CS_RTS_IFLOW; 233651078Speter /* 233751078Speter * If CS_RTS_IFLOW just changed from off to on, the change 233851078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 233951078Speter * so do it later by calling comstart() instead of repeating 234051078Speter * a lot of code from comstart() here. 234151078Speter */ 234251078Speter } else if (com->state & CS_RTS_IFLOW) { 234351078Speter com->state &= ~CS_RTS_IFLOW; 234451078Speter /* 234551078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 234651078Speter * on here, since comstart() won't do it later. 234751078Speter */ 234851078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 234951078Speter if (com->st16650a) { 235060471Snyan sio_setreg(com, com_cfcr, 0xbf); 235160471Snyan sio_setreg(com, com_fifo, 235260471Snyan sio_getreg(com, com_fifo) & ~0x40); 235351078Speter } 235451078Speter } 235551078Speter 235651078Speter 235751078Speter /* 235851078Speter * Set up state to handle output flow control. 235951078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 236051078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 236151078Speter */ 236251078Speter com->state |= CS_ODEVREADY; 236351078Speter com->state &= ~CS_CTS_OFLOW; 236451078Speter if (cflag & CCTS_OFLOW) { 236551078Speter com->state |= CS_CTS_OFLOW; 236651078Speter if (!(com->last_modem_status & MSR_CTS)) 236751078Speter com->state &= ~CS_ODEVREADY; 236851078Speter if (com->st16650a) { 236960471Snyan sio_setreg(com, com_cfcr, 0xbf); 237060471Snyan sio_setreg(com, com_fifo, 237160471Snyan sio_getreg(com, com_fifo) | 0x80); 237251078Speter } 237351078Speter } else { 237451078Speter if (com->st16650a) { 237560471Snyan sio_setreg(com, com_cfcr, 0xbf); 237660471Snyan sio_setreg(com, com_fifo, 237760471Snyan sio_getreg(com, com_fifo) & ~0x80); 237851078Speter } 237951078Speter } 238051078Speter 238160471Snyan sio_setreg(com, com_cfcr, com->cfcr_image); 238251078Speter 238351078Speter /* XXX shouldn't call functions while intrs are disabled. */ 238451078Speter disc_optim(tp, t, com); 238551078Speter /* 238651078Speter * Recover from fiddling with CS_TTGO. We used to call siointr1() 238751078Speter * unconditionally, but that defeated the careful discarding of 238851078Speter * stale input in sioopen(). 238951078Speter */ 239051078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 239151078Speter siointr1(com); 239251078Speter 239372200Sbmilekic mtx_unlock_spin(&sio_lock); 239451078Speter splx(s); 239551078Speter comstart(tp); 239651078Speter if (com->ibufold != NULL) { 239751078Speter free(com->ibufold, M_DEVBUF); 239851078Speter com->ibufold = NULL; 239951078Speter } 240051078Speter return (0); 240151078Speter} 240251078Speter 240365605Sjhb/* 240470174Sjhb * This function must be called with the sio_lock mutex released and will 240570174Sjhb * return with it obtained. 240665605Sjhb */ 240751078Speterstatic int 240865605Sjhbsiosetwater(com, speed) 240951078Speter struct com_s *com; 241051078Speter speed_t speed; 241151078Speter{ 241251078Speter int cp4ticks; 241351078Speter u_char *ibuf; 241451078Speter int ibufsize; 241551078Speter struct tty *tp; 241651078Speter 241751078Speter /* 241851078Speter * Make the buffer size large enough to handle a softtty interrupt 241951078Speter * latency of about 2 ticks without loss of throughput or data 242051078Speter * (about 3 ticks if input flow control is not used or not honoured, 242151078Speter * but a bit less for CS5-CS7 modes). 242251078Speter */ 242351078Speter cp4ticks = speed / 10 / hz * 4; 242451078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 242551078Speter ibufsize <<= 1; 242665605Sjhb if (ibufsize == com->ibufsize) { 242772200Sbmilekic mtx_lock_spin(&sio_lock); 242851078Speter return (0); 242965605Sjhb } 243051078Speter 243151078Speter /* 243251078Speter * Allocate input buffer. The extra factor of 2 in the size is 243351078Speter * to allow for an error byte for each input byte. 243451078Speter */ 243551078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 243665605Sjhb if (ibuf == NULL) { 243772200Sbmilekic mtx_lock_spin(&sio_lock); 243851078Speter return (ENOMEM); 243965605Sjhb } 244051078Speter 244151078Speter /* Initialize non-critical variables. */ 244251078Speter com->ibufold = com->ibuf; 244351078Speter com->ibufsize = ibufsize; 244451078Speter tp = com->tp; 244551078Speter if (tp != NULL) { 244651078Speter tp->t_ififosize = 2 * ibufsize; 244751078Speter tp->t_ispeedwat = (speed_t)-1; 244851078Speter tp->t_ospeedwat = (speed_t)-1; 244951078Speter } 245051078Speter 245151078Speter /* 245251078Speter * Read current input buffer, if any. Continue with interrupts 245351078Speter * disabled. 245451078Speter */ 245572200Sbmilekic mtx_lock_spin(&sio_lock); 245651078Speter if (com->iptr != com->ibuf) 245751078Speter sioinput(com); 245851078Speter 245951078Speter /*- 246051078Speter * Initialize critical variables, including input buffer watermarks. 246151078Speter * The external device is asked to stop sending when the buffer 246251078Speter * exactly reaches high water, or when the high level requests it. 246351078Speter * The high level is notified immediately (rather than at a later 246451078Speter * clock tick) when this watermark is reached. 246551078Speter * The buffer size is chosen so the watermark should almost never 246651078Speter * be reached. 246751078Speter * The low watermark is invisibly 0 since the buffer is always 246851078Speter * emptied all at once. 246951078Speter */ 247051078Speter com->iptr = com->ibuf = ibuf; 247151078Speter com->ibufend = ibuf + ibufsize; 247251078Speter com->ierroff = ibufsize; 247351078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 247451078Speter return (0); 247551078Speter} 247651078Speter 247751078Speterstatic void 247851078Spetercomstart(tp) 247951078Speter struct tty *tp; 248051078Speter{ 248151078Speter struct com_s *com; 248251078Speter int s; 248351078Speter int unit; 248451078Speter 248551078Speter unit = DEV_TO_UNIT(tp->t_dev); 248651078Speter com = com_addr(unit); 248757915Simp if (com == NULL) 248857915Simp return; 248951078Speter s = spltty(); 249072200Sbmilekic mtx_lock_spin(&sio_lock); 249151078Speter if (tp->t_state & TS_TTSTOP) 249251078Speter com->state &= ~CS_TTGO; 249351078Speter else 249451078Speter com->state |= CS_TTGO; 249551078Speter if (tp->t_state & TS_TBLOCK) { 249651078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 249751078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 249851078Speter } else { 249951078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 250051078Speter && com->state & CS_RTS_IFLOW) 250151078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 250251078Speter } 250372200Sbmilekic mtx_unlock_spin(&sio_lock); 250451078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 250551078Speter ttwwakeup(tp); 250651078Speter splx(s); 250751078Speter return; 250851078Speter } 250951078Speter if (tp->t_outq.c_cc != 0) { 251051078Speter struct lbq *qp; 251151078Speter struct lbq *next; 251251078Speter 251351078Speter if (!com->obufs[0].l_queued) { 251451078Speter com->obufs[0].l_tail 251551078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 251651078Speter sizeof com->obuf1); 251751078Speter com->obufs[0].l_next = NULL; 251851078Speter com->obufs[0].l_queued = TRUE; 251972200Sbmilekic mtx_lock_spin(&sio_lock); 252051078Speter if (com->state & CS_BUSY) { 252151078Speter qp = com->obufq.l_next; 252251078Speter while ((next = qp->l_next) != NULL) 252351078Speter qp = next; 252451078Speter qp->l_next = &com->obufs[0]; 252551078Speter } else { 252651078Speter com->obufq.l_head = com->obufs[0].l_head; 252751078Speter com->obufq.l_tail = com->obufs[0].l_tail; 252851078Speter com->obufq.l_next = &com->obufs[0]; 252951078Speter com->state |= CS_BUSY; 253051078Speter } 253172200Sbmilekic mtx_unlock_spin(&sio_lock); 253251078Speter } 253351078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 253451078Speter com->obufs[1].l_tail 253551078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 253651078Speter sizeof com->obuf2); 253751078Speter com->obufs[1].l_next = NULL; 253851078Speter com->obufs[1].l_queued = TRUE; 253972200Sbmilekic mtx_lock_spin(&sio_lock); 254051078Speter if (com->state & CS_BUSY) { 254151078Speter qp = com->obufq.l_next; 254251078Speter while ((next = qp->l_next) != NULL) 254351078Speter qp = next; 254451078Speter qp->l_next = &com->obufs[1]; 254551078Speter } else { 254651078Speter com->obufq.l_head = com->obufs[1].l_head; 254751078Speter com->obufq.l_tail = com->obufs[1].l_tail; 254851078Speter com->obufq.l_next = &com->obufs[1]; 254951078Speter com->state |= CS_BUSY; 255051078Speter } 255172200Sbmilekic mtx_unlock_spin(&sio_lock); 255251078Speter } 255351078Speter tp->t_state |= TS_BUSY; 255451078Speter } 255572200Sbmilekic mtx_lock_spin(&sio_lock); 255651078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 255751078Speter siointr1(com); /* fake interrupt to start output */ 255872200Sbmilekic mtx_unlock_spin(&sio_lock); 255951078Speter ttwwakeup(tp); 256051078Speter splx(s); 256151078Speter} 256251078Speter 256351078Speterstatic void 256451654Sphkcomstop(tp, rw) 256551078Speter struct tty *tp; 256651078Speter int rw; 256751078Speter{ 256851078Speter struct com_s *com; 256951078Speter 257051078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 257157915Simp if (com == NULL || com->gone) 257251078Speter return; 257372200Sbmilekic mtx_lock_spin(&sio_lock); 257451078Speter if (rw & FWRITE) { 257551078Speter if (com->hasfifo) 257651078Speter#ifdef COM_ESP 257751078Speter /* XXX avoid h/w bug. */ 257851078Speter if (!com->esp) 257951078Speter#endif 258060471Snyan sio_setreg(com, com_fifo, 258160471Snyan FIFO_XMT_RST | com->fifo_image); 258251078Speter com->obufs[0].l_queued = FALSE; 258351078Speter com->obufs[1].l_queued = FALSE; 258451078Speter if (com->state & CS_ODONE) 258551078Speter com_events -= LOTS_OF_EVENTS; 258651078Speter com->state &= ~(CS_ODONE | CS_BUSY); 258751078Speter com->tp->t_state &= ~TS_BUSY; 258851078Speter } 258951078Speter if (rw & FREAD) { 259051078Speter if (com->hasfifo) 259151078Speter#ifdef COM_ESP 259251078Speter /* XXX avoid h/w bug. */ 259351078Speter if (!com->esp) 259451078Speter#endif 259560471Snyan sio_setreg(com, com_fifo, 259660471Snyan FIFO_RCV_RST | com->fifo_image); 259751078Speter com_events -= (com->iptr - com->ibuf); 259851078Speter com->iptr = com->ibuf; 259951078Speter } 260072200Sbmilekic mtx_unlock_spin(&sio_lock); 260151078Speter comstart(tp); 260251078Speter} 260351078Speter 260451078Speterstatic int 260551078Spetercommctl(com, bits, how) 260651078Speter struct com_s *com; 260751078Speter int bits; 260851078Speter int how; 260951078Speter{ 261051078Speter int mcr; 261151078Speter int msr; 261251078Speter 261351078Speter if (how == DMGET) { 261451078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 261551078Speter mcr = com->mcr_image; 261651078Speter if (mcr & MCR_DTR) 261751078Speter bits |= TIOCM_DTR; 261851078Speter if (mcr & MCR_RTS) 261951078Speter bits |= TIOCM_RTS; 262051078Speter msr = com->prev_modem_status; 262151078Speter if (msr & MSR_CTS) 262251078Speter bits |= TIOCM_CTS; 262351078Speter if (msr & MSR_DCD) 262451078Speter bits |= TIOCM_CD; 262551078Speter if (msr & MSR_DSR) 262651078Speter bits |= TIOCM_DSR; 262751078Speter /* 262851078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 262951078Speter * more volatile by reading the modem status a lot. Perhaps 263051078Speter * we should latch both bits until the status is read here. 263151078Speter */ 263251078Speter if (msr & (MSR_RI | MSR_TERI)) 263351078Speter bits |= TIOCM_RI; 263451078Speter return (bits); 263551078Speter } 263651078Speter mcr = 0; 263751078Speter if (bits & TIOCM_DTR) 263851078Speter mcr |= MCR_DTR; 263951078Speter if (bits & TIOCM_RTS) 264051078Speter mcr |= MCR_RTS; 264151078Speter if (com->gone) 264251078Speter return(0); 264372200Sbmilekic mtx_lock_spin(&sio_lock); 264451078Speter switch (how) { 264551078Speter case DMSET: 264651078Speter outb(com->modem_ctl_port, 264751078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 264851078Speter break; 264951078Speter case DMBIS: 265051078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 265151078Speter break; 265251078Speter case DMBIC: 265351078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 265451078Speter break; 265551078Speter } 265672200Sbmilekic mtx_unlock_spin(&sio_lock); 265751078Speter return (0); 265851078Speter} 265951078Speter 266051078Speterstatic void 266151078Spetersiosettimeout() 266251078Speter{ 266351078Speter struct com_s *com; 266451078Speter bool_t someopen; 266551078Speter int unit; 266651078Speter 266751078Speter /* 266851078Speter * Set our timeout period to 1 second if no polled devices are open. 266951078Speter * Otherwise set it to max(1/200, 1/hz). 267051078Speter * Enable timeouts iff some device is open. 267151078Speter */ 267251078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 267351078Speter sio_timeout = hz; 267451078Speter someopen = FALSE; 267553344Speter for (unit = 0; unit < sio_numunits; ++unit) { 267651078Speter com = com_addr(unit); 267751078Speter if (com != NULL && com->tp != NULL 267851078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 267951078Speter someopen = TRUE; 268051078Speter if (com->poll || com->poll_output) { 268151078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 268251078Speter break; 268351078Speter } 268451078Speter } 268551078Speter } 268651078Speter if (someopen) { 268751078Speter sio_timeouts_until_log = hz / sio_timeout; 268851078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 268951078Speter sio_timeout); 269051078Speter } else { 269151078Speter /* Flush error messages, if any. */ 269251078Speter sio_timeouts_until_log = 1; 269351078Speter comwakeup((void *)NULL); 269451078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 269551078Speter } 269651078Speter} 269751078Speter 269851078Speterstatic void 269951078Spetercomwakeup(chan) 270051078Speter void *chan; 270151078Speter{ 270251078Speter struct com_s *com; 270351078Speter int unit; 270451078Speter 270551078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 270651078Speter 270751078Speter /* 270851078Speter * Recover from lost output interrupts. 270951078Speter * Poll any lines that don't use interrupts. 271051078Speter */ 271153344Speter for (unit = 0; unit < sio_numunits; ++unit) { 271251078Speter com = com_addr(unit); 271351078Speter if (com != NULL && !com->gone 271451078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 271572200Sbmilekic mtx_lock_spin(&sio_lock); 271651078Speter siointr1(com); 271772200Sbmilekic mtx_unlock_spin(&sio_lock); 271851078Speter } 271951078Speter } 272051078Speter 272151078Speter /* 272251078Speter * Check for and log errors, but not too often. 272351078Speter */ 272451078Speter if (--sio_timeouts_until_log > 0) 272551078Speter return; 272651078Speter sio_timeouts_until_log = hz / sio_timeout; 272753344Speter for (unit = 0; unit < sio_numunits; ++unit) { 272851078Speter int errnum; 272951078Speter 273051078Speter com = com_addr(unit); 273151078Speter if (com == NULL) 273251078Speter continue; 273351078Speter if (com->gone) 273451078Speter continue; 273551078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 273651078Speter u_int delta; 273751078Speter u_long total; 273851078Speter 273972200Sbmilekic mtx_lock_spin(&sio_lock); 274051078Speter delta = com->delta_error_counts[errnum]; 274151078Speter com->delta_error_counts[errnum] = 0; 274272200Sbmilekic mtx_unlock_spin(&sio_lock); 274351078Speter if (delta == 0) 274451078Speter continue; 274551078Speter total = com->error_counts[errnum] += delta; 274651078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 274751078Speter unit, delta, error_desc[errnum], 274851078Speter delta == 1 ? "" : "s", total); 274951078Speter } 275051078Speter } 275151078Speter} 275251078Speter 275351078Speterstatic void 275451078Speterdisc_optim(tp, t, com) 275551078Speter struct tty *tp; 275651078Speter struct termios *t; 275751078Speter struct com_s *com; 275851078Speter{ 275951078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 276051078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 276151078Speter && (!(t->c_iflag & PARMRK) 276251078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 276351078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 276451078Speter && linesw[tp->t_line].l_rint == ttyinput) 276551078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 276651078Speter else 276751078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 276851078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 276951078Speter} 277051078Speter 277151078Speter/* 277251078Speter * Following are all routines needed for SIO to act as console 277351078Speter */ 277451078Speter#include <sys/cons.h> 277551078Speter 277651078Speterstruct siocnstate { 277751078Speter u_char dlbl; 277851078Speter u_char dlbh; 277951078Speter u_char ier; 278051078Speter u_char cfcr; 278151078Speter u_char mcr; 278251078Speter}; 278351078Speter 278466230Sjhb#ifndef __alpha__ 278592739Salfredstatic speed_t siocngetspeed(Port_t, u_long rclk); 278666230Sjhb#endif 278793010Sbdestatic void siocnclose(struct siocnstate *sp, Port_t iobase); 278893010Sbdestatic void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 278993010Sbdestatic void siocntxwait(Port_t iobase); 279051078Speter 279166230Sjhb#ifdef __alpha__ 279292739Salfredint siocnattach(int port, int speed); 279392739Salfredint siogdbattach(int port, int speed); 279492739Salfredint siogdbgetc(void); 279592739Salfredvoid siogdbputc(int c); 279666230Sjhb#else 279751078Speterstatic cn_probe_t siocnprobe; 279851078Speterstatic cn_init_t siocninit; 279985371Sjlemonstatic cn_term_t siocnterm; 280066230Sjhb#endif 280151078Speterstatic cn_checkc_t siocncheckc; 280251078Speterstatic cn_getc_t siocngetc; 280351078Speterstatic cn_putc_t siocnputc; 280451078Speter 280583832Sdfr#ifndef __alpha__ 280685371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 280755823Syokota siocnputc, NULL); 280851078Speter#endif 280951078Speter 281051078Speter/* To get the GDB related variables */ 281151078Speter#if DDB > 0 281251078Speter#include <ddb/ddb.h> 2813111194Sphkstatic struct consdev gdbconsdev; 2814111194Sphk 281551078Speter#endif 281651078Speter 281751078Speterstatic void 281851078Spetersiocntxwait(iobase) 281951078Speter Port_t iobase; 282051078Speter{ 282151078Speter int timo; 282251078Speter 282351078Speter /* 282451078Speter * Wait for any pending transmission to finish. Required to avoid 282551078Speter * the UART lockup bug when the speed is changed, and for normal 282651078Speter * transmits. 282751078Speter */ 282851078Speter timo = 100000; 282951078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 283051078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 283151078Speter ; 283251078Speter} 283351078Speter 283466230Sjhb#ifndef __alpha__ 283566230Sjhb 283651078Speter/* 283751078Speter * Read the serial port specified and try to figure out what speed 283851078Speter * it's currently running at. We're assuming the serial port has 283951078Speter * been initialized and is basicly idle. This routine is only intended 284051078Speter * to be run at system startup. 284151078Speter * 284251078Speter * If the value read from the serial port doesn't make sense, return 0. 284351078Speter */ 284451078Speter 284551078Speterstatic speed_t 284689986Sjhaysiocngetspeed(iobase, rclk) 284789986Sjhay Port_t iobase; 284889986Sjhay u_long rclk; 284951078Speter{ 285089986Sjhay u_int divisor; 285151078Speter u_char dlbh; 285251078Speter u_char dlbl; 285351078Speter u_char cfcr; 285451078Speter 285551078Speter cfcr = inb(iobase + com_cfcr); 285651078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 285751078Speter 285851078Speter dlbl = inb(iobase + com_dlbl); 285951078Speter dlbh = inb(iobase + com_dlbh); 286051078Speter 286151078Speter outb(iobase + com_cfcr, cfcr); 286251078Speter 286389986Sjhay divisor = dlbh << 8 | dlbl; 286451078Speter 286589986Sjhay /* XXX there should be more sanity checking. */ 286689986Sjhay if (divisor == 0) 286789986Sjhay return (CONSPEED); 286889986Sjhay return (rclk / (16UL * divisor)); 286951078Speter} 287051078Speter 287166230Sjhb#endif 287266230Sjhb 287351078Speterstatic void 287451078Spetersiocnopen(sp, iobase, speed) 287551078Speter struct siocnstate *sp; 287651078Speter Port_t iobase; 287751078Speter int speed; 287851078Speter{ 287989986Sjhay u_int divisor; 288051078Speter u_char dlbh; 288151078Speter u_char dlbl; 288251078Speter 288351078Speter /* 288451078Speter * Save all the device control registers except the fifo register 288551078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 288651078Speter * We can't save the fifo register since it is read-only. 288751078Speter */ 288851078Speter sp->ier = inb(iobase + com_ier); 288951078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 289051078Speter siocntxwait(iobase); 289151078Speter sp->cfcr = inb(iobase + com_cfcr); 289251078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 289351078Speter sp->dlbl = inb(iobase + com_dlbl); 289451078Speter sp->dlbh = inb(iobase + com_dlbh); 289551078Speter /* 289651078Speter * Only set the divisor registers if they would change, since on 289751078Speter * some 16550 incompatibles (Startech), setting them clears the 289851078Speter * data input register. This also reduces the effects of the 289951078Speter * UMC8669F bug. 290051078Speter */ 290189986Sjhay divisor = siodivisor(comdefaultrclk, speed); 290251078Speter dlbl = divisor & 0xFF; 290351078Speter if (sp->dlbl != dlbl) 290451078Speter outb(iobase + com_dlbl, dlbl); 290589986Sjhay dlbh = divisor >> 8; 290651078Speter if (sp->dlbh != dlbh) 290751078Speter outb(iobase + com_dlbh, dlbh); 290851078Speter outb(iobase + com_cfcr, CFCR_8BITS); 290951078Speter sp->mcr = inb(iobase + com_mcr); 291051078Speter /* 291151078Speter * We don't want interrupts, but must be careful not to "disable" 291251078Speter * them by clearing the MCR_IENABLE bit, since that might cause 291351078Speter * an interrupt by floating the IRQ line. 291451078Speter */ 291551078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 291651078Speter} 291751078Speter 291851078Speterstatic void 291951078Spetersiocnclose(sp, iobase) 292051078Speter struct siocnstate *sp; 292151078Speter Port_t iobase; 292251078Speter{ 292351078Speter /* 292451078Speter * Restore the device control registers. 292551078Speter */ 292651078Speter siocntxwait(iobase); 292751078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 292851078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 292951078Speter outb(iobase + com_dlbl, sp->dlbl); 293051078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 293151078Speter outb(iobase + com_dlbh, sp->dlbh); 293251078Speter outb(iobase + com_cfcr, sp->cfcr); 293351078Speter /* 293451078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 293551078Speter */ 293651078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 293751078Speter outb(iobase + com_ier, sp->ier); 293851078Speter} 293951078Speter 294066230Sjhb#ifndef __alpha__ 294166230Sjhb 294251078Speterstatic void 294351078Spetersiocnprobe(cp) 294451078Speter struct consdev *cp; 294551078Speter{ 294651078Speter speed_t boot_speed; 294751078Speter u_char cfcr; 294889986Sjhay u_int divisor; 294951078Speter int s, unit; 295051078Speter struct siocnstate sp; 295151078Speter 295251078Speter /* 295351078Speter * Find our first enabled console, if any. If it is a high-level 295451078Speter * console device, then initialize it and return successfully. 295551078Speter * If it is a low-level console device, then initialize it and 295651078Speter * return unsuccessfully. It must be initialized in both cases 295751078Speter * for early use by console drivers and debuggers. Initializing 295851078Speter * the hardware is not necessary in all cases, since the i/o 295951078Speter * routines initialize it on the fly, but it is necessary if 296051078Speter * input might arrive while the hardware is switched back to an 296151078Speter * uninitialized state. We can't handle multiple console devices 296251078Speter * yet because our low-level routines don't take a device arg. 296351078Speter * We trust the user to set the console flags properly so that we 296451078Speter * don't need to probe. 296551078Speter */ 296651078Speter cp->cn_pri = CN_DEAD; 296751078Speter 296851078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 296951078Speter int flags; 297051078Speter int disabled; 297151078Speter if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 297251078Speter if (disabled) 297351078Speter continue; 297451078Speter } 297551078Speter if (resource_int_value("sio", unit, "flags", &flags)) 297651078Speter continue; 297751078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 297851078Speter int port; 297951078Speter Port_t iobase; 298051078Speter 298151078Speter if (resource_int_value("sio", unit, "port", &port)) 298251078Speter continue; 298351078Speter iobase = port; 298451078Speter s = spltty(); 298551078Speter if (boothowto & RB_SERIAL) { 298689986Sjhay boot_speed = 298789986Sjhay siocngetspeed(iobase, comdefaultrclk); 298851078Speter if (boot_speed) 298951078Speter comdefaultrate = boot_speed; 299051078Speter } 299151078Speter 299251078Speter /* 299351078Speter * Initialize the divisor latch. We can't rely on 299451078Speter * siocnopen() to do this the first time, since it 299551078Speter * avoids writing to the latch if the latch appears 299651078Speter * to have the correct value. Also, if we didn't 299751078Speter * just read the speed from the hardware, then we 299851078Speter * need to set the speed in hardware so that 299951078Speter * switching it later is null. 300051078Speter */ 300151078Speter cfcr = inb(iobase + com_cfcr); 300251078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 300389986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 300489986Sjhay outb(iobase + com_dlbl, divisor & 0xff); 300589986Sjhay outb(iobase + com_dlbh, divisor >> 8); 300651078Speter outb(iobase + com_cfcr, cfcr); 300751078Speter 300851078Speter siocnopen(&sp, iobase, comdefaultrate); 300951078Speter 301051078Speter splx(s); 301151078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 301251078Speter cp->cn_dev = makedev(CDEV_MAJOR, unit); 301351078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 301451078Speter || boothowto & RB_SERIAL 301551078Speter ? CN_REMOTE : CN_NORMAL; 301651078Speter siocniobase = iobase; 301751078Speter siocnunit = unit; 301851078Speter } 301951078Speter if (COM_DEBUGGER(flags)) { 302051078Speter printf("sio%d: gdb debugging port\n", unit); 302151078Speter siogdbiobase = iobase; 302251078Speter siogdbunit = unit; 302351078Speter#if DDB > 0 3024111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, unit); 3025111194Sphk gdb_arg = &gdbconsdev; 302651078Speter gdb_getc = siocngetc; 302751078Speter gdb_putc = siocnputc; 302851078Speter#endif 302951078Speter } 303051078Speter } 303151078Speter } 303251078Speter#ifdef __i386__ 303351078Speter#if DDB > 0 303451078Speter /* 303551078Speter * XXX Ugly Compatability. 303651078Speter * If no gdb port has been specified, set it to be the console 303751078Speter * as some configuration files don't specify the gdb port. 303851078Speter */ 3039111017Sphk if (gdb_arg == NULL && (boothowto & RB_GDB)) { 304051078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 304151078Speter siocnunit); 304251078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 304351078Speter printf("configuration file (currently sio only).\n"); 304451078Speter siogdbiobase = siocniobase; 304551078Speter siogdbunit = siocnunit; 3046111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, siocnunit); 3047111194Sphk gdb_arg = &gdbconsdev; 304851078Speter gdb_getc = siocngetc; 304951078Speter gdb_putc = siocnputc; 305051078Speter } 305151078Speter#endif 305251078Speter#endif 305351078Speter} 305451078Speter 305566230Sjhbstatic void 305666230Sjhbsiocninit(cp) 305766230Sjhb struct consdev *cp; 305866230Sjhb{ 305966230Sjhb comconsole = DEV_TO_UNIT(cp->cn_dev); 306066230Sjhb} 306166230Sjhb 306285371Sjlemonstatic void 306385371Sjlemonsiocnterm(cp) 306485371Sjlemon struct consdev *cp; 306585371Sjlemon{ 306685371Sjlemon comconsole = -1; 306785371Sjlemon} 306885371Sjlemon 306966230Sjhb#endif 307066230Sjhb 307151078Speter#ifdef __alpha__ 307251078Speter 307355868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 307451078Speter 307551078Speterint 307651078Spetersiocnattach(port, speed) 307751078Speter int port; 307851078Speter int speed; 307951078Speter{ 308051078Speter int s; 308151078Speter u_char cfcr; 308289986Sjhay u_int divisor; 308351078Speter struct siocnstate sp; 308498691Sn_hibma int unit = 0; /* XXX random value! */ 308551078Speter 308651078Speter siocniobase = port; 308798691Sn_hibma siocnunit = unit; 308851078Speter comdefaultrate = speed; 308951078Speter sio_consdev.cn_pri = CN_NORMAL; 309098691Sn_hibma sio_consdev.cn_dev = makedev(CDEV_MAJOR, unit); 309151078Speter 309251078Speter s = spltty(); 309351078Speter 309451078Speter /* 309551078Speter * Initialize the divisor latch. We can't rely on 309651078Speter * siocnopen() to do this the first time, since it 309751078Speter * avoids writing to the latch if the latch appears 309851078Speter * to have the correct value. Also, if we didn't 309951078Speter * just read the speed from the hardware, then we 310051078Speter * need to set the speed in hardware so that 310151078Speter * switching it later is null. 310251078Speter */ 310351078Speter cfcr = inb(siocniobase + com_cfcr); 310451078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 310589986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 310689986Sjhay outb(siocniobase + com_dlbl, divisor & 0xff); 310789986Sjhay outb(siocniobase + com_dlbh, divisor >> 8); 310851078Speter outb(siocniobase + com_cfcr, cfcr); 310951078Speter 311051078Speter siocnopen(&sp, siocniobase, comdefaultrate); 311151078Speter splx(s); 311251078Speter 311385426Sjlemon cnadd(&sio_consdev); 311458885Simp return (0); 311551078Speter} 311651078Speter 311751078Speterint 311851078Spetersiogdbattach(port, speed) 311951078Speter int port; 312051078Speter int speed; 312151078Speter{ 312251078Speter int s; 312351078Speter u_char cfcr; 312489986Sjhay u_int divisor; 312551078Speter struct siocnstate sp; 312698691Sn_hibma int unit = 1; /* XXX random value! */ 312751078Speter 312851078Speter siogdbiobase = port; 312951078Speter gdbdefaultrate = speed; 313051078Speter 313165714Sjhb printf("sio%d: gdb debugging port\n", unit); 313265714Sjhb siogdbunit = unit; 313365714Sjhb#if DDB > 0 3134111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, unit); 3135111194Sphk gdb_arg = &gdbconsdev; 313665714Sjhb gdb_getc = siocngetc; 313765714Sjhb gdb_putc = siocnputc; 313865714Sjhb#endif 313965714Sjhb 314051078Speter s = spltty(); 314151078Speter 314251078Speter /* 314351078Speter * Initialize the divisor latch. We can't rely on 314451078Speter * siocnopen() to do this the first time, since it 314551078Speter * avoids writing to the latch if the latch appears 314651078Speter * to have the correct value. Also, if we didn't 314751078Speter * just read the speed from the hardware, then we 314851078Speter * need to set the speed in hardware so that 314951078Speter * switching it later is null. 315051078Speter */ 315151078Speter cfcr = inb(siogdbiobase + com_cfcr); 315251078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 315389986Sjhay divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 315489986Sjhay outb(siogdbiobase + com_dlbl, divisor & 0xff); 315589986Sjhay outb(siogdbiobase + com_dlbh, divisor >> 8); 315651078Speter outb(siogdbiobase + com_cfcr, cfcr); 315751078Speter 315851078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 315951078Speter splx(s); 316051078Speter 316158885Simp return (0); 316251078Speter} 316351078Speter 316451078Speter#endif 316551078Speter 316651078Speterstatic int 3167111194Sphksiocncheckc(struct consdev *cd) 316851078Speter{ 316951078Speter int c; 3170111194Sphk dev_t dev; 317151078Speter Port_t iobase; 317251078Speter int s; 317351078Speter struct siocnstate sp; 317498401Sn_hibma speed_t speed; 3175111194Sphk 3176111194Sphk dev = cd->cn_dev; 317798401Sn_hibma if (minor(dev) == siocnunit) { 317898401Sn_hibma iobase = siocniobase; 317998401Sn_hibma speed = comdefaultrate; 318098401Sn_hibma } else { 318151078Speter iobase = siogdbiobase; 318298401Sn_hibma speed = gdbdefaultrate; 318398401Sn_hibma } 318451078Speter s = spltty(); 318598401Sn_hibma siocnopen(&sp, iobase, speed); 318651078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 318751078Speter c = inb(iobase + com_data); 318851078Speter else 318951078Speter c = -1; 319051078Speter siocnclose(&sp, iobase); 319151078Speter splx(s); 319251078Speter return (c); 319351078Speter} 319451078Speter 319551078Speter 3196104094Sphkstatic int 3197111194Sphksiocngetc(struct consdev *cd) 319851078Speter{ 319951078Speter int c; 3200111194Sphk dev_t dev; 320151078Speter Port_t iobase; 320251078Speter int s; 320351078Speter struct siocnstate sp; 320498401Sn_hibma speed_t speed; 320551078Speter 3206111194Sphk dev = cd->cn_dev; 320798401Sn_hibma if (minor(dev) == siocnunit) { 320898401Sn_hibma iobase = siocniobase; 320998401Sn_hibma speed = comdefaultrate; 321098401Sn_hibma } else { 321151078Speter iobase = siogdbiobase; 321298401Sn_hibma speed = gdbdefaultrate; 321398401Sn_hibma } 321451078Speter s = spltty(); 321598401Sn_hibma siocnopen(&sp, iobase, speed); 321651078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 321751078Speter ; 321851078Speter c = inb(iobase + com_data); 321951078Speter siocnclose(&sp, iobase); 322051078Speter splx(s); 322151078Speter return (c); 322251078Speter} 322351078Speter 3224104094Sphkstatic void 3225111194Sphksiocnputc(struct consdev *cd, int c) 322651078Speter{ 322788582Sbde int need_unlock; 322851078Speter int s; 3229111194Sphk dev_t dev; 323051078Speter struct siocnstate sp; 323151078Speter Port_t iobase; 323298401Sn_hibma speed_t speed; 323351078Speter 3234111194Sphk dev = cd->cn_dev; 323598401Sn_hibma if (minor(dev) == siocnunit) { 323698401Sn_hibma iobase = siocniobase; 323798401Sn_hibma speed = comdefaultrate; 323898401Sn_hibma } else { 323951078Speter iobase = siogdbiobase; 324098401Sn_hibma speed = gdbdefaultrate; 324198401Sn_hibma } 324251078Speter s = spltty(); 324388582Sbde need_unlock = 0; 324488582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 324584029Sjlemon mtx_lock_spin(&sio_lock); 324688582Sbde need_unlock = 1; 324788582Sbde } 324898401Sn_hibma siocnopen(&sp, iobase, speed); 324951078Speter siocntxwait(iobase); 325051078Speter outb(iobase + com_data, c); 325151078Speter siocnclose(&sp, iobase); 325288582Sbde if (need_unlock) 325384029Sjlemon mtx_unlock_spin(&sio_lock); 325451078Speter splx(s); 325551078Speter} 325651078Speter 325751078Speter#ifdef __alpha__ 325851078Speterint 325951078Spetersiogdbgetc() 326051078Speter{ 326151078Speter int c; 326251078Speter Port_t iobase; 326398401Sn_hibma speed_t speed; 326451078Speter int s; 326551078Speter struct siocnstate sp; 326651078Speter 326798619Sn_hibma if (siogdbunit == siocnunit) { 326898401Sn_hibma iobase = siocniobase; 326998401Sn_hibma speed = comdefaultrate; 327098401Sn_hibma } else { 327198401Sn_hibma iobase = siogdbiobase; 327298401Sn_hibma speed = gdbdefaultrate; 327398401Sn_hibma } 327498401Sn_hibma 327551078Speter s = spltty(); 327698401Sn_hibma siocnopen(&sp, iobase, speed); 327751078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 327851078Speter ; 327951078Speter c = inb(iobase + com_data); 328051078Speter siocnclose(&sp, iobase); 328151078Speter splx(s); 328251078Speter return (c); 328351078Speter} 328451078Speter 328551078Spetervoid 328651078Spetersiogdbputc(c) 328751078Speter int c; 328851078Speter{ 328998401Sn_hibma Port_t iobase; 329098401Sn_hibma speed_t speed; 329151078Speter int s; 329251078Speter struct siocnstate sp; 329351078Speter 329498619Sn_hibma if (siogdbunit == siocnunit) { 329598401Sn_hibma iobase = siocniobase; 329698401Sn_hibma speed = comdefaultrate; 329798401Sn_hibma } else { 329898401Sn_hibma iobase = siogdbiobase; 329998401Sn_hibma speed = gdbdefaultrate; 330098401Sn_hibma } 330198401Sn_hibma 330251078Speter s = spltty(); 330398401Sn_hibma siocnopen(&sp, iobase, speed); 330451078Speter siocntxwait(siogdbiobase); 330551078Speter outb(siogdbiobase + com_data, c); 330651078Speter siocnclose(&sp, siogdbiobase); 330751078Speter splx(s); 330851078Speter} 330951078Speter#endif 3310