sio.c revision 111616
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * $FreeBSD: head/sys/dev/sio/sio.c 111616 2003-02-27 12:53:21Z phk $ 3451078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3551078Speter * from: i386/isa sio.c,v 1.234 3651078Speter */ 3751078Speter 3851078Speter#include "opt_comconsole.h" 3951078Speter#include "opt_compat.h" 4051078Speter#include "opt_ddb.h" 4151078Speter#include "opt_sio.h" 4251078Speter 4351078Speter/* 4451078Speter * Serial driver, based on 386BSD-0.1 com driver. 4551078Speter * Mostly rewritten to use pseudo-DMA. 4651078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4751078Speter * COM driver, based on HP dca driver. 4851078Speter * 4951078Speter * Changes for PC-Card integration: 5051078Speter * - Added PC-Card driver table and handlers 5151078Speter */ 5251078Speter#include <sys/param.h> 5376166Smarkm#include <sys/systm.h> 5465822Sjhb#include <sys/bus.h> 5551078Speter#include <sys/conf.h> 5651078Speter#include <sys/fcntl.h> 5751078Speter#include <sys/interrupt.h> 5851078Speter#include <sys/kernel.h> 5976166Smarkm#include <sys/lock.h> 6076166Smarkm#include <sys/malloc.h> 6176166Smarkm#include <sys/module.h> 6276166Smarkm#include <sys/mutex.h> 6376166Smarkm#include <sys/proc.h> 6476166Smarkm#include <sys/reboot.h> 6576166Smarkm#include <sys/sysctl.h> 6651078Speter#include <sys/syslog.h> 6776166Smarkm#include <sys/tty.h> 6860471Snyan#include <machine/bus_pio.h> 6951078Speter#include <machine/bus.h> 7051078Speter#include <sys/rman.h> 7151078Speter#include <sys/timepps.h> 7293466Sbde#include <sys/uio.h> 7351078Speter 7486909Simp#include <isa/isavar.h> 7586909Simp 7693126Smike#include <machine/limits.h> 7751078Speter#include <machine/resource.h> 7851078Speter 7985302Simp#include <dev/sio/sioreg.h> 8085365Simp#include <dev/sio/siovar.h> 8151078Speter 8251078Speter#ifdef COM_ESP 8377726Sjoerg#include <dev/ic/esp.h> 8451078Speter#endif 8577726Sjoerg#include <dev/ic/ns16550.h> 8651078Speter 8751078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 8851078Speter 8951078Speter#define CALLOUT_MASK 0x80 9051078Speter#define CONTROL_MASK 0x60 9151078Speter#define CONTROL_INIT_STATE 0x20 9251078Speter#define CONTROL_LOCK_STATE 0x40 9351078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 9493470Sbde#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 9593470Sbde | ((mynor) & 0x1f)) 9693470Sbde#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 9793470Sbde | ((unit) & 0x1f)) 9851078Speter 9951078Speter#ifdef COM_MULTIPORT 10051078Speter/* checks in flags for multiport and which is multiport "master chip" 10151078Speter * for a given card 10251078Speter */ 10351078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 10451078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 10551078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 106104067Sphk#else 107104067Sphk#define COM_ISMULTIPORT(flags) (0) 10851078Speter#endif /* COM_MULTIPORT */ 10951078Speter 11051078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 11151078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 11251078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 11351078Speter#define COM_DEBUGGER(flags) ((flags) & 0x80) 11451078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 11551078Speter#define COM_NOFIFO(flags) ((flags) & 0x02) 116111613Sphk#define COM_PPSCTS(flags) ((flags) & 0x10000) 11751078Speter#define COM_ST16650A(flags) ((flags) & 0x20000) 11886909Simp#define COM_C_NOPROBE (0x40000) 11986909Simp#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 12051078Speter#define COM_C_IIR_TXRDYBUG (0x80000) 12151078Speter#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 122104067Sphk#define COM_NOSCR(flags) ((flags) & 0x100000) 12351078Speter#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 12451078Speter 12560471Snyan#define sio_getreg(com, off) \ 12660471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 12760471Snyan#define sio_setreg(com, off, value) \ 12860471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 12960471Snyan 13051078Speter/* 13151078Speter * com state bits. 13251078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 13351078Speter * than the other bits so that they can be tested as a group without masking 13451078Speter * off the low bits. 13551078Speter * 13651078Speter * The following com and tty flags correspond closely: 13751078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 13853344Speter * comstop()) 13951078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 14051078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14151078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14251078Speter * TS_FLUSH is not used. 14351078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 14451078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 14551078Speter */ 14651078Speter#define CS_BUSY 0x80 /* output in progress */ 14751078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 14851078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 14951078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 15051078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15151078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15251078Speter#define CS_ODONE 4 /* output completed */ 15351078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 15451078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 15551078Speter 15651078Speterstatic char const * const error_desc[] = { 15751078Speter#define CE_OVERRUN 0 15851078Speter "silo overflow", 15951078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 16051078Speter "interrupt-level buffer overflow", 16151078Speter#define CE_TTY_BUF_OVERFLOW 2 16251078Speter "tty-level buffer overflow", 16351078Speter}; 16451078Speter 16586909Simp#define CE_NTYPES 3 16651078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 16751078Speter 16886909Simp/* types. XXX - should be elsewhere */ 16986909Simptypedef u_int Port_t; /* hardware port */ 17086909Simptypedef u_char bool_t; /* boolean */ 17186909Simp 17286909Simp/* queue of linear buffers */ 17386909Simpstruct lbq { 17486909Simp u_char *l_head; /* next char to process */ 17586909Simp u_char *l_tail; /* one past the last char to process */ 17686909Simp struct lbq *l_next; /* next in queue */ 17786909Simp bool_t l_queued; /* nonzero if queued */ 17886909Simp}; 17986909Simp 18086909Simp/* com device structure */ 18186909Simpstruct com_s { 18286909Simp u_int flags; /* Copy isa device flags */ 18386909Simp u_char state; /* miscellaneous flag bits */ 18486909Simp bool_t active_out; /* nonzero if the callout device is open */ 18586909Simp u_char cfcr_image; /* copy of value written to CFCR */ 18651078Speter#ifdef COM_ESP 18786909Simp bool_t esp; /* is this unit a hayes esp board? */ 18886909Simp#endif 18986909Simp u_char extra_state; /* more flag bits, separate for order trick */ 19086909Simp u_char fifo_image; /* copy of value written to FIFO */ 19186909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 19286909Simp bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 19386909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 19486909Simp u_char mcr_image; /* copy of value written to MCR */ 19586909Simp#ifdef COM_MULTIPORT 19686909Simp bool_t multiport; /* is this unit part of a multiport device? */ 19786909Simp#endif /* COM_MULTIPORT */ 19886909Simp bool_t no_irq; /* nonzero if irq is not attached */ 19986909Simp bool_t gone; /* hardware disappeared */ 20086909Simp bool_t poll; /* nonzero if polling is required */ 20186909Simp bool_t poll_output; /* nonzero if polling for output is required */ 20286909Simp int unit; /* unit number */ 20386909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 20486909Simp u_int tx_fifo_size; 20586909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 20686909Simp 20786909Simp /* 20886909Simp * The high level of the driver never reads status registers directly 20986909Simp * because there would be too many side effects to handle conveniently. 21086909Simp * Instead, it reads copies of the registers stored here by the 21186909Simp * interrupt handler. 21286909Simp */ 21386909Simp u_char last_modem_status; /* last MSR read by intr handler */ 21486909Simp u_char prev_modem_status; /* last MSR handled by high level */ 21586909Simp 21686909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 21786909Simp u_char *ibuf; /* start of input buffer */ 21886909Simp u_char *ibufend; /* end of input buffer */ 21986909Simp u_char *ibufold; /* old input buffer, to be freed */ 22086909Simp u_char *ihighwater; /* threshold in input buffer */ 22186909Simp u_char *iptr; /* next free spot in input buffer */ 22286909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 22386909Simp int ierroff; /* offset of error bytes in ibuf */ 22486909Simp 22586909Simp struct lbq obufq; /* head of queue of output buffers */ 22686909Simp struct lbq obufs[2]; /* output buffers */ 22786909Simp 22886909Simp bus_space_tag_t bst; 22986909Simp bus_space_handle_t bsh; 23086909Simp 23186909Simp Port_t data_port; /* i/o ports */ 23286909Simp#ifdef COM_ESP 23386909Simp Port_t esp_port; 23486909Simp#endif 23586909Simp Port_t int_id_port; 23686909Simp Port_t modem_ctl_port; 23786909Simp Port_t line_status_port; 23886909Simp Port_t modem_status_port; 23986909Simp Port_t intr_ctl_port; /* Ports of IIR register */ 24086909Simp 24186909Simp struct tty *tp; /* cross reference */ 24286909Simp 24386909Simp /* Initial state. */ 24486909Simp struct termios it_in; /* should be in struct tty */ 24586909Simp struct termios it_out; 24686909Simp 24786909Simp /* Lock state. */ 24886909Simp struct termios lt_in; /* should be in struct tty */ 24986909Simp struct termios lt_out; 25086909Simp 25186909Simp bool_t do_timestamp; 25286909Simp bool_t do_dcd_timestamp; 25386909Simp struct timeval timestamp; 25486909Simp struct timeval dcd_timestamp; 25586909Simp struct pps_state pps; 256111613Sphk int pps_bit; 25786909Simp 25886909Simp u_long bytes_in; /* statistics */ 25986909Simp u_long bytes_out; 26086909Simp u_int delta_error_counts[CE_NTYPES]; 26186909Simp u_long error_counts[CE_NTYPES]; 26286909Simp 26389986Sjhay u_long rclk; 26489986Sjhay 26586909Simp struct resource *irqres; 26686909Simp struct resource *ioportres; 26786909Simp void *cookie; 26886909Simp dev_t devs[6]; 26986909Simp 27086909Simp /* 27186909Simp * Data area for output buffers. Someday we should build the output 27286909Simp * buffer queue without copying data. 27386909Simp */ 27486909Simp u_char obuf1[256]; 27586909Simp u_char obuf2[256]; 27686909Simp}; 27786909Simp 27886909Simp#ifdef COM_ESP 27993010Sbdestatic int espattach(struct com_s *com, Port_t esp_port); 28051078Speter#endif 28151078Speter 28251078Speterstatic timeout_t siobusycheck; 28393010Sbdestatic u_int siodivisor(u_long rclk, speed_t speed); 28451078Speterstatic timeout_t siodtrwakeup; 28593010Sbdestatic void comhardclose(struct com_s *com); 28693010Sbdestatic void sioinput(struct com_s *com); 28793010Sbdestatic void siointr1(struct com_s *com); 28893010Sbdestatic void siointr(void *arg); 28993010Sbdestatic int commctl(struct com_s *com, int bits, int how); 29093010Sbdestatic int comparam(struct tty *tp, struct termios *t); 29193010Sbdestatic void siopoll(void *); 29293010Sbdestatic void siosettimeout(void); 29393010Sbdestatic int siosetwater(struct com_s *com, speed_t speed); 29493010Sbdestatic void comstart(struct tty *tp); 29593010Sbdestatic void comstop(struct tty *tp, int rw); 29651078Speterstatic timeout_t comwakeup; 29793010Sbdestatic void disc_optim(struct tty *tp, struct termios *t, 29893010Sbde struct com_s *com); 29951078Speter 30085365Simpchar sio_driver_name[] = "sio"; 30170174Sjhbstatic struct mtx sio_lock; 30270174Sjhbstatic int sio_inited; 30351078Speter 30451078Speter/* table and macro for fast conversion from a unit number to its com struct */ 30585365Simpdevclass_t sio_devclass; 30651078Speter#define com_addr(unit) ((struct com_s *) \ 30786909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 30851078Speter 30951078Speterstatic d_open_t sioopen; 31051078Speterstatic d_close_t sioclose; 31151078Speterstatic d_read_t sioread; 31251078Speterstatic d_write_t siowrite; 31351078Speterstatic d_ioctl_t sioioctl; 31451078Speter 31551078Speter#define CDEV_MAJOR 28 31651078Speterstatic struct cdevsw sio_cdevsw = { 31751078Speter /* open */ sioopen, 31851078Speter /* close */ sioclose, 31951078Speter /* read */ sioread, 32051078Speter /* write */ siowrite, 32151078Speter /* ioctl */ sioioctl, 32251654Sphk /* poll */ ttypoll, 32351078Speter /* mmap */ nommap, 32451078Speter /* strategy */ nostrategy, 32585365Simp /* name */ sio_driver_name, 32651078Speter /* maj */ CDEV_MAJOR, 32751078Speter /* dump */ nodump, 32851078Speter /* psize */ nopsize, 32972521Sjlemon /* flags */ D_TTY | D_KQFILTER, 33072521Sjlemon /* kqfilter */ ttykqfilter, 33151078Speter}; 33251078Speter 33351078Speterint comconsole = -1; 33451078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 33589986Sjhaystatic u_long comdefaultrclk = DEFAULT_RCLK; 33689986SjhaySYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 33798401Sn_hibmastatic speed_t gdbdefaultrate = GDBSPEED; 33898401Sn_hibmaSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 33998401Sn_hibma &gdbdefaultrate, GDBSPEED, ""); 34051078Speterstatic u_int com_events; /* input chars + weighted output completions */ 34151078Speterstatic Port_t siocniobase; 34298401Sn_hibmastatic int siocnunit = -1; 34351078Speterstatic Port_t siogdbiobase; 34451078Speterstatic int siogdbunit = -1; 34572238Sjhbstatic void *sio_slow_ih; 34672238Sjhbstatic void *sio_fast_ih; 34751078Speterstatic int sio_timeout; 34851078Speterstatic int sio_timeouts_until_log; 34951078Speterstatic struct callout_handle sio_timeout_handle 35051078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 35153344Speterstatic int sio_numunits; 35251078Speter 35351078Speter#ifdef COM_ESP 35451078Speter/* XXX configure this properly. */ 35586909Simp/* XXX quite broken for new-bus. */ 35651078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 35751078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 35851078Speter#endif 35951078Speter 36051078Speter/* 36151078Speter * handle sysctl read/write requests for console speed 36251078Speter * 36351078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 36451078Speter * also set the initial and lock values for the /dev/ttyXX device 36551078Speter * if there is one associated with the console. Finally, if the /dev/tty 36651078Speter * device has already been open, change the speed on the open running port 36751078Speter * itself. 36851078Speter */ 36951078Speter 37051078Speterstatic int 37162573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 37251078Speter{ 37351078Speter int error, s; 37451078Speter speed_t newspeed; 37551078Speter struct com_s *com; 37651078Speter struct tty *tp; 37751078Speter 37851078Speter newspeed = comdefaultrate; 37951078Speter 38051078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 38151078Speter if (error || !req->newptr) 38251078Speter return (error); 38351078Speter 38451078Speter comdefaultrate = newspeed; 38551078Speter 38651078Speter if (comconsole < 0) /* serial console not selected? */ 38751078Speter return (0); 38851078Speter 38951078Speter com = com_addr(comconsole); 39057915Simp if (com == NULL) 39151078Speter return (ENXIO); 39251078Speter 39351078Speter /* 39451078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 39551078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 39651078Speter * speed changes) 39751078Speter */ 39851078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 39951078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 40051078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 40151078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 40251078Speter 40351078Speter /* 40451078Speter * if we're open, change the running rate too 40551078Speter */ 40651078Speter tp = com->tp; 40751078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 40851078Speter tp->t_termios.c_ispeed = 40951078Speter tp->t_termios.c_ospeed = comdefaultrate; 41051078Speter s = spltty(); 41151078Speter error = comparam(tp, &tp->t_termios); 41251078Speter splx(s); 41351078Speter } 41451078Speter return error; 41551078Speter} 41651078Speter 41751078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 41851078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 41991280Simp/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 42051078Speter 42186909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 42286909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 42386909Simp 42486909Simp/* 42586909Simp * Unload the driver and clear the table. 42686909Simp * XXX this is mostly wrong. 42786909Simp * XXX TODO: 42886909Simp * This is usually called when the card is ejected, but 429104933Simp * can be caused by a kldunload of a controller driver. 43086909Simp * The idea is to reset the driver's view of the device 43186909Simp * and ensure that any driver entry points such as 43286909Simp * read and write do not hang. 43386909Simp */ 43485365Simpint 43585365Simpsiodetach(dev) 43652471Simp device_t dev; 43751078Speter{ 43851078Speter struct com_s *com; 43965131Sphk int i; 44051078Speter 44152471Simp com = (struct com_s *) device_get_softc(dev); 44257915Simp if (com == NULL) { 44352471Simp device_printf(dev, "NULL com in siounload\n"); 44454386Simp return (0); 44551078Speter } 44654386Simp com->gone = 1; 44765131Sphk for (i = 0 ; i < 6; i++) 44865131Sphk destroy_dev(com->devs[i]); 44954386Simp if (com->irqres) { 45054386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 45154386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 45254386Simp } 45354386Simp if (com->ioportres) 45454386Simp bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres); 45551078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 45657915Simp device_printf(dev, "still open, forcing close\n"); 45777750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 45851078Speter com->tp->t_gen++; 45951078Speter ttyclose(com->tp); 46051078Speter ttwakeup(com->tp); 46151078Speter ttwwakeup(com->tp); 46251078Speter } else { 46351078Speter if (com->ibuf != NULL) 46451078Speter free(com->ibuf, M_DEVBUF); 46586909Simp device_set_softc(dev, NULL); 46686909Simp free(com, M_DEVBUF); 46751078Speter } 46853978Simp return (0); 46951078Speter} 47051078Speter 47185365Simpint 47289986Sjhaysioprobe(dev, xrid, rclk, noprobe) 47358885Simp device_t dev; 47458885Simp int xrid; 47589986Sjhay u_long rclk; 47685365Simp int noprobe; 47751078Speter{ 47853344Speter#if 0 47951078Speter static bool_t already_init; 48053344Speter device_t xdev; 48153344Speter#endif 48260471Snyan struct com_s *com; 48389986Sjhay u_int divisor; 48451078Speter bool_t failures[10]; 48551078Speter int fn; 48651078Speter device_t idev; 48751078Speter Port_t iobase; 48851078Speter intrmask_t irqmap[4]; 48951078Speter intrmask_t irqs; 49051078Speter u_char mcr_image; 49151078Speter int result; 49254206Speter u_long xirq; 49351088Speter u_int flags = device_get_flags(dev); 49451078Speter int rid; 49551078Speter struct resource *port; 49651078Speter 49758885Simp rid = xrid; 49851078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 49951078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 50051078Speter if (!port) 50157915Simp return (ENXIO); 50251078Speter 50386909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 50486909Simp if (com == NULL) 50586909Simp return (ENOMEM); 50686909Simp device_set_softc(dev, com); 50760471Snyan com->bst = rman_get_bustag(port); 50860471Snyan com->bsh = rman_get_bushandle(port); 50989986Sjhay if (rclk == 0) 51089986Sjhay rclk = DEFAULT_RCLK; 51189986Sjhay com->rclk = rclk; 51260471Snyan 51385209Sjhb while (sio_inited != 2) 51485209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 51593818Sjhb mtx_init(&sio_lock, sio_driver_name, NULL, 51693818Sjhb (comconsole != -1) ? 51785209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 51885209Sjhb atomic_store_rel_int(&sio_inited, 2); 51985209Sjhb } 52070174Sjhb 52153344Speter#if 0 52253344Speter /* 52353344Speter * XXX this is broken - when we are first called, there are no 52453344Speter * previously configured IO ports. We could hard code 52553344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 52653344Speter * This code has been doing nothing since the conversion since 52753344Speter * "count" is zero the first time around. 52853344Speter */ 52951078Speter if (!already_init) { 53051078Speter /* 53151078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 53251078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 53351078Speter * from any used port that shares the interrupt vector. 53451078Speter * XXX the gate enable is elsewhere for some multiports. 53551078Speter */ 53651078Speter device_t *devs; 53753344Speter int count, i, xioport; 53851078Speter 53951078Speter devclass_get_devices(sio_devclass, &devs, &count); 54051078Speter for (i = 0; i < count; i++) { 54151078Speter xdev = devs[i]; 54254194Speter if (device_is_enabled(xdev) && 54354194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 54454194Speter NULL) == 0) 54553344Speter outb(xioport + com_mcr, 0); 54651078Speter } 54751078Speter free(devs, M_TEMP); 54851078Speter already_init = TRUE; 54951078Speter } 55053344Speter#endif 55151078Speter 55251078Speter if (COM_LLCONSOLE(flags)) { 55351078Speter printf("sio%d: reserved for low-level i/o\n", 55451078Speter device_get_unit(dev)); 55556788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 55686909Simp device_set_softc(dev, NULL); 55786909Simp free(com, M_DEVBUF); 55851078Speter return (ENXIO); 55951078Speter } 56051078Speter 56151078Speter /* 56251078Speter * If the device is on a multiport card and has an AST/4 56351078Speter * compatible interrupt control register, initialize this 56451078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 56551078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 56651078Speter * Point idev to the device struct giving the correct id_irq. 56751078Speter * This is the struct for the master device if there is one. 56851078Speter */ 56951078Speter idev = dev; 57051078Speter mcr_image = MCR_IENABLE; 57151078Speter#ifdef COM_MULTIPORT 57257234Sbde if (COM_ISMULTIPORT(flags)) { 57354206Speter Port_t xiobase; 57454206Speter u_long io; 57554206Speter 57651078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 57751078Speter if (idev == NULL) { 57851078Speter printf("sio%d: master device %d not configured\n", 57951078Speter device_get_unit(dev), COM_MPMASTER(flags)); 58051078Speter idev = dev; 58151078Speter } 58257234Sbde if (!COM_NOTAST4(flags)) { 58357234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 58457234Sbde NULL) == 0) { 58557234Sbde xiobase = io; 58657234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 58757234Sbde NULL, NULL) == 0) 58857234Sbde outb(xiobase + com_scr, 0x80); 58957234Sbde else 59057234Sbde outb(xiobase + com_scr, 0); 59157234Sbde } 59257234Sbde mcr_image = 0; 59351078Speter } 59451078Speter } 59551078Speter#endif /* COM_MULTIPORT */ 59654194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 59751078Speter mcr_image = 0; 59851078Speter 59951078Speter bzero(failures, sizeof failures); 60051078Speter iobase = rman_get_start(port); 60151078Speter 60251078Speter /* 60351078Speter * We don't want to get actual interrupts, just masked ones. 60451078Speter * Interrupts from this line should already be masked in the ICU, 60551078Speter * but mask them in the processor as well in case there are some 60651078Speter * (misconfigured) shared interrupts. 60751078Speter */ 60872200Sbmilekic mtx_lock_spin(&sio_lock); 60951078Speter/* EXTRA DELAY? */ 61051078Speter 61151078Speter /* 61251078Speter * Initialize the speed and the word size and wait long enough to 61351078Speter * drain the maximum of 16 bytes of junk in device output queues. 61451078Speter * The speed is undefined after a master reset and must be set 61551078Speter * before relying on anything related to output. There may be 61651078Speter * junk after a (very fast) soft reboot and (apparently) after 61751078Speter * master reset. 61851078Speter * XXX what about the UART bug avoided by waiting in comparam()? 61951078Speter * We don't want to to wait long enough to drain at 2 bps. 62051078Speter */ 62151078Speter if (iobase == siocniobase) 62251078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 62351078Speter else { 62460471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 62589986Sjhay divisor = siodivisor(rclk, SIO_TEST_SPEED); 62689986Sjhay sio_setreg(com, com_dlbl, divisor & 0xff); 62789986Sjhay sio_setreg(com, com_dlbh, divisor >> 8); 62860471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 62951078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 63051078Speter } 63151078Speter 63251078Speter /* 63351078Speter * Enable the interrupt gate and disable device interupts. This 63451078Speter * should leave the device driving the interrupt line low and 63551078Speter * guarantee an edge trigger if an interrupt can be generated. 63651078Speter */ 63751078Speter/* EXTRA DELAY? */ 63860471Snyan sio_setreg(com, com_mcr, mcr_image); 63960471Snyan sio_setreg(com, com_ier, 0); 64051078Speter DELAY(1000); /* XXX */ 64151078Speter irqmap[0] = isa_irq_pending(); 64251078Speter 64351078Speter /* 64451078Speter * Attempt to set loopback mode so that we can send a null byte 64551078Speter * without annoying any external device. 64651078Speter */ 64751078Speter/* EXTRA DELAY? */ 64860471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 64951078Speter 65051078Speter /* 65151078Speter * Attempt to generate an output interrupt. On 8250's, setting 65251078Speter * IER_ETXRDY generates an interrupt independent of the current 65351078Speter * setting and independent of whether the THR is empty. On 16450's, 65451078Speter * setting IER_ETXRDY generates an interrupt independent of the 65551078Speter * current setting. On 16550A's, setting IER_ETXRDY only 65651078Speter * generates an interrupt when IER_ETXRDY is not already set. 65751078Speter */ 65860471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 65951078Speter 66051078Speter /* 66151078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 66251078Speter * an interrupt. They'd better generate one for actually doing 66351078Speter * output. Loopback may be broken on the same incompatibles but 66451078Speter * it's unlikely to do more than allow the null byte out. 66551078Speter */ 66660471Snyan sio_setreg(com, com_data, 0); 66751078Speter DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 66851078Speter 66951078Speter /* 67051078Speter * Turn off loopback mode so that the interrupt gate works again 67151078Speter * (MCR_IENABLE was hidden). This should leave the device driving 67251078Speter * an interrupt line high. It doesn't matter if the interrupt 67351078Speter * line oscillates while we are not looking at it, since interrupts 67451078Speter * are disabled. 67551078Speter */ 67651078Speter/* EXTRA DELAY? */ 67760471Snyan sio_setreg(com, com_mcr, mcr_image); 67892401Simp 67992401Simp /* 68092401Simp * It seems my Xircom CBEM56G Cardbus modem wants to be reset 68192401Simp * to 8 bits *again*, or else probe test 0 will fail. 68292401Simp * gwk@sgi.com, 4/19/2001 68392401Simp */ 68492401Simp sio_setreg(com, com_cfcr, CFCR_8BITS); 68551078Speter 68651078Speter /* 68752471Simp * Some pcmcia cards have the "TXRDY bug", so we check everyone 68851078Speter * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 68951078Speter */ 69085365Simp if (noprobe) { 69153370Speter /* Reading IIR register twice */ 69253370Speter for (fn = 0; fn < 2; fn ++) { 69353370Speter DELAY(10000); 69460471Snyan failures[6] = sio_getreg(com, com_iir); 69553370Speter } 69653370Speter /* Check IIR_TXRDY clear ? */ 69753370Speter result = 0; 69853370Speter if (failures[6] & IIR_TXRDY) { 69992401Simp /* No, Double check with clearing IER */ 70060471Snyan sio_setreg(com, com_ier, 0); 70160471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 70292401Simp /* Ok. We discovered TXRDY bug! */ 70353370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 70453370Speter } else { 70553370Speter /* Unknown, Just omit this chip.. XXX */ 70653370Speter result = ENXIO; 70781793Simp sio_setreg(com, com_mcr, 0); 70853370Speter } 70951078Speter } else { 71053370Speter /* OK. this is well-known guys */ 71153370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 71251078Speter } 71381793Simp sio_setreg(com, com_ier, 0); 71460471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 71572200Sbmilekic mtx_unlock_spin(&sio_lock); 71653344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 71786909Simp if (iobase == siocniobase) 71886909Simp result = 0; 71986909Simp if (result != 0) { 72086909Simp device_set_softc(dev, NULL); 72186909Simp free(com, M_DEVBUF); 72286909Simp } 72386909Simp return (result); 72453344Speter } 72553344Speter 72651078Speter /* 72751078Speter * Check that 72851078Speter * o the CFCR, IER and MCR in UART hold the values written to them 72951078Speter * (the values happen to be all distinct - this is good for 73051078Speter * avoiding false positive tests from bus echoes). 73151078Speter * o an output interrupt is generated and its vector is correct. 73251078Speter * o the interrupt goes away when the IIR in the UART is read. 73351078Speter */ 73451078Speter/* EXTRA DELAY? */ 73560471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 73660471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 73760471Snyan failures[2] = sio_getreg(com, com_mcr) - mcr_image; 73851078Speter DELAY(10000); /* Some internal modems need this time */ 73951078Speter irqmap[1] = isa_irq_pending(); 74060471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 74151078Speter DELAY(1000); /* XXX */ 74251078Speter irqmap[2] = isa_irq_pending(); 74360471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 74451078Speter 74551078Speter /* 74651078Speter * Turn off all device interrupts and check that they go off properly. 74751078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 74851078Speter * the OUT2 output of the UART to 74951078Speter * the ICU input. Closing the gate would give a floating ICU input 75051078Speter * (unless there is another device driving it) and spurious interrupts. 75151078Speter * (On the system that this was first tested on, the input floats high 75251078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 75351078Speter */ 75460471Snyan sio_setreg(com, com_ier, 0); 75560471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 75660471Snyan failures[7] = sio_getreg(com, com_ier); 75751078Speter DELAY(1000); /* XXX */ 75851078Speter irqmap[3] = isa_irq_pending(); 75960471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 76051078Speter 76172200Sbmilekic mtx_unlock_spin(&sio_lock); 76251078Speter 76351078Speter irqs = irqmap[1] & ~irqmap[0]; 76454194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 76589463Simp ((1 << xirq) & irqs) == 0) { 76651078Speter printf( 76754206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 76853344Speter device_get_unit(dev), xirq, irqs); 76989447Sbmah printf( 77089470Sbmah "sio%d: port may not be enabled\n", 77189447Sbmah device_get_unit(dev)); 77289463Simp } 77351078Speter if (bootverbose) 77451078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 77551078Speter device_get_unit(dev), 77651078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 77751078Speter 77851078Speter result = 0; 77951078Speter for (fn = 0; fn < sizeof failures; ++fn) 78051078Speter if (failures[fn]) { 78160471Snyan sio_setreg(com, com_mcr, 0); 78251078Speter result = ENXIO; 78351078Speter if (bootverbose) { 78451078Speter printf("sio%d: probe failed test(s):", 78551078Speter device_get_unit(dev)); 78651078Speter for (fn = 0; fn < sizeof failures; ++fn) 78751078Speter if (failures[fn]) 78851078Speter printf(" %d", fn); 78951078Speter printf("\n"); 79051078Speter } 79151078Speter break; 79251078Speter } 79351078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 79486909Simp if (iobase == siocniobase) 79586909Simp result = 0; 79686909Simp if (result != 0) { 79786909Simp device_set_softc(dev, NULL); 79886909Simp free(com, M_DEVBUF); 79986909Simp } 80086909Simp return (result); 80151078Speter} 80251078Speter 80351078Speter#ifdef COM_ESP 80451078Speterstatic int 80551078Speterespattach(com, esp_port) 80651078Speter struct com_s *com; 80751078Speter Port_t esp_port; 80851078Speter{ 80951078Speter u_char dips; 81051078Speter u_char val; 81151078Speter 81251078Speter /* 81351078Speter * Check the ESP-specific I/O port to see if we're an ESP 81451078Speter * card. If not, return failure immediately. 81551078Speter */ 81651078Speter if ((inb(esp_port) & 0xf3) == 0) { 81751078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 81851078Speter return (0); 81951078Speter } 82051078Speter 82151078Speter /* 82251078Speter * We've got something that claims to be a Hayes ESP card. 82351078Speter * Let's hope so. 82451078Speter */ 82551078Speter 82651078Speter /* Get the dip-switch configuration */ 82751078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 82851078Speter dips = inb(esp_port + ESP_STATUS1); 82951078Speter 83051078Speter /* 83151078Speter * Bits 0,1 of dips say which COM port we are. 83251078Speter */ 83360471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 83451078Speter printf(" : ESP"); 83551078Speter else { 83651078Speter printf(" esp_port has com %d\n", dips & 0x03); 83751078Speter return (0); 83851078Speter } 83951078Speter 84051078Speter /* 84151078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 84251078Speter */ 84351078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 84451078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 84551078Speter val = inb(esp_port + ESP_STATUS2); 84651078Speter if ((val & 0x70) < 0x20) { 84751078Speter printf("-old (%o)", val & 0x70); 84851078Speter return (0); 84951078Speter } 85051078Speter 85151078Speter /* 85251078Speter * Check for ability to emulate 16550: bit 7 == 1 85351078Speter */ 85451078Speter if ((dips & 0x80) == 0) { 85551078Speter printf(" slave"); 85651078Speter return (0); 85751078Speter } 85851078Speter 85951078Speter /* 86051078Speter * Okay, we seem to be a Hayes ESP card. Whee. 86151078Speter */ 86251078Speter com->esp = TRUE; 86351078Speter com->esp_port = esp_port; 86451078Speter return (1); 86551078Speter} 86651078Speter#endif /* COM_ESP */ 86751078Speter 86885365Simpint 86989986Sjhaysioattach(dev, xrid, rclk) 87051078Speter device_t dev; 87158885Simp int xrid; 87289986Sjhay u_long rclk; 87351078Speter{ 87451078Speter struct com_s *com; 87551078Speter#ifdef COM_ESP 87651078Speter Port_t *espp; 87751078Speter#endif 87851078Speter Port_t iobase; 87993470Sbde int minorbase; 88051078Speter int unit; 88153344Speter u_int flags; 88251078Speter int rid; 88351078Speter struct resource *port; 88453344Speter int ret; 88551078Speter 88658885Simp rid = xrid; 88751078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 88851078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 88951078Speter if (!port) 89057915Simp return (ENXIO); 89151078Speter 89251078Speter iobase = rman_get_start(port); 89351078Speter unit = device_get_unit(dev); 89451078Speter com = device_get_softc(dev); 89553344Speter flags = device_get_flags(dev); 89651078Speter 89753344Speter if (unit >= sio_numunits) 89853344Speter sio_numunits = unit + 1; 89951078Speter /* 90051078Speter * sioprobe() has initialized the device registers as follows: 90151078Speter * o cfcr = CFCR_8BITS. 90251078Speter * It is most important that CFCR_DLAB is off, so that the 90351078Speter * data port is not hidden when we enable interrupts. 90451078Speter * o ier = 0. 90551078Speter * Interrupts are only enabled when the line is open. 90651078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 90751078Speter * interrupt control register or the config specifies no irq. 90851078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 90951078Speter * device from sending before we are ready. 91051078Speter */ 91151078Speter bzero(com, sizeof *com); 91251078Speter com->unit = unit; 91351078Speter com->ioportres = port; 91460471Snyan com->bst = rman_get_bustag(port); 91560471Snyan com->bsh = rman_get_bushandle(port); 91651078Speter com->cfcr_image = CFCR_8BITS; 91751078Speter com->dtr_wait = 3 * hz; 91851078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 91957234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 92051078Speter com->tx_fifo_size = 1; 92151078Speter com->obufs[0].l_head = com->obuf1; 92251078Speter com->obufs[1].l_head = com->obuf2; 92351078Speter 92451078Speter com->data_port = iobase + com_data; 92551078Speter com->int_id_port = iobase + com_iir; 92651078Speter com->modem_ctl_port = iobase + com_mcr; 92751078Speter com->mcr_image = inb(com->modem_ctl_port); 92851078Speter com->line_status_port = iobase + com_lsr; 92951078Speter com->modem_status_port = iobase + com_msr; 93051078Speter com->intr_ctl_port = iobase + com_ier; 93151078Speter 93289986Sjhay if (rclk == 0) 93389986Sjhay rclk = DEFAULT_RCLK; 93489986Sjhay com->rclk = rclk; 93589986Sjhay 93651078Speter /* 93751078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 93851078Speter * are only relevant for logins. It's important to have echo off 93951078Speter * initially so that the line doesn't start blathering before the 94051078Speter * echo flag can be turned off. 94151078Speter */ 94251078Speter com->it_in.c_iflag = 0; 94351078Speter com->it_in.c_oflag = 0; 94451078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 94551078Speter com->it_in.c_lflag = 0; 94651078Speter if (unit == comconsole) { 94751078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 94851078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 94951078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 95051078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 95151078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 95251078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 95351078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 95451078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 95551078Speter } else 95651078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 95765605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 95872200Sbmilekic mtx_unlock_spin(&sio_lock); 95956788Sbde /* 96056788Sbde * Leave i/o resources allocated if this is a `cn'-level 96156788Sbde * console, so that other devices can't snarf them. 96256788Sbde */ 96356788Sbde if (iobase != siocniobase) 96456788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 96556788Sbde return (ENOMEM); 96651078Speter } 96772200Sbmilekic mtx_unlock_spin(&sio_lock); 96851078Speter termioschars(&com->it_in); 96951078Speter com->it_out = com->it_in; 97051078Speter 97151078Speter /* attempt to determine UART type */ 97251078Speter printf("sio%d: type", unit); 97351078Speter 97451078Speter 975104067Sphk if (!COM_ISMULTIPORT(flags) && 976104067Sphk !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 97751078Speter u_char scr; 97851078Speter u_char scr1; 97951078Speter u_char scr2; 98051078Speter 98160471Snyan scr = sio_getreg(com, com_scr); 98260471Snyan sio_setreg(com, com_scr, 0xa5); 98360471Snyan scr1 = sio_getreg(com, com_scr); 98460471Snyan sio_setreg(com, com_scr, 0x5a); 98560471Snyan scr2 = sio_getreg(com, com_scr); 98660471Snyan sio_setreg(com, com_scr, scr); 98751078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 98889447Sbmah printf(" 8250 or not responding"); 98951078Speter goto determined_type; 99051078Speter } 99151078Speter } 99260471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 99351078Speter DELAY(100); 99451078Speter com->st16650a = 0; 99551078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 99651078Speter case FIFO_RX_LOW: 99751078Speter printf(" 16450"); 99851078Speter break; 99951078Speter case FIFO_RX_MEDL: 100051078Speter printf(" 16450?"); 100151078Speter break; 100251078Speter case FIFO_RX_MEDH: 100351078Speter printf(" 16550?"); 100451078Speter break; 100551078Speter case FIFO_RX_HIGH: 100651078Speter if (COM_NOFIFO(flags)) { 100751078Speter printf(" 16550A fifo disabled"); 100851078Speter } else { 100951078Speter com->hasfifo = TRUE; 101051078Speter if (COM_ST16650A(flags)) { 101151078Speter com->st16650a = 1; 101251078Speter com->tx_fifo_size = 32; 101351078Speter printf(" ST16650A"); 101451078Speter } else { 101551078Speter com->tx_fifo_size = COM_FIFOSIZE(flags); 101651078Speter printf(" 16550A"); 101751078Speter } 101851078Speter } 101951078Speter#ifdef COM_ESP 102051078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 102151078Speter if (espattach(com, *espp)) { 102251078Speter com->tx_fifo_size = 1024; 102351078Speter break; 102451078Speter } 102551078Speter#endif 102651078Speter if (!com->st16650a) { 102751078Speter if (!com->tx_fifo_size) 102851078Speter com->tx_fifo_size = 16; 102951078Speter else 103051078Speter printf(" lookalike with %d bytes FIFO", 103151078Speter com->tx_fifo_size); 103251078Speter } 103351078Speter 103451078Speter break; 103551078Speter } 103651078Speter 103751078Speter#ifdef COM_ESP 103851078Speter if (com->esp) { 103951078Speter /* 104051078Speter * Set 16550 compatibility mode. 104151078Speter * We don't use the ESP_MODE_SCALE bit to increase the 104251078Speter * fifo trigger levels because we can't handle large 104351078Speter * bursts of input. 104451078Speter * XXX flow control should be set in comparam(), not here. 104551078Speter */ 104651078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 104751078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 104851078Speter 104951078Speter /* Set RTS/CTS flow control. */ 105051078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 105151078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 105251078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 105351078Speter 105451078Speter /* Set flow-control levels. */ 105551078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 105651078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 105751078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 105851078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 105951078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 106051078Speter } 106151078Speter#endif /* COM_ESP */ 106260471Snyan sio_setreg(com, com_fifo, 0); 106351078Speterdetermined_type: ; 106451078Speter 106551078Speter#ifdef COM_MULTIPORT 106651078Speter if (COM_ISMULTIPORT(flags)) { 106753344Speter device_t masterdev; 106853344Speter 106951078Speter com->multiport = TRUE; 107051078Speter printf(" (multiport"); 107151078Speter if (unit == COM_MPMASTER(flags)) 107251078Speter printf(" master"); 107351078Speter printf(")"); 107453344Speter masterdev = devclass_get_device(sio_devclass, 107553344Speter COM_MPMASTER(flags)); 107657234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 107757234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 107851078Speter } 107951078Speter#endif /* COM_MULTIPORT */ 108051078Speter if (unit == comconsole) 108151078Speter printf(", console"); 108253344Speter if (COM_IIR_TXRDYBUG(flags)) 108351078Speter printf(" with a bogus IIR_TXRDY register"); 108451078Speter printf("\n"); 108551078Speter 108667551Sjhb if (sio_fast_ih == NULL) { 108772238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 108872238Sjhb &sio_fast_ih); 108972238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 109072238Sjhb &sio_slow_ih); 109151078Speter } 109293470Sbde minorbase = UNIT_TO_MINOR(unit); 109393470Sbde com->devs[0] = make_dev(&sio_cdevsw, minorbase, 109451078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 109593470Sbde com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 109651078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 109793470Sbde com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 109851078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 109993470Sbde com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 110051078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 110165131Sphk com->devs[4] = make_dev(&sio_cdevsw, 110293470Sbde minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 110351078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 110465131Sphk com->devs[5] = make_dev(&sio_cdevsw, 110593470Sbde minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 110651078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1107110249Sphk for (rid = 0; rid < 6; rid++) 1108110249Sphk com->devs[rid]->si_drv1 = com; 110951078Speter com->flags = flags; 111051078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1111111613Sphk 1112111613Sphk if (COM_PPSCTS(flags)) 1113111613Sphk com->pps_bit = MSR_CTS; 1114111613Sphk else 1115111613Sphk com->pps_bit = MSR_DCD; 111651078Speter pps_init(&com->pps); 111751078Speter 111851078Speter rid = 0; 111951078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 112053344Speter RF_ACTIVE); 112153344Speter if (com->irqres) { 112253344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 112365557Sjasone INTR_TYPE_TTY | INTR_FAST, 112454386Simp siointr, com, &com->cookie); 112554194Speter if (ret) { 112654194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 112754194Speter com->irqres, INTR_TYPE_TTY, 112854386Simp siointr, com, &com->cookie); 112954194Speter if (ret == 0) 113083246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 113154194Speter } 113253344Speter if (ret) 113353344Speter device_printf(dev, "could not activate interrupt\n"); 113478504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 113578504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 113678504Siedowse /* 113778504Siedowse * Enable interrupts for early break-to-debugger support 113878504Siedowse * on the console. 113978504Siedowse */ 114078504Siedowse if (ret == 0 && unit == comconsole) 114178504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 114278504Siedowse IER_EMSC); 114378504Siedowse#endif 114453344Speter } 114551078Speter 114651078Speter return (0); 114751078Speter} 114851078Speter 114951078Speterstatic int 115083366Sjuliansioopen(dev, flag, mode, td) 115151078Speter dev_t dev; 115251078Speter int flag; 115351078Speter int mode; 115483366Sjulian struct thread *td; 115551078Speter{ 115651078Speter struct com_s *com; 115751078Speter int error; 115851078Speter int mynor; 115951078Speter int s; 116051078Speter struct tty *tp; 116151078Speter int unit; 116251078Speter 116351078Speter mynor = minor(dev); 116451078Speter unit = MINOR_TO_UNIT(mynor); 116553344Speter com = com_addr(unit); 116653344Speter if (com == NULL) 116751078Speter return (ENXIO); 116851078Speter if (com->gone) 116951078Speter return (ENXIO); 117051078Speter if (mynor & CONTROL_MASK) 117151078Speter return (0); 117251078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 117351078Speter s = spltty(); 117451078Speter /* 117551078Speter * We jump to this label after all non-interrupted sleeps to pick 117651078Speter * up any changes of the device state. 117751078Speter */ 117851078Speteropen_top: 117951078Speter while (com->state & CS_DTR_OFF) { 118051078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 118151078Speter if (com_addr(unit) == NULL) 118251078Speter return (ENXIO); 118351078Speter if (error != 0 || com->gone) 118451078Speter goto out; 118551078Speter } 118651078Speter if (tp->t_state & TS_ISOPEN) { 118751078Speter /* 118851078Speter * The device is open, so everything has been initialized. 118951078Speter * Handle conflicts. 119051078Speter */ 119151078Speter if (mynor & CALLOUT_MASK) { 119251078Speter if (!com->active_out) { 119351078Speter error = EBUSY; 119451078Speter goto out; 119551078Speter } 119651078Speter } else { 119751078Speter if (com->active_out) { 119851078Speter if (flag & O_NONBLOCK) { 119951078Speter error = EBUSY; 120051078Speter goto out; 120151078Speter } 120251078Speter error = tsleep(&com->active_out, 120351078Speter TTIPRI | PCATCH, "siobi", 0); 120451078Speter if (com_addr(unit) == NULL) 120551078Speter return (ENXIO); 120651078Speter if (error != 0 || com->gone) 120751078Speter goto out; 120851078Speter goto open_top; 120951078Speter } 121051078Speter } 121151078Speter if (tp->t_state & TS_XCLUDE && 121293593Sjhb suser(td)) { 121351078Speter error = EBUSY; 121451078Speter goto out; 121551078Speter } 121651078Speter } else { 121751078Speter /* 121851078Speter * The device isn't open, so there are no conflicts. 121951078Speter * Initialize it. Initialization is done twice in many 122051078Speter * cases: to preempt sleeping callin opens if we are 122151078Speter * callout, and to complete a callin open after DCD rises. 122251078Speter */ 122351078Speter tp->t_oproc = comstart; 122451078Speter tp->t_param = comparam; 122551654Sphk tp->t_stop = comstop; 122651078Speter tp->t_dev = dev; 122751078Speter tp->t_termios = mynor & CALLOUT_MASK 122851078Speter ? com->it_out : com->it_in; 122951078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 123051078Speter com->poll = com->no_irq; 123151078Speter com->poll_output = com->loses_outints; 123251078Speter ++com->wopeners; 123351078Speter error = comparam(tp, &tp->t_termios); 123451078Speter --com->wopeners; 123551078Speter if (error != 0) 123651078Speter goto out; 123751078Speter /* 123851078Speter * XXX we should goto open_top if comparam() slept. 123951078Speter */ 124051078Speter if (com->hasfifo) { 1241102542Sphk int i; 124251078Speter /* 124351078Speter * (Re)enable and drain fifos. 124451078Speter * 124551078Speter * Certain SMC chips cause problems if the fifos 124651078Speter * are enabled while input is ready. Turn off the 124751078Speter * fifo if necessary to clear the input. We test 124851078Speter * the input ready bit after enabling the fifos 124951078Speter * since we've already enabled them in comparam() 125051078Speter * and to handle races between enabling and fresh 125151078Speter * input. 125251078Speter */ 1253102542Sphk for (i = 0; i < 500; i++) { 125460471Snyan sio_setreg(com, com_fifo, 125560471Snyan FIFO_RCV_RST | FIFO_XMT_RST 125660471Snyan | com->fifo_image); 125751078Speter /* 125851078Speter * XXX the delays are for superstitious 125951078Speter * historical reasons. It must be less than 126051078Speter * the character time at the maximum 126151078Speter * supported speed (87 usec at 115200 bps 126251078Speter * 8N1). Otherwise we might loop endlessly 126351078Speter * if data is streaming in. We used to use 126451078Speter * delays of 100. That usually worked 126551078Speter * because DELAY(100) used to usually delay 126651078Speter * for about 85 usec instead of 100. 126751078Speter */ 126851078Speter DELAY(50); 126951078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 127051078Speter break; 127160471Snyan sio_setreg(com, com_fifo, 0); 127251078Speter DELAY(50); 127351078Speter (void) inb(com->data_port); 127451078Speter } 1275102542Sphk if (i == 500) { 1276102542Sphk error = EIO; 1277102542Sphk goto out; 1278102542Sphk } 127951078Speter } 128051078Speter 128172200Sbmilekic mtx_lock_spin(&sio_lock); 128251078Speter (void) inb(com->line_status_port); 128351078Speter (void) inb(com->data_port); 128451078Speter com->prev_modem_status = com->last_modem_status 128551078Speter = inb(com->modem_status_port); 128651078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 128751078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 128851078Speter | IER_EMSC); 128951078Speter } else { 129051078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 129151078Speter | IER_ERLS | IER_EMSC); 129251078Speter } 129372200Sbmilekic mtx_unlock_spin(&sio_lock); 129451078Speter /* 129551078Speter * Handle initial DCD. Callout devices get a fake initial 129651078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 129751078Speter * callin opens get woken up and resume sleeping on "siobi" 129851078Speter * instead of "siodcd". 129951078Speter */ 130051078Speter /* 130151078Speter * XXX `mynor & CALLOUT_MASK' should be 130251078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 130351078Speter * TRAPDOOR_CARRIER is the default initial state for callout 130451078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 130551078Speter * the true carrier. 130651078Speter */ 130751078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 130851078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 130951078Speter } 131051078Speter /* 131151078Speter * Wait for DCD if necessary. 131251078Speter */ 131351078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 131451078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 131551078Speter ++com->wopeners; 131651078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 131751078Speter if (com_addr(unit) == NULL) 131851078Speter return (ENXIO); 131951078Speter --com->wopeners; 132051078Speter if (error != 0 || com->gone) 132151078Speter goto out; 132251078Speter goto open_top; 132351078Speter } 132451078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 132551078Speter disc_optim(tp, &tp->t_termios, com); 132651078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 132751078Speter com->active_out = TRUE; 132851078Speter siosettimeout(); 132951078Speterout: 133051078Speter splx(s); 133151078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 133251078Speter comhardclose(com); 133351078Speter return (error); 133451078Speter} 133551078Speter 133651078Speterstatic int 133783366Sjuliansioclose(dev, flag, mode, td) 133851078Speter dev_t dev; 133951078Speter int flag; 134051078Speter int mode; 134183366Sjulian struct thread *td; 134251078Speter{ 134351078Speter struct com_s *com; 134451078Speter int mynor; 134551078Speter int s; 134651078Speter struct tty *tp; 134751078Speter 134851078Speter mynor = minor(dev); 134951078Speter if (mynor & CONTROL_MASK) 135051078Speter return (0); 135151078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 135257915Simp if (com == NULL) 135357915Simp return (ENODEV); 135451078Speter tp = com->tp; 135551078Speter s = spltty(); 135651078Speter (*linesw[tp->t_line].l_close)(tp, flag); 135751078Speter disc_optim(tp, &tp->t_termios, com); 135851654Sphk comstop(tp, FREAD | FWRITE); 135951078Speter comhardclose(com); 136051078Speter ttyclose(tp); 136151078Speter siosettimeout(); 136251078Speter splx(s); 136351078Speter if (com->gone) { 136451078Speter printf("sio%d: gone\n", com->unit); 136551078Speter s = spltty(); 136651078Speter if (com->ibuf != NULL) 136751078Speter free(com->ibuf, M_DEVBUF); 136851078Speter bzero(tp, sizeof *tp); 136951078Speter splx(s); 137051078Speter } 137151078Speter return (0); 137251078Speter} 137351078Speter 137451078Speterstatic void 137551078Spetercomhardclose(com) 137651078Speter struct com_s *com; 137751078Speter{ 137851078Speter int s; 137951078Speter struct tty *tp; 138051078Speter int unit; 138151078Speter 138251078Speter unit = com->unit; 138351078Speter s = spltty(); 138451078Speter com->poll = FALSE; 138551078Speter com->poll_output = FALSE; 138651078Speter com->do_timestamp = FALSE; 138751078Speter com->do_dcd_timestamp = FALSE; 138851078Speter com->pps.ppsparam.mode = 0; 138960471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 139078504Siedowse tp = com->tp; 139178504Siedowse 139278504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 139378504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 139478504Siedowse /* 139578504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 139678504Siedowse * console. This allows us to detect break-to-debugger events 139778504Siedowse * while the console device is closed. 139878504Siedowse */ 139978504Siedowse if (com->unit != comconsole) 140078504Siedowse#endif 140151078Speter { 140260471Snyan sio_setreg(com, com_ier, 0); 140351078Speter if (tp->t_cflag & HUPCL 140451078Speter /* 140551078Speter * XXX we will miss any carrier drop between here and the 140651078Speter * next open. Perhaps we should watch DCD even when the 140751078Speter * port is closed; it is not sufficient to check it at 140851078Speter * the next open because it might go up and down while 140951078Speter * we're not watching. 141051078Speter */ 141151078Speter || (!com->active_out 141251078Speter && !(com->prev_modem_status & MSR_DCD) 141351078Speter && !(com->it_in.c_cflag & CLOCAL)) 141451078Speter || !(tp->t_state & TS_ISOPEN)) { 141551078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 141651078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 141751078Speter timeout(siodtrwakeup, com, com->dtr_wait); 141851078Speter com->state |= CS_DTR_OFF; 141951078Speter } 142051078Speter } 142151078Speter } 142251078Speter if (com->hasfifo) { 142351078Speter /* 142451078Speter * Disable fifos so that they are off after controlled 142551078Speter * reboots. Some BIOSes fail to detect 16550s when the 142651078Speter * fifos are enabled. 142751078Speter */ 142860471Snyan sio_setreg(com, com_fifo, 0); 142951078Speter } 143051078Speter com->active_out = FALSE; 143151078Speter wakeup(&com->active_out); 143251078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 143351078Speter splx(s); 143451078Speter} 143551078Speter 143651078Speterstatic int 143751078Spetersioread(dev, uio, flag) 143851078Speter dev_t dev; 143951078Speter struct uio *uio; 144051078Speter int flag; 144151078Speter{ 144251078Speter int mynor; 144351078Speter struct com_s *com; 144451078Speter 144551078Speter mynor = minor(dev); 144651078Speter if (mynor & CONTROL_MASK) 144751078Speter return (ENODEV); 144851078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 144957915Simp if (com == NULL || com->gone) 145051078Speter return (ENODEV); 145151078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 145251078Speter} 145351078Speter 145451078Speterstatic int 145551078Spetersiowrite(dev, uio, flag) 145651078Speter dev_t dev; 145751078Speter struct uio *uio; 145851078Speter int flag; 145951078Speter{ 146051078Speter int mynor; 146151078Speter struct com_s *com; 146251078Speter int unit; 146351078Speter 146451078Speter mynor = minor(dev); 146551078Speter if (mynor & CONTROL_MASK) 146651078Speter return (ENODEV); 146751078Speter 146851078Speter unit = MINOR_TO_UNIT(mynor); 146951078Speter com = com_addr(unit); 147057915Simp if (com == NULL || com->gone) 147151078Speter return (ENODEV); 147251078Speter /* 147351078Speter * (XXX) We disallow virtual consoles if the physical console is 147451078Speter * a serial port. This is in case there is a display attached that 147551078Speter * is not the console. In that situation we don't need/want the X 147651078Speter * server taking over the console. 147751078Speter */ 147851078Speter if (constty != NULL && unit == comconsole) 147951078Speter constty = NULL; 148051078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 148151078Speter} 148251078Speter 148351078Speterstatic void 148451078Spetersiobusycheck(chan) 148551078Speter void *chan; 148651078Speter{ 148751078Speter struct com_s *com; 148851078Speter int s; 148951078Speter 149051078Speter com = (struct com_s *)chan; 149151078Speter 149251078Speter /* 149351078Speter * Clear TS_BUSY if low-level output is complete. 149451078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 149551078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 149651078Speter * called again. Reading the line status port outside of siointr1() 149751078Speter * is safe because CS_BUSY is clear so there are no output interrupts 149851078Speter * to lose. 149951078Speter */ 150051078Speter s = spltty(); 150151078Speter if (com->state & CS_BUSY) 150251078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 150351078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 150451078Speter == (LSR_TSRE | LSR_TXRDY)) { 150551078Speter com->tp->t_state &= ~TS_BUSY; 150651078Speter ttwwakeup(com->tp); 150751078Speter com->extra_state &= ~CSE_BUSYCHECK; 150851078Speter } else 150951078Speter timeout(siobusycheck, com, hz / 100); 151051078Speter splx(s); 151151078Speter} 151251078Speter 151389986Sjhaystatic u_int 151489986Sjhaysiodivisor(rclk, speed) 151589986Sjhay u_long rclk; 151689986Sjhay speed_t speed; 151789986Sjhay{ 151889986Sjhay long actual_speed; 151989986Sjhay u_int divisor; 152089986Sjhay int error; 152189986Sjhay 152289986Sjhay if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 152389986Sjhay return (0); 152489986Sjhay divisor = (rclk / (8UL * speed) + 1) / 2; 152589986Sjhay if (divisor == 0 || divisor >= 65536) 152689986Sjhay return (0); 152789986Sjhay actual_speed = rclk / (16UL * divisor); 152889986Sjhay 152989986Sjhay /* 10 times error in percent: */ 153089986Sjhay error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 153189986Sjhay 153289986Sjhay /* 3.0% maximum error tolerance: */ 153389986Sjhay if (error < -30 || error > 30) 153489986Sjhay return (0); 153589986Sjhay 153689986Sjhay return (divisor); 153789986Sjhay} 153889986Sjhay 153951078Speterstatic void 154051078Spetersiodtrwakeup(chan) 154151078Speter void *chan; 154251078Speter{ 154351078Speter struct com_s *com; 154451078Speter 154551078Speter com = (struct com_s *)chan; 154651078Speter com->state &= ~CS_DTR_OFF; 154751078Speter wakeup(&com->dtr_wait); 154851078Speter} 154951078Speter 155065557Sjasone/* 155170174Sjhb * Call this function with the sio_lock mutex held. It will return with the 155270174Sjhb * lock still held. 155365557Sjasone */ 155451078Speterstatic void 155551078Spetersioinput(com) 155651078Speter struct com_s *com; 155751078Speter{ 155851078Speter u_char *buf; 155951078Speter int incc; 156051078Speter u_char line_status; 156151078Speter int recv_data; 156251078Speter struct tty *tp; 156351078Speter 156451078Speter buf = com->ibuf; 156551078Speter tp = com->tp; 156651078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 156751078Speter com_events -= (com->iptr - com->ibuf); 156851078Speter com->iptr = com->ibuf; 156951078Speter return; 157051078Speter } 157151078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 157251078Speter /* 157351078Speter * Avoid the grotesquely inefficient lineswitch routine 157451078Speter * (ttyinput) in "raw" mode. It usually takes about 450 157551078Speter * instructions (that's without canonical processing or echo!). 157651078Speter * slinput is reasonably fast (usually 40 instructions plus 157751078Speter * call overhead). 157851078Speter */ 157951078Speter do { 158065557Sjasone /* 158165557Sjasone * This may look odd, but it is using save-and-enable 158265557Sjasone * semantics instead of the save-and-disable semantics 158365557Sjasone * that are used everywhere else. 158465557Sjasone */ 158572200Sbmilekic mtx_unlock_spin(&sio_lock); 158651078Speter incc = com->iptr - buf; 158751078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 158851078Speter && (com->state & CS_RTS_IFLOW 158951078Speter || tp->t_iflag & IXOFF) 159051078Speter && !(tp->t_state & TS_TBLOCK)) 159151078Speter ttyblock(tp); 159251078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 159351078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 159451078Speter buf += incc; 159551078Speter tk_nin += incc; 159651078Speter tk_rawcc += incc; 159751078Speter tp->t_rawcc += incc; 159851078Speter ttwakeup(tp); 159951078Speter if (tp->t_state & TS_TTSTOP 160051078Speter && (tp->t_iflag & IXANY 160151078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 160251078Speter tp->t_state &= ~TS_TTSTOP; 160351078Speter tp->t_lflag &= ~FLUSHO; 160451078Speter comstart(tp); 160551078Speter } 160672200Sbmilekic mtx_lock_spin(&sio_lock); 160751078Speter } while (buf < com->iptr); 160851078Speter } else { 160951078Speter do { 161065557Sjasone /* 161165557Sjasone * This may look odd, but it is using save-and-enable 161265557Sjasone * semantics instead of the save-and-disable semantics 161365557Sjasone * that are used everywhere else. 161465557Sjasone */ 161572200Sbmilekic mtx_unlock_spin(&sio_lock); 161651078Speter line_status = buf[com->ierroff]; 161751078Speter recv_data = *buf++; 161851078Speter if (line_status 161951078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 162051078Speter if (line_status & LSR_BI) 162151078Speter recv_data |= TTY_BI; 162251078Speter if (line_status & LSR_FE) 162351078Speter recv_data |= TTY_FE; 162451078Speter if (line_status & LSR_OE) 162551078Speter recv_data |= TTY_OE; 162651078Speter if (line_status & LSR_PE) 162751078Speter recv_data |= TTY_PE; 162851078Speter } 162951078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 163072200Sbmilekic mtx_lock_spin(&sio_lock); 163151078Speter } while (buf < com->iptr); 163251078Speter } 163351078Speter com_events -= (com->iptr - com->ibuf); 163451078Speter com->iptr = com->ibuf; 163551078Speter 163651078Speter /* 163751078Speter * There is now room for another low-level buffer full of input, 163851078Speter * so enable RTS if it is now disabled and there is room in the 163951078Speter * high-level buffer. 164051078Speter */ 164151078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 164251078Speter !(tp->t_state & TS_TBLOCK)) 164351078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 164451078Speter} 164551078Speter 1646104094Sphkstatic void 164751078Spetersiointr(arg) 164851078Speter void *arg; 164951078Speter{ 165070174Sjhb struct com_s *com; 165170174Sjhb 165251078Speter#ifndef COM_MULTIPORT 165370174Sjhb com = (struct com_s *)arg; 165470174Sjhb 165572200Sbmilekic mtx_lock_spin(&sio_lock); 165670174Sjhb siointr1(com); 165772200Sbmilekic mtx_unlock_spin(&sio_lock); 165851078Speter#else /* COM_MULTIPORT */ 165951078Speter bool_t possibly_more_intrs; 166051078Speter int unit; 166151078Speter 166251078Speter /* 166351078Speter * Loop until there is no activity on any port. This is necessary 166451078Speter * to get an interrupt edge more than to avoid another interrupt. 166551078Speter * If the IRQ signal is just an OR of the IRQ signals from several 166651078Speter * devices, then the edge from one may be lost because another is 166751078Speter * on. 166851078Speter */ 166972200Sbmilekic mtx_lock_spin(&sio_lock); 167051078Speter do { 167151078Speter possibly_more_intrs = FALSE; 167253344Speter for (unit = 0; unit < sio_numunits; ++unit) { 167351078Speter com = com_addr(unit); 167451078Speter /* 167551078Speter * XXX COM_LOCK(); 167651078Speter * would it work here, or be counter-productive? 167751078Speter */ 167851078Speter if (com != NULL 167951078Speter && !com->gone 168051078Speter && (inb(com->int_id_port) & IIR_IMASK) 168151078Speter != IIR_NOPEND) { 168251078Speter siointr1(com); 168351078Speter possibly_more_intrs = TRUE; 168451078Speter } 168551078Speter /* XXX COM_UNLOCK(); */ 168651078Speter } 168751078Speter } while (possibly_more_intrs); 168872200Sbmilekic mtx_unlock_spin(&sio_lock); 168951078Speter#endif /* COM_MULTIPORT */ 169051078Speter} 169151078Speter 169293466Sbdestatic struct timespec siots[8192]; 169393466Sbdestatic int siotso; 169493466Sbdestatic int volatile siotsunit = -1; 169593466Sbde 169693466Sbdestatic int 169793466Sbdesysctl_siots(SYSCTL_HANDLER_ARGS) 169893466Sbde{ 169993466Sbde char buf[128]; 170093466Sbde long long delta; 170193466Sbde size_t len; 170293466Sbde int error, i; 170393466Sbde 170493466Sbde for (i = 1; i < siotso; i++) { 170593466Sbde delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 170693466Sbde 1000000000 + 170793466Sbde (siots[i].tv_nsec - siots[i - 1].tv_nsec); 170893466Sbde len = sprintf(buf, "%lld\n", delta); 170993466Sbde if (delta >= 110000) 171093466Sbde len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 171193466Sbde (long)siots[i].tv_sec, siots[i].tv_nsec); 171293466Sbde if (i == siotso - 1) 171393466Sbde buf[len - 1] = '\0'; 171493466Sbde error = SYSCTL_OUT(req, buf, len); 171593466Sbde if (error != 0) 171693466Sbde return (error); 171793466Sbde uio_yield(); 171893466Sbde } 171993466Sbde return (0); 172093466Sbde} 172193466Sbde 172293466SbdeSYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 172393466Sbde 0, 0, sysctl_siots, "A", "sio timestamps"); 172493466Sbde 172551078Speterstatic void 172651078Spetersiointr1(com) 172751078Speter struct com_s *com; 172851078Speter{ 172951078Speter u_char line_status; 173051078Speter u_char modem_status; 173151078Speter u_char *ioptr; 173251078Speter u_char recv_data; 173351078Speter u_char int_ctl; 173451078Speter u_char int_ctl_new; 173551078Speter 173651078Speter int_ctl = inb(com->intr_ctl_port); 173751078Speter int_ctl_new = int_ctl; 173851078Speter 173951078Speter while (!com->gone) { 174051078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 174151078Speter modem_status = inb(com->modem_status_port); 1742111613Sphk if ((modem_status ^ com->last_modem_status) & 1743111613Sphk com->pps_bit) { 174495523Sphk pps_capture(&com->pps); 1745111613Sphk pps_event(&com->pps, 1746111616Sphk (modem_status & com->pps_bit) ? 174751078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 174851078Speter } 174951078Speter } 175051078Speter line_status = inb(com->line_status_port); 175151078Speter 175251078Speter /* input event? (check first to help avoid overruns) */ 175351078Speter while (line_status & LSR_RCV_MASK) { 175451078Speter /* break/unnattached error bits or real input? */ 175551078Speter if (!(line_status & LSR_RXRDY)) 175651078Speter recv_data = 0; 175751078Speter else 175851078Speter recv_data = inb(com->data_port); 175961649Sps#if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 176061649Sps /* 176161649Sps * Solaris implements a new BREAK which is initiated 176261649Sps * by a character sequence CR ~ ^b which is similar 176361649Sps * to a familiar pattern used on Sun servers by the 176461649Sps * Remote Console. 176561649Sps */ 176661649Sps#define KEY_CRTLB 2 /* ^B */ 176761649Sps#define KEY_CR 13 /* CR '\r' */ 176861649Sps#define KEY_TILDE 126 /* ~ */ 176961649Sps 177061649Sps if (com->unit == comconsole) { 177161649Sps static int brk_state1 = 0, brk_state2 = 0; 177261649Sps if (recv_data == KEY_CR) { 177361649Sps brk_state1 = recv_data; 177461649Sps brk_state2 = 0; 177565557Sjasone } else if (brk_state1 == KEY_CR 177665557Sjasone && (recv_data == KEY_TILDE 177765557Sjasone || recv_data == KEY_CRTLB)) { 177861649Sps if (recv_data == KEY_TILDE) 177961649Sps brk_state2 = recv_data; 178065557Sjasone else if (brk_state2 == KEY_TILDE 178165557Sjasone && recv_data == KEY_CRTLB) { 178261649Sps breakpoint(); 178365557Sjasone brk_state1 = 0; 178465557Sjasone brk_state2 = 0; 178561649Sps goto cont; 178661649Sps } else 178761649Sps brk_state2 = 0; 178861649Sps } else 178961649Sps brk_state1 = 0; 179061649Sps } 179161649Sps#endif 179251078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 179351078Speter /* 179451078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 179551078Speter * Otherwise, push the work to a higher level 179651078Speter * (to handle PARMRK) if we're bypassing. 179751078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 179851078Speter * 179951078Speter * This makes bypassing work right in the 180051078Speter * usual "raw" case (IGNBRK set, and IGNPAR 180151078Speter * and INPCK clear). 180251078Speter * 180351078Speter * Note: BI together with FE/PE means just BI. 180451078Speter */ 180551078Speter if (line_status & LSR_BI) { 180651078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 180751078Speter if (com->unit == comconsole) { 180851078Speter breakpoint(); 180951078Speter goto cont; 181051078Speter } 181151078Speter#endif 181251078Speter if (com->tp == NULL 181351078Speter || com->tp->t_iflag & IGNBRK) 181451078Speter goto cont; 181551078Speter } else { 181651078Speter if (com->tp == NULL 181751078Speter || com->tp->t_iflag & IGNPAR) 181851078Speter goto cont; 181951078Speter } 182051078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 182151078Speter && (line_status & (LSR_BI | LSR_FE) 182251078Speter || com->tp->t_iflag & INPCK)) 182351078Speter recv_data = 0; 182451078Speter } 182551078Speter ++com->bytes_in; 182651078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 182788900Sjhb swi_sched(sio_fast_ih, 0); 182851078Speter ioptr = com->iptr; 182951078Speter if (ioptr >= com->ibufend) 183051078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 183151078Speter else { 183251078Speter if (com->do_timestamp) 183351078Speter microtime(&com->timestamp); 183451078Speter ++com_events; 183572238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 183651078Speter#if 0 /* for testing input latency vs efficiency */ 183751078Speterif (com->iptr - com->ibuf == 8) 183888900Sjhb swi_sched(sio_fast_ih, 0); 183951078Speter#endif 184051078Speter ioptr[0] = recv_data; 184151078Speter ioptr[com->ierroff] = line_status; 184251078Speter com->iptr = ++ioptr; 184351078Speter if (ioptr == com->ihighwater 184451078Speter && com->state & CS_RTS_IFLOW) 184551078Speter outb(com->modem_ctl_port, 184651078Speter com->mcr_image &= ~MCR_RTS); 184751078Speter if (line_status & LSR_OE) 184851078Speter CE_RECORD(com, CE_OVERRUN); 184951078Speter } 185051078Spetercont: 185151078Speter /* 185251078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 185351078Speter * jump from the top of the loop to here 185451078Speter */ 185551078Speter line_status = inb(com->line_status_port) & 0x7F; 185651078Speter } 185751078Speter 185851078Speter /* modem status change? (always check before doing output) */ 185951078Speter modem_status = inb(com->modem_status_port); 186051078Speter if (modem_status != com->last_modem_status) { 186151078Speter if (com->do_dcd_timestamp 186251078Speter && !(com->last_modem_status & MSR_DCD) 186351078Speter && modem_status & MSR_DCD) 186451078Speter microtime(&com->dcd_timestamp); 186551078Speter 186651078Speter /* 186751078Speter * Schedule high level to handle DCD changes. Note 186851078Speter * that we don't use the delta bits anywhere. Some 186951078Speter * UARTs mess them up, and it's easy to remember the 187051078Speter * previous bits and calculate the delta. 187151078Speter */ 187251078Speter com->last_modem_status = modem_status; 187351078Speter if (!(com->state & CS_CHECKMSR)) { 187451078Speter com_events += LOTS_OF_EVENTS; 187551078Speter com->state |= CS_CHECKMSR; 187688900Sjhb swi_sched(sio_fast_ih, 0); 187751078Speter } 187851078Speter 187951078Speter /* handle CTS change immediately for crisp flow ctl */ 188051078Speter if (com->state & CS_CTS_OFLOW) { 188151078Speter if (modem_status & MSR_CTS) 188251078Speter com->state |= CS_ODEVREADY; 188351078Speter else 188451078Speter com->state &= ~CS_ODEVREADY; 188551078Speter } 188651078Speter } 188751078Speter 188851078Speter /* output queued and everything ready? */ 188951078Speter if (line_status & LSR_TXRDY 189051078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 189151078Speter ioptr = com->obufq.l_head; 189293466Sbde if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 189351078Speter u_int ocount; 189451078Speter 189551078Speter ocount = com->obufq.l_tail - ioptr; 189651078Speter if (ocount > com->tx_fifo_size) 189751078Speter ocount = com->tx_fifo_size; 189851078Speter com->bytes_out += ocount; 189951078Speter do 190051078Speter outb(com->data_port, *ioptr++); 190151078Speter while (--ocount != 0); 190251078Speter } else { 190351078Speter outb(com->data_port, *ioptr++); 190451078Speter ++com->bytes_out; 190593466Sbde if (com->unit == siotsunit) { 190693466Sbde nanouptime(&siots[siotso]); 190793466Sbde siotso = (siotso + 1) % 190893466Sbde (sizeof siots / sizeof siots[0]); 190993466Sbde } 191051078Speter } 191151078Speter com->obufq.l_head = ioptr; 191251078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 191351078Speter int_ctl_new = int_ctl | IER_ETXRDY; 191451078Speter } 191551078Speter if (ioptr >= com->obufq.l_tail) { 191651078Speter struct lbq *qp; 191751078Speter 191851078Speter qp = com->obufq.l_next; 191951078Speter qp->l_queued = FALSE; 192051078Speter qp = qp->l_next; 192151078Speter if (qp != NULL) { 192251078Speter com->obufq.l_head = qp->l_head; 192351078Speter com->obufq.l_tail = qp->l_tail; 192451078Speter com->obufq.l_next = qp; 192551078Speter } else { 192651078Speter /* output just completed */ 192753344Speter if (COM_IIR_TXRDYBUG(com->flags)) { 192851078Speter int_ctl_new = int_ctl & ~IER_ETXRDY; 192951078Speter } 193051078Speter com->state &= ~CS_BUSY; 193151078Speter } 193251078Speter if (!(com->state & CS_ODONE)) { 193351078Speter com_events += LOTS_OF_EVENTS; 193451078Speter com->state |= CS_ODONE; 193567551Sjhb /* handle at high level ASAP */ 193688900Sjhb swi_sched(sio_fast_ih, 0); 193751078Speter } 193851078Speter } 193953344Speter if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 194051078Speter outb(com->intr_ctl_port, int_ctl_new); 194151078Speter } 194251078Speter } 194351078Speter 194451078Speter /* finished? */ 194551078Speter#ifndef COM_MULTIPORT 194651078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 194751078Speter#endif /* COM_MULTIPORT */ 194851078Speter return; 194951078Speter } 195051078Speter} 195151078Speter 195251078Speterstatic int 195383366Sjuliansioioctl(dev, cmd, data, flag, td) 195451078Speter dev_t dev; 195551078Speter u_long cmd; 195651078Speter caddr_t data; 195751078Speter int flag; 195883366Sjulian struct thread *td; 195951078Speter{ 196051078Speter struct com_s *com; 196151078Speter int error; 196251078Speter int mynor; 196351078Speter int s; 196451078Speter struct tty *tp; 196551078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 196651078Speter u_long oldcmd; 196751078Speter struct termios term; 196851078Speter#endif 196951078Speter 197051078Speter mynor = minor(dev); 197151078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 197257915Simp if (com == NULL || com->gone) 197351078Speter return (ENODEV); 197451078Speter if (mynor & CONTROL_MASK) { 197551078Speter struct termios *ct; 197651078Speter 197751078Speter switch (mynor & CONTROL_MASK) { 197851078Speter case CONTROL_INIT_STATE: 197951078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 198051078Speter break; 198151078Speter case CONTROL_LOCK_STATE: 198251078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 198351078Speter break; 198451078Speter default: 198551078Speter return (ENODEV); /* /dev/nodev */ 198651078Speter } 198751078Speter switch (cmd) { 198851078Speter case TIOCSETA: 198993593Sjhb error = suser(td); 199051078Speter if (error != 0) 199151078Speter return (error); 199251078Speter *ct = *(struct termios *)data; 199351078Speter return (0); 199451078Speter case TIOCGETA: 199551078Speter *(struct termios *)data = *ct; 199651078Speter return (0); 199751078Speter case TIOCGETD: 199851078Speter *(int *)data = TTYDISC; 199951078Speter return (0); 200051078Speter case TIOCGWINSZ: 200151078Speter bzero(data, sizeof(struct winsize)); 200251078Speter return (0); 200351078Speter default: 200451078Speter return (ENOTTY); 200551078Speter } 200651078Speter } 200751078Speter tp = com->tp; 200851078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 200951078Speter term = tp->t_termios; 201051078Speter oldcmd = cmd; 201151078Speter error = ttsetcompat(tp, &cmd, data, &term); 201251078Speter if (error != 0) 201351078Speter return (error); 201451078Speter if (cmd != oldcmd) 201551078Speter data = (caddr_t)&term; 201651078Speter#endif 201751078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 201851078Speter int cc; 201951078Speter struct termios *dt = (struct termios *)data; 202051078Speter struct termios *lt = mynor & CALLOUT_MASK 202151078Speter ? &com->lt_out : &com->lt_in; 202251078Speter 202351078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 202451078Speter | (dt->c_iflag & ~lt->c_iflag); 202551078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 202651078Speter | (dt->c_oflag & ~lt->c_oflag); 202751078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 202851078Speter | (dt->c_cflag & ~lt->c_cflag); 202951078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 203051078Speter | (dt->c_lflag & ~lt->c_lflag); 203151078Speter for (cc = 0; cc < NCCS; ++cc) 203251078Speter if (lt->c_cc[cc] != 0) 203351078Speter dt->c_cc[cc] = tp->t_cc[cc]; 203451078Speter if (lt->c_ispeed != 0) 203551078Speter dt->c_ispeed = tp->t_ispeed; 203651078Speter if (lt->c_ospeed != 0) 203751078Speter dt->c_ospeed = tp->t_ospeed; 203851078Speter } 203983366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 204051078Speter if (error != ENOIOCTL) 204151078Speter return (error); 204251078Speter s = spltty(); 204351078Speter error = ttioctl(tp, cmd, data, flag); 204451078Speter disc_optim(tp, &tp->t_termios, com); 204551078Speter if (error != ENOIOCTL) { 204651078Speter splx(s); 204751078Speter return (error); 204851078Speter } 204951078Speter switch (cmd) { 205051078Speter case TIOCSBRK: 205160471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 205251078Speter break; 205351078Speter case TIOCCBRK: 205460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 205551078Speter break; 205651078Speter case TIOCSDTR: 205751078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 205851078Speter break; 205951078Speter case TIOCCDTR: 206051078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 206151078Speter break; 206251078Speter /* 206351078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 206451078Speter * changes get undone on the next call to comparam(). 206551078Speter */ 206651078Speter case TIOCMSET: 206751078Speter (void)commctl(com, *(int *)data, DMSET); 206851078Speter break; 206951078Speter case TIOCMBIS: 207051078Speter (void)commctl(com, *(int *)data, DMBIS); 207151078Speter break; 207251078Speter case TIOCMBIC: 207351078Speter (void)commctl(com, *(int *)data, DMBIC); 207451078Speter break; 207551078Speter case TIOCMGET: 207651078Speter *(int *)data = commctl(com, 0, DMGET); 207751078Speter break; 207851078Speter case TIOCMSDTRWAIT: 207951078Speter /* must be root since the wait applies to following logins */ 208093593Sjhb error = suser(td); 208151078Speter if (error != 0) { 208251078Speter splx(s); 208351078Speter return (error); 208451078Speter } 208551078Speter com->dtr_wait = *(int *)data * hz / 100; 208651078Speter break; 208751078Speter case TIOCMGDTRWAIT: 208851078Speter *(int *)data = com->dtr_wait * 100 / hz; 208951078Speter break; 209051078Speter case TIOCTIMESTAMP: 209151078Speter com->do_timestamp = TRUE; 209251078Speter *(struct timeval *)data = com->timestamp; 209351078Speter break; 209451078Speter case TIOCDCDTIMESTAMP: 209551078Speter com->do_dcd_timestamp = TRUE; 209651078Speter *(struct timeval *)data = com->dcd_timestamp; 209751078Speter break; 209851078Speter default: 209951078Speter splx(s); 210051078Speter error = pps_ioctl(cmd, data, &com->pps); 210151078Speter if (error == ENODEV) 210251078Speter error = ENOTTY; 210351078Speter return (error); 210451078Speter } 210551078Speter splx(s); 210651078Speter return (0); 210751078Speter} 210851078Speter 210965557Sjasone/* software interrupt handler for SWI_TTY */ 211051078Speterstatic void 211167551Sjhbsiopoll(void *dummy) 211251078Speter{ 211351078Speter int unit; 211451078Speter 211551078Speter if (com_events == 0) 211651078Speter return; 211751078Speterrepeat: 211853344Speter for (unit = 0; unit < sio_numunits; ++unit) { 211951078Speter struct com_s *com; 212051078Speter int incc; 212151078Speter struct tty *tp; 212251078Speter 212351078Speter com = com_addr(unit); 212451078Speter if (com == NULL) 212551078Speter continue; 212651078Speter tp = com->tp; 212751078Speter if (tp == NULL || com->gone) { 212851078Speter /* 212951078Speter * Discard any events related to never-opened or 213051078Speter * going-away devices. 213151078Speter */ 213272200Sbmilekic mtx_lock_spin(&sio_lock); 213351078Speter incc = com->iptr - com->ibuf; 213451078Speter com->iptr = com->ibuf; 213551078Speter if (com->state & CS_CHECKMSR) { 213651078Speter incc += LOTS_OF_EVENTS; 213751078Speter com->state &= ~CS_CHECKMSR; 213851078Speter } 213951078Speter com_events -= incc; 214072200Sbmilekic mtx_unlock_spin(&sio_lock); 214151078Speter continue; 214251078Speter } 214351078Speter if (com->iptr != com->ibuf) { 214472200Sbmilekic mtx_lock_spin(&sio_lock); 214551078Speter sioinput(com); 214672200Sbmilekic mtx_unlock_spin(&sio_lock); 214751078Speter } 214851078Speter if (com->state & CS_CHECKMSR) { 214951078Speter u_char delta_modem_status; 215051078Speter 215172200Sbmilekic mtx_lock_spin(&sio_lock); 215251078Speter delta_modem_status = com->last_modem_status 215351078Speter ^ com->prev_modem_status; 215451078Speter com->prev_modem_status = com->last_modem_status; 215551078Speter com_events -= LOTS_OF_EVENTS; 215651078Speter com->state &= ~CS_CHECKMSR; 215772200Sbmilekic mtx_unlock_spin(&sio_lock); 215851078Speter if (delta_modem_status & MSR_DCD) 215951078Speter (*linesw[tp->t_line].l_modem) 216051078Speter (tp, com->prev_modem_status & MSR_DCD); 216151078Speter } 216251078Speter if (com->state & CS_ODONE) { 216372200Sbmilekic mtx_lock_spin(&sio_lock); 216451078Speter com_events -= LOTS_OF_EVENTS; 216551078Speter com->state &= ~CS_ODONE; 216672200Sbmilekic mtx_unlock_spin(&sio_lock); 216751078Speter if (!(com->state & CS_BUSY) 216851078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 216951078Speter timeout(siobusycheck, com, hz / 100); 217051078Speter com->extra_state |= CSE_BUSYCHECK; 217151078Speter } 217251078Speter (*linesw[tp->t_line].l_start)(tp); 217351078Speter } 217451078Speter if (com_events == 0) 217551078Speter break; 217651078Speter } 217751078Speter if (com_events >= LOTS_OF_EVENTS) 217851078Speter goto repeat; 217951078Speter} 218051078Speter 218151078Speterstatic int 218251078Spetercomparam(tp, t) 218351078Speter struct tty *tp; 218451078Speter struct termios *t; 218551078Speter{ 218651078Speter u_int cfcr; 218751078Speter int cflag; 218851078Speter struct com_s *com; 218989986Sjhay u_int divisor; 219051078Speter u_char dlbh; 219151078Speter u_char dlbl; 219251078Speter int s; 219351078Speter int unit; 219451078Speter 219589986Sjhay unit = DEV_TO_UNIT(tp->t_dev); 219689986Sjhay com = com_addr(unit); 219789986Sjhay if (com == NULL) 219889986Sjhay return (ENODEV); 219989986Sjhay 220051078Speter /* do historical conversions */ 220151078Speter if (t->c_ispeed == 0) 220251078Speter t->c_ispeed = t->c_ospeed; 220351078Speter 220451078Speter /* check requested parameters */ 220589986Sjhay if (t->c_ospeed == 0) 220689986Sjhay divisor = 0; 220789986Sjhay else { 220889986Sjhay if (t->c_ispeed != t->c_ospeed) 220989986Sjhay return (EINVAL); 221089986Sjhay divisor = siodivisor(com->rclk, t->c_ispeed); 221189986Sjhay if (divisor == 0) 221289986Sjhay return (EINVAL); 221389986Sjhay } 221451078Speter 221551078Speter /* parameters are OK, convert them to the com struct and the device */ 221651078Speter s = spltty(); 221751078Speter if (divisor == 0) 221851078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 221951078Speter else 222051078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 222151078Speter cflag = t->c_cflag; 222251078Speter switch (cflag & CSIZE) { 222351078Speter case CS5: 222451078Speter cfcr = CFCR_5BITS; 222551078Speter break; 222651078Speter case CS6: 222751078Speter cfcr = CFCR_6BITS; 222851078Speter break; 222951078Speter case CS7: 223051078Speter cfcr = CFCR_7BITS; 223151078Speter break; 223251078Speter default: 223351078Speter cfcr = CFCR_8BITS; 223451078Speter break; 223551078Speter } 223651078Speter if (cflag & PARENB) { 223751078Speter cfcr |= CFCR_PENAB; 223851078Speter if (!(cflag & PARODD)) 223951078Speter cfcr |= CFCR_PEVEN; 224051078Speter } 224151078Speter if (cflag & CSTOPB) 224251078Speter cfcr |= CFCR_STOPB; 224351078Speter 224451078Speter if (com->hasfifo && divisor != 0) { 224551078Speter /* 224651078Speter * Use a fifo trigger level low enough so that the input 224751078Speter * latency from the fifo is less than about 16 msec and 224851078Speter * the total latency is less than about 30 msec. These 224951078Speter * latencies are reasonable for humans. Serial comms 225051078Speter * protocols shouldn't expect anything better since modem 225151078Speter * latencies are larger. 225288433Sdillon * 225388433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 225488433Sdillon * speed connections without further work on reducing 225588433Sdillon * interrupt disablement times in other parts of the system, 225688433Sdillon * without producing silo overflow errors. 225751078Speter */ 225893466Sbde com->fifo_image = com->unit == siotsunit ? 0 225993466Sbde : t->c_ospeed <= 4800 226088451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 226151078Speter#ifdef COM_ESP 226251078Speter /* 226351078Speter * The Hayes ESP card needs the fifo DMA mode bit set 226451078Speter * in compatibility mode. If not, it will interrupt 226551078Speter * for each character received. 226651078Speter */ 226751078Speter if (com->esp) 226851078Speter com->fifo_image |= FIFO_DMA_MODE; 226951078Speter#endif 227060471Snyan sio_setreg(com, com_fifo, com->fifo_image); 227151078Speter } 227251078Speter 227365605Sjhb /* 227465605Sjhb * This returns with interrupts disabled so that we can complete 227565605Sjhb * the speed change atomically. Keeping interrupts disabled is 227665605Sjhb * especially important while com_data is hidden. 227765605Sjhb */ 227865605Sjhb (void) siosetwater(com, t->c_ispeed); 227965557Sjasone 228051078Speter if (divisor != 0) { 228160471Snyan sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 228251078Speter /* 228351078Speter * Only set the divisor registers if they would change, 228451078Speter * since on some 16550 incompatibles (UMC8669F), setting 228551078Speter * them while input is arriving them loses sync until 228651078Speter * data stops arriving. 228751078Speter */ 228851078Speter dlbl = divisor & 0xFF; 228960471Snyan if (sio_getreg(com, com_dlbl) != dlbl) 229060471Snyan sio_setreg(com, com_dlbl, dlbl); 229189986Sjhay dlbh = divisor >> 8; 229260471Snyan if (sio_getreg(com, com_dlbh) != dlbh) 229360471Snyan sio_setreg(com, com_dlbh, dlbh); 229451078Speter } 229551078Speter 229660471Snyan sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 229751078Speter 229851078Speter if (!(tp->t_state & TS_TTSTOP)) 229951078Speter com->state |= CS_TTGO; 230051078Speter 230151078Speter if (cflag & CRTS_IFLOW) { 230251078Speter if (com->st16650a) { 230360471Snyan sio_setreg(com, com_cfcr, 0xbf); 230460471Snyan sio_setreg(com, com_fifo, 230560471Snyan sio_getreg(com, com_fifo) | 0x40); 230651078Speter } 230751078Speter com->state |= CS_RTS_IFLOW; 230851078Speter /* 230951078Speter * If CS_RTS_IFLOW just changed from off to on, the change 231051078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 231151078Speter * so do it later by calling comstart() instead of repeating 231251078Speter * a lot of code from comstart() here. 231351078Speter */ 231451078Speter } else if (com->state & CS_RTS_IFLOW) { 231551078Speter com->state &= ~CS_RTS_IFLOW; 231651078Speter /* 231751078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 231851078Speter * on here, since comstart() won't do it later. 231951078Speter */ 232051078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 232151078Speter if (com->st16650a) { 232260471Snyan sio_setreg(com, com_cfcr, 0xbf); 232360471Snyan sio_setreg(com, com_fifo, 232460471Snyan sio_getreg(com, com_fifo) & ~0x40); 232551078Speter } 232651078Speter } 232751078Speter 232851078Speter 232951078Speter /* 233051078Speter * Set up state to handle output flow control. 233151078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 233251078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 233351078Speter */ 233451078Speter com->state |= CS_ODEVREADY; 233551078Speter com->state &= ~CS_CTS_OFLOW; 233651078Speter if (cflag & CCTS_OFLOW) { 233751078Speter com->state |= CS_CTS_OFLOW; 233851078Speter if (!(com->last_modem_status & MSR_CTS)) 233951078Speter com->state &= ~CS_ODEVREADY; 234051078Speter if (com->st16650a) { 234160471Snyan sio_setreg(com, com_cfcr, 0xbf); 234260471Snyan sio_setreg(com, com_fifo, 234360471Snyan sio_getreg(com, com_fifo) | 0x80); 234451078Speter } 234551078Speter } else { 234651078Speter if (com->st16650a) { 234760471Snyan sio_setreg(com, com_cfcr, 0xbf); 234860471Snyan sio_setreg(com, com_fifo, 234960471Snyan sio_getreg(com, com_fifo) & ~0x80); 235051078Speter } 235151078Speter } 235251078Speter 235360471Snyan sio_setreg(com, com_cfcr, com->cfcr_image); 235451078Speter 235551078Speter /* XXX shouldn't call functions while intrs are disabled. */ 235651078Speter disc_optim(tp, t, com); 235751078Speter /* 235851078Speter * Recover from fiddling with CS_TTGO. We used to call siointr1() 235951078Speter * unconditionally, but that defeated the careful discarding of 236051078Speter * stale input in sioopen(). 236151078Speter */ 236251078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 236351078Speter siointr1(com); 236451078Speter 236572200Sbmilekic mtx_unlock_spin(&sio_lock); 236651078Speter splx(s); 236751078Speter comstart(tp); 236851078Speter if (com->ibufold != NULL) { 236951078Speter free(com->ibufold, M_DEVBUF); 237051078Speter com->ibufold = NULL; 237151078Speter } 237251078Speter return (0); 237351078Speter} 237451078Speter 237565605Sjhb/* 237670174Sjhb * This function must be called with the sio_lock mutex released and will 237770174Sjhb * return with it obtained. 237865605Sjhb */ 237951078Speterstatic int 238065605Sjhbsiosetwater(com, speed) 238151078Speter struct com_s *com; 238251078Speter speed_t speed; 238351078Speter{ 238451078Speter int cp4ticks; 238551078Speter u_char *ibuf; 238651078Speter int ibufsize; 238751078Speter struct tty *tp; 238851078Speter 238951078Speter /* 239051078Speter * Make the buffer size large enough to handle a softtty interrupt 239151078Speter * latency of about 2 ticks without loss of throughput or data 239251078Speter * (about 3 ticks if input flow control is not used or not honoured, 239351078Speter * but a bit less for CS5-CS7 modes). 239451078Speter */ 239551078Speter cp4ticks = speed / 10 / hz * 4; 239651078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 239751078Speter ibufsize <<= 1; 239865605Sjhb if (ibufsize == com->ibufsize) { 239972200Sbmilekic mtx_lock_spin(&sio_lock); 240051078Speter return (0); 240165605Sjhb } 240251078Speter 240351078Speter /* 240451078Speter * Allocate input buffer. The extra factor of 2 in the size is 240551078Speter * to allow for an error byte for each input byte. 240651078Speter */ 240751078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 240865605Sjhb if (ibuf == NULL) { 240972200Sbmilekic mtx_lock_spin(&sio_lock); 241051078Speter return (ENOMEM); 241165605Sjhb } 241251078Speter 241351078Speter /* Initialize non-critical variables. */ 241451078Speter com->ibufold = com->ibuf; 241551078Speter com->ibufsize = ibufsize; 241651078Speter tp = com->tp; 241751078Speter if (tp != NULL) { 241851078Speter tp->t_ififosize = 2 * ibufsize; 241951078Speter tp->t_ispeedwat = (speed_t)-1; 242051078Speter tp->t_ospeedwat = (speed_t)-1; 242151078Speter } 242251078Speter 242351078Speter /* 242451078Speter * Read current input buffer, if any. Continue with interrupts 242551078Speter * disabled. 242651078Speter */ 242772200Sbmilekic mtx_lock_spin(&sio_lock); 242851078Speter if (com->iptr != com->ibuf) 242951078Speter sioinput(com); 243051078Speter 243151078Speter /*- 243251078Speter * Initialize critical variables, including input buffer watermarks. 243351078Speter * The external device is asked to stop sending when the buffer 243451078Speter * exactly reaches high water, or when the high level requests it. 243551078Speter * The high level is notified immediately (rather than at a later 243651078Speter * clock tick) when this watermark is reached. 243751078Speter * The buffer size is chosen so the watermark should almost never 243851078Speter * be reached. 243951078Speter * The low watermark is invisibly 0 since the buffer is always 244051078Speter * emptied all at once. 244151078Speter */ 244251078Speter com->iptr = com->ibuf = ibuf; 244351078Speter com->ibufend = ibuf + ibufsize; 244451078Speter com->ierroff = ibufsize; 244551078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 244651078Speter return (0); 244751078Speter} 244851078Speter 244951078Speterstatic void 245051078Spetercomstart(tp) 245151078Speter struct tty *tp; 245251078Speter{ 245351078Speter struct com_s *com; 245451078Speter int s; 245551078Speter int unit; 245651078Speter 245751078Speter unit = DEV_TO_UNIT(tp->t_dev); 245851078Speter com = com_addr(unit); 245957915Simp if (com == NULL) 246057915Simp return; 246151078Speter s = spltty(); 246272200Sbmilekic mtx_lock_spin(&sio_lock); 246351078Speter if (tp->t_state & TS_TTSTOP) 246451078Speter com->state &= ~CS_TTGO; 246551078Speter else 246651078Speter com->state |= CS_TTGO; 246751078Speter if (tp->t_state & TS_TBLOCK) { 246851078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 246951078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 247051078Speter } else { 247151078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 247251078Speter && com->state & CS_RTS_IFLOW) 247351078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 247451078Speter } 247572200Sbmilekic mtx_unlock_spin(&sio_lock); 247651078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 247751078Speter ttwwakeup(tp); 247851078Speter splx(s); 247951078Speter return; 248051078Speter } 248151078Speter if (tp->t_outq.c_cc != 0) { 248251078Speter struct lbq *qp; 248351078Speter struct lbq *next; 248451078Speter 248551078Speter if (!com->obufs[0].l_queued) { 248651078Speter com->obufs[0].l_tail 248751078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 248851078Speter sizeof com->obuf1); 248951078Speter com->obufs[0].l_next = NULL; 249051078Speter com->obufs[0].l_queued = TRUE; 249172200Sbmilekic mtx_lock_spin(&sio_lock); 249251078Speter if (com->state & CS_BUSY) { 249351078Speter qp = com->obufq.l_next; 249451078Speter while ((next = qp->l_next) != NULL) 249551078Speter qp = next; 249651078Speter qp->l_next = &com->obufs[0]; 249751078Speter } else { 249851078Speter com->obufq.l_head = com->obufs[0].l_head; 249951078Speter com->obufq.l_tail = com->obufs[0].l_tail; 250051078Speter com->obufq.l_next = &com->obufs[0]; 250151078Speter com->state |= CS_BUSY; 250251078Speter } 250372200Sbmilekic mtx_unlock_spin(&sio_lock); 250451078Speter } 250551078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 250651078Speter com->obufs[1].l_tail 250751078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 250851078Speter sizeof com->obuf2); 250951078Speter com->obufs[1].l_next = NULL; 251051078Speter com->obufs[1].l_queued = TRUE; 251172200Sbmilekic mtx_lock_spin(&sio_lock); 251251078Speter if (com->state & CS_BUSY) { 251351078Speter qp = com->obufq.l_next; 251451078Speter while ((next = qp->l_next) != NULL) 251551078Speter qp = next; 251651078Speter qp->l_next = &com->obufs[1]; 251751078Speter } else { 251851078Speter com->obufq.l_head = com->obufs[1].l_head; 251951078Speter com->obufq.l_tail = com->obufs[1].l_tail; 252051078Speter com->obufq.l_next = &com->obufs[1]; 252151078Speter com->state |= CS_BUSY; 252251078Speter } 252372200Sbmilekic mtx_unlock_spin(&sio_lock); 252451078Speter } 252551078Speter tp->t_state |= TS_BUSY; 252651078Speter } 252772200Sbmilekic mtx_lock_spin(&sio_lock); 252851078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 252951078Speter siointr1(com); /* fake interrupt to start output */ 253072200Sbmilekic mtx_unlock_spin(&sio_lock); 253151078Speter ttwwakeup(tp); 253251078Speter splx(s); 253351078Speter} 253451078Speter 253551078Speterstatic void 253651654Sphkcomstop(tp, rw) 253751078Speter struct tty *tp; 253851078Speter int rw; 253951078Speter{ 254051078Speter struct com_s *com; 254151078Speter 254251078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 254357915Simp if (com == NULL || com->gone) 254451078Speter return; 254572200Sbmilekic mtx_lock_spin(&sio_lock); 254651078Speter if (rw & FWRITE) { 254751078Speter if (com->hasfifo) 254851078Speter#ifdef COM_ESP 254951078Speter /* XXX avoid h/w bug. */ 255051078Speter if (!com->esp) 255151078Speter#endif 255260471Snyan sio_setreg(com, com_fifo, 255360471Snyan FIFO_XMT_RST | com->fifo_image); 255451078Speter com->obufs[0].l_queued = FALSE; 255551078Speter com->obufs[1].l_queued = FALSE; 255651078Speter if (com->state & CS_ODONE) 255751078Speter com_events -= LOTS_OF_EVENTS; 255851078Speter com->state &= ~(CS_ODONE | CS_BUSY); 255951078Speter com->tp->t_state &= ~TS_BUSY; 256051078Speter } 256151078Speter if (rw & FREAD) { 256251078Speter if (com->hasfifo) 256351078Speter#ifdef COM_ESP 256451078Speter /* XXX avoid h/w bug. */ 256551078Speter if (!com->esp) 256651078Speter#endif 256760471Snyan sio_setreg(com, com_fifo, 256860471Snyan FIFO_RCV_RST | com->fifo_image); 256951078Speter com_events -= (com->iptr - com->ibuf); 257051078Speter com->iptr = com->ibuf; 257151078Speter } 257272200Sbmilekic mtx_unlock_spin(&sio_lock); 257351078Speter comstart(tp); 257451078Speter} 257551078Speter 257651078Speterstatic int 257751078Spetercommctl(com, bits, how) 257851078Speter struct com_s *com; 257951078Speter int bits; 258051078Speter int how; 258151078Speter{ 258251078Speter int mcr; 258351078Speter int msr; 258451078Speter 258551078Speter if (how == DMGET) { 258651078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 258751078Speter mcr = com->mcr_image; 258851078Speter if (mcr & MCR_DTR) 258951078Speter bits |= TIOCM_DTR; 259051078Speter if (mcr & MCR_RTS) 259151078Speter bits |= TIOCM_RTS; 259251078Speter msr = com->prev_modem_status; 259351078Speter if (msr & MSR_CTS) 259451078Speter bits |= TIOCM_CTS; 259551078Speter if (msr & MSR_DCD) 259651078Speter bits |= TIOCM_CD; 259751078Speter if (msr & MSR_DSR) 259851078Speter bits |= TIOCM_DSR; 259951078Speter /* 260051078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 260151078Speter * more volatile by reading the modem status a lot. Perhaps 260251078Speter * we should latch both bits until the status is read here. 260351078Speter */ 260451078Speter if (msr & (MSR_RI | MSR_TERI)) 260551078Speter bits |= TIOCM_RI; 260651078Speter return (bits); 260751078Speter } 260851078Speter mcr = 0; 260951078Speter if (bits & TIOCM_DTR) 261051078Speter mcr |= MCR_DTR; 261151078Speter if (bits & TIOCM_RTS) 261251078Speter mcr |= MCR_RTS; 261351078Speter if (com->gone) 261451078Speter return(0); 261572200Sbmilekic mtx_lock_spin(&sio_lock); 261651078Speter switch (how) { 261751078Speter case DMSET: 261851078Speter outb(com->modem_ctl_port, 261951078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 262051078Speter break; 262151078Speter case DMBIS: 262251078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 262351078Speter break; 262451078Speter case DMBIC: 262551078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 262651078Speter break; 262751078Speter } 262872200Sbmilekic mtx_unlock_spin(&sio_lock); 262951078Speter return (0); 263051078Speter} 263151078Speter 263251078Speterstatic void 263351078Spetersiosettimeout() 263451078Speter{ 263551078Speter struct com_s *com; 263651078Speter bool_t someopen; 263751078Speter int unit; 263851078Speter 263951078Speter /* 264051078Speter * Set our timeout period to 1 second if no polled devices are open. 264151078Speter * Otherwise set it to max(1/200, 1/hz). 264251078Speter * Enable timeouts iff some device is open. 264351078Speter */ 264451078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 264551078Speter sio_timeout = hz; 264651078Speter someopen = FALSE; 264753344Speter for (unit = 0; unit < sio_numunits; ++unit) { 264851078Speter com = com_addr(unit); 264951078Speter if (com != NULL && com->tp != NULL 265051078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 265151078Speter someopen = TRUE; 265251078Speter if (com->poll || com->poll_output) { 265351078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 265451078Speter break; 265551078Speter } 265651078Speter } 265751078Speter } 265851078Speter if (someopen) { 265951078Speter sio_timeouts_until_log = hz / sio_timeout; 266051078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 266151078Speter sio_timeout); 266251078Speter } else { 266351078Speter /* Flush error messages, if any. */ 266451078Speter sio_timeouts_until_log = 1; 266551078Speter comwakeup((void *)NULL); 266651078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 266751078Speter } 266851078Speter} 266951078Speter 267051078Speterstatic void 267151078Spetercomwakeup(chan) 267251078Speter void *chan; 267351078Speter{ 267451078Speter struct com_s *com; 267551078Speter int unit; 267651078Speter 267751078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 267851078Speter 267951078Speter /* 268051078Speter * Recover from lost output interrupts. 268151078Speter * Poll any lines that don't use interrupts. 268251078Speter */ 268353344Speter for (unit = 0; unit < sio_numunits; ++unit) { 268451078Speter com = com_addr(unit); 268551078Speter if (com != NULL && !com->gone 268651078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 268772200Sbmilekic mtx_lock_spin(&sio_lock); 268851078Speter siointr1(com); 268972200Sbmilekic mtx_unlock_spin(&sio_lock); 269051078Speter } 269151078Speter } 269251078Speter 269351078Speter /* 269451078Speter * Check for and log errors, but not too often. 269551078Speter */ 269651078Speter if (--sio_timeouts_until_log > 0) 269751078Speter return; 269851078Speter sio_timeouts_until_log = hz / sio_timeout; 269953344Speter for (unit = 0; unit < sio_numunits; ++unit) { 270051078Speter int errnum; 270151078Speter 270251078Speter com = com_addr(unit); 270351078Speter if (com == NULL) 270451078Speter continue; 270551078Speter if (com->gone) 270651078Speter continue; 270751078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 270851078Speter u_int delta; 270951078Speter u_long total; 271051078Speter 271172200Sbmilekic mtx_lock_spin(&sio_lock); 271251078Speter delta = com->delta_error_counts[errnum]; 271351078Speter com->delta_error_counts[errnum] = 0; 271472200Sbmilekic mtx_unlock_spin(&sio_lock); 271551078Speter if (delta == 0) 271651078Speter continue; 271751078Speter total = com->error_counts[errnum] += delta; 271851078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 271951078Speter unit, delta, error_desc[errnum], 272051078Speter delta == 1 ? "" : "s", total); 272151078Speter } 272251078Speter } 272351078Speter} 272451078Speter 272551078Speterstatic void 272651078Speterdisc_optim(tp, t, com) 272751078Speter struct tty *tp; 272851078Speter struct termios *t; 272951078Speter struct com_s *com; 273051078Speter{ 273151078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 273251078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 273351078Speter && (!(t->c_iflag & PARMRK) 273451078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 273551078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 273651078Speter && linesw[tp->t_line].l_rint == ttyinput) 273751078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 273851078Speter else 273951078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 274051078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 274151078Speter} 274251078Speter 274351078Speter/* 274451078Speter * Following are all routines needed for SIO to act as console 274551078Speter */ 274651078Speter#include <sys/cons.h> 274751078Speter 274851078Speterstruct siocnstate { 274951078Speter u_char dlbl; 275051078Speter u_char dlbh; 275151078Speter u_char ier; 275251078Speter u_char cfcr; 275351078Speter u_char mcr; 275451078Speter}; 275551078Speter 275666230Sjhb#ifndef __alpha__ 275792739Salfredstatic speed_t siocngetspeed(Port_t, u_long rclk); 275866230Sjhb#endif 275993010Sbdestatic void siocnclose(struct siocnstate *sp, Port_t iobase); 276093010Sbdestatic void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 276193010Sbdestatic void siocntxwait(Port_t iobase); 276251078Speter 276366230Sjhb#ifdef __alpha__ 276492739Salfredint siocnattach(int port, int speed); 276592739Salfredint siogdbattach(int port, int speed); 276692739Salfredint siogdbgetc(void); 276792739Salfredvoid siogdbputc(int c); 276866230Sjhb#else 276951078Speterstatic cn_probe_t siocnprobe; 277051078Speterstatic cn_init_t siocninit; 277185371Sjlemonstatic cn_term_t siocnterm; 277266230Sjhb#endif 277351078Speterstatic cn_checkc_t siocncheckc; 277451078Speterstatic cn_getc_t siocngetc; 277551078Speterstatic cn_putc_t siocnputc; 277651078Speter 277783832Sdfr#ifndef __alpha__ 277885371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 277955823Syokota siocnputc, NULL); 278051078Speter#endif 278151078Speter 278251078Speter/* To get the GDB related variables */ 278351078Speter#if DDB > 0 278451078Speter#include <ddb/ddb.h> 2785111194Sphkstatic struct consdev gdbconsdev; 2786111194Sphk 278751078Speter#endif 278851078Speter 278951078Speterstatic void 279051078Spetersiocntxwait(iobase) 279151078Speter Port_t iobase; 279251078Speter{ 279351078Speter int timo; 279451078Speter 279551078Speter /* 279651078Speter * Wait for any pending transmission to finish. Required to avoid 279751078Speter * the UART lockup bug when the speed is changed, and for normal 279851078Speter * transmits. 279951078Speter */ 280051078Speter timo = 100000; 280151078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 280251078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 280351078Speter ; 280451078Speter} 280551078Speter 280666230Sjhb#ifndef __alpha__ 280766230Sjhb 280851078Speter/* 280951078Speter * Read the serial port specified and try to figure out what speed 281051078Speter * it's currently running at. We're assuming the serial port has 281151078Speter * been initialized and is basicly idle. This routine is only intended 281251078Speter * to be run at system startup. 281351078Speter * 281451078Speter * If the value read from the serial port doesn't make sense, return 0. 281551078Speter */ 281651078Speter 281751078Speterstatic speed_t 281889986Sjhaysiocngetspeed(iobase, rclk) 281989986Sjhay Port_t iobase; 282089986Sjhay u_long rclk; 282151078Speter{ 282289986Sjhay u_int divisor; 282351078Speter u_char dlbh; 282451078Speter u_char dlbl; 282551078Speter u_char cfcr; 282651078Speter 282751078Speter cfcr = inb(iobase + com_cfcr); 282851078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 282951078Speter 283051078Speter dlbl = inb(iobase + com_dlbl); 283151078Speter dlbh = inb(iobase + com_dlbh); 283251078Speter 283351078Speter outb(iobase + com_cfcr, cfcr); 283451078Speter 283589986Sjhay divisor = dlbh << 8 | dlbl; 283651078Speter 283789986Sjhay /* XXX there should be more sanity checking. */ 283889986Sjhay if (divisor == 0) 283989986Sjhay return (CONSPEED); 284089986Sjhay return (rclk / (16UL * divisor)); 284151078Speter} 284251078Speter 284366230Sjhb#endif 284466230Sjhb 284551078Speterstatic void 284651078Spetersiocnopen(sp, iobase, speed) 284751078Speter struct siocnstate *sp; 284851078Speter Port_t iobase; 284951078Speter int speed; 285051078Speter{ 285189986Sjhay u_int divisor; 285251078Speter u_char dlbh; 285351078Speter u_char dlbl; 285451078Speter 285551078Speter /* 285651078Speter * Save all the device control registers except the fifo register 285751078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 285851078Speter * We can't save the fifo register since it is read-only. 285951078Speter */ 286051078Speter sp->ier = inb(iobase + com_ier); 286151078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 286251078Speter siocntxwait(iobase); 286351078Speter sp->cfcr = inb(iobase + com_cfcr); 286451078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 286551078Speter sp->dlbl = inb(iobase + com_dlbl); 286651078Speter sp->dlbh = inb(iobase + com_dlbh); 286751078Speter /* 286851078Speter * Only set the divisor registers if they would change, since on 286951078Speter * some 16550 incompatibles (Startech), setting them clears the 287051078Speter * data input register. This also reduces the effects of the 287151078Speter * UMC8669F bug. 287251078Speter */ 287389986Sjhay divisor = siodivisor(comdefaultrclk, speed); 287451078Speter dlbl = divisor & 0xFF; 287551078Speter if (sp->dlbl != dlbl) 287651078Speter outb(iobase + com_dlbl, dlbl); 287789986Sjhay dlbh = divisor >> 8; 287851078Speter if (sp->dlbh != dlbh) 287951078Speter outb(iobase + com_dlbh, dlbh); 288051078Speter outb(iobase + com_cfcr, CFCR_8BITS); 288151078Speter sp->mcr = inb(iobase + com_mcr); 288251078Speter /* 288351078Speter * We don't want interrupts, but must be careful not to "disable" 288451078Speter * them by clearing the MCR_IENABLE bit, since that might cause 288551078Speter * an interrupt by floating the IRQ line. 288651078Speter */ 288751078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 288851078Speter} 288951078Speter 289051078Speterstatic void 289151078Spetersiocnclose(sp, iobase) 289251078Speter struct siocnstate *sp; 289351078Speter Port_t iobase; 289451078Speter{ 289551078Speter /* 289651078Speter * Restore the device control registers. 289751078Speter */ 289851078Speter siocntxwait(iobase); 289951078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 290051078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 290151078Speter outb(iobase + com_dlbl, sp->dlbl); 290251078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 290351078Speter outb(iobase + com_dlbh, sp->dlbh); 290451078Speter outb(iobase + com_cfcr, sp->cfcr); 290551078Speter /* 290651078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 290751078Speter */ 290851078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 290951078Speter outb(iobase + com_ier, sp->ier); 291051078Speter} 291151078Speter 291266230Sjhb#ifndef __alpha__ 291366230Sjhb 291451078Speterstatic void 291551078Spetersiocnprobe(cp) 291651078Speter struct consdev *cp; 291751078Speter{ 291851078Speter speed_t boot_speed; 291951078Speter u_char cfcr; 292089986Sjhay u_int divisor; 292151078Speter int s, unit; 292251078Speter struct siocnstate sp; 292351078Speter 292451078Speter /* 292551078Speter * Find our first enabled console, if any. If it is a high-level 292651078Speter * console device, then initialize it and return successfully. 292751078Speter * If it is a low-level console device, then initialize it and 292851078Speter * return unsuccessfully. It must be initialized in both cases 292951078Speter * for early use by console drivers and debuggers. Initializing 293051078Speter * the hardware is not necessary in all cases, since the i/o 293151078Speter * routines initialize it on the fly, but it is necessary if 293251078Speter * input might arrive while the hardware is switched back to an 293351078Speter * uninitialized state. We can't handle multiple console devices 293451078Speter * yet because our low-level routines don't take a device arg. 293551078Speter * We trust the user to set the console flags properly so that we 293651078Speter * don't need to probe. 293751078Speter */ 293851078Speter cp->cn_pri = CN_DEAD; 293951078Speter 294051078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 294151078Speter int flags; 294251078Speter int disabled; 294351078Speter if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 294451078Speter if (disabled) 294551078Speter continue; 294651078Speter } 294751078Speter if (resource_int_value("sio", unit, "flags", &flags)) 294851078Speter continue; 294951078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 295051078Speter int port; 295151078Speter Port_t iobase; 295251078Speter 295351078Speter if (resource_int_value("sio", unit, "port", &port)) 295451078Speter continue; 295551078Speter iobase = port; 295651078Speter s = spltty(); 295751078Speter if (boothowto & RB_SERIAL) { 295889986Sjhay boot_speed = 295989986Sjhay siocngetspeed(iobase, comdefaultrclk); 296051078Speter if (boot_speed) 296151078Speter comdefaultrate = boot_speed; 296251078Speter } 296351078Speter 296451078Speter /* 296551078Speter * Initialize the divisor latch. We can't rely on 296651078Speter * siocnopen() to do this the first time, since it 296751078Speter * avoids writing to the latch if the latch appears 296851078Speter * to have the correct value. Also, if we didn't 296951078Speter * just read the speed from the hardware, then we 297051078Speter * need to set the speed in hardware so that 297151078Speter * switching it later is null. 297251078Speter */ 297351078Speter cfcr = inb(iobase + com_cfcr); 297451078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 297589986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 297689986Sjhay outb(iobase + com_dlbl, divisor & 0xff); 297789986Sjhay outb(iobase + com_dlbh, divisor >> 8); 297851078Speter outb(iobase + com_cfcr, cfcr); 297951078Speter 298051078Speter siocnopen(&sp, iobase, comdefaultrate); 298151078Speter 298251078Speter splx(s); 298351078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 298451078Speter cp->cn_dev = makedev(CDEV_MAJOR, unit); 298551078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 298651078Speter || boothowto & RB_SERIAL 298751078Speter ? CN_REMOTE : CN_NORMAL; 298851078Speter siocniobase = iobase; 298951078Speter siocnunit = unit; 299051078Speter } 299151078Speter if (COM_DEBUGGER(flags)) { 299251078Speter printf("sio%d: gdb debugging port\n", unit); 299351078Speter siogdbiobase = iobase; 299451078Speter siogdbunit = unit; 299551078Speter#if DDB > 0 2996111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, unit); 2997111194Sphk gdb_arg = &gdbconsdev; 299851078Speter gdb_getc = siocngetc; 299951078Speter gdb_putc = siocnputc; 300051078Speter#endif 300151078Speter } 300251078Speter } 300351078Speter } 300451078Speter#ifdef __i386__ 300551078Speter#if DDB > 0 300651078Speter /* 300751078Speter * XXX Ugly Compatability. 300851078Speter * If no gdb port has been specified, set it to be the console 300951078Speter * as some configuration files don't specify the gdb port. 301051078Speter */ 3011111017Sphk if (gdb_arg == NULL && (boothowto & RB_GDB)) { 301251078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 301351078Speter siocnunit); 301451078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 301551078Speter printf("configuration file (currently sio only).\n"); 301651078Speter siogdbiobase = siocniobase; 301751078Speter siogdbunit = siocnunit; 3018111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, siocnunit); 3019111194Sphk gdb_arg = &gdbconsdev; 302051078Speter gdb_getc = siocngetc; 302151078Speter gdb_putc = siocnputc; 302251078Speter } 302351078Speter#endif 302451078Speter#endif 302551078Speter} 302651078Speter 302766230Sjhbstatic void 302866230Sjhbsiocninit(cp) 302966230Sjhb struct consdev *cp; 303066230Sjhb{ 303166230Sjhb comconsole = DEV_TO_UNIT(cp->cn_dev); 303266230Sjhb} 303366230Sjhb 303485371Sjlemonstatic void 303585371Sjlemonsiocnterm(cp) 303685371Sjlemon struct consdev *cp; 303785371Sjlemon{ 303885371Sjlemon comconsole = -1; 303985371Sjlemon} 304085371Sjlemon 304166230Sjhb#endif 304266230Sjhb 304351078Speter#ifdef __alpha__ 304451078Speter 304555868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 304651078Speter 304751078Speterint 304851078Spetersiocnattach(port, speed) 304951078Speter int port; 305051078Speter int speed; 305151078Speter{ 305251078Speter int s; 305351078Speter u_char cfcr; 305489986Sjhay u_int divisor; 305551078Speter struct siocnstate sp; 305698691Sn_hibma int unit = 0; /* XXX random value! */ 305751078Speter 305851078Speter siocniobase = port; 305998691Sn_hibma siocnunit = unit; 306051078Speter comdefaultrate = speed; 306151078Speter sio_consdev.cn_pri = CN_NORMAL; 306298691Sn_hibma sio_consdev.cn_dev = makedev(CDEV_MAJOR, unit); 306351078Speter 306451078Speter s = spltty(); 306551078Speter 306651078Speter /* 306751078Speter * Initialize the divisor latch. We can't rely on 306851078Speter * siocnopen() to do this the first time, since it 306951078Speter * avoids writing to the latch if the latch appears 307051078Speter * to have the correct value. Also, if we didn't 307151078Speter * just read the speed from the hardware, then we 307251078Speter * need to set the speed in hardware so that 307351078Speter * switching it later is null. 307451078Speter */ 307551078Speter cfcr = inb(siocniobase + com_cfcr); 307651078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 307789986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 307889986Sjhay outb(siocniobase + com_dlbl, divisor & 0xff); 307989986Sjhay outb(siocniobase + com_dlbh, divisor >> 8); 308051078Speter outb(siocniobase + com_cfcr, cfcr); 308151078Speter 308251078Speter siocnopen(&sp, siocniobase, comdefaultrate); 308351078Speter splx(s); 308451078Speter 308585426Sjlemon cnadd(&sio_consdev); 308658885Simp return (0); 308751078Speter} 308851078Speter 308951078Speterint 309051078Spetersiogdbattach(port, speed) 309151078Speter int port; 309251078Speter int speed; 309351078Speter{ 309451078Speter int s; 309551078Speter u_char cfcr; 309689986Sjhay u_int divisor; 309751078Speter struct siocnstate sp; 309898691Sn_hibma int unit = 1; /* XXX random value! */ 309951078Speter 310051078Speter siogdbiobase = port; 310151078Speter gdbdefaultrate = speed; 310251078Speter 310365714Sjhb printf("sio%d: gdb debugging port\n", unit); 310465714Sjhb siogdbunit = unit; 310565714Sjhb#if DDB > 0 3106111194Sphk gdbconsdev.cn_dev = makedev(CDEV_MAJOR, unit); 3107111194Sphk gdb_arg = &gdbconsdev; 310865714Sjhb gdb_getc = siocngetc; 310965714Sjhb gdb_putc = siocnputc; 311065714Sjhb#endif 311165714Sjhb 311251078Speter s = spltty(); 311351078Speter 311451078Speter /* 311551078Speter * Initialize the divisor latch. We can't rely on 311651078Speter * siocnopen() to do this the first time, since it 311751078Speter * avoids writing to the latch if the latch appears 311851078Speter * to have the correct value. Also, if we didn't 311951078Speter * just read the speed from the hardware, then we 312051078Speter * need to set the speed in hardware so that 312151078Speter * switching it later is null. 312251078Speter */ 312351078Speter cfcr = inb(siogdbiobase + com_cfcr); 312451078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 312589986Sjhay divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 312689986Sjhay outb(siogdbiobase + com_dlbl, divisor & 0xff); 312789986Sjhay outb(siogdbiobase + com_dlbh, divisor >> 8); 312851078Speter outb(siogdbiobase + com_cfcr, cfcr); 312951078Speter 313051078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 313151078Speter splx(s); 313251078Speter 313358885Simp return (0); 313451078Speter} 313551078Speter 313651078Speter#endif 313751078Speter 313851078Speterstatic int 3139111194Sphksiocncheckc(struct consdev *cd) 314051078Speter{ 314151078Speter int c; 3142111194Sphk dev_t dev; 314351078Speter Port_t iobase; 314451078Speter int s; 314551078Speter struct siocnstate sp; 314698401Sn_hibma speed_t speed; 3147111194Sphk 3148111194Sphk dev = cd->cn_dev; 314998401Sn_hibma if (minor(dev) == siocnunit) { 315098401Sn_hibma iobase = siocniobase; 315198401Sn_hibma speed = comdefaultrate; 315298401Sn_hibma } else { 315351078Speter iobase = siogdbiobase; 315498401Sn_hibma speed = gdbdefaultrate; 315598401Sn_hibma } 315651078Speter s = spltty(); 315798401Sn_hibma siocnopen(&sp, iobase, speed); 315851078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 315951078Speter c = inb(iobase + com_data); 316051078Speter else 316151078Speter c = -1; 316251078Speter siocnclose(&sp, iobase); 316351078Speter splx(s); 316451078Speter return (c); 316551078Speter} 316651078Speter 316751078Speter 3168104094Sphkstatic int 3169111194Sphksiocngetc(struct consdev *cd) 317051078Speter{ 317151078Speter int c; 3172111194Sphk dev_t dev; 317351078Speter Port_t iobase; 317451078Speter int s; 317551078Speter struct siocnstate sp; 317698401Sn_hibma speed_t speed; 317751078Speter 3178111194Sphk dev = cd->cn_dev; 317998401Sn_hibma if (minor(dev) == siocnunit) { 318098401Sn_hibma iobase = siocniobase; 318198401Sn_hibma speed = comdefaultrate; 318298401Sn_hibma } else { 318351078Speter iobase = siogdbiobase; 318498401Sn_hibma speed = gdbdefaultrate; 318598401Sn_hibma } 318651078Speter s = spltty(); 318798401Sn_hibma siocnopen(&sp, iobase, speed); 318851078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 318951078Speter ; 319051078Speter c = inb(iobase + com_data); 319151078Speter siocnclose(&sp, iobase); 319251078Speter splx(s); 319351078Speter return (c); 319451078Speter} 319551078Speter 3196104094Sphkstatic void 3197111194Sphksiocnputc(struct consdev *cd, int c) 319851078Speter{ 319988582Sbde int need_unlock; 320051078Speter int s; 3201111194Sphk dev_t dev; 320251078Speter struct siocnstate sp; 320351078Speter Port_t iobase; 320498401Sn_hibma speed_t speed; 320551078Speter 3206111194Sphk dev = cd->cn_dev; 320798401Sn_hibma if (minor(dev) == siocnunit) { 320898401Sn_hibma iobase = siocniobase; 320998401Sn_hibma speed = comdefaultrate; 321098401Sn_hibma } else { 321151078Speter iobase = siogdbiobase; 321298401Sn_hibma speed = gdbdefaultrate; 321398401Sn_hibma } 321451078Speter s = spltty(); 321588582Sbde need_unlock = 0; 321688582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 321784029Sjlemon mtx_lock_spin(&sio_lock); 321888582Sbde need_unlock = 1; 321988582Sbde } 322098401Sn_hibma siocnopen(&sp, iobase, speed); 322151078Speter siocntxwait(iobase); 322251078Speter outb(iobase + com_data, c); 322351078Speter siocnclose(&sp, iobase); 322488582Sbde if (need_unlock) 322584029Sjlemon mtx_unlock_spin(&sio_lock); 322651078Speter splx(s); 322751078Speter} 322851078Speter 322951078Speter#ifdef __alpha__ 323051078Speterint 323151078Spetersiogdbgetc() 323251078Speter{ 323351078Speter int c; 323451078Speter Port_t iobase; 323598401Sn_hibma speed_t speed; 323651078Speter int s; 323751078Speter struct siocnstate sp; 323851078Speter 323998619Sn_hibma if (siogdbunit == siocnunit) { 324098401Sn_hibma iobase = siocniobase; 324198401Sn_hibma speed = comdefaultrate; 324298401Sn_hibma } else { 324398401Sn_hibma iobase = siogdbiobase; 324498401Sn_hibma speed = gdbdefaultrate; 324598401Sn_hibma } 324698401Sn_hibma 324751078Speter s = spltty(); 324898401Sn_hibma siocnopen(&sp, iobase, speed); 324951078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 325051078Speter ; 325151078Speter c = inb(iobase + com_data); 325251078Speter siocnclose(&sp, iobase); 325351078Speter splx(s); 325451078Speter return (c); 325551078Speter} 325651078Speter 325751078Spetervoid 325851078Spetersiogdbputc(c) 325951078Speter int c; 326051078Speter{ 326198401Sn_hibma Port_t iobase; 326298401Sn_hibma speed_t speed; 326351078Speter int s; 326451078Speter struct siocnstate sp; 326551078Speter 326698619Sn_hibma if (siogdbunit == siocnunit) { 326798401Sn_hibma iobase = siocniobase; 326898401Sn_hibma speed = comdefaultrate; 326998401Sn_hibma } else { 327098401Sn_hibma iobase = siogdbiobase; 327198401Sn_hibma speed = gdbdefaultrate; 327298401Sn_hibma } 327398401Sn_hibma 327451078Speter s = spltty(); 327598401Sn_hibma siocnopen(&sp, iobase, speed); 327651078Speter siocntxwait(siogdbiobase); 327751078Speter outb(siogdbiobase + com_data, c); 327851078Speter siocnclose(&sp, siogdbiobase); 327951078Speter splx(s); 328051078Speter} 328151078Speter#endif 3282