sio.c revision 104933
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * $FreeBSD: head/sys/dev/sio/sio.c 104933 2002-10-11 20:22:20Z imp $ 3451078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3551078Speter * from: i386/isa sio.c,v 1.234 3651078Speter */ 3751078Speter 3851078Speter#include "opt_comconsole.h" 3951078Speter#include "opt_compat.h" 4051078Speter#include "opt_ddb.h" 4151078Speter#include "opt_sio.h" 4251078Speter 4351078Speter/* 4451078Speter * Serial driver, based on 386BSD-0.1 com driver. 4551078Speter * Mostly rewritten to use pseudo-DMA. 4651078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4751078Speter * COM driver, based on HP dca driver. 4851078Speter * 4951078Speter * Changes for PC-Card integration: 5051078Speter * - Added PC-Card driver table and handlers 5151078Speter */ 5251078Speter#include <sys/param.h> 5376166Smarkm#include <sys/systm.h> 5465822Sjhb#include <sys/bus.h> 5551078Speter#include <sys/conf.h> 5651078Speter#include <sys/dkstat.h> 5751078Speter#include <sys/fcntl.h> 5851078Speter#include <sys/interrupt.h> 5951078Speter#include <sys/kernel.h> 6076166Smarkm#include <sys/lock.h> 6176166Smarkm#include <sys/malloc.h> 6276166Smarkm#include <sys/module.h> 6376166Smarkm#include <sys/mutex.h> 6476166Smarkm#include <sys/proc.h> 6576166Smarkm#include <sys/reboot.h> 6676166Smarkm#include <sys/sysctl.h> 6751078Speter#include <sys/syslog.h> 6876166Smarkm#include <sys/tty.h> 6960471Snyan#include <machine/bus_pio.h> 7051078Speter#include <machine/bus.h> 7151078Speter#include <sys/rman.h> 7251078Speter#include <sys/timepps.h> 7393466Sbde#include <sys/uio.h> 7451078Speter 7586909Simp#include <isa/isavar.h> 7686909Simp 7793126Smike#include <machine/limits.h> 7851078Speter#include <machine/resource.h> 7951078Speter 8085302Simp#include <dev/sio/sioreg.h> 8185365Simp#include <dev/sio/siovar.h> 8251078Speter 8351078Speter#ifdef COM_ESP 8477726Sjoerg#include <dev/ic/esp.h> 8551078Speter#endif 8677726Sjoerg#include <dev/ic/ns16550.h> 8751078Speter 8851078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 8951078Speter 9051078Speter#define CALLOUT_MASK 0x80 9151078Speter#define CONTROL_MASK 0x60 9251078Speter#define CONTROL_INIT_STATE 0x20 9351078Speter#define CONTROL_LOCK_STATE 0x40 9451078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 9593470Sbde#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 9693470Sbde | ((mynor) & 0x1f)) 9793470Sbde#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 9893470Sbde | ((unit) & 0x1f)) 9951078Speter 10051078Speter#ifdef COM_MULTIPORT 10151078Speter/* checks in flags for multiport and which is multiport "master chip" 10251078Speter * for a given card 10351078Speter */ 10451078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 10551078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 10651078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 107104067Sphk#else 108104067Sphk#define COM_ISMULTIPORT(flags) (0) 10951078Speter#endif /* COM_MULTIPORT */ 11051078Speter 11151078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 11251078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 11351078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 11451078Speter#define COM_DEBUGGER(flags) ((flags) & 0x80) 11551078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 11651078Speter#define COM_NOFIFO(flags) ((flags) & 0x02) 11751078Speter#define COM_ST16650A(flags) ((flags) & 0x20000) 11886909Simp#define COM_C_NOPROBE (0x40000) 11986909Simp#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 12051078Speter#define COM_C_IIR_TXRDYBUG (0x80000) 12151078Speter#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 122104067Sphk#define COM_NOSCR(flags) ((flags) & 0x100000) 12351078Speter#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 12451078Speter 12560471Snyan#define sio_getreg(com, off) \ 12660471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 12760471Snyan#define sio_setreg(com, off, value) \ 12860471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 12960471Snyan 13051078Speter/* 13151078Speter * com state bits. 13251078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 13351078Speter * than the other bits so that they can be tested as a group without masking 13451078Speter * off the low bits. 13551078Speter * 13651078Speter * The following com and tty flags correspond closely: 13751078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 13853344Speter * comstop()) 13951078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 14051078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14151078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14251078Speter * TS_FLUSH is not used. 14351078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 14451078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 14551078Speter */ 14651078Speter#define CS_BUSY 0x80 /* output in progress */ 14751078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 14851078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 14951078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 15051078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15151078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15251078Speter#define CS_ODONE 4 /* output completed */ 15351078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 15451078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 15551078Speter 15651078Speterstatic char const * const error_desc[] = { 15751078Speter#define CE_OVERRUN 0 15851078Speter "silo overflow", 15951078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 16051078Speter "interrupt-level buffer overflow", 16151078Speter#define CE_TTY_BUF_OVERFLOW 2 16251078Speter "tty-level buffer overflow", 16351078Speter}; 16451078Speter 16586909Simp#define CE_NTYPES 3 16651078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 16751078Speter 16886909Simp/* types. XXX - should be elsewhere */ 16986909Simptypedef u_int Port_t; /* hardware port */ 17086909Simptypedef u_char bool_t; /* boolean */ 17186909Simp 17286909Simp/* queue of linear buffers */ 17386909Simpstruct lbq { 17486909Simp u_char *l_head; /* next char to process */ 17586909Simp u_char *l_tail; /* one past the last char to process */ 17686909Simp struct lbq *l_next; /* next in queue */ 17786909Simp bool_t l_queued; /* nonzero if queued */ 17886909Simp}; 17986909Simp 18086909Simp/* com device structure */ 18186909Simpstruct com_s { 18286909Simp u_int flags; /* Copy isa device flags */ 18386909Simp u_char state; /* miscellaneous flag bits */ 18486909Simp bool_t active_out; /* nonzero if the callout device is open */ 18586909Simp u_char cfcr_image; /* copy of value written to CFCR */ 18651078Speter#ifdef COM_ESP 18786909Simp bool_t esp; /* is this unit a hayes esp board? */ 18886909Simp#endif 18986909Simp u_char extra_state; /* more flag bits, separate for order trick */ 19086909Simp u_char fifo_image; /* copy of value written to FIFO */ 19186909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 19286909Simp bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 19386909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 19486909Simp u_char mcr_image; /* copy of value written to MCR */ 19586909Simp#ifdef COM_MULTIPORT 19686909Simp bool_t multiport; /* is this unit part of a multiport device? */ 19786909Simp#endif /* COM_MULTIPORT */ 19886909Simp bool_t no_irq; /* nonzero if irq is not attached */ 19986909Simp bool_t gone; /* hardware disappeared */ 20086909Simp bool_t poll; /* nonzero if polling is required */ 20186909Simp bool_t poll_output; /* nonzero if polling for output is required */ 20286909Simp int unit; /* unit number */ 20386909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 20486909Simp u_int tx_fifo_size; 20586909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 20686909Simp 20786909Simp /* 20886909Simp * The high level of the driver never reads status registers directly 20986909Simp * because there would be too many side effects to handle conveniently. 21086909Simp * Instead, it reads copies of the registers stored here by the 21186909Simp * interrupt handler. 21286909Simp */ 21386909Simp u_char last_modem_status; /* last MSR read by intr handler */ 21486909Simp u_char prev_modem_status; /* last MSR handled by high level */ 21586909Simp 21686909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 21786909Simp u_char *ibuf; /* start of input buffer */ 21886909Simp u_char *ibufend; /* end of input buffer */ 21986909Simp u_char *ibufold; /* old input buffer, to be freed */ 22086909Simp u_char *ihighwater; /* threshold in input buffer */ 22186909Simp u_char *iptr; /* next free spot in input buffer */ 22286909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 22386909Simp int ierroff; /* offset of error bytes in ibuf */ 22486909Simp 22586909Simp struct lbq obufq; /* head of queue of output buffers */ 22686909Simp struct lbq obufs[2]; /* output buffers */ 22786909Simp 22886909Simp bus_space_tag_t bst; 22986909Simp bus_space_handle_t bsh; 23086909Simp 23186909Simp Port_t data_port; /* i/o ports */ 23286909Simp#ifdef COM_ESP 23386909Simp Port_t esp_port; 23486909Simp#endif 23586909Simp Port_t int_id_port; 23686909Simp Port_t modem_ctl_port; 23786909Simp Port_t line_status_port; 23886909Simp Port_t modem_status_port; 23986909Simp Port_t intr_ctl_port; /* Ports of IIR register */ 24086909Simp 24186909Simp struct tty *tp; /* cross reference */ 24286909Simp 24386909Simp /* Initial state. */ 24486909Simp struct termios it_in; /* should be in struct tty */ 24586909Simp struct termios it_out; 24686909Simp 24786909Simp /* Lock state. */ 24886909Simp struct termios lt_in; /* should be in struct tty */ 24986909Simp struct termios lt_out; 25086909Simp 25186909Simp bool_t do_timestamp; 25286909Simp bool_t do_dcd_timestamp; 25386909Simp struct timeval timestamp; 25486909Simp struct timeval dcd_timestamp; 25586909Simp struct pps_state pps; 25686909Simp 25786909Simp u_long bytes_in; /* statistics */ 25886909Simp u_long bytes_out; 25986909Simp u_int delta_error_counts[CE_NTYPES]; 26086909Simp u_long error_counts[CE_NTYPES]; 26186909Simp 26289986Sjhay u_long rclk; 26389986Sjhay 26486909Simp struct resource *irqres; 26586909Simp struct resource *ioportres; 26686909Simp void *cookie; 26786909Simp dev_t devs[6]; 26886909Simp 26986909Simp /* 27086909Simp * Data area for output buffers. Someday we should build the output 27186909Simp * buffer queue without copying data. 27286909Simp */ 27386909Simp u_char obuf1[256]; 27486909Simp u_char obuf2[256]; 27586909Simp}; 27686909Simp 27786909Simp#ifdef COM_ESP 27893010Sbdestatic int espattach(struct com_s *com, Port_t esp_port); 27951078Speter#endif 28051078Speter 28151078Speterstatic timeout_t siobusycheck; 28293010Sbdestatic u_int siodivisor(u_long rclk, speed_t speed); 28351078Speterstatic timeout_t siodtrwakeup; 28493010Sbdestatic void comhardclose(struct com_s *com); 28593010Sbdestatic void sioinput(struct com_s *com); 28693010Sbdestatic void siointr1(struct com_s *com); 28793010Sbdestatic void siointr(void *arg); 28893010Sbdestatic int commctl(struct com_s *com, int bits, int how); 28993010Sbdestatic int comparam(struct tty *tp, struct termios *t); 29093010Sbdestatic void siopoll(void *); 29193010Sbdestatic void siosettimeout(void); 29293010Sbdestatic int siosetwater(struct com_s *com, speed_t speed); 29393010Sbdestatic void comstart(struct tty *tp); 29493010Sbdestatic void comstop(struct tty *tp, int rw); 29551078Speterstatic timeout_t comwakeup; 29693010Sbdestatic void disc_optim(struct tty *tp, struct termios *t, 29793010Sbde struct com_s *com); 29851078Speter 29985365Simpchar sio_driver_name[] = "sio"; 30070174Sjhbstatic struct mtx sio_lock; 30170174Sjhbstatic int sio_inited; 30251078Speter 30351078Speter/* table and macro for fast conversion from a unit number to its com struct */ 30485365Simpdevclass_t sio_devclass; 30551078Speter#define com_addr(unit) ((struct com_s *) \ 30686909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 30751078Speter 30851078Speterstatic d_open_t sioopen; 30951078Speterstatic d_close_t sioclose; 31051078Speterstatic d_read_t sioread; 31151078Speterstatic d_write_t siowrite; 31251078Speterstatic d_ioctl_t sioioctl; 31351078Speter 31451078Speter#define CDEV_MAJOR 28 31551078Speterstatic struct cdevsw sio_cdevsw = { 31651078Speter /* open */ sioopen, 31751078Speter /* close */ sioclose, 31851078Speter /* read */ sioread, 31951078Speter /* write */ siowrite, 32051078Speter /* ioctl */ sioioctl, 32151654Sphk /* poll */ ttypoll, 32251078Speter /* mmap */ nommap, 32351078Speter /* strategy */ nostrategy, 32485365Simp /* name */ sio_driver_name, 32551078Speter /* maj */ CDEV_MAJOR, 32651078Speter /* dump */ nodump, 32751078Speter /* psize */ nopsize, 32872521Sjlemon /* flags */ D_TTY | D_KQFILTER, 32972521Sjlemon /* kqfilter */ ttykqfilter, 33051078Speter}; 33151078Speter 33251078Speterint comconsole = -1; 33351078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 33489986Sjhaystatic u_long comdefaultrclk = DEFAULT_RCLK; 33589986SjhaySYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 33698401Sn_hibmastatic speed_t gdbdefaultrate = GDBSPEED; 33798401Sn_hibmaSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 33898401Sn_hibma &gdbdefaultrate, GDBSPEED, ""); 33951078Speterstatic u_int com_events; /* input chars + weighted output completions */ 34051078Speterstatic Port_t siocniobase; 34198401Sn_hibmastatic int siocnunit = -1; 34251078Speterstatic Port_t siogdbiobase; 34351078Speterstatic int siogdbunit = -1; 34472238Sjhbstatic void *sio_slow_ih; 34572238Sjhbstatic void *sio_fast_ih; 34651078Speterstatic int sio_timeout; 34751078Speterstatic int sio_timeouts_until_log; 34851078Speterstatic struct callout_handle sio_timeout_handle 34951078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 35053344Speterstatic int sio_numunits; 35151078Speter 35251078Speter#ifdef COM_ESP 35351078Speter/* XXX configure this properly. */ 35486909Simp/* XXX quite broken for new-bus. */ 35551078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 35651078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 35751078Speter#endif 35851078Speter 35951078Speter/* 36051078Speter * handle sysctl read/write requests for console speed 36151078Speter * 36251078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 36351078Speter * also set the initial and lock values for the /dev/ttyXX device 36451078Speter * if there is one associated with the console. Finally, if the /dev/tty 36551078Speter * device has already been open, change the speed on the open running port 36651078Speter * itself. 36751078Speter */ 36851078Speter 36951078Speterstatic int 37062573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 37151078Speter{ 37251078Speter int error, s; 37351078Speter speed_t newspeed; 37451078Speter struct com_s *com; 37551078Speter struct tty *tp; 37651078Speter 37751078Speter newspeed = comdefaultrate; 37851078Speter 37951078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 38051078Speter if (error || !req->newptr) 38151078Speter return (error); 38251078Speter 38351078Speter comdefaultrate = newspeed; 38451078Speter 38551078Speter if (comconsole < 0) /* serial console not selected? */ 38651078Speter return (0); 38751078Speter 38851078Speter com = com_addr(comconsole); 38957915Simp if (com == NULL) 39051078Speter return (ENXIO); 39151078Speter 39251078Speter /* 39351078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 39451078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 39551078Speter * speed changes) 39651078Speter */ 39751078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 39851078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 39951078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 40051078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 40151078Speter 40251078Speter /* 40351078Speter * if we're open, change the running rate too 40451078Speter */ 40551078Speter tp = com->tp; 40651078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 40751078Speter tp->t_termios.c_ispeed = 40851078Speter tp->t_termios.c_ospeed = comdefaultrate; 40951078Speter s = spltty(); 41051078Speter error = comparam(tp, &tp->t_termios); 41151078Speter splx(s); 41251078Speter } 41351078Speter return error; 41451078Speter} 41551078Speter 41651078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 41751078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 41891280Simp/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 41951078Speter 42086909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 42186909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 42286909Simp 42386909Simp/* 42486909Simp * Unload the driver and clear the table. 42586909Simp * XXX this is mostly wrong. 42686909Simp * XXX TODO: 42786909Simp * This is usually called when the card is ejected, but 428104933Simp * can be caused by a kldunload of a controller driver. 42986909Simp * The idea is to reset the driver's view of the device 43086909Simp * and ensure that any driver entry points such as 43186909Simp * read and write do not hang. 43286909Simp */ 43385365Simpint 43485365Simpsiodetach(dev) 43552471Simp device_t dev; 43651078Speter{ 43751078Speter struct com_s *com; 43865131Sphk int i; 43951078Speter 44052471Simp com = (struct com_s *) device_get_softc(dev); 44157915Simp if (com == NULL) { 44252471Simp device_printf(dev, "NULL com in siounload\n"); 44354386Simp return (0); 44451078Speter } 44554386Simp com->gone = 1; 44665131Sphk for (i = 0 ; i < 6; i++) 44765131Sphk destroy_dev(com->devs[i]); 44854386Simp if (com->irqres) { 44954386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 45054386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 45154386Simp } 45254386Simp if (com->ioportres) 45354386Simp bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres); 45451078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 45557915Simp device_printf(dev, "still open, forcing close\n"); 45677750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 45751078Speter com->tp->t_gen++; 45851078Speter ttyclose(com->tp); 45951078Speter ttwakeup(com->tp); 46051078Speter ttwwakeup(com->tp); 46151078Speter } else { 46251078Speter if (com->ibuf != NULL) 46351078Speter free(com->ibuf, M_DEVBUF); 46486909Simp device_set_softc(dev, NULL); 46586909Simp free(com, M_DEVBUF); 46651078Speter } 46753978Simp return (0); 46851078Speter} 46951078Speter 47085365Simpint 47189986Sjhaysioprobe(dev, xrid, rclk, noprobe) 47258885Simp device_t dev; 47358885Simp int xrid; 47489986Sjhay u_long rclk; 47585365Simp int noprobe; 47651078Speter{ 47753344Speter#if 0 47851078Speter static bool_t already_init; 47953344Speter device_t xdev; 48053344Speter#endif 48160471Snyan struct com_s *com; 48289986Sjhay u_int divisor; 48351078Speter bool_t failures[10]; 48451078Speter int fn; 48551078Speter device_t idev; 48651078Speter Port_t iobase; 48751078Speter intrmask_t irqmap[4]; 48851078Speter intrmask_t irqs; 48951078Speter u_char mcr_image; 49051078Speter int result; 49154206Speter u_long xirq; 49251088Speter u_int flags = device_get_flags(dev); 49351078Speter int rid; 49451078Speter struct resource *port; 49551078Speter 49658885Simp rid = xrid; 49751078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 49851078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 49951078Speter if (!port) 50057915Simp return (ENXIO); 50151078Speter 50286909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 50386909Simp if (com == NULL) 50486909Simp return (ENOMEM); 50586909Simp device_set_softc(dev, com); 50660471Snyan com->bst = rman_get_bustag(port); 50760471Snyan com->bsh = rman_get_bushandle(port); 50889986Sjhay if (rclk == 0) 50989986Sjhay rclk = DEFAULT_RCLK; 51089986Sjhay com->rclk = rclk; 51160471Snyan 51285209Sjhb while (sio_inited != 2) 51385209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 51493818Sjhb mtx_init(&sio_lock, sio_driver_name, NULL, 51593818Sjhb (comconsole != -1) ? 51685209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 51785209Sjhb atomic_store_rel_int(&sio_inited, 2); 51885209Sjhb } 51970174Sjhb 52053344Speter#if 0 52153344Speter /* 52253344Speter * XXX this is broken - when we are first called, there are no 52353344Speter * previously configured IO ports. We could hard code 52453344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 52553344Speter * This code has been doing nothing since the conversion since 52653344Speter * "count" is zero the first time around. 52753344Speter */ 52851078Speter if (!already_init) { 52951078Speter /* 53051078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 53151078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 53251078Speter * from any used port that shares the interrupt vector. 53351078Speter * XXX the gate enable is elsewhere for some multiports. 53451078Speter */ 53551078Speter device_t *devs; 53653344Speter int count, i, xioport; 53751078Speter 53851078Speter devclass_get_devices(sio_devclass, &devs, &count); 53951078Speter for (i = 0; i < count; i++) { 54051078Speter xdev = devs[i]; 54154194Speter if (device_is_enabled(xdev) && 54254194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 54354194Speter NULL) == 0) 54453344Speter outb(xioport + com_mcr, 0); 54551078Speter } 54651078Speter free(devs, M_TEMP); 54751078Speter already_init = TRUE; 54851078Speter } 54953344Speter#endif 55051078Speter 55151078Speter if (COM_LLCONSOLE(flags)) { 55251078Speter printf("sio%d: reserved for low-level i/o\n", 55351078Speter device_get_unit(dev)); 55456788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 55586909Simp device_set_softc(dev, NULL); 55686909Simp free(com, M_DEVBUF); 55751078Speter return (ENXIO); 55851078Speter } 55951078Speter 56051078Speter /* 56151078Speter * If the device is on a multiport card and has an AST/4 56251078Speter * compatible interrupt control register, initialize this 56351078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 56451078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 56551078Speter * Point idev to the device struct giving the correct id_irq. 56651078Speter * This is the struct for the master device if there is one. 56751078Speter */ 56851078Speter idev = dev; 56951078Speter mcr_image = MCR_IENABLE; 57051078Speter#ifdef COM_MULTIPORT 57157234Sbde if (COM_ISMULTIPORT(flags)) { 57254206Speter Port_t xiobase; 57354206Speter u_long io; 57454206Speter 57551078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 57651078Speter if (idev == NULL) { 57751078Speter printf("sio%d: master device %d not configured\n", 57851078Speter device_get_unit(dev), COM_MPMASTER(flags)); 57951078Speter idev = dev; 58051078Speter } 58157234Sbde if (!COM_NOTAST4(flags)) { 58257234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 58357234Sbde NULL) == 0) { 58457234Sbde xiobase = io; 58557234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 58657234Sbde NULL, NULL) == 0) 58757234Sbde outb(xiobase + com_scr, 0x80); 58857234Sbde else 58957234Sbde outb(xiobase + com_scr, 0); 59057234Sbde } 59157234Sbde mcr_image = 0; 59251078Speter } 59351078Speter } 59451078Speter#endif /* COM_MULTIPORT */ 59554194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 59651078Speter mcr_image = 0; 59751078Speter 59851078Speter bzero(failures, sizeof failures); 59951078Speter iobase = rman_get_start(port); 60051078Speter 60151078Speter /* 60251078Speter * We don't want to get actual interrupts, just masked ones. 60351078Speter * Interrupts from this line should already be masked in the ICU, 60451078Speter * but mask them in the processor as well in case there are some 60551078Speter * (misconfigured) shared interrupts. 60651078Speter */ 60772200Sbmilekic mtx_lock_spin(&sio_lock); 60851078Speter/* EXTRA DELAY? */ 60951078Speter 61051078Speter /* 61151078Speter * Initialize the speed and the word size and wait long enough to 61251078Speter * drain the maximum of 16 bytes of junk in device output queues. 61351078Speter * The speed is undefined after a master reset and must be set 61451078Speter * before relying on anything related to output. There may be 61551078Speter * junk after a (very fast) soft reboot and (apparently) after 61651078Speter * master reset. 61751078Speter * XXX what about the UART bug avoided by waiting in comparam()? 61851078Speter * We don't want to to wait long enough to drain at 2 bps. 61951078Speter */ 62051078Speter if (iobase == siocniobase) 62151078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 62251078Speter else { 62360471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 62489986Sjhay divisor = siodivisor(rclk, SIO_TEST_SPEED); 62589986Sjhay sio_setreg(com, com_dlbl, divisor & 0xff); 62689986Sjhay sio_setreg(com, com_dlbh, divisor >> 8); 62760471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 62851078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 62951078Speter } 63051078Speter 63151078Speter /* 63251078Speter * Enable the interrupt gate and disable device interupts. This 63351078Speter * should leave the device driving the interrupt line low and 63451078Speter * guarantee an edge trigger if an interrupt can be generated. 63551078Speter */ 63651078Speter/* EXTRA DELAY? */ 63760471Snyan sio_setreg(com, com_mcr, mcr_image); 63860471Snyan sio_setreg(com, com_ier, 0); 63951078Speter DELAY(1000); /* XXX */ 64051078Speter irqmap[0] = isa_irq_pending(); 64151078Speter 64251078Speter /* 64351078Speter * Attempt to set loopback mode so that we can send a null byte 64451078Speter * without annoying any external device. 64551078Speter */ 64651078Speter/* EXTRA DELAY? */ 64760471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 64851078Speter 64951078Speter /* 65051078Speter * Attempt to generate an output interrupt. On 8250's, setting 65151078Speter * IER_ETXRDY generates an interrupt independent of the current 65251078Speter * setting and independent of whether the THR is empty. On 16450's, 65351078Speter * setting IER_ETXRDY generates an interrupt independent of the 65451078Speter * current setting. On 16550A's, setting IER_ETXRDY only 65551078Speter * generates an interrupt when IER_ETXRDY is not already set. 65651078Speter */ 65760471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 65851078Speter 65951078Speter /* 66051078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 66151078Speter * an interrupt. They'd better generate one for actually doing 66251078Speter * output. Loopback may be broken on the same incompatibles but 66351078Speter * it's unlikely to do more than allow the null byte out. 66451078Speter */ 66560471Snyan sio_setreg(com, com_data, 0); 66651078Speter DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 66751078Speter 66851078Speter /* 66951078Speter * Turn off loopback mode so that the interrupt gate works again 67051078Speter * (MCR_IENABLE was hidden). This should leave the device driving 67151078Speter * an interrupt line high. It doesn't matter if the interrupt 67251078Speter * line oscillates while we are not looking at it, since interrupts 67351078Speter * are disabled. 67451078Speter */ 67551078Speter/* EXTRA DELAY? */ 67660471Snyan sio_setreg(com, com_mcr, mcr_image); 67792401Simp 67892401Simp /* 67992401Simp * It seems my Xircom CBEM56G Cardbus modem wants to be reset 68092401Simp * to 8 bits *again*, or else probe test 0 will fail. 68192401Simp * gwk@sgi.com, 4/19/2001 68292401Simp */ 68392401Simp sio_setreg(com, com_cfcr, CFCR_8BITS); 68451078Speter 68551078Speter /* 68652471Simp * Some pcmcia cards have the "TXRDY bug", so we check everyone 68751078Speter * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 68851078Speter */ 68985365Simp if (noprobe) { 69053370Speter /* Reading IIR register twice */ 69153370Speter for (fn = 0; fn < 2; fn ++) { 69253370Speter DELAY(10000); 69360471Snyan failures[6] = sio_getreg(com, com_iir); 69453370Speter } 69553370Speter /* Check IIR_TXRDY clear ? */ 69653370Speter result = 0; 69753370Speter if (failures[6] & IIR_TXRDY) { 69892401Simp /* No, Double check with clearing IER */ 69960471Snyan sio_setreg(com, com_ier, 0); 70060471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 70192401Simp /* Ok. We discovered TXRDY bug! */ 70253370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 70353370Speter } else { 70453370Speter /* Unknown, Just omit this chip.. XXX */ 70553370Speter result = ENXIO; 70681793Simp sio_setreg(com, com_mcr, 0); 70753370Speter } 70851078Speter } else { 70953370Speter /* OK. this is well-known guys */ 71053370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 71151078Speter } 71281793Simp sio_setreg(com, com_ier, 0); 71360471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 71472200Sbmilekic mtx_unlock_spin(&sio_lock); 71553344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 71686909Simp if (iobase == siocniobase) 71786909Simp result = 0; 71886909Simp if (result != 0) { 71986909Simp device_set_softc(dev, NULL); 72086909Simp free(com, M_DEVBUF); 72186909Simp } 72286909Simp return (result); 72353344Speter } 72453344Speter 72551078Speter /* 72651078Speter * Check that 72751078Speter * o the CFCR, IER and MCR in UART hold the values written to them 72851078Speter * (the values happen to be all distinct - this is good for 72951078Speter * avoiding false positive tests from bus echoes). 73051078Speter * o an output interrupt is generated and its vector is correct. 73151078Speter * o the interrupt goes away when the IIR in the UART is read. 73251078Speter */ 73351078Speter/* EXTRA DELAY? */ 73460471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 73560471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 73660471Snyan failures[2] = sio_getreg(com, com_mcr) - mcr_image; 73751078Speter DELAY(10000); /* Some internal modems need this time */ 73851078Speter irqmap[1] = isa_irq_pending(); 73960471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 74051078Speter DELAY(1000); /* XXX */ 74151078Speter irqmap[2] = isa_irq_pending(); 74260471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 74351078Speter 74451078Speter /* 74551078Speter * Turn off all device interrupts and check that they go off properly. 74651078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 74751078Speter * the OUT2 output of the UART to 74851078Speter * the ICU input. Closing the gate would give a floating ICU input 74951078Speter * (unless there is another device driving it) and spurious interrupts. 75051078Speter * (On the system that this was first tested on, the input floats high 75151078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 75251078Speter */ 75360471Snyan sio_setreg(com, com_ier, 0); 75460471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 75560471Snyan failures[7] = sio_getreg(com, com_ier); 75651078Speter DELAY(1000); /* XXX */ 75751078Speter irqmap[3] = isa_irq_pending(); 75860471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 75951078Speter 76072200Sbmilekic mtx_unlock_spin(&sio_lock); 76151078Speter 76251078Speter irqs = irqmap[1] & ~irqmap[0]; 76354194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 76489463Simp ((1 << xirq) & irqs) == 0) { 76551078Speter printf( 76654206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 76753344Speter device_get_unit(dev), xirq, irqs); 76889447Sbmah printf( 76989470Sbmah "sio%d: port may not be enabled\n", 77089447Sbmah device_get_unit(dev)); 77189463Simp } 77251078Speter if (bootverbose) 77351078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 77451078Speter device_get_unit(dev), 77551078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 77651078Speter 77751078Speter result = 0; 77851078Speter for (fn = 0; fn < sizeof failures; ++fn) 77951078Speter if (failures[fn]) { 78060471Snyan sio_setreg(com, com_mcr, 0); 78151078Speter result = ENXIO; 78251078Speter if (bootverbose) { 78351078Speter printf("sio%d: probe failed test(s):", 78451078Speter device_get_unit(dev)); 78551078Speter for (fn = 0; fn < sizeof failures; ++fn) 78651078Speter if (failures[fn]) 78751078Speter printf(" %d", fn); 78851078Speter printf("\n"); 78951078Speter } 79051078Speter break; 79151078Speter } 79251078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 79386909Simp if (iobase == siocniobase) 79486909Simp result = 0; 79586909Simp if (result != 0) { 79686909Simp device_set_softc(dev, NULL); 79786909Simp free(com, M_DEVBUF); 79886909Simp } 79986909Simp return (result); 80051078Speter} 80151078Speter 80251078Speter#ifdef COM_ESP 80351078Speterstatic int 80451078Speterespattach(com, esp_port) 80551078Speter struct com_s *com; 80651078Speter Port_t esp_port; 80751078Speter{ 80851078Speter u_char dips; 80951078Speter u_char val; 81051078Speter 81151078Speter /* 81251078Speter * Check the ESP-specific I/O port to see if we're an ESP 81351078Speter * card. If not, return failure immediately. 81451078Speter */ 81551078Speter if ((inb(esp_port) & 0xf3) == 0) { 81651078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 81751078Speter return (0); 81851078Speter } 81951078Speter 82051078Speter /* 82151078Speter * We've got something that claims to be a Hayes ESP card. 82251078Speter * Let's hope so. 82351078Speter */ 82451078Speter 82551078Speter /* Get the dip-switch configuration */ 82651078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 82751078Speter dips = inb(esp_port + ESP_STATUS1); 82851078Speter 82951078Speter /* 83051078Speter * Bits 0,1 of dips say which COM port we are. 83151078Speter */ 83260471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 83351078Speter printf(" : ESP"); 83451078Speter else { 83551078Speter printf(" esp_port has com %d\n", dips & 0x03); 83651078Speter return (0); 83751078Speter } 83851078Speter 83951078Speter /* 84051078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 84151078Speter */ 84251078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 84351078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 84451078Speter val = inb(esp_port + ESP_STATUS2); 84551078Speter if ((val & 0x70) < 0x20) { 84651078Speter printf("-old (%o)", val & 0x70); 84751078Speter return (0); 84851078Speter } 84951078Speter 85051078Speter /* 85151078Speter * Check for ability to emulate 16550: bit 7 == 1 85251078Speter */ 85351078Speter if ((dips & 0x80) == 0) { 85451078Speter printf(" slave"); 85551078Speter return (0); 85651078Speter } 85751078Speter 85851078Speter /* 85951078Speter * Okay, we seem to be a Hayes ESP card. Whee. 86051078Speter */ 86151078Speter com->esp = TRUE; 86251078Speter com->esp_port = esp_port; 86351078Speter return (1); 86451078Speter} 86551078Speter#endif /* COM_ESP */ 86651078Speter 86785365Simpint 86889986Sjhaysioattach(dev, xrid, rclk) 86951078Speter device_t dev; 87058885Simp int xrid; 87189986Sjhay u_long rclk; 87251078Speter{ 87351078Speter struct com_s *com; 87451078Speter#ifdef COM_ESP 87551078Speter Port_t *espp; 87651078Speter#endif 87751078Speter Port_t iobase; 87893470Sbde int minorbase; 87951078Speter int unit; 88053344Speter u_int flags; 88151078Speter int rid; 88251078Speter struct resource *port; 88353344Speter int ret; 88451078Speter 88558885Simp rid = xrid; 88651078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 88751078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 88851078Speter if (!port) 88957915Simp return (ENXIO); 89051078Speter 89151078Speter iobase = rman_get_start(port); 89251078Speter unit = device_get_unit(dev); 89351078Speter com = device_get_softc(dev); 89453344Speter flags = device_get_flags(dev); 89551078Speter 89653344Speter if (unit >= sio_numunits) 89753344Speter sio_numunits = unit + 1; 89851078Speter /* 89951078Speter * sioprobe() has initialized the device registers as follows: 90051078Speter * o cfcr = CFCR_8BITS. 90151078Speter * It is most important that CFCR_DLAB is off, so that the 90251078Speter * data port is not hidden when we enable interrupts. 90351078Speter * o ier = 0. 90451078Speter * Interrupts are only enabled when the line is open. 90551078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 90651078Speter * interrupt control register or the config specifies no irq. 90751078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 90851078Speter * device from sending before we are ready. 90951078Speter */ 91051078Speter bzero(com, sizeof *com); 91151078Speter com->unit = unit; 91251078Speter com->ioportres = port; 91360471Snyan com->bst = rman_get_bustag(port); 91460471Snyan com->bsh = rman_get_bushandle(port); 91551078Speter com->cfcr_image = CFCR_8BITS; 91651078Speter com->dtr_wait = 3 * hz; 91751078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 91857234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 91951078Speter com->tx_fifo_size = 1; 92051078Speter com->obufs[0].l_head = com->obuf1; 92151078Speter com->obufs[1].l_head = com->obuf2; 92251078Speter 92351078Speter com->data_port = iobase + com_data; 92451078Speter com->int_id_port = iobase + com_iir; 92551078Speter com->modem_ctl_port = iobase + com_mcr; 92651078Speter com->mcr_image = inb(com->modem_ctl_port); 92751078Speter com->line_status_port = iobase + com_lsr; 92851078Speter com->modem_status_port = iobase + com_msr; 92951078Speter com->intr_ctl_port = iobase + com_ier; 93051078Speter 93189986Sjhay if (rclk == 0) 93289986Sjhay rclk = DEFAULT_RCLK; 93389986Sjhay com->rclk = rclk; 93489986Sjhay 93551078Speter /* 93651078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 93751078Speter * are only relevant for logins. It's important to have echo off 93851078Speter * initially so that the line doesn't start blathering before the 93951078Speter * echo flag can be turned off. 94051078Speter */ 94151078Speter com->it_in.c_iflag = 0; 94251078Speter com->it_in.c_oflag = 0; 94351078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 94451078Speter com->it_in.c_lflag = 0; 94551078Speter if (unit == comconsole) { 94651078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 94751078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 94851078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 94951078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 95051078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 95151078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 95251078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 95351078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 95451078Speter } else 95551078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 95665605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 95772200Sbmilekic mtx_unlock_spin(&sio_lock); 95856788Sbde /* 95956788Sbde * Leave i/o resources allocated if this is a `cn'-level 96056788Sbde * console, so that other devices can't snarf them. 96156788Sbde */ 96256788Sbde if (iobase != siocniobase) 96356788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 96456788Sbde return (ENOMEM); 96551078Speter } 96672200Sbmilekic mtx_unlock_spin(&sio_lock); 96751078Speter termioschars(&com->it_in); 96851078Speter com->it_out = com->it_in; 96951078Speter 97051078Speter /* attempt to determine UART type */ 97151078Speter printf("sio%d: type", unit); 97251078Speter 97351078Speter 974104067Sphk if (!COM_ISMULTIPORT(flags) && 975104067Sphk !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 97651078Speter u_char scr; 97751078Speter u_char scr1; 97851078Speter u_char scr2; 97951078Speter 98060471Snyan scr = sio_getreg(com, com_scr); 98160471Snyan sio_setreg(com, com_scr, 0xa5); 98260471Snyan scr1 = sio_getreg(com, com_scr); 98360471Snyan sio_setreg(com, com_scr, 0x5a); 98460471Snyan scr2 = sio_getreg(com, com_scr); 98560471Snyan sio_setreg(com, com_scr, scr); 98651078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 98789447Sbmah printf(" 8250 or not responding"); 98851078Speter goto determined_type; 98951078Speter } 99051078Speter } 99160471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 99251078Speter DELAY(100); 99351078Speter com->st16650a = 0; 99451078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 99551078Speter case FIFO_RX_LOW: 99651078Speter printf(" 16450"); 99751078Speter break; 99851078Speter case FIFO_RX_MEDL: 99951078Speter printf(" 16450?"); 100051078Speter break; 100151078Speter case FIFO_RX_MEDH: 100251078Speter printf(" 16550?"); 100351078Speter break; 100451078Speter case FIFO_RX_HIGH: 100551078Speter if (COM_NOFIFO(flags)) { 100651078Speter printf(" 16550A fifo disabled"); 100751078Speter } else { 100851078Speter com->hasfifo = TRUE; 100951078Speter if (COM_ST16650A(flags)) { 101051078Speter com->st16650a = 1; 101151078Speter com->tx_fifo_size = 32; 101251078Speter printf(" ST16650A"); 101351078Speter } else { 101451078Speter com->tx_fifo_size = COM_FIFOSIZE(flags); 101551078Speter printf(" 16550A"); 101651078Speter } 101751078Speter } 101851078Speter#ifdef COM_ESP 101951078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 102051078Speter if (espattach(com, *espp)) { 102151078Speter com->tx_fifo_size = 1024; 102251078Speter break; 102351078Speter } 102451078Speter#endif 102551078Speter if (!com->st16650a) { 102651078Speter if (!com->tx_fifo_size) 102751078Speter com->tx_fifo_size = 16; 102851078Speter else 102951078Speter printf(" lookalike with %d bytes FIFO", 103051078Speter com->tx_fifo_size); 103151078Speter } 103251078Speter 103351078Speter break; 103451078Speter } 103551078Speter 103651078Speter#ifdef COM_ESP 103751078Speter if (com->esp) { 103851078Speter /* 103951078Speter * Set 16550 compatibility mode. 104051078Speter * We don't use the ESP_MODE_SCALE bit to increase the 104151078Speter * fifo trigger levels because we can't handle large 104251078Speter * bursts of input. 104351078Speter * XXX flow control should be set in comparam(), not here. 104451078Speter */ 104551078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 104651078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 104751078Speter 104851078Speter /* Set RTS/CTS flow control. */ 104951078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 105051078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 105151078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 105251078Speter 105351078Speter /* Set flow-control levels. */ 105451078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 105551078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 105651078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 105751078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 105851078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 105951078Speter } 106051078Speter#endif /* COM_ESP */ 106160471Snyan sio_setreg(com, com_fifo, 0); 106251078Speterdetermined_type: ; 106351078Speter 106451078Speter#ifdef COM_MULTIPORT 106551078Speter if (COM_ISMULTIPORT(flags)) { 106653344Speter device_t masterdev; 106753344Speter 106851078Speter com->multiport = TRUE; 106951078Speter printf(" (multiport"); 107051078Speter if (unit == COM_MPMASTER(flags)) 107151078Speter printf(" master"); 107251078Speter printf(")"); 107353344Speter masterdev = devclass_get_device(sio_devclass, 107453344Speter COM_MPMASTER(flags)); 107557234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 107657234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 107751078Speter } 107851078Speter#endif /* COM_MULTIPORT */ 107951078Speter if (unit == comconsole) 108051078Speter printf(", console"); 108153344Speter if (COM_IIR_TXRDYBUG(flags)) 108251078Speter printf(" with a bogus IIR_TXRDY register"); 108351078Speter printf("\n"); 108451078Speter 108567551Sjhb if (sio_fast_ih == NULL) { 108672238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 108772238Sjhb &sio_fast_ih); 108872238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 108972238Sjhb &sio_slow_ih); 109051078Speter } 109193470Sbde minorbase = UNIT_TO_MINOR(unit); 109293470Sbde com->devs[0] = make_dev(&sio_cdevsw, minorbase, 109351078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 109493470Sbde com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 109551078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 109693470Sbde com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 109751078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 109893470Sbde com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 109951078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 110065131Sphk com->devs[4] = make_dev(&sio_cdevsw, 110193470Sbde minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 110251078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 110365131Sphk com->devs[5] = make_dev(&sio_cdevsw, 110493470Sbde minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 110551078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 110651078Speter com->flags = flags; 110751078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 110851078Speter pps_init(&com->pps); 110951078Speter 111051078Speter rid = 0; 111151078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 111253344Speter RF_ACTIVE); 111353344Speter if (com->irqres) { 111453344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 111565557Sjasone INTR_TYPE_TTY | INTR_FAST, 111654386Simp siointr, com, &com->cookie); 111754194Speter if (ret) { 111854194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 111954194Speter com->irqres, INTR_TYPE_TTY, 112054386Simp siointr, com, &com->cookie); 112154194Speter if (ret == 0) 112283246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 112354194Speter } 112453344Speter if (ret) 112553344Speter device_printf(dev, "could not activate interrupt\n"); 112678504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 112778504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 112878504Siedowse /* 112978504Siedowse * Enable interrupts for early break-to-debugger support 113078504Siedowse * on the console. 113178504Siedowse */ 113278504Siedowse if (ret == 0 && unit == comconsole) 113378504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 113478504Siedowse IER_EMSC); 113578504Siedowse#endif 113653344Speter } 113751078Speter 113851078Speter return (0); 113951078Speter} 114051078Speter 114151078Speterstatic int 114283366Sjuliansioopen(dev, flag, mode, td) 114351078Speter dev_t dev; 114451078Speter int flag; 114551078Speter int mode; 114683366Sjulian struct thread *td; 114751078Speter{ 114851078Speter struct com_s *com; 114951078Speter int error; 115051078Speter int mynor; 115151078Speter int s; 115251078Speter struct tty *tp; 115351078Speter int unit; 115451078Speter 115551078Speter mynor = minor(dev); 115651078Speter unit = MINOR_TO_UNIT(mynor); 115753344Speter com = com_addr(unit); 115853344Speter if (com == NULL) 115951078Speter return (ENXIO); 116051078Speter if (com->gone) 116151078Speter return (ENXIO); 116251078Speter if (mynor & CONTROL_MASK) 116351078Speter return (0); 116451078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 116551078Speter s = spltty(); 116651078Speter /* 116751078Speter * We jump to this label after all non-interrupted sleeps to pick 116851078Speter * up any changes of the device state. 116951078Speter */ 117051078Speteropen_top: 117151078Speter while (com->state & CS_DTR_OFF) { 117251078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 117351078Speter if (com_addr(unit) == NULL) 117451078Speter return (ENXIO); 117551078Speter if (error != 0 || com->gone) 117651078Speter goto out; 117751078Speter } 117851078Speter if (tp->t_state & TS_ISOPEN) { 117951078Speter /* 118051078Speter * The device is open, so everything has been initialized. 118151078Speter * Handle conflicts. 118251078Speter */ 118351078Speter if (mynor & CALLOUT_MASK) { 118451078Speter if (!com->active_out) { 118551078Speter error = EBUSY; 118651078Speter goto out; 118751078Speter } 118851078Speter } else { 118951078Speter if (com->active_out) { 119051078Speter if (flag & O_NONBLOCK) { 119151078Speter error = EBUSY; 119251078Speter goto out; 119351078Speter } 119451078Speter error = tsleep(&com->active_out, 119551078Speter TTIPRI | PCATCH, "siobi", 0); 119651078Speter if (com_addr(unit) == NULL) 119751078Speter return (ENXIO); 119851078Speter if (error != 0 || com->gone) 119951078Speter goto out; 120051078Speter goto open_top; 120151078Speter } 120251078Speter } 120351078Speter if (tp->t_state & TS_XCLUDE && 120493593Sjhb suser(td)) { 120551078Speter error = EBUSY; 120651078Speter goto out; 120751078Speter } 120851078Speter } else { 120951078Speter /* 121051078Speter * The device isn't open, so there are no conflicts. 121151078Speter * Initialize it. Initialization is done twice in many 121251078Speter * cases: to preempt sleeping callin opens if we are 121351078Speter * callout, and to complete a callin open after DCD rises. 121451078Speter */ 121551078Speter tp->t_oproc = comstart; 121651078Speter tp->t_param = comparam; 121751654Sphk tp->t_stop = comstop; 121851078Speter tp->t_dev = dev; 121951078Speter tp->t_termios = mynor & CALLOUT_MASK 122051078Speter ? com->it_out : com->it_in; 122151078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 122251078Speter com->poll = com->no_irq; 122351078Speter com->poll_output = com->loses_outints; 122451078Speter ++com->wopeners; 122551078Speter error = comparam(tp, &tp->t_termios); 122651078Speter --com->wopeners; 122751078Speter if (error != 0) 122851078Speter goto out; 122951078Speter /* 123051078Speter * XXX we should goto open_top if comparam() slept. 123151078Speter */ 123251078Speter if (com->hasfifo) { 1233102542Sphk int i; 123451078Speter /* 123551078Speter * (Re)enable and drain fifos. 123651078Speter * 123751078Speter * Certain SMC chips cause problems if the fifos 123851078Speter * are enabled while input is ready. Turn off the 123951078Speter * fifo if necessary to clear the input. We test 124051078Speter * the input ready bit after enabling the fifos 124151078Speter * since we've already enabled them in comparam() 124251078Speter * and to handle races between enabling and fresh 124351078Speter * input. 124451078Speter */ 1245102542Sphk for (i = 0; i < 500; i++) { 124660471Snyan sio_setreg(com, com_fifo, 124760471Snyan FIFO_RCV_RST | FIFO_XMT_RST 124860471Snyan | com->fifo_image); 124951078Speter /* 125051078Speter * XXX the delays are for superstitious 125151078Speter * historical reasons. It must be less than 125251078Speter * the character time at the maximum 125351078Speter * supported speed (87 usec at 115200 bps 125451078Speter * 8N1). Otherwise we might loop endlessly 125551078Speter * if data is streaming in. We used to use 125651078Speter * delays of 100. That usually worked 125751078Speter * because DELAY(100) used to usually delay 125851078Speter * for about 85 usec instead of 100. 125951078Speter */ 126051078Speter DELAY(50); 126151078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 126251078Speter break; 126360471Snyan sio_setreg(com, com_fifo, 0); 126451078Speter DELAY(50); 126551078Speter (void) inb(com->data_port); 126651078Speter } 1267102542Sphk if (i == 500) { 1268102542Sphk error = EIO; 1269102542Sphk goto out; 1270102542Sphk } 127151078Speter } 127251078Speter 127372200Sbmilekic mtx_lock_spin(&sio_lock); 127451078Speter (void) inb(com->line_status_port); 127551078Speter (void) inb(com->data_port); 127651078Speter com->prev_modem_status = com->last_modem_status 127751078Speter = inb(com->modem_status_port); 127851078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 127951078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 128051078Speter | IER_EMSC); 128151078Speter } else { 128251078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 128351078Speter | IER_ERLS | IER_EMSC); 128451078Speter } 128572200Sbmilekic mtx_unlock_spin(&sio_lock); 128651078Speter /* 128751078Speter * Handle initial DCD. Callout devices get a fake initial 128851078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 128951078Speter * callin opens get woken up and resume sleeping on "siobi" 129051078Speter * instead of "siodcd". 129151078Speter */ 129251078Speter /* 129351078Speter * XXX `mynor & CALLOUT_MASK' should be 129451078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 129551078Speter * TRAPDOOR_CARRIER is the default initial state for callout 129651078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 129751078Speter * the true carrier. 129851078Speter */ 129951078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 130051078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 130151078Speter } 130251078Speter /* 130351078Speter * Wait for DCD if necessary. 130451078Speter */ 130551078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 130651078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 130751078Speter ++com->wopeners; 130851078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 130951078Speter if (com_addr(unit) == NULL) 131051078Speter return (ENXIO); 131151078Speter --com->wopeners; 131251078Speter if (error != 0 || com->gone) 131351078Speter goto out; 131451078Speter goto open_top; 131551078Speter } 131651078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 131751078Speter disc_optim(tp, &tp->t_termios, com); 131851078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 131951078Speter com->active_out = TRUE; 132051078Speter siosettimeout(); 132151078Speterout: 132251078Speter splx(s); 132351078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 132451078Speter comhardclose(com); 132551078Speter return (error); 132651078Speter} 132751078Speter 132851078Speterstatic int 132983366Sjuliansioclose(dev, flag, mode, td) 133051078Speter dev_t dev; 133151078Speter int flag; 133251078Speter int mode; 133383366Sjulian struct thread *td; 133451078Speter{ 133551078Speter struct com_s *com; 133651078Speter int mynor; 133751078Speter int s; 133851078Speter struct tty *tp; 133951078Speter 134051078Speter mynor = minor(dev); 134151078Speter if (mynor & CONTROL_MASK) 134251078Speter return (0); 134351078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 134457915Simp if (com == NULL) 134557915Simp return (ENODEV); 134651078Speter tp = com->tp; 134751078Speter s = spltty(); 134851078Speter (*linesw[tp->t_line].l_close)(tp, flag); 134951078Speter disc_optim(tp, &tp->t_termios, com); 135051654Sphk comstop(tp, FREAD | FWRITE); 135151078Speter comhardclose(com); 135251078Speter ttyclose(tp); 135351078Speter siosettimeout(); 135451078Speter splx(s); 135551078Speter if (com->gone) { 135651078Speter printf("sio%d: gone\n", com->unit); 135751078Speter s = spltty(); 135851078Speter if (com->ibuf != NULL) 135951078Speter free(com->ibuf, M_DEVBUF); 136051078Speter bzero(tp, sizeof *tp); 136151078Speter splx(s); 136251078Speter } 136351078Speter return (0); 136451078Speter} 136551078Speter 136651078Speterstatic void 136751078Spetercomhardclose(com) 136851078Speter struct com_s *com; 136951078Speter{ 137051078Speter int s; 137151078Speter struct tty *tp; 137251078Speter int unit; 137351078Speter 137451078Speter unit = com->unit; 137551078Speter s = spltty(); 137651078Speter com->poll = FALSE; 137751078Speter com->poll_output = FALSE; 137851078Speter com->do_timestamp = FALSE; 137951078Speter com->do_dcd_timestamp = FALSE; 138051078Speter com->pps.ppsparam.mode = 0; 138160471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 138278504Siedowse tp = com->tp; 138378504Siedowse 138478504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 138578504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 138678504Siedowse /* 138778504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 138878504Siedowse * console. This allows us to detect break-to-debugger events 138978504Siedowse * while the console device is closed. 139078504Siedowse */ 139178504Siedowse if (com->unit != comconsole) 139278504Siedowse#endif 139351078Speter { 139460471Snyan sio_setreg(com, com_ier, 0); 139551078Speter if (tp->t_cflag & HUPCL 139651078Speter /* 139751078Speter * XXX we will miss any carrier drop between here and the 139851078Speter * next open. Perhaps we should watch DCD even when the 139951078Speter * port is closed; it is not sufficient to check it at 140051078Speter * the next open because it might go up and down while 140151078Speter * we're not watching. 140251078Speter */ 140351078Speter || (!com->active_out 140451078Speter && !(com->prev_modem_status & MSR_DCD) 140551078Speter && !(com->it_in.c_cflag & CLOCAL)) 140651078Speter || !(tp->t_state & TS_ISOPEN)) { 140751078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 140851078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 140951078Speter timeout(siodtrwakeup, com, com->dtr_wait); 141051078Speter com->state |= CS_DTR_OFF; 141151078Speter } 141251078Speter } 141351078Speter } 141451078Speter if (com->hasfifo) { 141551078Speter /* 141651078Speter * Disable fifos so that they are off after controlled 141751078Speter * reboots. Some BIOSes fail to detect 16550s when the 141851078Speter * fifos are enabled. 141951078Speter */ 142060471Snyan sio_setreg(com, com_fifo, 0); 142151078Speter } 142251078Speter com->active_out = FALSE; 142351078Speter wakeup(&com->active_out); 142451078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 142551078Speter splx(s); 142651078Speter} 142751078Speter 142851078Speterstatic int 142951078Spetersioread(dev, uio, flag) 143051078Speter dev_t dev; 143151078Speter struct uio *uio; 143251078Speter int flag; 143351078Speter{ 143451078Speter int mynor; 143551078Speter struct com_s *com; 143651078Speter 143751078Speter mynor = minor(dev); 143851078Speter if (mynor & CONTROL_MASK) 143951078Speter return (ENODEV); 144051078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 144157915Simp if (com == NULL || com->gone) 144251078Speter return (ENODEV); 144351078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 144451078Speter} 144551078Speter 144651078Speterstatic int 144751078Spetersiowrite(dev, uio, flag) 144851078Speter dev_t dev; 144951078Speter struct uio *uio; 145051078Speter int flag; 145151078Speter{ 145251078Speter int mynor; 145351078Speter struct com_s *com; 145451078Speter int unit; 145551078Speter 145651078Speter mynor = minor(dev); 145751078Speter if (mynor & CONTROL_MASK) 145851078Speter return (ENODEV); 145951078Speter 146051078Speter unit = MINOR_TO_UNIT(mynor); 146151078Speter com = com_addr(unit); 146257915Simp if (com == NULL || com->gone) 146351078Speter return (ENODEV); 146451078Speter /* 146551078Speter * (XXX) We disallow virtual consoles if the physical console is 146651078Speter * a serial port. This is in case there is a display attached that 146751078Speter * is not the console. In that situation we don't need/want the X 146851078Speter * server taking over the console. 146951078Speter */ 147051078Speter if (constty != NULL && unit == comconsole) 147151078Speter constty = NULL; 147251078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 147351078Speter} 147451078Speter 147551078Speterstatic void 147651078Spetersiobusycheck(chan) 147751078Speter void *chan; 147851078Speter{ 147951078Speter struct com_s *com; 148051078Speter int s; 148151078Speter 148251078Speter com = (struct com_s *)chan; 148351078Speter 148451078Speter /* 148551078Speter * Clear TS_BUSY if low-level output is complete. 148651078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 148751078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 148851078Speter * called again. Reading the line status port outside of siointr1() 148951078Speter * is safe because CS_BUSY is clear so there are no output interrupts 149051078Speter * to lose. 149151078Speter */ 149251078Speter s = spltty(); 149351078Speter if (com->state & CS_BUSY) 149451078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 149551078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 149651078Speter == (LSR_TSRE | LSR_TXRDY)) { 149751078Speter com->tp->t_state &= ~TS_BUSY; 149851078Speter ttwwakeup(com->tp); 149951078Speter com->extra_state &= ~CSE_BUSYCHECK; 150051078Speter } else 150151078Speter timeout(siobusycheck, com, hz / 100); 150251078Speter splx(s); 150351078Speter} 150451078Speter 150589986Sjhaystatic u_int 150689986Sjhaysiodivisor(rclk, speed) 150789986Sjhay u_long rclk; 150889986Sjhay speed_t speed; 150989986Sjhay{ 151089986Sjhay long actual_speed; 151189986Sjhay u_int divisor; 151289986Sjhay int error; 151389986Sjhay 151489986Sjhay if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 151589986Sjhay return (0); 151689986Sjhay divisor = (rclk / (8UL * speed) + 1) / 2; 151789986Sjhay if (divisor == 0 || divisor >= 65536) 151889986Sjhay return (0); 151989986Sjhay actual_speed = rclk / (16UL * divisor); 152089986Sjhay 152189986Sjhay /* 10 times error in percent: */ 152289986Sjhay error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 152389986Sjhay 152489986Sjhay /* 3.0% maximum error tolerance: */ 152589986Sjhay if (error < -30 || error > 30) 152689986Sjhay return (0); 152789986Sjhay 152889986Sjhay return (divisor); 152989986Sjhay} 153089986Sjhay 153151078Speterstatic void 153251078Spetersiodtrwakeup(chan) 153351078Speter void *chan; 153451078Speter{ 153551078Speter struct com_s *com; 153651078Speter 153751078Speter com = (struct com_s *)chan; 153851078Speter com->state &= ~CS_DTR_OFF; 153951078Speter wakeup(&com->dtr_wait); 154051078Speter} 154151078Speter 154265557Sjasone/* 154370174Sjhb * Call this function with the sio_lock mutex held. It will return with the 154470174Sjhb * lock still held. 154565557Sjasone */ 154651078Speterstatic void 154751078Spetersioinput(com) 154851078Speter struct com_s *com; 154951078Speter{ 155051078Speter u_char *buf; 155151078Speter int incc; 155251078Speter u_char line_status; 155351078Speter int recv_data; 155451078Speter struct tty *tp; 155551078Speter 155651078Speter buf = com->ibuf; 155751078Speter tp = com->tp; 155851078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 155951078Speter com_events -= (com->iptr - com->ibuf); 156051078Speter com->iptr = com->ibuf; 156151078Speter return; 156251078Speter } 156351078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 156451078Speter /* 156551078Speter * Avoid the grotesquely inefficient lineswitch routine 156651078Speter * (ttyinput) in "raw" mode. It usually takes about 450 156751078Speter * instructions (that's without canonical processing or echo!). 156851078Speter * slinput is reasonably fast (usually 40 instructions plus 156951078Speter * call overhead). 157051078Speter */ 157151078Speter do { 157265557Sjasone /* 157365557Sjasone * This may look odd, but it is using save-and-enable 157465557Sjasone * semantics instead of the save-and-disable semantics 157565557Sjasone * that are used everywhere else. 157665557Sjasone */ 157772200Sbmilekic mtx_unlock_spin(&sio_lock); 157851078Speter incc = com->iptr - buf; 157951078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 158051078Speter && (com->state & CS_RTS_IFLOW 158151078Speter || tp->t_iflag & IXOFF) 158251078Speter && !(tp->t_state & TS_TBLOCK)) 158351078Speter ttyblock(tp); 158451078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 158551078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 158651078Speter buf += incc; 158751078Speter tk_nin += incc; 158851078Speter tk_rawcc += incc; 158951078Speter tp->t_rawcc += incc; 159051078Speter ttwakeup(tp); 159151078Speter if (tp->t_state & TS_TTSTOP 159251078Speter && (tp->t_iflag & IXANY 159351078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 159451078Speter tp->t_state &= ~TS_TTSTOP; 159551078Speter tp->t_lflag &= ~FLUSHO; 159651078Speter comstart(tp); 159751078Speter } 159872200Sbmilekic mtx_lock_spin(&sio_lock); 159951078Speter } while (buf < com->iptr); 160051078Speter } else { 160151078Speter do { 160265557Sjasone /* 160365557Sjasone * This may look odd, but it is using save-and-enable 160465557Sjasone * semantics instead of the save-and-disable semantics 160565557Sjasone * that are used everywhere else. 160665557Sjasone */ 160772200Sbmilekic mtx_unlock_spin(&sio_lock); 160851078Speter line_status = buf[com->ierroff]; 160951078Speter recv_data = *buf++; 161051078Speter if (line_status 161151078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 161251078Speter if (line_status & LSR_BI) 161351078Speter recv_data |= TTY_BI; 161451078Speter if (line_status & LSR_FE) 161551078Speter recv_data |= TTY_FE; 161651078Speter if (line_status & LSR_OE) 161751078Speter recv_data |= TTY_OE; 161851078Speter if (line_status & LSR_PE) 161951078Speter recv_data |= TTY_PE; 162051078Speter } 162151078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 162272200Sbmilekic mtx_lock_spin(&sio_lock); 162351078Speter } while (buf < com->iptr); 162451078Speter } 162551078Speter com_events -= (com->iptr - com->ibuf); 162651078Speter com->iptr = com->ibuf; 162751078Speter 162851078Speter /* 162951078Speter * There is now room for another low-level buffer full of input, 163051078Speter * so enable RTS if it is now disabled and there is room in the 163151078Speter * high-level buffer. 163251078Speter */ 163351078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 163451078Speter !(tp->t_state & TS_TBLOCK)) 163551078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 163651078Speter} 163751078Speter 1638104094Sphkstatic void 163951078Spetersiointr(arg) 164051078Speter void *arg; 164151078Speter{ 164270174Sjhb struct com_s *com; 164370174Sjhb 164451078Speter#ifndef COM_MULTIPORT 164570174Sjhb com = (struct com_s *)arg; 164670174Sjhb 164772200Sbmilekic mtx_lock_spin(&sio_lock); 164870174Sjhb siointr1(com); 164972200Sbmilekic mtx_unlock_spin(&sio_lock); 165051078Speter#else /* COM_MULTIPORT */ 165151078Speter bool_t possibly_more_intrs; 165251078Speter int unit; 165351078Speter 165451078Speter /* 165551078Speter * Loop until there is no activity on any port. This is necessary 165651078Speter * to get an interrupt edge more than to avoid another interrupt. 165751078Speter * If the IRQ signal is just an OR of the IRQ signals from several 165851078Speter * devices, then the edge from one may be lost because another is 165951078Speter * on. 166051078Speter */ 166172200Sbmilekic mtx_lock_spin(&sio_lock); 166251078Speter do { 166351078Speter possibly_more_intrs = FALSE; 166453344Speter for (unit = 0; unit < sio_numunits; ++unit) { 166551078Speter com = com_addr(unit); 166651078Speter /* 166751078Speter * XXX COM_LOCK(); 166851078Speter * would it work here, or be counter-productive? 166951078Speter */ 167051078Speter if (com != NULL 167151078Speter && !com->gone 167251078Speter && (inb(com->int_id_port) & IIR_IMASK) 167351078Speter != IIR_NOPEND) { 167451078Speter siointr1(com); 167551078Speter possibly_more_intrs = TRUE; 167651078Speter } 167751078Speter /* XXX COM_UNLOCK(); */ 167851078Speter } 167951078Speter } while (possibly_more_intrs); 168072200Sbmilekic mtx_unlock_spin(&sio_lock); 168151078Speter#endif /* COM_MULTIPORT */ 168251078Speter} 168351078Speter 168493466Sbdestatic struct timespec siots[8192]; 168593466Sbdestatic int siotso; 168693466Sbdestatic int volatile siotsunit = -1; 168793466Sbde 168893466Sbdestatic int 168993466Sbdesysctl_siots(SYSCTL_HANDLER_ARGS) 169093466Sbde{ 169193466Sbde char buf[128]; 169293466Sbde long long delta; 169393466Sbde size_t len; 169493466Sbde int error, i; 169593466Sbde 169693466Sbde for (i = 1; i < siotso; i++) { 169793466Sbde delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 169893466Sbde 1000000000 + 169993466Sbde (siots[i].tv_nsec - siots[i - 1].tv_nsec); 170093466Sbde len = sprintf(buf, "%lld\n", delta); 170193466Sbde if (delta >= 110000) 170293466Sbde len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 170393466Sbde (long)siots[i].tv_sec, siots[i].tv_nsec); 170493466Sbde if (i == siotso - 1) 170593466Sbde buf[len - 1] = '\0'; 170693466Sbde error = SYSCTL_OUT(req, buf, len); 170793466Sbde if (error != 0) 170893466Sbde return (error); 170993466Sbde uio_yield(); 171093466Sbde } 171193466Sbde return (0); 171293466Sbde} 171393466Sbde 171493466SbdeSYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 171593466Sbde 0, 0, sysctl_siots, "A", "sio timestamps"); 171693466Sbde 171751078Speterstatic void 171851078Spetersiointr1(com) 171951078Speter struct com_s *com; 172051078Speter{ 172151078Speter u_char line_status; 172251078Speter u_char modem_status; 172351078Speter u_char *ioptr; 172451078Speter u_char recv_data; 172551078Speter u_char int_ctl; 172651078Speter u_char int_ctl_new; 172751078Speter 172851078Speter int_ctl = inb(com->intr_ctl_port); 172951078Speter int_ctl_new = int_ctl; 173051078Speter 173151078Speter while (!com->gone) { 173251078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 173351078Speter modem_status = inb(com->modem_status_port); 173451078Speter if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 173595523Sphk pps_capture(&com->pps); 173695523Sphk pps_event(&com->pps, (modem_status & MSR_DCD) ? 173751078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 173851078Speter } 173951078Speter } 174051078Speter line_status = inb(com->line_status_port); 174151078Speter 174251078Speter /* input event? (check first to help avoid overruns) */ 174351078Speter while (line_status & LSR_RCV_MASK) { 174451078Speter /* break/unnattached error bits or real input? */ 174551078Speter if (!(line_status & LSR_RXRDY)) 174651078Speter recv_data = 0; 174751078Speter else 174851078Speter recv_data = inb(com->data_port); 174961649Sps#if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 175061649Sps /* 175161649Sps * Solaris implements a new BREAK which is initiated 175261649Sps * by a character sequence CR ~ ^b which is similar 175361649Sps * to a familiar pattern used on Sun servers by the 175461649Sps * Remote Console. 175561649Sps */ 175661649Sps#define KEY_CRTLB 2 /* ^B */ 175761649Sps#define KEY_CR 13 /* CR '\r' */ 175861649Sps#define KEY_TILDE 126 /* ~ */ 175961649Sps 176061649Sps if (com->unit == comconsole) { 176161649Sps static int brk_state1 = 0, brk_state2 = 0; 176261649Sps if (recv_data == KEY_CR) { 176361649Sps brk_state1 = recv_data; 176461649Sps brk_state2 = 0; 176565557Sjasone } else if (brk_state1 == KEY_CR 176665557Sjasone && (recv_data == KEY_TILDE 176765557Sjasone || recv_data == KEY_CRTLB)) { 176861649Sps if (recv_data == KEY_TILDE) 176961649Sps brk_state2 = recv_data; 177065557Sjasone else if (brk_state2 == KEY_TILDE 177165557Sjasone && recv_data == KEY_CRTLB) { 177261649Sps breakpoint(); 177365557Sjasone brk_state1 = 0; 177465557Sjasone brk_state2 = 0; 177561649Sps goto cont; 177661649Sps } else 177761649Sps brk_state2 = 0; 177861649Sps } else 177961649Sps brk_state1 = 0; 178061649Sps } 178161649Sps#endif 178251078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 178351078Speter /* 178451078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 178551078Speter * Otherwise, push the work to a higher level 178651078Speter * (to handle PARMRK) if we're bypassing. 178751078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 178851078Speter * 178951078Speter * This makes bypassing work right in the 179051078Speter * usual "raw" case (IGNBRK set, and IGNPAR 179151078Speter * and INPCK clear). 179251078Speter * 179351078Speter * Note: BI together with FE/PE means just BI. 179451078Speter */ 179551078Speter if (line_status & LSR_BI) { 179651078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 179751078Speter if (com->unit == comconsole) { 179851078Speter breakpoint(); 179951078Speter goto cont; 180051078Speter } 180151078Speter#endif 180251078Speter if (com->tp == NULL 180351078Speter || com->tp->t_iflag & IGNBRK) 180451078Speter goto cont; 180551078Speter } else { 180651078Speter if (com->tp == NULL 180751078Speter || com->tp->t_iflag & IGNPAR) 180851078Speter goto cont; 180951078Speter } 181051078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 181151078Speter && (line_status & (LSR_BI | LSR_FE) 181251078Speter || com->tp->t_iflag & INPCK)) 181351078Speter recv_data = 0; 181451078Speter } 181551078Speter ++com->bytes_in; 181651078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 181788900Sjhb swi_sched(sio_fast_ih, 0); 181851078Speter ioptr = com->iptr; 181951078Speter if (ioptr >= com->ibufend) 182051078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 182151078Speter else { 182251078Speter if (com->do_timestamp) 182351078Speter microtime(&com->timestamp); 182451078Speter ++com_events; 182572238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 182651078Speter#if 0 /* for testing input latency vs efficiency */ 182751078Speterif (com->iptr - com->ibuf == 8) 182888900Sjhb swi_sched(sio_fast_ih, 0); 182951078Speter#endif 183051078Speter ioptr[0] = recv_data; 183151078Speter ioptr[com->ierroff] = line_status; 183251078Speter com->iptr = ++ioptr; 183351078Speter if (ioptr == com->ihighwater 183451078Speter && com->state & CS_RTS_IFLOW) 183551078Speter outb(com->modem_ctl_port, 183651078Speter com->mcr_image &= ~MCR_RTS); 183751078Speter if (line_status & LSR_OE) 183851078Speter CE_RECORD(com, CE_OVERRUN); 183951078Speter } 184051078Spetercont: 184151078Speter /* 184251078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 184351078Speter * jump from the top of the loop to here 184451078Speter */ 184551078Speter line_status = inb(com->line_status_port) & 0x7F; 184651078Speter } 184751078Speter 184851078Speter /* modem status change? (always check before doing output) */ 184951078Speter modem_status = inb(com->modem_status_port); 185051078Speter if (modem_status != com->last_modem_status) { 185151078Speter if (com->do_dcd_timestamp 185251078Speter && !(com->last_modem_status & MSR_DCD) 185351078Speter && modem_status & MSR_DCD) 185451078Speter microtime(&com->dcd_timestamp); 185551078Speter 185651078Speter /* 185751078Speter * Schedule high level to handle DCD changes. Note 185851078Speter * that we don't use the delta bits anywhere. Some 185951078Speter * UARTs mess them up, and it's easy to remember the 186051078Speter * previous bits and calculate the delta. 186151078Speter */ 186251078Speter com->last_modem_status = modem_status; 186351078Speter if (!(com->state & CS_CHECKMSR)) { 186451078Speter com_events += LOTS_OF_EVENTS; 186551078Speter com->state |= CS_CHECKMSR; 186688900Sjhb swi_sched(sio_fast_ih, 0); 186751078Speter } 186851078Speter 186951078Speter /* handle CTS change immediately for crisp flow ctl */ 187051078Speter if (com->state & CS_CTS_OFLOW) { 187151078Speter if (modem_status & MSR_CTS) 187251078Speter com->state |= CS_ODEVREADY; 187351078Speter else 187451078Speter com->state &= ~CS_ODEVREADY; 187551078Speter } 187651078Speter } 187751078Speter 187851078Speter /* output queued and everything ready? */ 187951078Speter if (line_status & LSR_TXRDY 188051078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 188151078Speter ioptr = com->obufq.l_head; 188293466Sbde if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 188351078Speter u_int ocount; 188451078Speter 188551078Speter ocount = com->obufq.l_tail - ioptr; 188651078Speter if (ocount > com->tx_fifo_size) 188751078Speter ocount = com->tx_fifo_size; 188851078Speter com->bytes_out += ocount; 188951078Speter do 189051078Speter outb(com->data_port, *ioptr++); 189151078Speter while (--ocount != 0); 189251078Speter } else { 189351078Speter outb(com->data_port, *ioptr++); 189451078Speter ++com->bytes_out; 189593466Sbde if (com->unit == siotsunit) { 189693466Sbde nanouptime(&siots[siotso]); 189793466Sbde siotso = (siotso + 1) % 189893466Sbde (sizeof siots / sizeof siots[0]); 189993466Sbde } 190051078Speter } 190151078Speter com->obufq.l_head = ioptr; 190251078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 190351078Speter int_ctl_new = int_ctl | IER_ETXRDY; 190451078Speter } 190551078Speter if (ioptr >= com->obufq.l_tail) { 190651078Speter struct lbq *qp; 190751078Speter 190851078Speter qp = com->obufq.l_next; 190951078Speter qp->l_queued = FALSE; 191051078Speter qp = qp->l_next; 191151078Speter if (qp != NULL) { 191251078Speter com->obufq.l_head = qp->l_head; 191351078Speter com->obufq.l_tail = qp->l_tail; 191451078Speter com->obufq.l_next = qp; 191551078Speter } else { 191651078Speter /* output just completed */ 191753344Speter if (COM_IIR_TXRDYBUG(com->flags)) { 191851078Speter int_ctl_new = int_ctl & ~IER_ETXRDY; 191951078Speter } 192051078Speter com->state &= ~CS_BUSY; 192151078Speter } 192251078Speter if (!(com->state & CS_ODONE)) { 192351078Speter com_events += LOTS_OF_EVENTS; 192451078Speter com->state |= CS_ODONE; 192567551Sjhb /* handle at high level ASAP */ 192688900Sjhb swi_sched(sio_fast_ih, 0); 192751078Speter } 192851078Speter } 192953344Speter if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 193051078Speter outb(com->intr_ctl_port, int_ctl_new); 193151078Speter } 193251078Speter } 193351078Speter 193451078Speter /* finished? */ 193551078Speter#ifndef COM_MULTIPORT 193651078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 193751078Speter#endif /* COM_MULTIPORT */ 193851078Speter return; 193951078Speter } 194051078Speter} 194151078Speter 194251078Speterstatic int 194383366Sjuliansioioctl(dev, cmd, data, flag, td) 194451078Speter dev_t dev; 194551078Speter u_long cmd; 194651078Speter caddr_t data; 194751078Speter int flag; 194883366Sjulian struct thread *td; 194951078Speter{ 195051078Speter struct com_s *com; 195151078Speter int error; 195251078Speter int mynor; 195351078Speter int s; 195451078Speter struct tty *tp; 195551078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 195651078Speter u_long oldcmd; 195751078Speter struct termios term; 195851078Speter#endif 195951078Speter 196051078Speter mynor = minor(dev); 196151078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 196257915Simp if (com == NULL || com->gone) 196351078Speter return (ENODEV); 196451078Speter if (mynor & CONTROL_MASK) { 196551078Speter struct termios *ct; 196651078Speter 196751078Speter switch (mynor & CONTROL_MASK) { 196851078Speter case CONTROL_INIT_STATE: 196951078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 197051078Speter break; 197151078Speter case CONTROL_LOCK_STATE: 197251078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 197351078Speter break; 197451078Speter default: 197551078Speter return (ENODEV); /* /dev/nodev */ 197651078Speter } 197751078Speter switch (cmd) { 197851078Speter case TIOCSETA: 197993593Sjhb error = suser(td); 198051078Speter if (error != 0) 198151078Speter return (error); 198251078Speter *ct = *(struct termios *)data; 198351078Speter return (0); 198451078Speter case TIOCGETA: 198551078Speter *(struct termios *)data = *ct; 198651078Speter return (0); 198751078Speter case TIOCGETD: 198851078Speter *(int *)data = TTYDISC; 198951078Speter return (0); 199051078Speter case TIOCGWINSZ: 199151078Speter bzero(data, sizeof(struct winsize)); 199251078Speter return (0); 199351078Speter default: 199451078Speter return (ENOTTY); 199551078Speter } 199651078Speter } 199751078Speter tp = com->tp; 199851078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 199951078Speter term = tp->t_termios; 200051078Speter oldcmd = cmd; 200151078Speter error = ttsetcompat(tp, &cmd, data, &term); 200251078Speter if (error != 0) 200351078Speter return (error); 200451078Speter if (cmd != oldcmd) 200551078Speter data = (caddr_t)&term; 200651078Speter#endif 200751078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 200851078Speter int cc; 200951078Speter struct termios *dt = (struct termios *)data; 201051078Speter struct termios *lt = mynor & CALLOUT_MASK 201151078Speter ? &com->lt_out : &com->lt_in; 201251078Speter 201351078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 201451078Speter | (dt->c_iflag & ~lt->c_iflag); 201551078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 201651078Speter | (dt->c_oflag & ~lt->c_oflag); 201751078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 201851078Speter | (dt->c_cflag & ~lt->c_cflag); 201951078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 202051078Speter | (dt->c_lflag & ~lt->c_lflag); 202151078Speter for (cc = 0; cc < NCCS; ++cc) 202251078Speter if (lt->c_cc[cc] != 0) 202351078Speter dt->c_cc[cc] = tp->t_cc[cc]; 202451078Speter if (lt->c_ispeed != 0) 202551078Speter dt->c_ispeed = tp->t_ispeed; 202651078Speter if (lt->c_ospeed != 0) 202751078Speter dt->c_ospeed = tp->t_ospeed; 202851078Speter } 202983366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 203051078Speter if (error != ENOIOCTL) 203151078Speter return (error); 203251078Speter s = spltty(); 203351078Speter error = ttioctl(tp, cmd, data, flag); 203451078Speter disc_optim(tp, &tp->t_termios, com); 203551078Speter if (error != ENOIOCTL) { 203651078Speter splx(s); 203751078Speter return (error); 203851078Speter } 203951078Speter switch (cmd) { 204051078Speter case TIOCSBRK: 204160471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 204251078Speter break; 204351078Speter case TIOCCBRK: 204460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 204551078Speter break; 204651078Speter case TIOCSDTR: 204751078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 204851078Speter break; 204951078Speter case TIOCCDTR: 205051078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 205151078Speter break; 205251078Speter /* 205351078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 205451078Speter * changes get undone on the next call to comparam(). 205551078Speter */ 205651078Speter case TIOCMSET: 205751078Speter (void)commctl(com, *(int *)data, DMSET); 205851078Speter break; 205951078Speter case TIOCMBIS: 206051078Speter (void)commctl(com, *(int *)data, DMBIS); 206151078Speter break; 206251078Speter case TIOCMBIC: 206351078Speter (void)commctl(com, *(int *)data, DMBIC); 206451078Speter break; 206551078Speter case TIOCMGET: 206651078Speter *(int *)data = commctl(com, 0, DMGET); 206751078Speter break; 206851078Speter case TIOCMSDTRWAIT: 206951078Speter /* must be root since the wait applies to following logins */ 207093593Sjhb error = suser(td); 207151078Speter if (error != 0) { 207251078Speter splx(s); 207351078Speter return (error); 207451078Speter } 207551078Speter com->dtr_wait = *(int *)data * hz / 100; 207651078Speter break; 207751078Speter case TIOCMGDTRWAIT: 207851078Speter *(int *)data = com->dtr_wait * 100 / hz; 207951078Speter break; 208051078Speter case TIOCTIMESTAMP: 208151078Speter com->do_timestamp = TRUE; 208251078Speter *(struct timeval *)data = com->timestamp; 208351078Speter break; 208451078Speter case TIOCDCDTIMESTAMP: 208551078Speter com->do_dcd_timestamp = TRUE; 208651078Speter *(struct timeval *)data = com->dcd_timestamp; 208751078Speter break; 208851078Speter default: 208951078Speter splx(s); 209051078Speter error = pps_ioctl(cmd, data, &com->pps); 209151078Speter if (error == ENODEV) 209251078Speter error = ENOTTY; 209351078Speter return (error); 209451078Speter } 209551078Speter splx(s); 209651078Speter return (0); 209751078Speter} 209851078Speter 209965557Sjasone/* software interrupt handler for SWI_TTY */ 210051078Speterstatic void 210167551Sjhbsiopoll(void *dummy) 210251078Speter{ 210351078Speter int unit; 210451078Speter 210551078Speter if (com_events == 0) 210651078Speter return; 210751078Speterrepeat: 210853344Speter for (unit = 0; unit < sio_numunits; ++unit) { 210951078Speter struct com_s *com; 211051078Speter int incc; 211151078Speter struct tty *tp; 211251078Speter 211351078Speter com = com_addr(unit); 211451078Speter if (com == NULL) 211551078Speter continue; 211651078Speter tp = com->tp; 211751078Speter if (tp == NULL || com->gone) { 211851078Speter /* 211951078Speter * Discard any events related to never-opened or 212051078Speter * going-away devices. 212151078Speter */ 212272200Sbmilekic mtx_lock_spin(&sio_lock); 212351078Speter incc = com->iptr - com->ibuf; 212451078Speter com->iptr = com->ibuf; 212551078Speter if (com->state & CS_CHECKMSR) { 212651078Speter incc += LOTS_OF_EVENTS; 212751078Speter com->state &= ~CS_CHECKMSR; 212851078Speter } 212951078Speter com_events -= incc; 213072200Sbmilekic mtx_unlock_spin(&sio_lock); 213151078Speter continue; 213251078Speter } 213351078Speter if (com->iptr != com->ibuf) { 213472200Sbmilekic mtx_lock_spin(&sio_lock); 213551078Speter sioinput(com); 213672200Sbmilekic mtx_unlock_spin(&sio_lock); 213751078Speter } 213851078Speter if (com->state & CS_CHECKMSR) { 213951078Speter u_char delta_modem_status; 214051078Speter 214172200Sbmilekic mtx_lock_spin(&sio_lock); 214251078Speter delta_modem_status = com->last_modem_status 214351078Speter ^ com->prev_modem_status; 214451078Speter com->prev_modem_status = com->last_modem_status; 214551078Speter com_events -= LOTS_OF_EVENTS; 214651078Speter com->state &= ~CS_CHECKMSR; 214772200Sbmilekic mtx_unlock_spin(&sio_lock); 214851078Speter if (delta_modem_status & MSR_DCD) 214951078Speter (*linesw[tp->t_line].l_modem) 215051078Speter (tp, com->prev_modem_status & MSR_DCD); 215151078Speter } 215251078Speter if (com->state & CS_ODONE) { 215372200Sbmilekic mtx_lock_spin(&sio_lock); 215451078Speter com_events -= LOTS_OF_EVENTS; 215551078Speter com->state &= ~CS_ODONE; 215672200Sbmilekic mtx_unlock_spin(&sio_lock); 215751078Speter if (!(com->state & CS_BUSY) 215851078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 215951078Speter timeout(siobusycheck, com, hz / 100); 216051078Speter com->extra_state |= CSE_BUSYCHECK; 216151078Speter } 216251078Speter (*linesw[tp->t_line].l_start)(tp); 216351078Speter } 216451078Speter if (com_events == 0) 216551078Speter break; 216651078Speter } 216751078Speter if (com_events >= LOTS_OF_EVENTS) 216851078Speter goto repeat; 216951078Speter} 217051078Speter 217151078Speterstatic int 217251078Spetercomparam(tp, t) 217351078Speter struct tty *tp; 217451078Speter struct termios *t; 217551078Speter{ 217651078Speter u_int cfcr; 217751078Speter int cflag; 217851078Speter struct com_s *com; 217989986Sjhay u_int divisor; 218051078Speter u_char dlbh; 218151078Speter u_char dlbl; 218251078Speter int s; 218351078Speter int unit; 218451078Speter 218589986Sjhay unit = DEV_TO_UNIT(tp->t_dev); 218689986Sjhay com = com_addr(unit); 218789986Sjhay if (com == NULL) 218889986Sjhay return (ENODEV); 218989986Sjhay 219051078Speter /* do historical conversions */ 219151078Speter if (t->c_ispeed == 0) 219251078Speter t->c_ispeed = t->c_ospeed; 219351078Speter 219451078Speter /* check requested parameters */ 219589986Sjhay if (t->c_ospeed == 0) 219689986Sjhay divisor = 0; 219789986Sjhay else { 219889986Sjhay if (t->c_ispeed != t->c_ospeed) 219989986Sjhay return (EINVAL); 220089986Sjhay divisor = siodivisor(com->rclk, t->c_ispeed); 220189986Sjhay if (divisor == 0) 220289986Sjhay return (EINVAL); 220389986Sjhay } 220451078Speter 220551078Speter /* parameters are OK, convert them to the com struct and the device */ 220651078Speter s = spltty(); 220751078Speter if (divisor == 0) 220851078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 220951078Speter else 221051078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 221151078Speter cflag = t->c_cflag; 221251078Speter switch (cflag & CSIZE) { 221351078Speter case CS5: 221451078Speter cfcr = CFCR_5BITS; 221551078Speter break; 221651078Speter case CS6: 221751078Speter cfcr = CFCR_6BITS; 221851078Speter break; 221951078Speter case CS7: 222051078Speter cfcr = CFCR_7BITS; 222151078Speter break; 222251078Speter default: 222351078Speter cfcr = CFCR_8BITS; 222451078Speter break; 222551078Speter } 222651078Speter if (cflag & PARENB) { 222751078Speter cfcr |= CFCR_PENAB; 222851078Speter if (!(cflag & PARODD)) 222951078Speter cfcr |= CFCR_PEVEN; 223051078Speter } 223151078Speter if (cflag & CSTOPB) 223251078Speter cfcr |= CFCR_STOPB; 223351078Speter 223451078Speter if (com->hasfifo && divisor != 0) { 223551078Speter /* 223651078Speter * Use a fifo trigger level low enough so that the input 223751078Speter * latency from the fifo is less than about 16 msec and 223851078Speter * the total latency is less than about 30 msec. These 223951078Speter * latencies are reasonable for humans. Serial comms 224051078Speter * protocols shouldn't expect anything better since modem 224151078Speter * latencies are larger. 224288433Sdillon * 224388433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 224488433Sdillon * speed connections without further work on reducing 224588433Sdillon * interrupt disablement times in other parts of the system, 224688433Sdillon * without producing silo overflow errors. 224751078Speter */ 224893466Sbde com->fifo_image = com->unit == siotsunit ? 0 224993466Sbde : t->c_ospeed <= 4800 225088451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 225151078Speter#ifdef COM_ESP 225251078Speter /* 225351078Speter * The Hayes ESP card needs the fifo DMA mode bit set 225451078Speter * in compatibility mode. If not, it will interrupt 225551078Speter * for each character received. 225651078Speter */ 225751078Speter if (com->esp) 225851078Speter com->fifo_image |= FIFO_DMA_MODE; 225951078Speter#endif 226060471Snyan sio_setreg(com, com_fifo, com->fifo_image); 226151078Speter } 226251078Speter 226365605Sjhb /* 226465605Sjhb * This returns with interrupts disabled so that we can complete 226565605Sjhb * the speed change atomically. Keeping interrupts disabled is 226665605Sjhb * especially important while com_data is hidden. 226765605Sjhb */ 226865605Sjhb (void) siosetwater(com, t->c_ispeed); 226965557Sjasone 227051078Speter if (divisor != 0) { 227160471Snyan sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 227251078Speter /* 227351078Speter * Only set the divisor registers if they would change, 227451078Speter * since on some 16550 incompatibles (UMC8669F), setting 227551078Speter * them while input is arriving them loses sync until 227651078Speter * data stops arriving. 227751078Speter */ 227851078Speter dlbl = divisor & 0xFF; 227960471Snyan if (sio_getreg(com, com_dlbl) != dlbl) 228060471Snyan sio_setreg(com, com_dlbl, dlbl); 228189986Sjhay dlbh = divisor >> 8; 228260471Snyan if (sio_getreg(com, com_dlbh) != dlbh) 228360471Snyan sio_setreg(com, com_dlbh, dlbh); 228451078Speter } 228551078Speter 228660471Snyan sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 228751078Speter 228851078Speter if (!(tp->t_state & TS_TTSTOP)) 228951078Speter com->state |= CS_TTGO; 229051078Speter 229151078Speter if (cflag & CRTS_IFLOW) { 229251078Speter if (com->st16650a) { 229360471Snyan sio_setreg(com, com_cfcr, 0xbf); 229460471Snyan sio_setreg(com, com_fifo, 229560471Snyan sio_getreg(com, com_fifo) | 0x40); 229651078Speter } 229751078Speter com->state |= CS_RTS_IFLOW; 229851078Speter /* 229951078Speter * If CS_RTS_IFLOW just changed from off to on, the change 230051078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 230151078Speter * so do it later by calling comstart() instead of repeating 230251078Speter * a lot of code from comstart() here. 230351078Speter */ 230451078Speter } else if (com->state & CS_RTS_IFLOW) { 230551078Speter com->state &= ~CS_RTS_IFLOW; 230651078Speter /* 230751078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 230851078Speter * on here, since comstart() won't do it later. 230951078Speter */ 231051078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 231151078Speter if (com->st16650a) { 231260471Snyan sio_setreg(com, com_cfcr, 0xbf); 231360471Snyan sio_setreg(com, com_fifo, 231460471Snyan sio_getreg(com, com_fifo) & ~0x40); 231551078Speter } 231651078Speter } 231751078Speter 231851078Speter 231951078Speter /* 232051078Speter * Set up state to handle output flow control. 232151078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 232251078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 232351078Speter */ 232451078Speter com->state |= CS_ODEVREADY; 232551078Speter com->state &= ~CS_CTS_OFLOW; 232651078Speter if (cflag & CCTS_OFLOW) { 232751078Speter com->state |= CS_CTS_OFLOW; 232851078Speter if (!(com->last_modem_status & MSR_CTS)) 232951078Speter com->state &= ~CS_ODEVREADY; 233051078Speter if (com->st16650a) { 233160471Snyan sio_setreg(com, com_cfcr, 0xbf); 233260471Snyan sio_setreg(com, com_fifo, 233360471Snyan sio_getreg(com, com_fifo) | 0x80); 233451078Speter } 233551078Speter } else { 233651078Speter if (com->st16650a) { 233760471Snyan sio_setreg(com, com_cfcr, 0xbf); 233860471Snyan sio_setreg(com, com_fifo, 233960471Snyan sio_getreg(com, com_fifo) & ~0x80); 234051078Speter } 234151078Speter } 234251078Speter 234360471Snyan sio_setreg(com, com_cfcr, com->cfcr_image); 234451078Speter 234551078Speter /* XXX shouldn't call functions while intrs are disabled. */ 234651078Speter disc_optim(tp, t, com); 234751078Speter /* 234851078Speter * Recover from fiddling with CS_TTGO. We used to call siointr1() 234951078Speter * unconditionally, but that defeated the careful discarding of 235051078Speter * stale input in sioopen(). 235151078Speter */ 235251078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 235351078Speter siointr1(com); 235451078Speter 235572200Sbmilekic mtx_unlock_spin(&sio_lock); 235651078Speter splx(s); 235751078Speter comstart(tp); 235851078Speter if (com->ibufold != NULL) { 235951078Speter free(com->ibufold, M_DEVBUF); 236051078Speter com->ibufold = NULL; 236151078Speter } 236251078Speter return (0); 236351078Speter} 236451078Speter 236565605Sjhb/* 236670174Sjhb * This function must be called with the sio_lock mutex released and will 236770174Sjhb * return with it obtained. 236865605Sjhb */ 236951078Speterstatic int 237065605Sjhbsiosetwater(com, speed) 237151078Speter struct com_s *com; 237251078Speter speed_t speed; 237351078Speter{ 237451078Speter int cp4ticks; 237551078Speter u_char *ibuf; 237651078Speter int ibufsize; 237751078Speter struct tty *tp; 237851078Speter 237951078Speter /* 238051078Speter * Make the buffer size large enough to handle a softtty interrupt 238151078Speter * latency of about 2 ticks without loss of throughput or data 238251078Speter * (about 3 ticks if input flow control is not used or not honoured, 238351078Speter * but a bit less for CS5-CS7 modes). 238451078Speter */ 238551078Speter cp4ticks = speed / 10 / hz * 4; 238651078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 238751078Speter ibufsize <<= 1; 238865605Sjhb if (ibufsize == com->ibufsize) { 238972200Sbmilekic mtx_lock_spin(&sio_lock); 239051078Speter return (0); 239165605Sjhb } 239251078Speter 239351078Speter /* 239451078Speter * Allocate input buffer. The extra factor of 2 in the size is 239551078Speter * to allow for an error byte for each input byte. 239651078Speter */ 239751078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 239865605Sjhb if (ibuf == NULL) { 239972200Sbmilekic mtx_lock_spin(&sio_lock); 240051078Speter return (ENOMEM); 240165605Sjhb } 240251078Speter 240351078Speter /* Initialize non-critical variables. */ 240451078Speter com->ibufold = com->ibuf; 240551078Speter com->ibufsize = ibufsize; 240651078Speter tp = com->tp; 240751078Speter if (tp != NULL) { 240851078Speter tp->t_ififosize = 2 * ibufsize; 240951078Speter tp->t_ispeedwat = (speed_t)-1; 241051078Speter tp->t_ospeedwat = (speed_t)-1; 241151078Speter } 241251078Speter 241351078Speter /* 241451078Speter * Read current input buffer, if any. Continue with interrupts 241551078Speter * disabled. 241651078Speter */ 241772200Sbmilekic mtx_lock_spin(&sio_lock); 241851078Speter if (com->iptr != com->ibuf) 241951078Speter sioinput(com); 242051078Speter 242151078Speter /*- 242251078Speter * Initialize critical variables, including input buffer watermarks. 242351078Speter * The external device is asked to stop sending when the buffer 242451078Speter * exactly reaches high water, or when the high level requests it. 242551078Speter * The high level is notified immediately (rather than at a later 242651078Speter * clock tick) when this watermark is reached. 242751078Speter * The buffer size is chosen so the watermark should almost never 242851078Speter * be reached. 242951078Speter * The low watermark is invisibly 0 since the buffer is always 243051078Speter * emptied all at once. 243151078Speter */ 243251078Speter com->iptr = com->ibuf = ibuf; 243351078Speter com->ibufend = ibuf + ibufsize; 243451078Speter com->ierroff = ibufsize; 243551078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 243651078Speter return (0); 243751078Speter} 243851078Speter 243951078Speterstatic void 244051078Spetercomstart(tp) 244151078Speter struct tty *tp; 244251078Speter{ 244351078Speter struct com_s *com; 244451078Speter int s; 244551078Speter int unit; 244651078Speter 244751078Speter unit = DEV_TO_UNIT(tp->t_dev); 244851078Speter com = com_addr(unit); 244957915Simp if (com == NULL) 245057915Simp return; 245151078Speter s = spltty(); 245272200Sbmilekic mtx_lock_spin(&sio_lock); 245351078Speter if (tp->t_state & TS_TTSTOP) 245451078Speter com->state &= ~CS_TTGO; 245551078Speter else 245651078Speter com->state |= CS_TTGO; 245751078Speter if (tp->t_state & TS_TBLOCK) { 245851078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 245951078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 246051078Speter } else { 246151078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 246251078Speter && com->state & CS_RTS_IFLOW) 246351078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 246451078Speter } 246572200Sbmilekic mtx_unlock_spin(&sio_lock); 246651078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 246751078Speter ttwwakeup(tp); 246851078Speter splx(s); 246951078Speter return; 247051078Speter } 247151078Speter if (tp->t_outq.c_cc != 0) { 247251078Speter struct lbq *qp; 247351078Speter struct lbq *next; 247451078Speter 247551078Speter if (!com->obufs[0].l_queued) { 247651078Speter com->obufs[0].l_tail 247751078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 247851078Speter sizeof com->obuf1); 247951078Speter com->obufs[0].l_next = NULL; 248051078Speter com->obufs[0].l_queued = TRUE; 248172200Sbmilekic mtx_lock_spin(&sio_lock); 248251078Speter if (com->state & CS_BUSY) { 248351078Speter qp = com->obufq.l_next; 248451078Speter while ((next = qp->l_next) != NULL) 248551078Speter qp = next; 248651078Speter qp->l_next = &com->obufs[0]; 248751078Speter } else { 248851078Speter com->obufq.l_head = com->obufs[0].l_head; 248951078Speter com->obufq.l_tail = com->obufs[0].l_tail; 249051078Speter com->obufq.l_next = &com->obufs[0]; 249151078Speter com->state |= CS_BUSY; 249251078Speter } 249372200Sbmilekic mtx_unlock_spin(&sio_lock); 249451078Speter } 249551078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 249651078Speter com->obufs[1].l_tail 249751078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 249851078Speter sizeof com->obuf2); 249951078Speter com->obufs[1].l_next = NULL; 250051078Speter com->obufs[1].l_queued = TRUE; 250172200Sbmilekic mtx_lock_spin(&sio_lock); 250251078Speter if (com->state & CS_BUSY) { 250351078Speter qp = com->obufq.l_next; 250451078Speter while ((next = qp->l_next) != NULL) 250551078Speter qp = next; 250651078Speter qp->l_next = &com->obufs[1]; 250751078Speter } else { 250851078Speter com->obufq.l_head = com->obufs[1].l_head; 250951078Speter com->obufq.l_tail = com->obufs[1].l_tail; 251051078Speter com->obufq.l_next = &com->obufs[1]; 251151078Speter com->state |= CS_BUSY; 251251078Speter } 251372200Sbmilekic mtx_unlock_spin(&sio_lock); 251451078Speter } 251551078Speter tp->t_state |= TS_BUSY; 251651078Speter } 251772200Sbmilekic mtx_lock_spin(&sio_lock); 251851078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 251951078Speter siointr1(com); /* fake interrupt to start output */ 252072200Sbmilekic mtx_unlock_spin(&sio_lock); 252151078Speter ttwwakeup(tp); 252251078Speter splx(s); 252351078Speter} 252451078Speter 252551078Speterstatic void 252651654Sphkcomstop(tp, rw) 252751078Speter struct tty *tp; 252851078Speter int rw; 252951078Speter{ 253051078Speter struct com_s *com; 253151078Speter 253251078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 253357915Simp if (com == NULL || com->gone) 253451078Speter return; 253572200Sbmilekic mtx_lock_spin(&sio_lock); 253651078Speter if (rw & FWRITE) { 253751078Speter if (com->hasfifo) 253851078Speter#ifdef COM_ESP 253951078Speter /* XXX avoid h/w bug. */ 254051078Speter if (!com->esp) 254151078Speter#endif 254260471Snyan sio_setreg(com, com_fifo, 254360471Snyan FIFO_XMT_RST | com->fifo_image); 254451078Speter com->obufs[0].l_queued = FALSE; 254551078Speter com->obufs[1].l_queued = FALSE; 254651078Speter if (com->state & CS_ODONE) 254751078Speter com_events -= LOTS_OF_EVENTS; 254851078Speter com->state &= ~(CS_ODONE | CS_BUSY); 254951078Speter com->tp->t_state &= ~TS_BUSY; 255051078Speter } 255151078Speter if (rw & FREAD) { 255251078Speter if (com->hasfifo) 255351078Speter#ifdef COM_ESP 255451078Speter /* XXX avoid h/w bug. */ 255551078Speter if (!com->esp) 255651078Speter#endif 255760471Snyan sio_setreg(com, com_fifo, 255860471Snyan FIFO_RCV_RST | com->fifo_image); 255951078Speter com_events -= (com->iptr - com->ibuf); 256051078Speter com->iptr = com->ibuf; 256151078Speter } 256272200Sbmilekic mtx_unlock_spin(&sio_lock); 256351078Speter comstart(tp); 256451078Speter} 256551078Speter 256651078Speterstatic int 256751078Spetercommctl(com, bits, how) 256851078Speter struct com_s *com; 256951078Speter int bits; 257051078Speter int how; 257151078Speter{ 257251078Speter int mcr; 257351078Speter int msr; 257451078Speter 257551078Speter if (how == DMGET) { 257651078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 257751078Speter mcr = com->mcr_image; 257851078Speter if (mcr & MCR_DTR) 257951078Speter bits |= TIOCM_DTR; 258051078Speter if (mcr & MCR_RTS) 258151078Speter bits |= TIOCM_RTS; 258251078Speter msr = com->prev_modem_status; 258351078Speter if (msr & MSR_CTS) 258451078Speter bits |= TIOCM_CTS; 258551078Speter if (msr & MSR_DCD) 258651078Speter bits |= TIOCM_CD; 258751078Speter if (msr & MSR_DSR) 258851078Speter bits |= TIOCM_DSR; 258951078Speter /* 259051078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 259151078Speter * more volatile by reading the modem status a lot. Perhaps 259251078Speter * we should latch both bits until the status is read here. 259351078Speter */ 259451078Speter if (msr & (MSR_RI | MSR_TERI)) 259551078Speter bits |= TIOCM_RI; 259651078Speter return (bits); 259751078Speter } 259851078Speter mcr = 0; 259951078Speter if (bits & TIOCM_DTR) 260051078Speter mcr |= MCR_DTR; 260151078Speter if (bits & TIOCM_RTS) 260251078Speter mcr |= MCR_RTS; 260351078Speter if (com->gone) 260451078Speter return(0); 260572200Sbmilekic mtx_lock_spin(&sio_lock); 260651078Speter switch (how) { 260751078Speter case DMSET: 260851078Speter outb(com->modem_ctl_port, 260951078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 261051078Speter break; 261151078Speter case DMBIS: 261251078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 261351078Speter break; 261451078Speter case DMBIC: 261551078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 261651078Speter break; 261751078Speter } 261872200Sbmilekic mtx_unlock_spin(&sio_lock); 261951078Speter return (0); 262051078Speter} 262151078Speter 262251078Speterstatic void 262351078Spetersiosettimeout() 262451078Speter{ 262551078Speter struct com_s *com; 262651078Speter bool_t someopen; 262751078Speter int unit; 262851078Speter 262951078Speter /* 263051078Speter * Set our timeout period to 1 second if no polled devices are open. 263151078Speter * Otherwise set it to max(1/200, 1/hz). 263251078Speter * Enable timeouts iff some device is open. 263351078Speter */ 263451078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 263551078Speter sio_timeout = hz; 263651078Speter someopen = FALSE; 263753344Speter for (unit = 0; unit < sio_numunits; ++unit) { 263851078Speter com = com_addr(unit); 263951078Speter if (com != NULL && com->tp != NULL 264051078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 264151078Speter someopen = TRUE; 264251078Speter if (com->poll || com->poll_output) { 264351078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 264451078Speter break; 264551078Speter } 264651078Speter } 264751078Speter } 264851078Speter if (someopen) { 264951078Speter sio_timeouts_until_log = hz / sio_timeout; 265051078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 265151078Speter sio_timeout); 265251078Speter } else { 265351078Speter /* Flush error messages, if any. */ 265451078Speter sio_timeouts_until_log = 1; 265551078Speter comwakeup((void *)NULL); 265651078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 265751078Speter } 265851078Speter} 265951078Speter 266051078Speterstatic void 266151078Spetercomwakeup(chan) 266251078Speter void *chan; 266351078Speter{ 266451078Speter struct com_s *com; 266551078Speter int unit; 266651078Speter 266751078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 266851078Speter 266951078Speter /* 267051078Speter * Recover from lost output interrupts. 267151078Speter * Poll any lines that don't use interrupts. 267251078Speter */ 267353344Speter for (unit = 0; unit < sio_numunits; ++unit) { 267451078Speter com = com_addr(unit); 267551078Speter if (com != NULL && !com->gone 267651078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 267772200Sbmilekic mtx_lock_spin(&sio_lock); 267851078Speter siointr1(com); 267972200Sbmilekic mtx_unlock_spin(&sio_lock); 268051078Speter } 268151078Speter } 268251078Speter 268351078Speter /* 268451078Speter * Check for and log errors, but not too often. 268551078Speter */ 268651078Speter if (--sio_timeouts_until_log > 0) 268751078Speter return; 268851078Speter sio_timeouts_until_log = hz / sio_timeout; 268953344Speter for (unit = 0; unit < sio_numunits; ++unit) { 269051078Speter int errnum; 269151078Speter 269251078Speter com = com_addr(unit); 269351078Speter if (com == NULL) 269451078Speter continue; 269551078Speter if (com->gone) 269651078Speter continue; 269751078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 269851078Speter u_int delta; 269951078Speter u_long total; 270051078Speter 270172200Sbmilekic mtx_lock_spin(&sio_lock); 270251078Speter delta = com->delta_error_counts[errnum]; 270351078Speter com->delta_error_counts[errnum] = 0; 270472200Sbmilekic mtx_unlock_spin(&sio_lock); 270551078Speter if (delta == 0) 270651078Speter continue; 270751078Speter total = com->error_counts[errnum] += delta; 270851078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 270951078Speter unit, delta, error_desc[errnum], 271051078Speter delta == 1 ? "" : "s", total); 271151078Speter } 271251078Speter } 271351078Speter} 271451078Speter 271551078Speterstatic void 271651078Speterdisc_optim(tp, t, com) 271751078Speter struct tty *tp; 271851078Speter struct termios *t; 271951078Speter struct com_s *com; 272051078Speter{ 272151078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 272251078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 272351078Speter && (!(t->c_iflag & PARMRK) 272451078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 272551078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 272651078Speter && linesw[tp->t_line].l_rint == ttyinput) 272751078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 272851078Speter else 272951078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 273051078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 273151078Speter} 273251078Speter 273351078Speter/* 273451078Speter * Following are all routines needed for SIO to act as console 273551078Speter */ 273651078Speter#include <sys/cons.h> 273751078Speter 273851078Speterstruct siocnstate { 273951078Speter u_char dlbl; 274051078Speter u_char dlbh; 274151078Speter u_char ier; 274251078Speter u_char cfcr; 274351078Speter u_char mcr; 274451078Speter}; 274551078Speter 274666230Sjhb#ifndef __alpha__ 274792739Salfredstatic speed_t siocngetspeed(Port_t, u_long rclk); 274866230Sjhb#endif 274993010Sbdestatic void siocnclose(struct siocnstate *sp, Port_t iobase); 275093010Sbdestatic void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 275193010Sbdestatic void siocntxwait(Port_t iobase); 275251078Speter 275366230Sjhb#ifdef __alpha__ 275492739Salfredint siocnattach(int port, int speed); 275592739Salfredint siogdbattach(int port, int speed); 275692739Salfredint siogdbgetc(void); 275792739Salfredvoid siogdbputc(int c); 275866230Sjhb#else 275951078Speterstatic cn_probe_t siocnprobe; 276051078Speterstatic cn_init_t siocninit; 276185371Sjlemonstatic cn_term_t siocnterm; 276266230Sjhb#endif 276351078Speterstatic cn_checkc_t siocncheckc; 276451078Speterstatic cn_getc_t siocngetc; 276551078Speterstatic cn_putc_t siocnputc; 276651078Speter 276783832Sdfr#ifndef __alpha__ 276885371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 276955823Syokota siocnputc, NULL); 277051078Speter#endif 277151078Speter 277251078Speter/* To get the GDB related variables */ 277351078Speter#if DDB > 0 277451078Speter#include <ddb/ddb.h> 277551078Speter#endif 277651078Speter 277751078Speterstatic void 277851078Spetersiocntxwait(iobase) 277951078Speter Port_t iobase; 278051078Speter{ 278151078Speter int timo; 278251078Speter 278351078Speter /* 278451078Speter * Wait for any pending transmission to finish. Required to avoid 278551078Speter * the UART lockup bug when the speed is changed, and for normal 278651078Speter * transmits. 278751078Speter */ 278851078Speter timo = 100000; 278951078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 279051078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 279151078Speter ; 279251078Speter} 279351078Speter 279466230Sjhb#ifndef __alpha__ 279566230Sjhb 279651078Speter/* 279751078Speter * Read the serial port specified and try to figure out what speed 279851078Speter * it's currently running at. We're assuming the serial port has 279951078Speter * been initialized and is basicly idle. This routine is only intended 280051078Speter * to be run at system startup. 280151078Speter * 280251078Speter * If the value read from the serial port doesn't make sense, return 0. 280351078Speter */ 280451078Speter 280551078Speterstatic speed_t 280689986Sjhaysiocngetspeed(iobase, rclk) 280789986Sjhay Port_t iobase; 280889986Sjhay u_long rclk; 280951078Speter{ 281089986Sjhay u_int divisor; 281151078Speter u_char dlbh; 281251078Speter u_char dlbl; 281351078Speter u_char cfcr; 281451078Speter 281551078Speter cfcr = inb(iobase + com_cfcr); 281651078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 281751078Speter 281851078Speter dlbl = inb(iobase + com_dlbl); 281951078Speter dlbh = inb(iobase + com_dlbh); 282051078Speter 282151078Speter outb(iobase + com_cfcr, cfcr); 282251078Speter 282389986Sjhay divisor = dlbh << 8 | dlbl; 282451078Speter 282589986Sjhay /* XXX there should be more sanity checking. */ 282689986Sjhay if (divisor == 0) 282789986Sjhay return (CONSPEED); 282889986Sjhay return (rclk / (16UL * divisor)); 282951078Speter} 283051078Speter 283166230Sjhb#endif 283266230Sjhb 283351078Speterstatic void 283451078Spetersiocnopen(sp, iobase, speed) 283551078Speter struct siocnstate *sp; 283651078Speter Port_t iobase; 283751078Speter int speed; 283851078Speter{ 283989986Sjhay u_int divisor; 284051078Speter u_char dlbh; 284151078Speter u_char dlbl; 284251078Speter 284351078Speter /* 284451078Speter * Save all the device control registers except the fifo register 284551078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 284651078Speter * We can't save the fifo register since it is read-only. 284751078Speter */ 284851078Speter sp->ier = inb(iobase + com_ier); 284951078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 285051078Speter siocntxwait(iobase); 285151078Speter sp->cfcr = inb(iobase + com_cfcr); 285251078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 285351078Speter sp->dlbl = inb(iobase + com_dlbl); 285451078Speter sp->dlbh = inb(iobase + com_dlbh); 285551078Speter /* 285651078Speter * Only set the divisor registers if they would change, since on 285751078Speter * some 16550 incompatibles (Startech), setting them clears the 285851078Speter * data input register. This also reduces the effects of the 285951078Speter * UMC8669F bug. 286051078Speter */ 286189986Sjhay divisor = siodivisor(comdefaultrclk, speed); 286251078Speter dlbl = divisor & 0xFF; 286351078Speter if (sp->dlbl != dlbl) 286451078Speter outb(iobase + com_dlbl, dlbl); 286589986Sjhay dlbh = divisor >> 8; 286651078Speter if (sp->dlbh != dlbh) 286751078Speter outb(iobase + com_dlbh, dlbh); 286851078Speter outb(iobase + com_cfcr, CFCR_8BITS); 286951078Speter sp->mcr = inb(iobase + com_mcr); 287051078Speter /* 287151078Speter * We don't want interrupts, but must be careful not to "disable" 287251078Speter * them by clearing the MCR_IENABLE bit, since that might cause 287351078Speter * an interrupt by floating the IRQ line. 287451078Speter */ 287551078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 287651078Speter} 287751078Speter 287851078Speterstatic void 287951078Spetersiocnclose(sp, iobase) 288051078Speter struct siocnstate *sp; 288151078Speter Port_t iobase; 288251078Speter{ 288351078Speter /* 288451078Speter * Restore the device control registers. 288551078Speter */ 288651078Speter siocntxwait(iobase); 288751078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 288851078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 288951078Speter outb(iobase + com_dlbl, sp->dlbl); 289051078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 289151078Speter outb(iobase + com_dlbh, sp->dlbh); 289251078Speter outb(iobase + com_cfcr, sp->cfcr); 289351078Speter /* 289451078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 289551078Speter */ 289651078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 289751078Speter outb(iobase + com_ier, sp->ier); 289851078Speter} 289951078Speter 290066230Sjhb#ifndef __alpha__ 290166230Sjhb 290251078Speterstatic void 290351078Spetersiocnprobe(cp) 290451078Speter struct consdev *cp; 290551078Speter{ 290651078Speter speed_t boot_speed; 290751078Speter u_char cfcr; 290889986Sjhay u_int divisor; 290951078Speter int s, unit; 291051078Speter struct siocnstate sp; 291151078Speter 291251078Speter /* 291351078Speter * Find our first enabled console, if any. If it is a high-level 291451078Speter * console device, then initialize it and return successfully. 291551078Speter * If it is a low-level console device, then initialize it and 291651078Speter * return unsuccessfully. It must be initialized in both cases 291751078Speter * for early use by console drivers and debuggers. Initializing 291851078Speter * the hardware is not necessary in all cases, since the i/o 291951078Speter * routines initialize it on the fly, but it is necessary if 292051078Speter * input might arrive while the hardware is switched back to an 292151078Speter * uninitialized state. We can't handle multiple console devices 292251078Speter * yet because our low-level routines don't take a device arg. 292351078Speter * We trust the user to set the console flags properly so that we 292451078Speter * don't need to probe. 292551078Speter */ 292651078Speter cp->cn_pri = CN_DEAD; 292751078Speter 292851078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 292951078Speter int flags; 293051078Speter int disabled; 293151078Speter if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 293251078Speter if (disabled) 293351078Speter continue; 293451078Speter } 293551078Speter if (resource_int_value("sio", unit, "flags", &flags)) 293651078Speter continue; 293751078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 293851078Speter int port; 293951078Speter Port_t iobase; 294051078Speter 294151078Speter if (resource_int_value("sio", unit, "port", &port)) 294251078Speter continue; 294351078Speter iobase = port; 294451078Speter s = spltty(); 294551078Speter if (boothowto & RB_SERIAL) { 294689986Sjhay boot_speed = 294789986Sjhay siocngetspeed(iobase, comdefaultrclk); 294851078Speter if (boot_speed) 294951078Speter comdefaultrate = boot_speed; 295051078Speter } 295151078Speter 295251078Speter /* 295351078Speter * Initialize the divisor latch. We can't rely on 295451078Speter * siocnopen() to do this the first time, since it 295551078Speter * avoids writing to the latch if the latch appears 295651078Speter * to have the correct value. Also, if we didn't 295751078Speter * just read the speed from the hardware, then we 295851078Speter * need to set the speed in hardware so that 295951078Speter * switching it later is null. 296051078Speter */ 296151078Speter cfcr = inb(iobase + com_cfcr); 296251078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 296389986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 296489986Sjhay outb(iobase + com_dlbl, divisor & 0xff); 296589986Sjhay outb(iobase + com_dlbh, divisor >> 8); 296651078Speter outb(iobase + com_cfcr, cfcr); 296751078Speter 296851078Speter siocnopen(&sp, iobase, comdefaultrate); 296951078Speter 297051078Speter splx(s); 297151078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 297251078Speter cp->cn_dev = makedev(CDEV_MAJOR, unit); 297351078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 297451078Speter || boothowto & RB_SERIAL 297551078Speter ? CN_REMOTE : CN_NORMAL; 297651078Speter siocniobase = iobase; 297751078Speter siocnunit = unit; 297851078Speter } 297951078Speter if (COM_DEBUGGER(flags)) { 298051078Speter printf("sio%d: gdb debugging port\n", unit); 298151078Speter siogdbiobase = iobase; 298251078Speter siogdbunit = unit; 298351078Speter#if DDB > 0 298451078Speter gdbdev = makedev(CDEV_MAJOR, unit); 298551078Speter gdb_getc = siocngetc; 298651078Speter gdb_putc = siocnputc; 298751078Speter#endif 298851078Speter } 298951078Speter } 299051078Speter } 299151078Speter#ifdef __i386__ 299251078Speter#if DDB > 0 299351078Speter /* 299451078Speter * XXX Ugly Compatability. 299551078Speter * If no gdb port has been specified, set it to be the console 299651078Speter * as some configuration files don't specify the gdb port. 299751078Speter */ 299851078Speter if (gdbdev == NODEV && (boothowto & RB_GDB)) { 299951078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 300051078Speter siocnunit); 300151078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 300251078Speter printf("configuration file (currently sio only).\n"); 300351078Speter siogdbiobase = siocniobase; 300451078Speter siogdbunit = siocnunit; 300551078Speter gdbdev = makedev(CDEV_MAJOR, siocnunit); 300651078Speter gdb_getc = siocngetc; 300751078Speter gdb_putc = siocnputc; 300851078Speter } 300951078Speter#endif 301051078Speter#endif 301151078Speter} 301251078Speter 301366230Sjhbstatic void 301466230Sjhbsiocninit(cp) 301566230Sjhb struct consdev *cp; 301666230Sjhb{ 301766230Sjhb comconsole = DEV_TO_UNIT(cp->cn_dev); 301866230Sjhb} 301966230Sjhb 302085371Sjlemonstatic void 302185371Sjlemonsiocnterm(cp) 302285371Sjlemon struct consdev *cp; 302385371Sjlemon{ 302485371Sjlemon comconsole = -1; 302585371Sjlemon} 302685371Sjlemon 302766230Sjhb#endif 302866230Sjhb 302951078Speter#ifdef __alpha__ 303051078Speter 303155868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 303251078Speter 303351078Speterint 303451078Spetersiocnattach(port, speed) 303551078Speter int port; 303651078Speter int speed; 303751078Speter{ 303851078Speter int s; 303951078Speter u_char cfcr; 304089986Sjhay u_int divisor; 304151078Speter struct siocnstate sp; 304298691Sn_hibma int unit = 0; /* XXX random value! */ 304351078Speter 304451078Speter siocniobase = port; 304598691Sn_hibma siocnunit = unit; 304651078Speter comdefaultrate = speed; 304751078Speter sio_consdev.cn_pri = CN_NORMAL; 304898691Sn_hibma sio_consdev.cn_dev = makedev(CDEV_MAJOR, unit); 304951078Speter 305051078Speter s = spltty(); 305151078Speter 305251078Speter /* 305351078Speter * Initialize the divisor latch. We can't rely on 305451078Speter * siocnopen() to do this the first time, since it 305551078Speter * avoids writing to the latch if the latch appears 305651078Speter * to have the correct value. Also, if we didn't 305751078Speter * just read the speed from the hardware, then we 305851078Speter * need to set the speed in hardware so that 305951078Speter * switching it later is null. 306051078Speter */ 306151078Speter cfcr = inb(siocniobase + com_cfcr); 306251078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 306389986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 306489986Sjhay outb(siocniobase + com_dlbl, divisor & 0xff); 306589986Sjhay outb(siocniobase + com_dlbh, divisor >> 8); 306651078Speter outb(siocniobase + com_cfcr, cfcr); 306751078Speter 306851078Speter siocnopen(&sp, siocniobase, comdefaultrate); 306951078Speter splx(s); 307051078Speter 307185426Sjlemon cnadd(&sio_consdev); 307258885Simp return (0); 307351078Speter} 307451078Speter 307551078Speterint 307651078Spetersiogdbattach(port, speed) 307751078Speter int port; 307851078Speter int speed; 307951078Speter{ 308051078Speter int s; 308151078Speter u_char cfcr; 308289986Sjhay u_int divisor; 308351078Speter struct siocnstate sp; 308498691Sn_hibma int unit = 1; /* XXX random value! */ 308551078Speter 308651078Speter siogdbiobase = port; 308751078Speter gdbdefaultrate = speed; 308851078Speter 308965714Sjhb printf("sio%d: gdb debugging port\n", unit); 309065714Sjhb siogdbunit = unit; 309165714Sjhb#if DDB > 0 309265714Sjhb gdbdev = makedev(CDEV_MAJOR, unit); 309365714Sjhb gdb_getc = siocngetc; 309465714Sjhb gdb_putc = siocnputc; 309565714Sjhb#endif 309665714Sjhb 309751078Speter s = spltty(); 309851078Speter 309951078Speter /* 310051078Speter * Initialize the divisor latch. We can't rely on 310151078Speter * siocnopen() to do this the first time, since it 310251078Speter * avoids writing to the latch if the latch appears 310351078Speter * to have the correct value. Also, if we didn't 310451078Speter * just read the speed from the hardware, then we 310551078Speter * need to set the speed in hardware so that 310651078Speter * switching it later is null. 310751078Speter */ 310851078Speter cfcr = inb(siogdbiobase + com_cfcr); 310951078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 311089986Sjhay divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 311189986Sjhay outb(siogdbiobase + com_dlbl, divisor & 0xff); 311289986Sjhay outb(siogdbiobase + com_dlbh, divisor >> 8); 311351078Speter outb(siogdbiobase + com_cfcr, cfcr); 311451078Speter 311551078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 311651078Speter splx(s); 311751078Speter 311858885Simp return (0); 311951078Speter} 312051078Speter 312151078Speter#endif 312251078Speter 312351078Speterstatic int 312451078Spetersiocncheckc(dev) 312551078Speter dev_t dev; 312651078Speter{ 312751078Speter int c; 312851078Speter Port_t iobase; 312951078Speter int s; 313051078Speter struct siocnstate sp; 313198401Sn_hibma speed_t speed; 313251078Speter 313398401Sn_hibma if (minor(dev) == siocnunit) { 313498401Sn_hibma iobase = siocniobase; 313598401Sn_hibma speed = comdefaultrate; 313698401Sn_hibma } else { 313751078Speter iobase = siogdbiobase; 313898401Sn_hibma speed = gdbdefaultrate; 313998401Sn_hibma } 314051078Speter s = spltty(); 314198401Sn_hibma siocnopen(&sp, iobase, speed); 314251078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 314351078Speter c = inb(iobase + com_data); 314451078Speter else 314551078Speter c = -1; 314651078Speter siocnclose(&sp, iobase); 314751078Speter splx(s); 314851078Speter return (c); 314951078Speter} 315051078Speter 315151078Speter 3152104094Sphkstatic int 315351078Spetersiocngetc(dev) 315451078Speter dev_t dev; 315551078Speter{ 315651078Speter int c; 315751078Speter Port_t iobase; 315851078Speter int s; 315951078Speter struct siocnstate sp; 316098401Sn_hibma speed_t speed; 316151078Speter 316298401Sn_hibma if (minor(dev) == siocnunit) { 316398401Sn_hibma iobase = siocniobase; 316498401Sn_hibma speed = comdefaultrate; 316598401Sn_hibma } else { 316651078Speter iobase = siogdbiobase; 316798401Sn_hibma speed = gdbdefaultrate; 316898401Sn_hibma } 316951078Speter s = spltty(); 317098401Sn_hibma siocnopen(&sp, iobase, speed); 317151078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 317251078Speter ; 317351078Speter c = inb(iobase + com_data); 317451078Speter siocnclose(&sp, iobase); 317551078Speter splx(s); 317651078Speter return (c); 317751078Speter} 317851078Speter 3179104094Sphkstatic void 318051078Spetersiocnputc(dev, c) 318151078Speter dev_t dev; 318251078Speter int c; 318351078Speter{ 318488582Sbde int need_unlock; 318551078Speter int s; 318651078Speter struct siocnstate sp; 318751078Speter Port_t iobase; 318898401Sn_hibma speed_t speed; 318951078Speter 319098401Sn_hibma if (minor(dev) == siocnunit) { 319198401Sn_hibma iobase = siocniobase; 319298401Sn_hibma speed = comdefaultrate; 319398401Sn_hibma } else { 319451078Speter iobase = siogdbiobase; 319598401Sn_hibma speed = gdbdefaultrate; 319698401Sn_hibma } 319751078Speter s = spltty(); 319888582Sbde need_unlock = 0; 319988582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 320084029Sjlemon mtx_lock_spin(&sio_lock); 320188582Sbde need_unlock = 1; 320288582Sbde } 320398401Sn_hibma siocnopen(&sp, iobase, speed); 320451078Speter siocntxwait(iobase); 320551078Speter outb(iobase + com_data, c); 320651078Speter siocnclose(&sp, iobase); 320788582Sbde if (need_unlock) 320884029Sjlemon mtx_unlock_spin(&sio_lock); 320951078Speter splx(s); 321051078Speter} 321151078Speter 321251078Speter#ifdef __alpha__ 321351078Speterint 321451078Spetersiogdbgetc() 321551078Speter{ 321651078Speter int c; 321751078Speter Port_t iobase; 321898401Sn_hibma speed_t speed; 321951078Speter int s; 322051078Speter struct siocnstate sp; 322151078Speter 322298619Sn_hibma if (siogdbunit == siocnunit) { 322398401Sn_hibma iobase = siocniobase; 322498401Sn_hibma speed = comdefaultrate; 322598401Sn_hibma } else { 322698401Sn_hibma iobase = siogdbiobase; 322798401Sn_hibma speed = gdbdefaultrate; 322898401Sn_hibma } 322998401Sn_hibma 323051078Speter s = spltty(); 323198401Sn_hibma siocnopen(&sp, iobase, speed); 323251078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 323351078Speter ; 323451078Speter c = inb(iobase + com_data); 323551078Speter siocnclose(&sp, iobase); 323651078Speter splx(s); 323751078Speter return (c); 323851078Speter} 323951078Speter 324051078Spetervoid 324151078Spetersiogdbputc(c) 324251078Speter int c; 324351078Speter{ 324498401Sn_hibma Port_t iobase; 324598401Sn_hibma speed_t speed; 324651078Speter int s; 324751078Speter struct siocnstate sp; 324851078Speter 324998619Sn_hibma if (siogdbunit == siocnunit) { 325098401Sn_hibma iobase = siocniobase; 325198401Sn_hibma speed = comdefaultrate; 325298401Sn_hibma } else { 325398401Sn_hibma iobase = siogdbiobase; 325498401Sn_hibma speed = gdbdefaultrate; 325598401Sn_hibma } 325698401Sn_hibma 325751078Speter s = spltty(); 325898401Sn_hibma siocnopen(&sp, iobase, speed); 325951078Speter siocntxwait(siogdbiobase); 326051078Speter outb(siogdbiobase + com_data, c); 326151078Speter siocnclose(&sp, siogdbiobase); 326251078Speter splx(s); 326351078Speter} 326451078Speter#endif 3265