sio.c revision 102542
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * $FreeBSD: head/sys/dev/sio/sio.c 102542 2002-08-28 22:25:41Z phk $ 3451078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3551078Speter * from: i386/isa sio.c,v 1.234 3651078Speter */ 3751078Speter 3851078Speter#include "opt_comconsole.h" 3951078Speter#include "opt_compat.h" 4051078Speter#include "opt_ddb.h" 4151078Speter#include "opt_sio.h" 4251078Speter 4351078Speter/* 4451078Speter * Serial driver, based on 386BSD-0.1 com driver. 4551078Speter * Mostly rewritten to use pseudo-DMA. 4651078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4751078Speter * COM driver, based on HP dca driver. 4851078Speter * 4951078Speter * Changes for PC-Card integration: 5051078Speter * - Added PC-Card driver table and handlers 5151078Speter */ 5251078Speter#include <sys/param.h> 5376166Smarkm#include <sys/systm.h> 5465822Sjhb#include <sys/bus.h> 5551078Speter#include <sys/conf.h> 5651078Speter#include <sys/dkstat.h> 5751078Speter#include <sys/fcntl.h> 5851078Speter#include <sys/interrupt.h> 5951078Speter#include <sys/kernel.h> 6076166Smarkm#include <sys/lock.h> 6176166Smarkm#include <sys/malloc.h> 6276166Smarkm#include <sys/module.h> 6376166Smarkm#include <sys/mutex.h> 6476166Smarkm#include <sys/proc.h> 6576166Smarkm#include <sys/reboot.h> 6676166Smarkm#include <sys/sysctl.h> 6751078Speter#include <sys/syslog.h> 6876166Smarkm#include <sys/tty.h> 6960471Snyan#include <machine/bus_pio.h> 7051078Speter#include <machine/bus.h> 7151078Speter#include <sys/rman.h> 7251078Speter#include <sys/timepps.h> 7393466Sbde#include <sys/uio.h> 7451078Speter 7586909Simp#include <isa/isavar.h> 7686909Simp 7793126Smike#include <machine/limits.h> 7851078Speter#include <machine/resource.h> 7951078Speter 8085302Simp#include <dev/sio/sioreg.h> 8185365Simp#include <dev/sio/siovar.h> 8251078Speter 8351078Speter#ifdef COM_ESP 8477726Sjoerg#include <dev/ic/esp.h> 8551078Speter#endif 8677726Sjoerg#include <dev/ic/ns16550.h> 8751078Speter 8851078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 8951078Speter 9051078Speter#define CALLOUT_MASK 0x80 9151078Speter#define CONTROL_MASK 0x60 9251078Speter#define CONTROL_INIT_STATE 0x20 9351078Speter#define CONTROL_LOCK_STATE 0x40 9451078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 9593470Sbde#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 9693470Sbde | ((mynor) & 0x1f)) 9793470Sbde#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 9893470Sbde | ((unit) & 0x1f)) 9951078Speter 10051078Speter#ifdef COM_MULTIPORT 10151078Speter/* checks in flags for multiport and which is multiport "master chip" 10251078Speter * for a given card 10351078Speter */ 10451078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 10551078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 10651078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 10751078Speter#endif /* COM_MULTIPORT */ 10851078Speter 10951078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 11051078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 11151078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 11251078Speter#define COM_DEBUGGER(flags) ((flags) & 0x80) 11351078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 11451078Speter#define COM_NOFIFO(flags) ((flags) & 0x02) 11551078Speter#define COM_ST16650A(flags) ((flags) & 0x20000) 11686909Simp#define COM_C_NOPROBE (0x40000) 11786909Simp#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 11851078Speter#define COM_C_IIR_TXRDYBUG (0x80000) 11951078Speter#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 12051078Speter#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 12151078Speter 12251078Speter#define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 12351078Speter 12460471Snyan#define sio_getreg(com, off) \ 12560471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 12660471Snyan#define sio_setreg(com, off, value) \ 12760471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 12860471Snyan 12951078Speter/* 13051078Speter * com state bits. 13151078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 13251078Speter * than the other bits so that they can be tested as a group without masking 13351078Speter * off the low bits. 13451078Speter * 13551078Speter * The following com and tty flags correspond closely: 13651078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 13753344Speter * comstop()) 13851078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 13951078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14051078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14151078Speter * TS_FLUSH is not used. 14251078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 14351078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 14451078Speter */ 14551078Speter#define CS_BUSY 0x80 /* output in progress */ 14651078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 14751078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 14851078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 14951078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15051078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15151078Speter#define CS_ODONE 4 /* output completed */ 15251078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 15351078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 15451078Speter 15551078Speterstatic char const * const error_desc[] = { 15651078Speter#define CE_OVERRUN 0 15751078Speter "silo overflow", 15851078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 15951078Speter "interrupt-level buffer overflow", 16051078Speter#define CE_TTY_BUF_OVERFLOW 2 16151078Speter "tty-level buffer overflow", 16251078Speter}; 16351078Speter 16486909Simp#define CE_NTYPES 3 16551078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 16651078Speter 16786909Simp/* types. XXX - should be elsewhere */ 16886909Simptypedef u_int Port_t; /* hardware port */ 16986909Simptypedef u_char bool_t; /* boolean */ 17086909Simp 17186909Simp/* queue of linear buffers */ 17286909Simpstruct lbq { 17386909Simp u_char *l_head; /* next char to process */ 17486909Simp u_char *l_tail; /* one past the last char to process */ 17586909Simp struct lbq *l_next; /* next in queue */ 17686909Simp bool_t l_queued; /* nonzero if queued */ 17786909Simp}; 17886909Simp 17986909Simp/* com device structure */ 18086909Simpstruct com_s { 18186909Simp u_int flags; /* Copy isa device flags */ 18286909Simp u_char state; /* miscellaneous flag bits */ 18386909Simp bool_t active_out; /* nonzero if the callout device is open */ 18486909Simp u_char cfcr_image; /* copy of value written to CFCR */ 18551078Speter#ifdef COM_ESP 18686909Simp bool_t esp; /* is this unit a hayes esp board? */ 18786909Simp#endif 18886909Simp u_char extra_state; /* more flag bits, separate for order trick */ 18986909Simp u_char fifo_image; /* copy of value written to FIFO */ 19086909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 19186909Simp bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 19286909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 19386909Simp u_char mcr_image; /* copy of value written to MCR */ 19486909Simp#ifdef COM_MULTIPORT 19586909Simp bool_t multiport; /* is this unit part of a multiport device? */ 19686909Simp#endif /* COM_MULTIPORT */ 19786909Simp bool_t no_irq; /* nonzero if irq is not attached */ 19886909Simp bool_t gone; /* hardware disappeared */ 19986909Simp bool_t poll; /* nonzero if polling is required */ 20086909Simp bool_t poll_output; /* nonzero if polling for output is required */ 20186909Simp int unit; /* unit number */ 20286909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 20386909Simp u_int tx_fifo_size; 20486909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 20586909Simp 20686909Simp /* 20786909Simp * The high level of the driver never reads status registers directly 20886909Simp * because there would be too many side effects to handle conveniently. 20986909Simp * Instead, it reads copies of the registers stored here by the 21086909Simp * interrupt handler. 21186909Simp */ 21286909Simp u_char last_modem_status; /* last MSR read by intr handler */ 21386909Simp u_char prev_modem_status; /* last MSR handled by high level */ 21486909Simp 21586909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 21686909Simp u_char *ibuf; /* start of input buffer */ 21786909Simp u_char *ibufend; /* end of input buffer */ 21886909Simp u_char *ibufold; /* old input buffer, to be freed */ 21986909Simp u_char *ihighwater; /* threshold in input buffer */ 22086909Simp u_char *iptr; /* next free spot in input buffer */ 22186909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 22286909Simp int ierroff; /* offset of error bytes in ibuf */ 22386909Simp 22486909Simp struct lbq obufq; /* head of queue of output buffers */ 22586909Simp struct lbq obufs[2]; /* output buffers */ 22686909Simp 22786909Simp bus_space_tag_t bst; 22886909Simp bus_space_handle_t bsh; 22986909Simp 23086909Simp Port_t data_port; /* i/o ports */ 23186909Simp#ifdef COM_ESP 23286909Simp Port_t esp_port; 23386909Simp#endif 23486909Simp Port_t int_id_port; 23586909Simp Port_t modem_ctl_port; 23686909Simp Port_t line_status_port; 23786909Simp Port_t modem_status_port; 23886909Simp Port_t intr_ctl_port; /* Ports of IIR register */ 23986909Simp 24086909Simp struct tty *tp; /* cross reference */ 24186909Simp 24286909Simp /* Initial state. */ 24386909Simp struct termios it_in; /* should be in struct tty */ 24486909Simp struct termios it_out; 24586909Simp 24686909Simp /* Lock state. */ 24786909Simp struct termios lt_in; /* should be in struct tty */ 24886909Simp struct termios lt_out; 24986909Simp 25086909Simp bool_t do_timestamp; 25186909Simp bool_t do_dcd_timestamp; 25286909Simp struct timeval timestamp; 25386909Simp struct timeval dcd_timestamp; 25486909Simp struct pps_state pps; 25586909Simp 25686909Simp u_long bytes_in; /* statistics */ 25786909Simp u_long bytes_out; 25886909Simp u_int delta_error_counts[CE_NTYPES]; 25986909Simp u_long error_counts[CE_NTYPES]; 26086909Simp 26189986Sjhay u_long rclk; 26289986Sjhay 26386909Simp struct resource *irqres; 26486909Simp struct resource *ioportres; 26586909Simp void *cookie; 26686909Simp dev_t devs[6]; 26786909Simp 26886909Simp /* 26986909Simp * Data area for output buffers. Someday we should build the output 27086909Simp * buffer queue without copying data. 27186909Simp */ 27286909Simp u_char obuf1[256]; 27386909Simp u_char obuf2[256]; 27486909Simp}; 27586909Simp 27686909Simp#ifdef COM_ESP 27793010Sbdestatic int espattach(struct com_s *com, Port_t esp_port); 27851078Speter#endif 27951078Speter 28051078Speterstatic timeout_t siobusycheck; 28193010Sbdestatic u_int siodivisor(u_long rclk, speed_t speed); 28251078Speterstatic timeout_t siodtrwakeup; 28393010Sbdestatic void comhardclose(struct com_s *com); 28493010Sbdestatic void sioinput(struct com_s *com); 28593010Sbdestatic void siointr1(struct com_s *com); 28693010Sbdestatic void siointr(void *arg); 28793010Sbdestatic int commctl(struct com_s *com, int bits, int how); 28893010Sbdestatic int comparam(struct tty *tp, struct termios *t); 28993010Sbdestatic void siopoll(void *); 29093010Sbdestatic void siosettimeout(void); 29193010Sbdestatic int siosetwater(struct com_s *com, speed_t speed); 29293010Sbdestatic void comstart(struct tty *tp); 29393010Sbdestatic void comstop(struct tty *tp, int rw); 29451078Speterstatic timeout_t comwakeup; 29593010Sbdestatic void disc_optim(struct tty *tp, struct termios *t, 29693010Sbde struct com_s *com); 29751078Speter 29885365Simpchar sio_driver_name[] = "sio"; 29970174Sjhbstatic struct mtx sio_lock; 30070174Sjhbstatic int sio_inited; 30151078Speter 30251078Speter/* table and macro for fast conversion from a unit number to its com struct */ 30385365Simpdevclass_t sio_devclass; 30451078Speter#define com_addr(unit) ((struct com_s *) \ 30586909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 30651078Speter 30751078Speterstatic d_open_t sioopen; 30851078Speterstatic d_close_t sioclose; 30951078Speterstatic d_read_t sioread; 31051078Speterstatic d_write_t siowrite; 31151078Speterstatic d_ioctl_t sioioctl; 31251078Speter 31351078Speter#define CDEV_MAJOR 28 31451078Speterstatic struct cdevsw sio_cdevsw = { 31551078Speter /* open */ sioopen, 31651078Speter /* close */ sioclose, 31751078Speter /* read */ sioread, 31851078Speter /* write */ siowrite, 31951078Speter /* ioctl */ sioioctl, 32051654Sphk /* poll */ ttypoll, 32151078Speter /* mmap */ nommap, 32251078Speter /* strategy */ nostrategy, 32385365Simp /* name */ sio_driver_name, 32451078Speter /* maj */ CDEV_MAJOR, 32551078Speter /* dump */ nodump, 32651078Speter /* psize */ nopsize, 32772521Sjlemon /* flags */ D_TTY | D_KQFILTER, 32872521Sjlemon /* kqfilter */ ttykqfilter, 32951078Speter}; 33051078Speter 33151078Speterint comconsole = -1; 33251078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 33389986Sjhaystatic u_long comdefaultrclk = DEFAULT_RCLK; 33489986SjhaySYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 33598401Sn_hibmastatic speed_t gdbdefaultrate = GDBSPEED; 33698401Sn_hibmaSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 33798401Sn_hibma &gdbdefaultrate, GDBSPEED, ""); 33851078Speterstatic u_int com_events; /* input chars + weighted output completions */ 33951078Speterstatic Port_t siocniobase; 34098401Sn_hibmastatic int siocnunit = -1; 34151078Speterstatic Port_t siogdbiobase; 34251078Speterstatic int siogdbunit = -1; 34372238Sjhbstatic void *sio_slow_ih; 34472238Sjhbstatic void *sio_fast_ih; 34551078Speterstatic int sio_timeout; 34651078Speterstatic int sio_timeouts_until_log; 34751078Speterstatic struct callout_handle sio_timeout_handle 34851078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 34953344Speterstatic int sio_numunits; 35051078Speter 35151078Speter#ifdef COM_ESP 35251078Speter/* XXX configure this properly. */ 35386909Simp/* XXX quite broken for new-bus. */ 35451078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 35551078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 35651078Speter#endif 35751078Speter 35851078Speter/* 35951078Speter * handle sysctl read/write requests for console speed 36051078Speter * 36151078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 36251078Speter * also set the initial and lock values for the /dev/ttyXX device 36351078Speter * if there is one associated with the console. Finally, if the /dev/tty 36451078Speter * device has already been open, change the speed on the open running port 36551078Speter * itself. 36651078Speter */ 36751078Speter 36851078Speterstatic int 36962573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 37051078Speter{ 37151078Speter int error, s; 37251078Speter speed_t newspeed; 37351078Speter struct com_s *com; 37451078Speter struct tty *tp; 37551078Speter 37651078Speter newspeed = comdefaultrate; 37751078Speter 37851078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 37951078Speter if (error || !req->newptr) 38051078Speter return (error); 38151078Speter 38251078Speter comdefaultrate = newspeed; 38351078Speter 38451078Speter if (comconsole < 0) /* serial console not selected? */ 38551078Speter return (0); 38651078Speter 38751078Speter com = com_addr(comconsole); 38857915Simp if (com == NULL) 38951078Speter return (ENXIO); 39051078Speter 39151078Speter /* 39251078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 39351078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 39451078Speter * speed changes) 39551078Speter */ 39651078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 39751078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 39851078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 39951078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 40051078Speter 40151078Speter /* 40251078Speter * if we're open, change the running rate too 40351078Speter */ 40451078Speter tp = com->tp; 40551078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 40651078Speter tp->t_termios.c_ispeed = 40751078Speter tp->t_termios.c_ospeed = comdefaultrate; 40851078Speter s = spltty(); 40951078Speter error = comparam(tp, &tp->t_termios); 41051078Speter splx(s); 41151078Speter } 41251078Speter return error; 41351078Speter} 41451078Speter 41551078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 41651078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 41791280Simp/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 41851078Speter 41986909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 42086909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 42186909Simp 42286909Simp/* 42386909Simp * Unload the driver and clear the table. 42486909Simp * XXX this is mostly wrong. 42586909Simp * XXX TODO: 42686909Simp * This is usually called when the card is ejected, but 42786909Simp * can be caused by a modunload of a controller driver. 42886909Simp * The idea is to reset the driver's view of the device 42986909Simp * and ensure that any driver entry points such as 43086909Simp * read and write do not hang. 43186909Simp */ 43285365Simpint 43385365Simpsiodetach(dev) 43452471Simp device_t dev; 43551078Speter{ 43651078Speter struct com_s *com; 43765131Sphk int i; 43851078Speter 43952471Simp com = (struct com_s *) device_get_softc(dev); 44057915Simp if (com == NULL) { 44152471Simp device_printf(dev, "NULL com in siounload\n"); 44254386Simp return (0); 44351078Speter } 44454386Simp com->gone = 1; 44565131Sphk for (i = 0 ; i < 6; i++) 44665131Sphk destroy_dev(com->devs[i]); 44754386Simp if (com->irqres) { 44854386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 44954386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 45054386Simp } 45154386Simp if (com->ioportres) 45254386Simp bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres); 45351078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 45457915Simp device_printf(dev, "still open, forcing close\n"); 45577750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 45651078Speter com->tp->t_gen++; 45751078Speter ttyclose(com->tp); 45851078Speter ttwakeup(com->tp); 45951078Speter ttwwakeup(com->tp); 46051078Speter } else { 46151078Speter if (com->ibuf != NULL) 46251078Speter free(com->ibuf, M_DEVBUF); 46386909Simp device_set_softc(dev, NULL); 46486909Simp free(com, M_DEVBUF); 46551078Speter } 46653978Simp return (0); 46751078Speter} 46851078Speter 46985365Simpint 47089986Sjhaysioprobe(dev, xrid, rclk, noprobe) 47158885Simp device_t dev; 47258885Simp int xrid; 47389986Sjhay u_long rclk; 47485365Simp int noprobe; 47551078Speter{ 47653344Speter#if 0 47751078Speter static bool_t already_init; 47853344Speter device_t xdev; 47953344Speter#endif 48060471Snyan struct com_s *com; 48189986Sjhay u_int divisor; 48251078Speter bool_t failures[10]; 48351078Speter int fn; 48451078Speter device_t idev; 48551078Speter Port_t iobase; 48651078Speter intrmask_t irqmap[4]; 48751078Speter intrmask_t irqs; 48851078Speter u_char mcr_image; 48951078Speter int result; 49054206Speter u_long xirq; 49151088Speter u_int flags = device_get_flags(dev); 49251078Speter int rid; 49351078Speter struct resource *port; 49451078Speter 49558885Simp rid = xrid; 49651078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 49751078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 49851078Speter if (!port) 49957915Simp return (ENXIO); 50051078Speter 50186909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 50286909Simp if (com == NULL) 50386909Simp return (ENOMEM); 50486909Simp device_set_softc(dev, com); 50560471Snyan com->bst = rman_get_bustag(port); 50660471Snyan com->bsh = rman_get_bushandle(port); 50789986Sjhay if (rclk == 0) 50889986Sjhay rclk = DEFAULT_RCLK; 50989986Sjhay com->rclk = rclk; 51060471Snyan 51185209Sjhb while (sio_inited != 2) 51285209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 51393818Sjhb mtx_init(&sio_lock, sio_driver_name, NULL, 51493818Sjhb (comconsole != -1) ? 51585209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 51685209Sjhb atomic_store_rel_int(&sio_inited, 2); 51785209Sjhb } 51870174Sjhb 51953344Speter#if 0 52053344Speter /* 52153344Speter * XXX this is broken - when we are first called, there are no 52253344Speter * previously configured IO ports. We could hard code 52353344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 52453344Speter * This code has been doing nothing since the conversion since 52553344Speter * "count" is zero the first time around. 52653344Speter */ 52751078Speter if (!already_init) { 52851078Speter /* 52951078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 53051078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 53151078Speter * from any used port that shares the interrupt vector. 53251078Speter * XXX the gate enable is elsewhere for some multiports. 53351078Speter */ 53451078Speter device_t *devs; 53553344Speter int count, i, xioport; 53651078Speter 53751078Speter devclass_get_devices(sio_devclass, &devs, &count); 53851078Speter for (i = 0; i < count; i++) { 53951078Speter xdev = devs[i]; 54054194Speter if (device_is_enabled(xdev) && 54154194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 54254194Speter NULL) == 0) 54353344Speter outb(xioport + com_mcr, 0); 54451078Speter } 54551078Speter free(devs, M_TEMP); 54651078Speter already_init = TRUE; 54751078Speter } 54853344Speter#endif 54951078Speter 55051078Speter if (COM_LLCONSOLE(flags)) { 55151078Speter printf("sio%d: reserved for low-level i/o\n", 55251078Speter device_get_unit(dev)); 55356788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 55486909Simp device_set_softc(dev, NULL); 55586909Simp free(com, M_DEVBUF); 55651078Speter return (ENXIO); 55751078Speter } 55851078Speter 55951078Speter /* 56051078Speter * If the device is on a multiport card and has an AST/4 56151078Speter * compatible interrupt control register, initialize this 56251078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 56351078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 56451078Speter * Point idev to the device struct giving the correct id_irq. 56551078Speter * This is the struct for the master device if there is one. 56651078Speter */ 56751078Speter idev = dev; 56851078Speter mcr_image = MCR_IENABLE; 56951078Speter#ifdef COM_MULTIPORT 57057234Sbde if (COM_ISMULTIPORT(flags)) { 57154206Speter Port_t xiobase; 57254206Speter u_long io; 57354206Speter 57451078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 57551078Speter if (idev == NULL) { 57651078Speter printf("sio%d: master device %d not configured\n", 57751078Speter device_get_unit(dev), COM_MPMASTER(flags)); 57851078Speter idev = dev; 57951078Speter } 58057234Sbde if (!COM_NOTAST4(flags)) { 58157234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 58257234Sbde NULL) == 0) { 58357234Sbde xiobase = io; 58457234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 58557234Sbde NULL, NULL) == 0) 58657234Sbde outb(xiobase + com_scr, 0x80); 58757234Sbde else 58857234Sbde outb(xiobase + com_scr, 0); 58957234Sbde } 59057234Sbde mcr_image = 0; 59151078Speter } 59251078Speter } 59351078Speter#endif /* COM_MULTIPORT */ 59454194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 59551078Speter mcr_image = 0; 59651078Speter 59751078Speter bzero(failures, sizeof failures); 59851078Speter iobase = rman_get_start(port); 59951078Speter 60051078Speter /* 60151078Speter * We don't want to get actual interrupts, just masked ones. 60251078Speter * Interrupts from this line should already be masked in the ICU, 60351078Speter * but mask them in the processor as well in case there are some 60451078Speter * (misconfigured) shared interrupts. 60551078Speter */ 60672200Sbmilekic mtx_lock_spin(&sio_lock); 60751078Speter/* EXTRA DELAY? */ 60851078Speter 60951078Speter /* 61051078Speter * Initialize the speed and the word size and wait long enough to 61151078Speter * drain the maximum of 16 bytes of junk in device output queues. 61251078Speter * The speed is undefined after a master reset and must be set 61351078Speter * before relying on anything related to output. There may be 61451078Speter * junk after a (very fast) soft reboot and (apparently) after 61551078Speter * master reset. 61651078Speter * XXX what about the UART bug avoided by waiting in comparam()? 61751078Speter * We don't want to to wait long enough to drain at 2 bps. 61851078Speter */ 61951078Speter if (iobase == siocniobase) 62051078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 62151078Speter else { 62260471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 62389986Sjhay divisor = siodivisor(rclk, SIO_TEST_SPEED); 62489986Sjhay sio_setreg(com, com_dlbl, divisor & 0xff); 62589986Sjhay sio_setreg(com, com_dlbh, divisor >> 8); 62660471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 62751078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 62851078Speter } 62951078Speter 63051078Speter /* 63151078Speter * Enable the interrupt gate and disable device interupts. This 63251078Speter * should leave the device driving the interrupt line low and 63351078Speter * guarantee an edge trigger if an interrupt can be generated. 63451078Speter */ 63551078Speter/* EXTRA DELAY? */ 63660471Snyan sio_setreg(com, com_mcr, mcr_image); 63760471Snyan sio_setreg(com, com_ier, 0); 63851078Speter DELAY(1000); /* XXX */ 63951078Speter irqmap[0] = isa_irq_pending(); 64051078Speter 64151078Speter /* 64251078Speter * Attempt to set loopback mode so that we can send a null byte 64351078Speter * without annoying any external device. 64451078Speter */ 64551078Speter/* EXTRA DELAY? */ 64660471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 64751078Speter 64851078Speter /* 64951078Speter * Attempt to generate an output interrupt. On 8250's, setting 65051078Speter * IER_ETXRDY generates an interrupt independent of the current 65151078Speter * setting and independent of whether the THR is empty. On 16450's, 65251078Speter * setting IER_ETXRDY generates an interrupt independent of the 65351078Speter * current setting. On 16550A's, setting IER_ETXRDY only 65451078Speter * generates an interrupt when IER_ETXRDY is not already set. 65551078Speter */ 65660471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 65751078Speter 65851078Speter /* 65951078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 66051078Speter * an interrupt. They'd better generate one for actually doing 66151078Speter * output. Loopback may be broken on the same incompatibles but 66251078Speter * it's unlikely to do more than allow the null byte out. 66351078Speter */ 66460471Snyan sio_setreg(com, com_data, 0); 66551078Speter DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 66651078Speter 66751078Speter /* 66851078Speter * Turn off loopback mode so that the interrupt gate works again 66951078Speter * (MCR_IENABLE was hidden). This should leave the device driving 67051078Speter * an interrupt line high. It doesn't matter if the interrupt 67151078Speter * line oscillates while we are not looking at it, since interrupts 67251078Speter * are disabled. 67351078Speter */ 67451078Speter/* EXTRA DELAY? */ 67560471Snyan sio_setreg(com, com_mcr, mcr_image); 67692401Simp 67792401Simp /* 67892401Simp * It seems my Xircom CBEM56G Cardbus modem wants to be reset 67992401Simp * to 8 bits *again*, or else probe test 0 will fail. 68092401Simp * gwk@sgi.com, 4/19/2001 68192401Simp */ 68292401Simp sio_setreg(com, com_cfcr, CFCR_8BITS); 68351078Speter 68451078Speter /* 68552471Simp * Some pcmcia cards have the "TXRDY bug", so we check everyone 68651078Speter * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 68751078Speter */ 68885365Simp if (noprobe) { 68953370Speter /* Reading IIR register twice */ 69053370Speter for (fn = 0; fn < 2; fn ++) { 69153370Speter DELAY(10000); 69260471Snyan failures[6] = sio_getreg(com, com_iir); 69353370Speter } 69453370Speter /* Check IIR_TXRDY clear ? */ 69553370Speter result = 0; 69653370Speter if (failures[6] & IIR_TXRDY) { 69792401Simp /* No, Double check with clearing IER */ 69860471Snyan sio_setreg(com, com_ier, 0); 69960471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 70092401Simp /* Ok. We discovered TXRDY bug! */ 70153370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 70253370Speter } else { 70353370Speter /* Unknown, Just omit this chip.. XXX */ 70453370Speter result = ENXIO; 70581793Simp sio_setreg(com, com_mcr, 0); 70653370Speter } 70751078Speter } else { 70853370Speter /* OK. this is well-known guys */ 70953370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 71051078Speter } 71181793Simp sio_setreg(com, com_ier, 0); 71260471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 71372200Sbmilekic mtx_unlock_spin(&sio_lock); 71453344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 71586909Simp if (iobase == siocniobase) 71686909Simp result = 0; 71786909Simp if (result != 0) { 71886909Simp device_set_softc(dev, NULL); 71986909Simp free(com, M_DEVBUF); 72086909Simp } 72186909Simp return (result); 72253344Speter } 72353344Speter 72451078Speter /* 72551078Speter * Check that 72651078Speter * o the CFCR, IER and MCR in UART hold the values written to them 72751078Speter * (the values happen to be all distinct - this is good for 72851078Speter * avoiding false positive tests from bus echoes). 72951078Speter * o an output interrupt is generated and its vector is correct. 73051078Speter * o the interrupt goes away when the IIR in the UART is read. 73151078Speter */ 73251078Speter/* EXTRA DELAY? */ 73360471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 73460471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 73560471Snyan failures[2] = sio_getreg(com, com_mcr) - mcr_image; 73651078Speter DELAY(10000); /* Some internal modems need this time */ 73751078Speter irqmap[1] = isa_irq_pending(); 73860471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 73951078Speter DELAY(1000); /* XXX */ 74051078Speter irqmap[2] = isa_irq_pending(); 74160471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 74251078Speter 74351078Speter /* 74451078Speter * Turn off all device interrupts and check that they go off properly. 74551078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 74651078Speter * the OUT2 output of the UART to 74751078Speter * the ICU input. Closing the gate would give a floating ICU input 74851078Speter * (unless there is another device driving it) and spurious interrupts. 74951078Speter * (On the system that this was first tested on, the input floats high 75051078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 75151078Speter */ 75260471Snyan sio_setreg(com, com_ier, 0); 75360471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 75460471Snyan failures[7] = sio_getreg(com, com_ier); 75551078Speter DELAY(1000); /* XXX */ 75651078Speter irqmap[3] = isa_irq_pending(); 75760471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 75851078Speter 75972200Sbmilekic mtx_unlock_spin(&sio_lock); 76051078Speter 76151078Speter irqs = irqmap[1] & ~irqmap[0]; 76254194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 76389463Simp ((1 << xirq) & irqs) == 0) { 76451078Speter printf( 76554206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 76653344Speter device_get_unit(dev), xirq, irqs); 76789447Sbmah printf( 76889470Sbmah "sio%d: port may not be enabled\n", 76989447Sbmah device_get_unit(dev)); 77089463Simp } 77151078Speter if (bootverbose) 77251078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 77351078Speter device_get_unit(dev), 77451078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 77551078Speter 77651078Speter result = 0; 77751078Speter for (fn = 0; fn < sizeof failures; ++fn) 77851078Speter if (failures[fn]) { 77960471Snyan sio_setreg(com, com_mcr, 0); 78051078Speter result = ENXIO; 78151078Speter if (bootverbose) { 78251078Speter printf("sio%d: probe failed test(s):", 78351078Speter device_get_unit(dev)); 78451078Speter for (fn = 0; fn < sizeof failures; ++fn) 78551078Speter if (failures[fn]) 78651078Speter printf(" %d", fn); 78751078Speter printf("\n"); 78851078Speter } 78951078Speter break; 79051078Speter } 79151078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 79286909Simp if (iobase == siocniobase) 79386909Simp result = 0; 79486909Simp if (result != 0) { 79586909Simp device_set_softc(dev, NULL); 79686909Simp free(com, M_DEVBUF); 79786909Simp } 79886909Simp return (result); 79951078Speter} 80051078Speter 80151078Speter#ifdef COM_ESP 80251078Speterstatic int 80351078Speterespattach(com, esp_port) 80451078Speter struct com_s *com; 80551078Speter Port_t esp_port; 80651078Speter{ 80751078Speter u_char dips; 80851078Speter u_char val; 80951078Speter 81051078Speter /* 81151078Speter * Check the ESP-specific I/O port to see if we're an ESP 81251078Speter * card. If not, return failure immediately. 81351078Speter */ 81451078Speter if ((inb(esp_port) & 0xf3) == 0) { 81551078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 81651078Speter return (0); 81751078Speter } 81851078Speter 81951078Speter /* 82051078Speter * We've got something that claims to be a Hayes ESP card. 82151078Speter * Let's hope so. 82251078Speter */ 82351078Speter 82451078Speter /* Get the dip-switch configuration */ 82551078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 82651078Speter dips = inb(esp_port + ESP_STATUS1); 82751078Speter 82851078Speter /* 82951078Speter * Bits 0,1 of dips say which COM port we are. 83051078Speter */ 83160471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 83251078Speter printf(" : ESP"); 83351078Speter else { 83451078Speter printf(" esp_port has com %d\n", dips & 0x03); 83551078Speter return (0); 83651078Speter } 83751078Speter 83851078Speter /* 83951078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 84051078Speter */ 84151078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 84251078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 84351078Speter val = inb(esp_port + ESP_STATUS2); 84451078Speter if ((val & 0x70) < 0x20) { 84551078Speter printf("-old (%o)", val & 0x70); 84651078Speter return (0); 84751078Speter } 84851078Speter 84951078Speter /* 85051078Speter * Check for ability to emulate 16550: bit 7 == 1 85151078Speter */ 85251078Speter if ((dips & 0x80) == 0) { 85351078Speter printf(" slave"); 85451078Speter return (0); 85551078Speter } 85651078Speter 85751078Speter /* 85851078Speter * Okay, we seem to be a Hayes ESP card. Whee. 85951078Speter */ 86051078Speter com->esp = TRUE; 86151078Speter com->esp_port = esp_port; 86251078Speter return (1); 86351078Speter} 86451078Speter#endif /* COM_ESP */ 86551078Speter 86685365Simpint 86789986Sjhaysioattach(dev, xrid, rclk) 86851078Speter device_t dev; 86958885Simp int xrid; 87089986Sjhay u_long rclk; 87151078Speter{ 87251078Speter struct com_s *com; 87351078Speter#ifdef COM_ESP 87451078Speter Port_t *espp; 87551078Speter#endif 87651078Speter Port_t iobase; 87793470Sbde int minorbase; 87851078Speter int unit; 87953344Speter u_int flags; 88051078Speter int rid; 88151078Speter struct resource *port; 88253344Speter int ret; 88351078Speter 88458885Simp rid = xrid; 88551078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 88651078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 88751078Speter if (!port) 88857915Simp return (ENXIO); 88951078Speter 89051078Speter iobase = rman_get_start(port); 89151078Speter unit = device_get_unit(dev); 89251078Speter com = device_get_softc(dev); 89353344Speter flags = device_get_flags(dev); 89451078Speter 89553344Speter if (unit >= sio_numunits) 89653344Speter sio_numunits = unit + 1; 89751078Speter /* 89851078Speter * sioprobe() has initialized the device registers as follows: 89951078Speter * o cfcr = CFCR_8BITS. 90051078Speter * It is most important that CFCR_DLAB is off, so that the 90151078Speter * data port is not hidden when we enable interrupts. 90251078Speter * o ier = 0. 90351078Speter * Interrupts are only enabled when the line is open. 90451078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 90551078Speter * interrupt control register or the config specifies no irq. 90651078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 90751078Speter * device from sending before we are ready. 90851078Speter */ 90951078Speter bzero(com, sizeof *com); 91051078Speter com->unit = unit; 91151078Speter com->ioportres = port; 91260471Snyan com->bst = rman_get_bustag(port); 91360471Snyan com->bsh = rman_get_bushandle(port); 91451078Speter com->cfcr_image = CFCR_8BITS; 91551078Speter com->dtr_wait = 3 * hz; 91651078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 91757234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 91851078Speter com->tx_fifo_size = 1; 91951078Speter com->obufs[0].l_head = com->obuf1; 92051078Speter com->obufs[1].l_head = com->obuf2; 92151078Speter 92251078Speter com->data_port = iobase + com_data; 92351078Speter com->int_id_port = iobase + com_iir; 92451078Speter com->modem_ctl_port = iobase + com_mcr; 92551078Speter com->mcr_image = inb(com->modem_ctl_port); 92651078Speter com->line_status_port = iobase + com_lsr; 92751078Speter com->modem_status_port = iobase + com_msr; 92851078Speter com->intr_ctl_port = iobase + com_ier; 92951078Speter 93089986Sjhay if (rclk == 0) 93189986Sjhay rclk = DEFAULT_RCLK; 93289986Sjhay com->rclk = rclk; 93389986Sjhay 93451078Speter /* 93551078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 93651078Speter * are only relevant for logins. It's important to have echo off 93751078Speter * initially so that the line doesn't start blathering before the 93851078Speter * echo flag can be turned off. 93951078Speter */ 94051078Speter com->it_in.c_iflag = 0; 94151078Speter com->it_in.c_oflag = 0; 94251078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 94351078Speter com->it_in.c_lflag = 0; 94451078Speter if (unit == comconsole) { 94551078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 94651078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 94751078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 94851078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 94951078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 95051078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 95151078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 95251078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 95351078Speter } else 95451078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 95565605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 95672200Sbmilekic mtx_unlock_spin(&sio_lock); 95756788Sbde /* 95856788Sbde * Leave i/o resources allocated if this is a `cn'-level 95956788Sbde * console, so that other devices can't snarf them. 96056788Sbde */ 96156788Sbde if (iobase != siocniobase) 96256788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 96356788Sbde return (ENOMEM); 96451078Speter } 96572200Sbmilekic mtx_unlock_spin(&sio_lock); 96651078Speter termioschars(&com->it_in); 96751078Speter com->it_out = com->it_in; 96851078Speter 96951078Speter /* attempt to determine UART type */ 97051078Speter printf("sio%d: type", unit); 97151078Speter 97251078Speter 97351078Speter#ifdef COM_MULTIPORT 97451078Speter if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 97551078Speter#else 97651078Speter if (!COM_IIR_TXRDYBUG(flags)) 97751078Speter#endif 97851078Speter { 97951078Speter u_char scr; 98051078Speter u_char scr1; 98151078Speter u_char scr2; 98251078Speter 98360471Snyan scr = sio_getreg(com, com_scr); 98460471Snyan sio_setreg(com, com_scr, 0xa5); 98560471Snyan scr1 = sio_getreg(com, com_scr); 98660471Snyan sio_setreg(com, com_scr, 0x5a); 98760471Snyan scr2 = sio_getreg(com, com_scr); 98860471Snyan sio_setreg(com, com_scr, scr); 98951078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 99089447Sbmah printf(" 8250 or not responding"); 99151078Speter goto determined_type; 99251078Speter } 99351078Speter } 99460471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 99551078Speter DELAY(100); 99651078Speter com->st16650a = 0; 99751078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 99851078Speter case FIFO_RX_LOW: 99951078Speter printf(" 16450"); 100051078Speter break; 100151078Speter case FIFO_RX_MEDL: 100251078Speter printf(" 16450?"); 100351078Speter break; 100451078Speter case FIFO_RX_MEDH: 100551078Speter printf(" 16550?"); 100651078Speter break; 100751078Speter case FIFO_RX_HIGH: 100851078Speter if (COM_NOFIFO(flags)) { 100951078Speter printf(" 16550A fifo disabled"); 101051078Speter } else { 101151078Speter com->hasfifo = TRUE; 101251078Speter if (COM_ST16650A(flags)) { 101351078Speter com->st16650a = 1; 101451078Speter com->tx_fifo_size = 32; 101551078Speter printf(" ST16650A"); 101651078Speter } else { 101751078Speter com->tx_fifo_size = COM_FIFOSIZE(flags); 101851078Speter printf(" 16550A"); 101951078Speter } 102051078Speter } 102151078Speter#ifdef COM_ESP 102251078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 102351078Speter if (espattach(com, *espp)) { 102451078Speter com->tx_fifo_size = 1024; 102551078Speter break; 102651078Speter } 102751078Speter#endif 102851078Speter if (!com->st16650a) { 102951078Speter if (!com->tx_fifo_size) 103051078Speter com->tx_fifo_size = 16; 103151078Speter else 103251078Speter printf(" lookalike with %d bytes FIFO", 103351078Speter com->tx_fifo_size); 103451078Speter } 103551078Speter 103651078Speter break; 103751078Speter } 103851078Speter 103951078Speter#ifdef COM_ESP 104051078Speter if (com->esp) { 104151078Speter /* 104251078Speter * Set 16550 compatibility mode. 104351078Speter * We don't use the ESP_MODE_SCALE bit to increase the 104451078Speter * fifo trigger levels because we can't handle large 104551078Speter * bursts of input. 104651078Speter * XXX flow control should be set in comparam(), not here. 104751078Speter */ 104851078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 104951078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 105051078Speter 105151078Speter /* Set RTS/CTS flow control. */ 105251078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 105351078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 105451078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 105551078Speter 105651078Speter /* Set flow-control levels. */ 105751078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 105851078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 105951078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 106051078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 106151078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 106251078Speter } 106351078Speter#endif /* COM_ESP */ 106460471Snyan sio_setreg(com, com_fifo, 0); 106551078Speterdetermined_type: ; 106651078Speter 106751078Speter#ifdef COM_MULTIPORT 106851078Speter if (COM_ISMULTIPORT(flags)) { 106953344Speter device_t masterdev; 107053344Speter 107151078Speter com->multiport = TRUE; 107251078Speter printf(" (multiport"); 107351078Speter if (unit == COM_MPMASTER(flags)) 107451078Speter printf(" master"); 107551078Speter printf(")"); 107653344Speter masterdev = devclass_get_device(sio_devclass, 107753344Speter COM_MPMASTER(flags)); 107857234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 107957234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 108051078Speter } 108151078Speter#endif /* COM_MULTIPORT */ 108251078Speter if (unit == comconsole) 108351078Speter printf(", console"); 108453344Speter if (COM_IIR_TXRDYBUG(flags)) 108551078Speter printf(" with a bogus IIR_TXRDY register"); 108651078Speter printf("\n"); 108751078Speter 108867551Sjhb if (sio_fast_ih == NULL) { 108972238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 109072238Sjhb &sio_fast_ih); 109172238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 109272238Sjhb &sio_slow_ih); 109351078Speter } 109493470Sbde minorbase = UNIT_TO_MINOR(unit); 109593470Sbde com->devs[0] = make_dev(&sio_cdevsw, minorbase, 109651078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 109793470Sbde com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 109851078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 109993470Sbde com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 110051078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 110193470Sbde com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 110251078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 110365131Sphk com->devs[4] = make_dev(&sio_cdevsw, 110493470Sbde minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 110551078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 110665131Sphk com->devs[5] = make_dev(&sio_cdevsw, 110793470Sbde minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 110851078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 110951078Speter com->flags = flags; 111051078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 111151078Speter pps_init(&com->pps); 111251078Speter 111351078Speter rid = 0; 111451078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 111553344Speter RF_ACTIVE); 111653344Speter if (com->irqres) { 111753344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 111865557Sjasone INTR_TYPE_TTY | INTR_FAST, 111954386Simp siointr, com, &com->cookie); 112054194Speter if (ret) { 112154194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 112254194Speter com->irqres, INTR_TYPE_TTY, 112354386Simp siointr, com, &com->cookie); 112454194Speter if (ret == 0) 112583246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 112654194Speter } 112753344Speter if (ret) 112853344Speter device_printf(dev, "could not activate interrupt\n"); 112978504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 113078504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 113178504Siedowse /* 113278504Siedowse * Enable interrupts for early break-to-debugger support 113378504Siedowse * on the console. 113478504Siedowse */ 113578504Siedowse if (ret == 0 && unit == comconsole) 113678504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 113778504Siedowse IER_EMSC); 113878504Siedowse#endif 113953344Speter } 114051078Speter 114151078Speter return (0); 114251078Speter} 114351078Speter 114451078Speterstatic int 114583366Sjuliansioopen(dev, flag, mode, td) 114651078Speter dev_t dev; 114751078Speter int flag; 114851078Speter int mode; 114983366Sjulian struct thread *td; 115051078Speter{ 115151078Speter struct com_s *com; 115251078Speter int error; 115351078Speter int mynor; 115451078Speter int s; 115551078Speter struct tty *tp; 115651078Speter int unit; 115751078Speter 115851078Speter mynor = minor(dev); 115951078Speter unit = MINOR_TO_UNIT(mynor); 116053344Speter com = com_addr(unit); 116153344Speter if (com == NULL) 116251078Speter return (ENXIO); 116351078Speter if (com->gone) 116451078Speter return (ENXIO); 116551078Speter if (mynor & CONTROL_MASK) 116651078Speter return (0); 116751078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 116851078Speter s = spltty(); 116951078Speter /* 117051078Speter * We jump to this label after all non-interrupted sleeps to pick 117151078Speter * up any changes of the device state. 117251078Speter */ 117351078Speteropen_top: 117451078Speter while (com->state & CS_DTR_OFF) { 117551078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 117651078Speter if (com_addr(unit) == NULL) 117751078Speter return (ENXIO); 117851078Speter if (error != 0 || com->gone) 117951078Speter goto out; 118051078Speter } 118151078Speter if (tp->t_state & TS_ISOPEN) { 118251078Speter /* 118351078Speter * The device is open, so everything has been initialized. 118451078Speter * Handle conflicts. 118551078Speter */ 118651078Speter if (mynor & CALLOUT_MASK) { 118751078Speter if (!com->active_out) { 118851078Speter error = EBUSY; 118951078Speter goto out; 119051078Speter } 119151078Speter } else { 119251078Speter if (com->active_out) { 119351078Speter if (flag & O_NONBLOCK) { 119451078Speter error = EBUSY; 119551078Speter goto out; 119651078Speter } 119751078Speter error = tsleep(&com->active_out, 119851078Speter TTIPRI | PCATCH, "siobi", 0); 119951078Speter if (com_addr(unit) == NULL) 120051078Speter return (ENXIO); 120151078Speter if (error != 0 || com->gone) 120251078Speter goto out; 120351078Speter goto open_top; 120451078Speter } 120551078Speter } 120651078Speter if (tp->t_state & TS_XCLUDE && 120793593Sjhb suser(td)) { 120851078Speter error = EBUSY; 120951078Speter goto out; 121051078Speter } 121151078Speter } else { 121251078Speter /* 121351078Speter * The device isn't open, so there are no conflicts. 121451078Speter * Initialize it. Initialization is done twice in many 121551078Speter * cases: to preempt sleeping callin opens if we are 121651078Speter * callout, and to complete a callin open after DCD rises. 121751078Speter */ 121851078Speter tp->t_oproc = comstart; 121951078Speter tp->t_param = comparam; 122051654Sphk tp->t_stop = comstop; 122151078Speter tp->t_dev = dev; 122251078Speter tp->t_termios = mynor & CALLOUT_MASK 122351078Speter ? com->it_out : com->it_in; 122451078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 122551078Speter com->poll = com->no_irq; 122651078Speter com->poll_output = com->loses_outints; 122751078Speter ++com->wopeners; 122851078Speter error = comparam(tp, &tp->t_termios); 122951078Speter --com->wopeners; 123051078Speter if (error != 0) 123151078Speter goto out; 123251078Speter /* 123351078Speter * XXX we should goto open_top if comparam() slept. 123451078Speter */ 123551078Speter if (com->hasfifo) { 1236102542Sphk int i; 123751078Speter /* 123851078Speter * (Re)enable and drain fifos. 123951078Speter * 124051078Speter * Certain SMC chips cause problems if the fifos 124151078Speter * are enabled while input is ready. Turn off the 124251078Speter * fifo if necessary to clear the input. We test 124351078Speter * the input ready bit after enabling the fifos 124451078Speter * since we've already enabled them in comparam() 124551078Speter * and to handle races between enabling and fresh 124651078Speter * input. 124751078Speter */ 1248102542Sphk for (i = 0; i < 500; i++) { 124960471Snyan sio_setreg(com, com_fifo, 125060471Snyan FIFO_RCV_RST | FIFO_XMT_RST 125160471Snyan | com->fifo_image); 125251078Speter /* 125351078Speter * XXX the delays are for superstitious 125451078Speter * historical reasons. It must be less than 125551078Speter * the character time at the maximum 125651078Speter * supported speed (87 usec at 115200 bps 125751078Speter * 8N1). Otherwise we might loop endlessly 125851078Speter * if data is streaming in. We used to use 125951078Speter * delays of 100. That usually worked 126051078Speter * because DELAY(100) used to usually delay 126151078Speter * for about 85 usec instead of 100. 126251078Speter */ 126351078Speter DELAY(50); 126451078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 126551078Speter break; 126660471Snyan sio_setreg(com, com_fifo, 0); 126751078Speter DELAY(50); 126851078Speter (void) inb(com->data_port); 126951078Speter } 1270102542Sphk if (i == 500) { 1271102542Sphk error = EIO; 1272102542Sphk goto out; 1273102542Sphk } 127451078Speter } 127551078Speter 127672200Sbmilekic mtx_lock_spin(&sio_lock); 127751078Speter (void) inb(com->line_status_port); 127851078Speter (void) inb(com->data_port); 127951078Speter com->prev_modem_status = com->last_modem_status 128051078Speter = inb(com->modem_status_port); 128151078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 128251078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 128351078Speter | IER_EMSC); 128451078Speter } else { 128551078Speter outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 128651078Speter | IER_ERLS | IER_EMSC); 128751078Speter } 128872200Sbmilekic mtx_unlock_spin(&sio_lock); 128951078Speter /* 129051078Speter * Handle initial DCD. Callout devices get a fake initial 129151078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 129251078Speter * callin opens get woken up and resume sleeping on "siobi" 129351078Speter * instead of "siodcd". 129451078Speter */ 129551078Speter /* 129651078Speter * XXX `mynor & CALLOUT_MASK' should be 129751078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 129851078Speter * TRAPDOOR_CARRIER is the default initial state for callout 129951078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 130051078Speter * the true carrier. 130151078Speter */ 130251078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 130351078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 130451078Speter } 130551078Speter /* 130651078Speter * Wait for DCD if necessary. 130751078Speter */ 130851078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 130951078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 131051078Speter ++com->wopeners; 131151078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 131251078Speter if (com_addr(unit) == NULL) 131351078Speter return (ENXIO); 131451078Speter --com->wopeners; 131551078Speter if (error != 0 || com->gone) 131651078Speter goto out; 131751078Speter goto open_top; 131851078Speter } 131951078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 132051078Speter disc_optim(tp, &tp->t_termios, com); 132151078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 132251078Speter com->active_out = TRUE; 132351078Speter siosettimeout(); 132451078Speterout: 132551078Speter splx(s); 132651078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 132751078Speter comhardclose(com); 132851078Speter return (error); 132951078Speter} 133051078Speter 133151078Speterstatic int 133283366Sjuliansioclose(dev, flag, mode, td) 133351078Speter dev_t dev; 133451078Speter int flag; 133551078Speter int mode; 133683366Sjulian struct thread *td; 133751078Speter{ 133851078Speter struct com_s *com; 133951078Speter int mynor; 134051078Speter int s; 134151078Speter struct tty *tp; 134251078Speter 134351078Speter mynor = minor(dev); 134451078Speter if (mynor & CONTROL_MASK) 134551078Speter return (0); 134651078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 134757915Simp if (com == NULL) 134857915Simp return (ENODEV); 134951078Speter tp = com->tp; 135051078Speter s = spltty(); 135151078Speter (*linesw[tp->t_line].l_close)(tp, flag); 135251078Speter disc_optim(tp, &tp->t_termios, com); 135351654Sphk comstop(tp, FREAD | FWRITE); 135451078Speter comhardclose(com); 135551078Speter ttyclose(tp); 135651078Speter siosettimeout(); 135751078Speter splx(s); 135851078Speter if (com->gone) { 135951078Speter printf("sio%d: gone\n", com->unit); 136051078Speter s = spltty(); 136151078Speter if (com->ibuf != NULL) 136251078Speter free(com->ibuf, M_DEVBUF); 136351078Speter bzero(tp, sizeof *tp); 136451078Speter splx(s); 136551078Speter } 136651078Speter return (0); 136751078Speter} 136851078Speter 136951078Speterstatic void 137051078Spetercomhardclose(com) 137151078Speter struct com_s *com; 137251078Speter{ 137351078Speter int s; 137451078Speter struct tty *tp; 137551078Speter int unit; 137651078Speter 137751078Speter unit = com->unit; 137851078Speter s = spltty(); 137951078Speter com->poll = FALSE; 138051078Speter com->poll_output = FALSE; 138151078Speter com->do_timestamp = FALSE; 138251078Speter com->do_dcd_timestamp = FALSE; 138351078Speter com->pps.ppsparam.mode = 0; 138460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 138578504Siedowse tp = com->tp; 138678504Siedowse 138778504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 138878504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 138978504Siedowse /* 139078504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 139178504Siedowse * console. This allows us to detect break-to-debugger events 139278504Siedowse * while the console device is closed. 139378504Siedowse */ 139478504Siedowse if (com->unit != comconsole) 139578504Siedowse#endif 139651078Speter { 139760471Snyan sio_setreg(com, com_ier, 0); 139851078Speter if (tp->t_cflag & HUPCL 139951078Speter /* 140051078Speter * XXX we will miss any carrier drop between here and the 140151078Speter * next open. Perhaps we should watch DCD even when the 140251078Speter * port is closed; it is not sufficient to check it at 140351078Speter * the next open because it might go up and down while 140451078Speter * we're not watching. 140551078Speter */ 140651078Speter || (!com->active_out 140751078Speter && !(com->prev_modem_status & MSR_DCD) 140851078Speter && !(com->it_in.c_cflag & CLOCAL)) 140951078Speter || !(tp->t_state & TS_ISOPEN)) { 141051078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 141151078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 141251078Speter timeout(siodtrwakeup, com, com->dtr_wait); 141351078Speter com->state |= CS_DTR_OFF; 141451078Speter } 141551078Speter } 141651078Speter } 141751078Speter if (com->hasfifo) { 141851078Speter /* 141951078Speter * Disable fifos so that they are off after controlled 142051078Speter * reboots. Some BIOSes fail to detect 16550s when the 142151078Speter * fifos are enabled. 142251078Speter */ 142360471Snyan sio_setreg(com, com_fifo, 0); 142451078Speter } 142551078Speter com->active_out = FALSE; 142651078Speter wakeup(&com->active_out); 142751078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 142851078Speter splx(s); 142951078Speter} 143051078Speter 143151078Speterstatic int 143251078Spetersioread(dev, uio, flag) 143351078Speter dev_t dev; 143451078Speter struct uio *uio; 143551078Speter int flag; 143651078Speter{ 143751078Speter int mynor; 143851078Speter struct com_s *com; 143951078Speter 144051078Speter mynor = minor(dev); 144151078Speter if (mynor & CONTROL_MASK) 144251078Speter return (ENODEV); 144351078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 144457915Simp if (com == NULL || com->gone) 144551078Speter return (ENODEV); 144651078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 144751078Speter} 144851078Speter 144951078Speterstatic int 145051078Spetersiowrite(dev, uio, flag) 145151078Speter dev_t dev; 145251078Speter struct uio *uio; 145351078Speter int flag; 145451078Speter{ 145551078Speter int mynor; 145651078Speter struct com_s *com; 145751078Speter int unit; 145851078Speter 145951078Speter mynor = minor(dev); 146051078Speter if (mynor & CONTROL_MASK) 146151078Speter return (ENODEV); 146251078Speter 146351078Speter unit = MINOR_TO_UNIT(mynor); 146451078Speter com = com_addr(unit); 146557915Simp if (com == NULL || com->gone) 146651078Speter return (ENODEV); 146751078Speter /* 146851078Speter * (XXX) We disallow virtual consoles if the physical console is 146951078Speter * a serial port. This is in case there is a display attached that 147051078Speter * is not the console. In that situation we don't need/want the X 147151078Speter * server taking over the console. 147251078Speter */ 147351078Speter if (constty != NULL && unit == comconsole) 147451078Speter constty = NULL; 147551078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 147651078Speter} 147751078Speter 147851078Speterstatic void 147951078Spetersiobusycheck(chan) 148051078Speter void *chan; 148151078Speter{ 148251078Speter struct com_s *com; 148351078Speter int s; 148451078Speter 148551078Speter com = (struct com_s *)chan; 148651078Speter 148751078Speter /* 148851078Speter * Clear TS_BUSY if low-level output is complete. 148951078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 149051078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 149151078Speter * called again. Reading the line status port outside of siointr1() 149251078Speter * is safe because CS_BUSY is clear so there are no output interrupts 149351078Speter * to lose. 149451078Speter */ 149551078Speter s = spltty(); 149651078Speter if (com->state & CS_BUSY) 149751078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 149851078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 149951078Speter == (LSR_TSRE | LSR_TXRDY)) { 150051078Speter com->tp->t_state &= ~TS_BUSY; 150151078Speter ttwwakeup(com->tp); 150251078Speter com->extra_state &= ~CSE_BUSYCHECK; 150351078Speter } else 150451078Speter timeout(siobusycheck, com, hz / 100); 150551078Speter splx(s); 150651078Speter} 150751078Speter 150889986Sjhaystatic u_int 150989986Sjhaysiodivisor(rclk, speed) 151089986Sjhay u_long rclk; 151189986Sjhay speed_t speed; 151289986Sjhay{ 151389986Sjhay long actual_speed; 151489986Sjhay u_int divisor; 151589986Sjhay int error; 151689986Sjhay 151789986Sjhay if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 151889986Sjhay return (0); 151989986Sjhay divisor = (rclk / (8UL * speed) + 1) / 2; 152089986Sjhay if (divisor == 0 || divisor >= 65536) 152189986Sjhay return (0); 152289986Sjhay actual_speed = rclk / (16UL * divisor); 152389986Sjhay 152489986Sjhay /* 10 times error in percent: */ 152589986Sjhay error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 152689986Sjhay 152789986Sjhay /* 3.0% maximum error tolerance: */ 152889986Sjhay if (error < -30 || error > 30) 152989986Sjhay return (0); 153089986Sjhay 153189986Sjhay return (divisor); 153289986Sjhay} 153389986Sjhay 153451078Speterstatic void 153551078Spetersiodtrwakeup(chan) 153651078Speter void *chan; 153751078Speter{ 153851078Speter struct com_s *com; 153951078Speter 154051078Speter com = (struct com_s *)chan; 154151078Speter com->state &= ~CS_DTR_OFF; 154251078Speter wakeup(&com->dtr_wait); 154351078Speter} 154451078Speter 154565557Sjasone/* 154670174Sjhb * Call this function with the sio_lock mutex held. It will return with the 154770174Sjhb * lock still held. 154865557Sjasone */ 154951078Speterstatic void 155051078Spetersioinput(com) 155151078Speter struct com_s *com; 155251078Speter{ 155351078Speter u_char *buf; 155451078Speter int incc; 155551078Speter u_char line_status; 155651078Speter int recv_data; 155751078Speter struct tty *tp; 155851078Speter 155951078Speter buf = com->ibuf; 156051078Speter tp = com->tp; 156151078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 156251078Speter com_events -= (com->iptr - com->ibuf); 156351078Speter com->iptr = com->ibuf; 156451078Speter return; 156551078Speter } 156651078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 156751078Speter /* 156851078Speter * Avoid the grotesquely inefficient lineswitch routine 156951078Speter * (ttyinput) in "raw" mode. It usually takes about 450 157051078Speter * instructions (that's without canonical processing or echo!). 157151078Speter * slinput is reasonably fast (usually 40 instructions plus 157251078Speter * call overhead). 157351078Speter */ 157451078Speter do { 157565557Sjasone /* 157665557Sjasone * This may look odd, but it is using save-and-enable 157765557Sjasone * semantics instead of the save-and-disable semantics 157865557Sjasone * that are used everywhere else. 157965557Sjasone */ 158072200Sbmilekic mtx_unlock_spin(&sio_lock); 158151078Speter incc = com->iptr - buf; 158251078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 158351078Speter && (com->state & CS_RTS_IFLOW 158451078Speter || tp->t_iflag & IXOFF) 158551078Speter && !(tp->t_state & TS_TBLOCK)) 158651078Speter ttyblock(tp); 158751078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 158851078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 158951078Speter buf += incc; 159051078Speter tk_nin += incc; 159151078Speter tk_rawcc += incc; 159251078Speter tp->t_rawcc += incc; 159351078Speter ttwakeup(tp); 159451078Speter if (tp->t_state & TS_TTSTOP 159551078Speter && (tp->t_iflag & IXANY 159651078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 159751078Speter tp->t_state &= ~TS_TTSTOP; 159851078Speter tp->t_lflag &= ~FLUSHO; 159951078Speter comstart(tp); 160051078Speter } 160172200Sbmilekic mtx_lock_spin(&sio_lock); 160251078Speter } while (buf < com->iptr); 160351078Speter } else { 160451078Speter do { 160565557Sjasone /* 160665557Sjasone * This may look odd, but it is using save-and-enable 160765557Sjasone * semantics instead of the save-and-disable semantics 160865557Sjasone * that are used everywhere else. 160965557Sjasone */ 161072200Sbmilekic mtx_unlock_spin(&sio_lock); 161151078Speter line_status = buf[com->ierroff]; 161251078Speter recv_data = *buf++; 161351078Speter if (line_status 161451078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 161551078Speter if (line_status & LSR_BI) 161651078Speter recv_data |= TTY_BI; 161751078Speter if (line_status & LSR_FE) 161851078Speter recv_data |= TTY_FE; 161951078Speter if (line_status & LSR_OE) 162051078Speter recv_data |= TTY_OE; 162151078Speter if (line_status & LSR_PE) 162251078Speter recv_data |= TTY_PE; 162351078Speter } 162451078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 162572200Sbmilekic mtx_lock_spin(&sio_lock); 162651078Speter } while (buf < com->iptr); 162751078Speter } 162851078Speter com_events -= (com->iptr - com->ibuf); 162951078Speter com->iptr = com->ibuf; 163051078Speter 163151078Speter /* 163251078Speter * There is now room for another low-level buffer full of input, 163351078Speter * so enable RTS if it is now disabled and there is room in the 163451078Speter * high-level buffer. 163551078Speter */ 163651078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 163751078Speter !(tp->t_state & TS_TBLOCK)) 163851078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 163951078Speter} 164051078Speter 164151078Spetervoid 164251078Spetersiointr(arg) 164351078Speter void *arg; 164451078Speter{ 164570174Sjhb struct com_s *com; 164670174Sjhb 164751078Speter#ifndef COM_MULTIPORT 164870174Sjhb com = (struct com_s *)arg; 164970174Sjhb 165072200Sbmilekic mtx_lock_spin(&sio_lock); 165170174Sjhb siointr1(com); 165272200Sbmilekic mtx_unlock_spin(&sio_lock); 165351078Speter#else /* COM_MULTIPORT */ 165451078Speter bool_t possibly_more_intrs; 165551078Speter int unit; 165651078Speter 165751078Speter /* 165851078Speter * Loop until there is no activity on any port. This is necessary 165951078Speter * to get an interrupt edge more than to avoid another interrupt. 166051078Speter * If the IRQ signal is just an OR of the IRQ signals from several 166151078Speter * devices, then the edge from one may be lost because another is 166251078Speter * on. 166351078Speter */ 166472200Sbmilekic mtx_lock_spin(&sio_lock); 166551078Speter do { 166651078Speter possibly_more_intrs = FALSE; 166753344Speter for (unit = 0; unit < sio_numunits; ++unit) { 166851078Speter com = com_addr(unit); 166951078Speter /* 167051078Speter * XXX COM_LOCK(); 167151078Speter * would it work here, or be counter-productive? 167251078Speter */ 167351078Speter if (com != NULL 167451078Speter && !com->gone 167551078Speter && (inb(com->int_id_port) & IIR_IMASK) 167651078Speter != IIR_NOPEND) { 167751078Speter siointr1(com); 167851078Speter possibly_more_intrs = TRUE; 167951078Speter } 168051078Speter /* XXX COM_UNLOCK(); */ 168151078Speter } 168251078Speter } while (possibly_more_intrs); 168372200Sbmilekic mtx_unlock_spin(&sio_lock); 168451078Speter#endif /* COM_MULTIPORT */ 168551078Speter} 168651078Speter 168793466Sbdestatic struct timespec siots[8192]; 168893466Sbdestatic int siotso; 168993466Sbdestatic int volatile siotsunit = -1; 169093466Sbde 169193466Sbdestatic int 169293466Sbdesysctl_siots(SYSCTL_HANDLER_ARGS) 169393466Sbde{ 169493466Sbde char buf[128]; 169593466Sbde long long delta; 169693466Sbde size_t len; 169793466Sbde int error, i; 169893466Sbde 169993466Sbde for (i = 1; i < siotso; i++) { 170093466Sbde delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 170193466Sbde 1000000000 + 170293466Sbde (siots[i].tv_nsec - siots[i - 1].tv_nsec); 170393466Sbde len = sprintf(buf, "%lld\n", delta); 170493466Sbde if (delta >= 110000) 170593466Sbde len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 170693466Sbde (long)siots[i].tv_sec, siots[i].tv_nsec); 170793466Sbde if (i == siotso - 1) 170893466Sbde buf[len - 1] = '\0'; 170993466Sbde error = SYSCTL_OUT(req, buf, len); 171093466Sbde if (error != 0) 171193466Sbde return (error); 171293466Sbde uio_yield(); 171393466Sbde } 171493466Sbde return (0); 171593466Sbde} 171693466Sbde 171793466SbdeSYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 171893466Sbde 0, 0, sysctl_siots, "A", "sio timestamps"); 171993466Sbde 172051078Speterstatic void 172151078Spetersiointr1(com) 172251078Speter struct com_s *com; 172351078Speter{ 172451078Speter u_char line_status; 172551078Speter u_char modem_status; 172651078Speter u_char *ioptr; 172751078Speter u_char recv_data; 172851078Speter u_char int_ctl; 172951078Speter u_char int_ctl_new; 173051078Speter 173151078Speter int_ctl = inb(com->intr_ctl_port); 173251078Speter int_ctl_new = int_ctl; 173351078Speter 173451078Speter while (!com->gone) { 173551078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 173651078Speter modem_status = inb(com->modem_status_port); 173751078Speter if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 173895523Sphk pps_capture(&com->pps); 173995523Sphk pps_event(&com->pps, (modem_status & MSR_DCD) ? 174051078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 174151078Speter } 174251078Speter } 174351078Speter line_status = inb(com->line_status_port); 174451078Speter 174551078Speter /* input event? (check first to help avoid overruns) */ 174651078Speter while (line_status & LSR_RCV_MASK) { 174751078Speter /* break/unnattached error bits or real input? */ 174851078Speter if (!(line_status & LSR_RXRDY)) 174951078Speter recv_data = 0; 175051078Speter else 175151078Speter recv_data = inb(com->data_port); 175261649Sps#if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 175361649Sps /* 175461649Sps * Solaris implements a new BREAK which is initiated 175561649Sps * by a character sequence CR ~ ^b which is similar 175661649Sps * to a familiar pattern used on Sun servers by the 175761649Sps * Remote Console. 175861649Sps */ 175961649Sps#define KEY_CRTLB 2 /* ^B */ 176061649Sps#define KEY_CR 13 /* CR '\r' */ 176161649Sps#define KEY_TILDE 126 /* ~ */ 176261649Sps 176361649Sps if (com->unit == comconsole) { 176461649Sps static int brk_state1 = 0, brk_state2 = 0; 176561649Sps if (recv_data == KEY_CR) { 176661649Sps brk_state1 = recv_data; 176761649Sps brk_state2 = 0; 176865557Sjasone } else if (brk_state1 == KEY_CR 176965557Sjasone && (recv_data == KEY_TILDE 177065557Sjasone || recv_data == KEY_CRTLB)) { 177161649Sps if (recv_data == KEY_TILDE) 177261649Sps brk_state2 = recv_data; 177365557Sjasone else if (brk_state2 == KEY_TILDE 177465557Sjasone && recv_data == KEY_CRTLB) { 177561649Sps breakpoint(); 177665557Sjasone brk_state1 = 0; 177765557Sjasone brk_state2 = 0; 177861649Sps goto cont; 177961649Sps } else 178061649Sps brk_state2 = 0; 178161649Sps } else 178261649Sps brk_state1 = 0; 178361649Sps } 178461649Sps#endif 178551078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 178651078Speter /* 178751078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 178851078Speter * Otherwise, push the work to a higher level 178951078Speter * (to handle PARMRK) if we're bypassing. 179051078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 179151078Speter * 179251078Speter * This makes bypassing work right in the 179351078Speter * usual "raw" case (IGNBRK set, and IGNPAR 179451078Speter * and INPCK clear). 179551078Speter * 179651078Speter * Note: BI together with FE/PE means just BI. 179751078Speter */ 179851078Speter if (line_status & LSR_BI) { 179951078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 180051078Speter if (com->unit == comconsole) { 180151078Speter breakpoint(); 180251078Speter goto cont; 180351078Speter } 180451078Speter#endif 180551078Speter if (com->tp == NULL 180651078Speter || com->tp->t_iflag & IGNBRK) 180751078Speter goto cont; 180851078Speter } else { 180951078Speter if (com->tp == NULL 181051078Speter || com->tp->t_iflag & IGNPAR) 181151078Speter goto cont; 181251078Speter } 181351078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 181451078Speter && (line_status & (LSR_BI | LSR_FE) 181551078Speter || com->tp->t_iflag & INPCK)) 181651078Speter recv_data = 0; 181751078Speter } 181851078Speter ++com->bytes_in; 181951078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 182088900Sjhb swi_sched(sio_fast_ih, 0); 182151078Speter ioptr = com->iptr; 182251078Speter if (ioptr >= com->ibufend) 182351078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 182451078Speter else { 182551078Speter if (com->do_timestamp) 182651078Speter microtime(&com->timestamp); 182751078Speter ++com_events; 182872238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 182951078Speter#if 0 /* for testing input latency vs efficiency */ 183051078Speterif (com->iptr - com->ibuf == 8) 183188900Sjhb swi_sched(sio_fast_ih, 0); 183251078Speter#endif 183351078Speter ioptr[0] = recv_data; 183451078Speter ioptr[com->ierroff] = line_status; 183551078Speter com->iptr = ++ioptr; 183651078Speter if (ioptr == com->ihighwater 183751078Speter && com->state & CS_RTS_IFLOW) 183851078Speter outb(com->modem_ctl_port, 183951078Speter com->mcr_image &= ~MCR_RTS); 184051078Speter if (line_status & LSR_OE) 184151078Speter CE_RECORD(com, CE_OVERRUN); 184251078Speter } 184351078Spetercont: 184451078Speter /* 184551078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 184651078Speter * jump from the top of the loop to here 184751078Speter */ 184851078Speter line_status = inb(com->line_status_port) & 0x7F; 184951078Speter } 185051078Speter 185151078Speter /* modem status change? (always check before doing output) */ 185251078Speter modem_status = inb(com->modem_status_port); 185351078Speter if (modem_status != com->last_modem_status) { 185451078Speter if (com->do_dcd_timestamp 185551078Speter && !(com->last_modem_status & MSR_DCD) 185651078Speter && modem_status & MSR_DCD) 185751078Speter microtime(&com->dcd_timestamp); 185851078Speter 185951078Speter /* 186051078Speter * Schedule high level to handle DCD changes. Note 186151078Speter * that we don't use the delta bits anywhere. Some 186251078Speter * UARTs mess them up, and it's easy to remember the 186351078Speter * previous bits and calculate the delta. 186451078Speter */ 186551078Speter com->last_modem_status = modem_status; 186651078Speter if (!(com->state & CS_CHECKMSR)) { 186751078Speter com_events += LOTS_OF_EVENTS; 186851078Speter com->state |= CS_CHECKMSR; 186988900Sjhb swi_sched(sio_fast_ih, 0); 187051078Speter } 187151078Speter 187251078Speter /* handle CTS change immediately for crisp flow ctl */ 187351078Speter if (com->state & CS_CTS_OFLOW) { 187451078Speter if (modem_status & MSR_CTS) 187551078Speter com->state |= CS_ODEVREADY; 187651078Speter else 187751078Speter com->state &= ~CS_ODEVREADY; 187851078Speter } 187951078Speter } 188051078Speter 188151078Speter /* output queued and everything ready? */ 188251078Speter if (line_status & LSR_TXRDY 188351078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 188451078Speter ioptr = com->obufq.l_head; 188593466Sbde if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 188651078Speter u_int ocount; 188751078Speter 188851078Speter ocount = com->obufq.l_tail - ioptr; 188951078Speter if (ocount > com->tx_fifo_size) 189051078Speter ocount = com->tx_fifo_size; 189151078Speter com->bytes_out += ocount; 189251078Speter do 189351078Speter outb(com->data_port, *ioptr++); 189451078Speter while (--ocount != 0); 189551078Speter } else { 189651078Speter outb(com->data_port, *ioptr++); 189751078Speter ++com->bytes_out; 189893466Sbde if (com->unit == siotsunit) { 189993466Sbde nanouptime(&siots[siotso]); 190093466Sbde siotso = (siotso + 1) % 190193466Sbde (sizeof siots / sizeof siots[0]); 190293466Sbde } 190351078Speter } 190451078Speter com->obufq.l_head = ioptr; 190551078Speter if (COM_IIR_TXRDYBUG(com->flags)) { 190651078Speter int_ctl_new = int_ctl | IER_ETXRDY; 190751078Speter } 190851078Speter if (ioptr >= com->obufq.l_tail) { 190951078Speter struct lbq *qp; 191051078Speter 191151078Speter qp = com->obufq.l_next; 191251078Speter qp->l_queued = FALSE; 191351078Speter qp = qp->l_next; 191451078Speter if (qp != NULL) { 191551078Speter com->obufq.l_head = qp->l_head; 191651078Speter com->obufq.l_tail = qp->l_tail; 191751078Speter com->obufq.l_next = qp; 191851078Speter } else { 191951078Speter /* output just completed */ 192053344Speter if (COM_IIR_TXRDYBUG(com->flags)) { 192151078Speter int_ctl_new = int_ctl & ~IER_ETXRDY; 192251078Speter } 192351078Speter com->state &= ~CS_BUSY; 192451078Speter } 192551078Speter if (!(com->state & CS_ODONE)) { 192651078Speter com_events += LOTS_OF_EVENTS; 192751078Speter com->state |= CS_ODONE; 192867551Sjhb /* handle at high level ASAP */ 192988900Sjhb swi_sched(sio_fast_ih, 0); 193051078Speter } 193151078Speter } 193253344Speter if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 193351078Speter outb(com->intr_ctl_port, int_ctl_new); 193451078Speter } 193551078Speter } 193651078Speter 193751078Speter /* finished? */ 193851078Speter#ifndef COM_MULTIPORT 193951078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 194051078Speter#endif /* COM_MULTIPORT */ 194151078Speter return; 194251078Speter } 194351078Speter} 194451078Speter 194551078Speterstatic int 194683366Sjuliansioioctl(dev, cmd, data, flag, td) 194751078Speter dev_t dev; 194851078Speter u_long cmd; 194951078Speter caddr_t data; 195051078Speter int flag; 195183366Sjulian struct thread *td; 195251078Speter{ 195351078Speter struct com_s *com; 195451078Speter int error; 195551078Speter int mynor; 195651078Speter int s; 195751078Speter struct tty *tp; 195851078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 195951078Speter u_long oldcmd; 196051078Speter struct termios term; 196151078Speter#endif 196251078Speter 196351078Speter mynor = minor(dev); 196451078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 196557915Simp if (com == NULL || com->gone) 196651078Speter return (ENODEV); 196751078Speter if (mynor & CONTROL_MASK) { 196851078Speter struct termios *ct; 196951078Speter 197051078Speter switch (mynor & CONTROL_MASK) { 197151078Speter case CONTROL_INIT_STATE: 197251078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 197351078Speter break; 197451078Speter case CONTROL_LOCK_STATE: 197551078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 197651078Speter break; 197751078Speter default: 197851078Speter return (ENODEV); /* /dev/nodev */ 197951078Speter } 198051078Speter switch (cmd) { 198151078Speter case TIOCSETA: 198293593Sjhb error = suser(td); 198351078Speter if (error != 0) 198451078Speter return (error); 198551078Speter *ct = *(struct termios *)data; 198651078Speter return (0); 198751078Speter case TIOCGETA: 198851078Speter *(struct termios *)data = *ct; 198951078Speter return (0); 199051078Speter case TIOCGETD: 199151078Speter *(int *)data = TTYDISC; 199251078Speter return (0); 199351078Speter case TIOCGWINSZ: 199451078Speter bzero(data, sizeof(struct winsize)); 199551078Speter return (0); 199651078Speter default: 199751078Speter return (ENOTTY); 199851078Speter } 199951078Speter } 200051078Speter tp = com->tp; 200151078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 200251078Speter term = tp->t_termios; 200351078Speter oldcmd = cmd; 200451078Speter error = ttsetcompat(tp, &cmd, data, &term); 200551078Speter if (error != 0) 200651078Speter return (error); 200751078Speter if (cmd != oldcmd) 200851078Speter data = (caddr_t)&term; 200951078Speter#endif 201051078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 201151078Speter int cc; 201251078Speter struct termios *dt = (struct termios *)data; 201351078Speter struct termios *lt = mynor & CALLOUT_MASK 201451078Speter ? &com->lt_out : &com->lt_in; 201551078Speter 201651078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 201751078Speter | (dt->c_iflag & ~lt->c_iflag); 201851078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 201951078Speter | (dt->c_oflag & ~lt->c_oflag); 202051078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 202151078Speter | (dt->c_cflag & ~lt->c_cflag); 202251078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 202351078Speter | (dt->c_lflag & ~lt->c_lflag); 202451078Speter for (cc = 0; cc < NCCS; ++cc) 202551078Speter if (lt->c_cc[cc] != 0) 202651078Speter dt->c_cc[cc] = tp->t_cc[cc]; 202751078Speter if (lt->c_ispeed != 0) 202851078Speter dt->c_ispeed = tp->t_ispeed; 202951078Speter if (lt->c_ospeed != 0) 203051078Speter dt->c_ospeed = tp->t_ospeed; 203151078Speter } 203283366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 203351078Speter if (error != ENOIOCTL) 203451078Speter return (error); 203551078Speter s = spltty(); 203651078Speter error = ttioctl(tp, cmd, data, flag); 203751078Speter disc_optim(tp, &tp->t_termios, com); 203851078Speter if (error != ENOIOCTL) { 203951078Speter splx(s); 204051078Speter return (error); 204151078Speter } 204251078Speter switch (cmd) { 204351078Speter case TIOCSBRK: 204460471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 204551078Speter break; 204651078Speter case TIOCCBRK: 204760471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 204851078Speter break; 204951078Speter case TIOCSDTR: 205051078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 205151078Speter break; 205251078Speter case TIOCCDTR: 205351078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 205451078Speter break; 205551078Speter /* 205651078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 205751078Speter * changes get undone on the next call to comparam(). 205851078Speter */ 205951078Speter case TIOCMSET: 206051078Speter (void)commctl(com, *(int *)data, DMSET); 206151078Speter break; 206251078Speter case TIOCMBIS: 206351078Speter (void)commctl(com, *(int *)data, DMBIS); 206451078Speter break; 206551078Speter case TIOCMBIC: 206651078Speter (void)commctl(com, *(int *)data, DMBIC); 206751078Speter break; 206851078Speter case TIOCMGET: 206951078Speter *(int *)data = commctl(com, 0, DMGET); 207051078Speter break; 207151078Speter case TIOCMSDTRWAIT: 207251078Speter /* must be root since the wait applies to following logins */ 207393593Sjhb error = suser(td); 207451078Speter if (error != 0) { 207551078Speter splx(s); 207651078Speter return (error); 207751078Speter } 207851078Speter com->dtr_wait = *(int *)data * hz / 100; 207951078Speter break; 208051078Speter case TIOCMGDTRWAIT: 208151078Speter *(int *)data = com->dtr_wait * 100 / hz; 208251078Speter break; 208351078Speter case TIOCTIMESTAMP: 208451078Speter com->do_timestamp = TRUE; 208551078Speter *(struct timeval *)data = com->timestamp; 208651078Speter break; 208751078Speter case TIOCDCDTIMESTAMP: 208851078Speter com->do_dcd_timestamp = TRUE; 208951078Speter *(struct timeval *)data = com->dcd_timestamp; 209051078Speter break; 209151078Speter default: 209251078Speter splx(s); 209351078Speter error = pps_ioctl(cmd, data, &com->pps); 209451078Speter if (error == ENODEV) 209551078Speter error = ENOTTY; 209651078Speter return (error); 209751078Speter } 209851078Speter splx(s); 209951078Speter return (0); 210051078Speter} 210151078Speter 210265557Sjasone/* software interrupt handler for SWI_TTY */ 210351078Speterstatic void 210467551Sjhbsiopoll(void *dummy) 210551078Speter{ 210651078Speter int unit; 210751078Speter 210851078Speter if (com_events == 0) 210951078Speter return; 211051078Speterrepeat: 211153344Speter for (unit = 0; unit < sio_numunits; ++unit) { 211251078Speter struct com_s *com; 211351078Speter int incc; 211451078Speter struct tty *tp; 211551078Speter 211651078Speter com = com_addr(unit); 211751078Speter if (com == NULL) 211851078Speter continue; 211951078Speter tp = com->tp; 212051078Speter if (tp == NULL || com->gone) { 212151078Speter /* 212251078Speter * Discard any events related to never-opened or 212351078Speter * going-away devices. 212451078Speter */ 212572200Sbmilekic mtx_lock_spin(&sio_lock); 212651078Speter incc = com->iptr - com->ibuf; 212751078Speter com->iptr = com->ibuf; 212851078Speter if (com->state & CS_CHECKMSR) { 212951078Speter incc += LOTS_OF_EVENTS; 213051078Speter com->state &= ~CS_CHECKMSR; 213151078Speter } 213251078Speter com_events -= incc; 213372200Sbmilekic mtx_unlock_spin(&sio_lock); 213451078Speter continue; 213551078Speter } 213651078Speter if (com->iptr != com->ibuf) { 213772200Sbmilekic mtx_lock_spin(&sio_lock); 213851078Speter sioinput(com); 213972200Sbmilekic mtx_unlock_spin(&sio_lock); 214051078Speter } 214151078Speter if (com->state & CS_CHECKMSR) { 214251078Speter u_char delta_modem_status; 214351078Speter 214472200Sbmilekic mtx_lock_spin(&sio_lock); 214551078Speter delta_modem_status = com->last_modem_status 214651078Speter ^ com->prev_modem_status; 214751078Speter com->prev_modem_status = com->last_modem_status; 214851078Speter com_events -= LOTS_OF_EVENTS; 214951078Speter com->state &= ~CS_CHECKMSR; 215072200Sbmilekic mtx_unlock_spin(&sio_lock); 215151078Speter if (delta_modem_status & MSR_DCD) 215251078Speter (*linesw[tp->t_line].l_modem) 215351078Speter (tp, com->prev_modem_status & MSR_DCD); 215451078Speter } 215551078Speter if (com->state & CS_ODONE) { 215672200Sbmilekic mtx_lock_spin(&sio_lock); 215751078Speter com_events -= LOTS_OF_EVENTS; 215851078Speter com->state &= ~CS_ODONE; 215972200Sbmilekic mtx_unlock_spin(&sio_lock); 216051078Speter if (!(com->state & CS_BUSY) 216151078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 216251078Speter timeout(siobusycheck, com, hz / 100); 216351078Speter com->extra_state |= CSE_BUSYCHECK; 216451078Speter } 216551078Speter (*linesw[tp->t_line].l_start)(tp); 216651078Speter } 216751078Speter if (com_events == 0) 216851078Speter break; 216951078Speter } 217051078Speter if (com_events >= LOTS_OF_EVENTS) 217151078Speter goto repeat; 217251078Speter} 217351078Speter 217451078Speterstatic int 217551078Spetercomparam(tp, t) 217651078Speter struct tty *tp; 217751078Speter struct termios *t; 217851078Speter{ 217951078Speter u_int cfcr; 218051078Speter int cflag; 218151078Speter struct com_s *com; 218289986Sjhay u_int divisor; 218351078Speter u_char dlbh; 218451078Speter u_char dlbl; 218551078Speter int s; 218651078Speter int unit; 218751078Speter 218889986Sjhay unit = DEV_TO_UNIT(tp->t_dev); 218989986Sjhay com = com_addr(unit); 219089986Sjhay if (com == NULL) 219189986Sjhay return (ENODEV); 219289986Sjhay 219351078Speter /* do historical conversions */ 219451078Speter if (t->c_ispeed == 0) 219551078Speter t->c_ispeed = t->c_ospeed; 219651078Speter 219751078Speter /* check requested parameters */ 219889986Sjhay if (t->c_ospeed == 0) 219989986Sjhay divisor = 0; 220089986Sjhay else { 220189986Sjhay if (t->c_ispeed != t->c_ospeed) 220289986Sjhay return (EINVAL); 220389986Sjhay divisor = siodivisor(com->rclk, t->c_ispeed); 220489986Sjhay if (divisor == 0) 220589986Sjhay return (EINVAL); 220689986Sjhay } 220751078Speter 220851078Speter /* parameters are OK, convert them to the com struct and the device */ 220951078Speter s = spltty(); 221051078Speter if (divisor == 0) 221151078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 221251078Speter else 221351078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 221451078Speter cflag = t->c_cflag; 221551078Speter switch (cflag & CSIZE) { 221651078Speter case CS5: 221751078Speter cfcr = CFCR_5BITS; 221851078Speter break; 221951078Speter case CS6: 222051078Speter cfcr = CFCR_6BITS; 222151078Speter break; 222251078Speter case CS7: 222351078Speter cfcr = CFCR_7BITS; 222451078Speter break; 222551078Speter default: 222651078Speter cfcr = CFCR_8BITS; 222751078Speter break; 222851078Speter } 222951078Speter if (cflag & PARENB) { 223051078Speter cfcr |= CFCR_PENAB; 223151078Speter if (!(cflag & PARODD)) 223251078Speter cfcr |= CFCR_PEVEN; 223351078Speter } 223451078Speter if (cflag & CSTOPB) 223551078Speter cfcr |= CFCR_STOPB; 223651078Speter 223751078Speter if (com->hasfifo && divisor != 0) { 223851078Speter /* 223951078Speter * Use a fifo trigger level low enough so that the input 224051078Speter * latency from the fifo is less than about 16 msec and 224151078Speter * the total latency is less than about 30 msec. These 224251078Speter * latencies are reasonable for humans. Serial comms 224351078Speter * protocols shouldn't expect anything better since modem 224451078Speter * latencies are larger. 224588433Sdillon * 224688433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 224788433Sdillon * speed connections without further work on reducing 224888433Sdillon * interrupt disablement times in other parts of the system, 224988433Sdillon * without producing silo overflow errors. 225051078Speter */ 225193466Sbde com->fifo_image = com->unit == siotsunit ? 0 225293466Sbde : t->c_ospeed <= 4800 225388451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 225451078Speter#ifdef COM_ESP 225551078Speter /* 225651078Speter * The Hayes ESP card needs the fifo DMA mode bit set 225751078Speter * in compatibility mode. If not, it will interrupt 225851078Speter * for each character received. 225951078Speter */ 226051078Speter if (com->esp) 226151078Speter com->fifo_image |= FIFO_DMA_MODE; 226251078Speter#endif 226360471Snyan sio_setreg(com, com_fifo, com->fifo_image); 226451078Speter } 226551078Speter 226665605Sjhb /* 226765605Sjhb * This returns with interrupts disabled so that we can complete 226865605Sjhb * the speed change atomically. Keeping interrupts disabled is 226965605Sjhb * especially important while com_data is hidden. 227065605Sjhb */ 227165605Sjhb (void) siosetwater(com, t->c_ispeed); 227265557Sjasone 227351078Speter if (divisor != 0) { 227460471Snyan sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 227551078Speter /* 227651078Speter * Only set the divisor registers if they would change, 227751078Speter * since on some 16550 incompatibles (UMC8669F), setting 227851078Speter * them while input is arriving them loses sync until 227951078Speter * data stops arriving. 228051078Speter */ 228151078Speter dlbl = divisor & 0xFF; 228260471Snyan if (sio_getreg(com, com_dlbl) != dlbl) 228360471Snyan sio_setreg(com, com_dlbl, dlbl); 228489986Sjhay dlbh = divisor >> 8; 228560471Snyan if (sio_getreg(com, com_dlbh) != dlbh) 228660471Snyan sio_setreg(com, com_dlbh, dlbh); 228751078Speter } 228851078Speter 228960471Snyan sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 229051078Speter 229151078Speter if (!(tp->t_state & TS_TTSTOP)) 229251078Speter com->state |= CS_TTGO; 229351078Speter 229451078Speter if (cflag & CRTS_IFLOW) { 229551078Speter if (com->st16650a) { 229660471Snyan sio_setreg(com, com_cfcr, 0xbf); 229760471Snyan sio_setreg(com, com_fifo, 229860471Snyan sio_getreg(com, com_fifo) | 0x40); 229951078Speter } 230051078Speter com->state |= CS_RTS_IFLOW; 230151078Speter /* 230251078Speter * If CS_RTS_IFLOW just changed from off to on, the change 230351078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 230451078Speter * so do it later by calling comstart() instead of repeating 230551078Speter * a lot of code from comstart() here. 230651078Speter */ 230751078Speter } else if (com->state & CS_RTS_IFLOW) { 230851078Speter com->state &= ~CS_RTS_IFLOW; 230951078Speter /* 231051078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 231151078Speter * on here, since comstart() won't do it later. 231251078Speter */ 231351078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 231451078Speter if (com->st16650a) { 231560471Snyan sio_setreg(com, com_cfcr, 0xbf); 231660471Snyan sio_setreg(com, com_fifo, 231760471Snyan sio_getreg(com, com_fifo) & ~0x40); 231851078Speter } 231951078Speter } 232051078Speter 232151078Speter 232251078Speter /* 232351078Speter * Set up state to handle output flow control. 232451078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 232551078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 232651078Speter */ 232751078Speter com->state |= CS_ODEVREADY; 232851078Speter com->state &= ~CS_CTS_OFLOW; 232951078Speter if (cflag & CCTS_OFLOW) { 233051078Speter com->state |= CS_CTS_OFLOW; 233151078Speter if (!(com->last_modem_status & MSR_CTS)) 233251078Speter com->state &= ~CS_ODEVREADY; 233351078Speter if (com->st16650a) { 233460471Snyan sio_setreg(com, com_cfcr, 0xbf); 233560471Snyan sio_setreg(com, com_fifo, 233660471Snyan sio_getreg(com, com_fifo) | 0x80); 233751078Speter } 233851078Speter } else { 233951078Speter if (com->st16650a) { 234060471Snyan sio_setreg(com, com_cfcr, 0xbf); 234160471Snyan sio_setreg(com, com_fifo, 234260471Snyan sio_getreg(com, com_fifo) & ~0x80); 234351078Speter } 234451078Speter } 234551078Speter 234660471Snyan sio_setreg(com, com_cfcr, com->cfcr_image); 234751078Speter 234851078Speter /* XXX shouldn't call functions while intrs are disabled. */ 234951078Speter disc_optim(tp, t, com); 235051078Speter /* 235151078Speter * Recover from fiddling with CS_TTGO. We used to call siointr1() 235251078Speter * unconditionally, but that defeated the careful discarding of 235351078Speter * stale input in sioopen(). 235451078Speter */ 235551078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 235651078Speter siointr1(com); 235751078Speter 235872200Sbmilekic mtx_unlock_spin(&sio_lock); 235951078Speter splx(s); 236051078Speter comstart(tp); 236151078Speter if (com->ibufold != NULL) { 236251078Speter free(com->ibufold, M_DEVBUF); 236351078Speter com->ibufold = NULL; 236451078Speter } 236551078Speter return (0); 236651078Speter} 236751078Speter 236865605Sjhb/* 236970174Sjhb * This function must be called with the sio_lock mutex released and will 237070174Sjhb * return with it obtained. 237165605Sjhb */ 237251078Speterstatic int 237365605Sjhbsiosetwater(com, speed) 237451078Speter struct com_s *com; 237551078Speter speed_t speed; 237651078Speter{ 237751078Speter int cp4ticks; 237851078Speter u_char *ibuf; 237951078Speter int ibufsize; 238051078Speter struct tty *tp; 238151078Speter 238251078Speter /* 238351078Speter * Make the buffer size large enough to handle a softtty interrupt 238451078Speter * latency of about 2 ticks without loss of throughput or data 238551078Speter * (about 3 ticks if input flow control is not used or not honoured, 238651078Speter * but a bit less for CS5-CS7 modes). 238751078Speter */ 238851078Speter cp4ticks = speed / 10 / hz * 4; 238951078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 239051078Speter ibufsize <<= 1; 239165605Sjhb if (ibufsize == com->ibufsize) { 239272200Sbmilekic mtx_lock_spin(&sio_lock); 239351078Speter return (0); 239465605Sjhb } 239551078Speter 239651078Speter /* 239751078Speter * Allocate input buffer. The extra factor of 2 in the size is 239851078Speter * to allow for an error byte for each input byte. 239951078Speter */ 240051078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 240165605Sjhb if (ibuf == NULL) { 240272200Sbmilekic mtx_lock_spin(&sio_lock); 240351078Speter return (ENOMEM); 240465605Sjhb } 240551078Speter 240651078Speter /* Initialize non-critical variables. */ 240751078Speter com->ibufold = com->ibuf; 240851078Speter com->ibufsize = ibufsize; 240951078Speter tp = com->tp; 241051078Speter if (tp != NULL) { 241151078Speter tp->t_ififosize = 2 * ibufsize; 241251078Speter tp->t_ispeedwat = (speed_t)-1; 241351078Speter tp->t_ospeedwat = (speed_t)-1; 241451078Speter } 241551078Speter 241651078Speter /* 241751078Speter * Read current input buffer, if any. Continue with interrupts 241851078Speter * disabled. 241951078Speter */ 242072200Sbmilekic mtx_lock_spin(&sio_lock); 242151078Speter if (com->iptr != com->ibuf) 242251078Speter sioinput(com); 242351078Speter 242451078Speter /*- 242551078Speter * Initialize critical variables, including input buffer watermarks. 242651078Speter * The external device is asked to stop sending when the buffer 242751078Speter * exactly reaches high water, or when the high level requests it. 242851078Speter * The high level is notified immediately (rather than at a later 242951078Speter * clock tick) when this watermark is reached. 243051078Speter * The buffer size is chosen so the watermark should almost never 243151078Speter * be reached. 243251078Speter * The low watermark is invisibly 0 since the buffer is always 243351078Speter * emptied all at once. 243451078Speter */ 243551078Speter com->iptr = com->ibuf = ibuf; 243651078Speter com->ibufend = ibuf + ibufsize; 243751078Speter com->ierroff = ibufsize; 243851078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 243951078Speter return (0); 244051078Speter} 244151078Speter 244251078Speterstatic void 244351078Spetercomstart(tp) 244451078Speter struct tty *tp; 244551078Speter{ 244651078Speter struct com_s *com; 244751078Speter int s; 244851078Speter int unit; 244951078Speter 245051078Speter unit = DEV_TO_UNIT(tp->t_dev); 245151078Speter com = com_addr(unit); 245257915Simp if (com == NULL) 245357915Simp return; 245451078Speter s = spltty(); 245572200Sbmilekic mtx_lock_spin(&sio_lock); 245651078Speter if (tp->t_state & TS_TTSTOP) 245751078Speter com->state &= ~CS_TTGO; 245851078Speter else 245951078Speter com->state |= CS_TTGO; 246051078Speter if (tp->t_state & TS_TBLOCK) { 246151078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 246251078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 246351078Speter } else { 246451078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 246551078Speter && com->state & CS_RTS_IFLOW) 246651078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 246751078Speter } 246872200Sbmilekic mtx_unlock_spin(&sio_lock); 246951078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 247051078Speter ttwwakeup(tp); 247151078Speter splx(s); 247251078Speter return; 247351078Speter } 247451078Speter if (tp->t_outq.c_cc != 0) { 247551078Speter struct lbq *qp; 247651078Speter struct lbq *next; 247751078Speter 247851078Speter if (!com->obufs[0].l_queued) { 247951078Speter com->obufs[0].l_tail 248051078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 248151078Speter sizeof com->obuf1); 248251078Speter com->obufs[0].l_next = NULL; 248351078Speter com->obufs[0].l_queued = TRUE; 248472200Sbmilekic mtx_lock_spin(&sio_lock); 248551078Speter if (com->state & CS_BUSY) { 248651078Speter qp = com->obufq.l_next; 248751078Speter while ((next = qp->l_next) != NULL) 248851078Speter qp = next; 248951078Speter qp->l_next = &com->obufs[0]; 249051078Speter } else { 249151078Speter com->obufq.l_head = com->obufs[0].l_head; 249251078Speter com->obufq.l_tail = com->obufs[0].l_tail; 249351078Speter com->obufq.l_next = &com->obufs[0]; 249451078Speter com->state |= CS_BUSY; 249551078Speter } 249672200Sbmilekic mtx_unlock_spin(&sio_lock); 249751078Speter } 249851078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 249951078Speter com->obufs[1].l_tail 250051078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 250151078Speter sizeof com->obuf2); 250251078Speter com->obufs[1].l_next = NULL; 250351078Speter com->obufs[1].l_queued = TRUE; 250472200Sbmilekic mtx_lock_spin(&sio_lock); 250551078Speter if (com->state & CS_BUSY) { 250651078Speter qp = com->obufq.l_next; 250751078Speter while ((next = qp->l_next) != NULL) 250851078Speter qp = next; 250951078Speter qp->l_next = &com->obufs[1]; 251051078Speter } else { 251151078Speter com->obufq.l_head = com->obufs[1].l_head; 251251078Speter com->obufq.l_tail = com->obufs[1].l_tail; 251351078Speter com->obufq.l_next = &com->obufs[1]; 251451078Speter com->state |= CS_BUSY; 251551078Speter } 251672200Sbmilekic mtx_unlock_spin(&sio_lock); 251751078Speter } 251851078Speter tp->t_state |= TS_BUSY; 251951078Speter } 252072200Sbmilekic mtx_lock_spin(&sio_lock); 252151078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 252251078Speter siointr1(com); /* fake interrupt to start output */ 252372200Sbmilekic mtx_unlock_spin(&sio_lock); 252451078Speter ttwwakeup(tp); 252551078Speter splx(s); 252651078Speter} 252751078Speter 252851078Speterstatic void 252951654Sphkcomstop(tp, rw) 253051078Speter struct tty *tp; 253151078Speter int rw; 253251078Speter{ 253351078Speter struct com_s *com; 253451078Speter 253551078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 253657915Simp if (com == NULL || com->gone) 253751078Speter return; 253872200Sbmilekic mtx_lock_spin(&sio_lock); 253951078Speter if (rw & FWRITE) { 254051078Speter if (com->hasfifo) 254151078Speter#ifdef COM_ESP 254251078Speter /* XXX avoid h/w bug. */ 254351078Speter if (!com->esp) 254451078Speter#endif 254560471Snyan sio_setreg(com, com_fifo, 254660471Snyan FIFO_XMT_RST | com->fifo_image); 254751078Speter com->obufs[0].l_queued = FALSE; 254851078Speter com->obufs[1].l_queued = FALSE; 254951078Speter if (com->state & CS_ODONE) 255051078Speter com_events -= LOTS_OF_EVENTS; 255151078Speter com->state &= ~(CS_ODONE | CS_BUSY); 255251078Speter com->tp->t_state &= ~TS_BUSY; 255351078Speter } 255451078Speter if (rw & FREAD) { 255551078Speter if (com->hasfifo) 255651078Speter#ifdef COM_ESP 255751078Speter /* XXX avoid h/w bug. */ 255851078Speter if (!com->esp) 255951078Speter#endif 256060471Snyan sio_setreg(com, com_fifo, 256160471Snyan FIFO_RCV_RST | com->fifo_image); 256251078Speter com_events -= (com->iptr - com->ibuf); 256351078Speter com->iptr = com->ibuf; 256451078Speter } 256572200Sbmilekic mtx_unlock_spin(&sio_lock); 256651078Speter comstart(tp); 256751078Speter} 256851078Speter 256951078Speterstatic int 257051078Spetercommctl(com, bits, how) 257151078Speter struct com_s *com; 257251078Speter int bits; 257351078Speter int how; 257451078Speter{ 257551078Speter int mcr; 257651078Speter int msr; 257751078Speter 257851078Speter if (how == DMGET) { 257951078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 258051078Speter mcr = com->mcr_image; 258151078Speter if (mcr & MCR_DTR) 258251078Speter bits |= TIOCM_DTR; 258351078Speter if (mcr & MCR_RTS) 258451078Speter bits |= TIOCM_RTS; 258551078Speter msr = com->prev_modem_status; 258651078Speter if (msr & MSR_CTS) 258751078Speter bits |= TIOCM_CTS; 258851078Speter if (msr & MSR_DCD) 258951078Speter bits |= TIOCM_CD; 259051078Speter if (msr & MSR_DSR) 259151078Speter bits |= TIOCM_DSR; 259251078Speter /* 259351078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 259451078Speter * more volatile by reading the modem status a lot. Perhaps 259551078Speter * we should latch both bits until the status is read here. 259651078Speter */ 259751078Speter if (msr & (MSR_RI | MSR_TERI)) 259851078Speter bits |= TIOCM_RI; 259951078Speter return (bits); 260051078Speter } 260151078Speter mcr = 0; 260251078Speter if (bits & TIOCM_DTR) 260351078Speter mcr |= MCR_DTR; 260451078Speter if (bits & TIOCM_RTS) 260551078Speter mcr |= MCR_RTS; 260651078Speter if (com->gone) 260751078Speter return(0); 260872200Sbmilekic mtx_lock_spin(&sio_lock); 260951078Speter switch (how) { 261051078Speter case DMSET: 261151078Speter outb(com->modem_ctl_port, 261251078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 261351078Speter break; 261451078Speter case DMBIS: 261551078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 261651078Speter break; 261751078Speter case DMBIC: 261851078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 261951078Speter break; 262051078Speter } 262172200Sbmilekic mtx_unlock_spin(&sio_lock); 262251078Speter return (0); 262351078Speter} 262451078Speter 262551078Speterstatic void 262651078Spetersiosettimeout() 262751078Speter{ 262851078Speter struct com_s *com; 262951078Speter bool_t someopen; 263051078Speter int unit; 263151078Speter 263251078Speter /* 263351078Speter * Set our timeout period to 1 second if no polled devices are open. 263451078Speter * Otherwise set it to max(1/200, 1/hz). 263551078Speter * Enable timeouts iff some device is open. 263651078Speter */ 263751078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 263851078Speter sio_timeout = hz; 263951078Speter someopen = FALSE; 264053344Speter for (unit = 0; unit < sio_numunits; ++unit) { 264151078Speter com = com_addr(unit); 264251078Speter if (com != NULL && com->tp != NULL 264351078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 264451078Speter someopen = TRUE; 264551078Speter if (com->poll || com->poll_output) { 264651078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 264751078Speter break; 264851078Speter } 264951078Speter } 265051078Speter } 265151078Speter if (someopen) { 265251078Speter sio_timeouts_until_log = hz / sio_timeout; 265351078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 265451078Speter sio_timeout); 265551078Speter } else { 265651078Speter /* Flush error messages, if any. */ 265751078Speter sio_timeouts_until_log = 1; 265851078Speter comwakeup((void *)NULL); 265951078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 266051078Speter } 266151078Speter} 266251078Speter 266351078Speterstatic void 266451078Spetercomwakeup(chan) 266551078Speter void *chan; 266651078Speter{ 266751078Speter struct com_s *com; 266851078Speter int unit; 266951078Speter 267051078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 267151078Speter 267251078Speter /* 267351078Speter * Recover from lost output interrupts. 267451078Speter * Poll any lines that don't use interrupts. 267551078Speter */ 267653344Speter for (unit = 0; unit < sio_numunits; ++unit) { 267751078Speter com = com_addr(unit); 267851078Speter if (com != NULL && !com->gone 267951078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 268072200Sbmilekic mtx_lock_spin(&sio_lock); 268151078Speter siointr1(com); 268272200Sbmilekic mtx_unlock_spin(&sio_lock); 268351078Speter } 268451078Speter } 268551078Speter 268651078Speter /* 268751078Speter * Check for and log errors, but not too often. 268851078Speter */ 268951078Speter if (--sio_timeouts_until_log > 0) 269051078Speter return; 269151078Speter sio_timeouts_until_log = hz / sio_timeout; 269253344Speter for (unit = 0; unit < sio_numunits; ++unit) { 269351078Speter int errnum; 269451078Speter 269551078Speter com = com_addr(unit); 269651078Speter if (com == NULL) 269751078Speter continue; 269851078Speter if (com->gone) 269951078Speter continue; 270051078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 270151078Speter u_int delta; 270251078Speter u_long total; 270351078Speter 270472200Sbmilekic mtx_lock_spin(&sio_lock); 270551078Speter delta = com->delta_error_counts[errnum]; 270651078Speter com->delta_error_counts[errnum] = 0; 270772200Sbmilekic mtx_unlock_spin(&sio_lock); 270851078Speter if (delta == 0) 270951078Speter continue; 271051078Speter total = com->error_counts[errnum] += delta; 271151078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 271251078Speter unit, delta, error_desc[errnum], 271351078Speter delta == 1 ? "" : "s", total); 271451078Speter } 271551078Speter } 271651078Speter} 271751078Speter 271851078Speterstatic void 271951078Speterdisc_optim(tp, t, com) 272051078Speter struct tty *tp; 272151078Speter struct termios *t; 272251078Speter struct com_s *com; 272351078Speter{ 272451078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 272551078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 272651078Speter && (!(t->c_iflag & PARMRK) 272751078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 272851078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 272951078Speter && linesw[tp->t_line].l_rint == ttyinput) 273051078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 273151078Speter else 273251078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 273351078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 273451078Speter} 273551078Speter 273651078Speter/* 273751078Speter * Following are all routines needed for SIO to act as console 273851078Speter */ 273951078Speter#include <sys/cons.h> 274051078Speter 274151078Speterstruct siocnstate { 274251078Speter u_char dlbl; 274351078Speter u_char dlbh; 274451078Speter u_char ier; 274551078Speter u_char cfcr; 274651078Speter u_char mcr; 274751078Speter}; 274851078Speter 274966230Sjhb#ifndef __alpha__ 275092739Salfredstatic speed_t siocngetspeed(Port_t, u_long rclk); 275166230Sjhb#endif 275293010Sbdestatic void siocnclose(struct siocnstate *sp, Port_t iobase); 275393010Sbdestatic void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 275493010Sbdestatic void siocntxwait(Port_t iobase); 275551078Speter 275666230Sjhb#ifdef __alpha__ 275792739Salfredint siocnattach(int port, int speed); 275892739Salfredint siogdbattach(int port, int speed); 275992739Salfredint siogdbgetc(void); 276092739Salfredvoid siogdbputc(int c); 276166230Sjhb#else 276251078Speterstatic cn_probe_t siocnprobe; 276351078Speterstatic cn_init_t siocninit; 276485371Sjlemonstatic cn_term_t siocnterm; 276566230Sjhb#endif 276651078Speterstatic cn_checkc_t siocncheckc; 276751078Speterstatic cn_getc_t siocngetc; 276851078Speterstatic cn_putc_t siocnputc; 276951078Speter 277083832Sdfr#ifndef __alpha__ 277185371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 277255823Syokota siocnputc, NULL); 277351078Speter#endif 277451078Speter 277551078Speter/* To get the GDB related variables */ 277651078Speter#if DDB > 0 277751078Speter#include <ddb/ddb.h> 277851078Speter#endif 277951078Speter 278051078Speterstatic void 278151078Spetersiocntxwait(iobase) 278251078Speter Port_t iobase; 278351078Speter{ 278451078Speter int timo; 278551078Speter 278651078Speter /* 278751078Speter * Wait for any pending transmission to finish. Required to avoid 278851078Speter * the UART lockup bug when the speed is changed, and for normal 278951078Speter * transmits. 279051078Speter */ 279151078Speter timo = 100000; 279251078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 279351078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 279451078Speter ; 279551078Speter} 279651078Speter 279766230Sjhb#ifndef __alpha__ 279866230Sjhb 279951078Speter/* 280051078Speter * Read the serial port specified and try to figure out what speed 280151078Speter * it's currently running at. We're assuming the serial port has 280251078Speter * been initialized and is basicly idle. This routine is only intended 280351078Speter * to be run at system startup. 280451078Speter * 280551078Speter * If the value read from the serial port doesn't make sense, return 0. 280651078Speter */ 280751078Speter 280851078Speterstatic speed_t 280989986Sjhaysiocngetspeed(iobase, rclk) 281089986Sjhay Port_t iobase; 281189986Sjhay u_long rclk; 281251078Speter{ 281389986Sjhay u_int divisor; 281451078Speter u_char dlbh; 281551078Speter u_char dlbl; 281651078Speter u_char cfcr; 281751078Speter 281851078Speter cfcr = inb(iobase + com_cfcr); 281951078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 282051078Speter 282151078Speter dlbl = inb(iobase + com_dlbl); 282251078Speter dlbh = inb(iobase + com_dlbh); 282351078Speter 282451078Speter outb(iobase + com_cfcr, cfcr); 282551078Speter 282689986Sjhay divisor = dlbh << 8 | dlbl; 282751078Speter 282889986Sjhay /* XXX there should be more sanity checking. */ 282989986Sjhay if (divisor == 0) 283089986Sjhay return (CONSPEED); 283189986Sjhay return (rclk / (16UL * divisor)); 283251078Speter} 283351078Speter 283466230Sjhb#endif 283566230Sjhb 283651078Speterstatic void 283751078Spetersiocnopen(sp, iobase, speed) 283851078Speter struct siocnstate *sp; 283951078Speter Port_t iobase; 284051078Speter int speed; 284151078Speter{ 284289986Sjhay u_int divisor; 284351078Speter u_char dlbh; 284451078Speter u_char dlbl; 284551078Speter 284651078Speter /* 284751078Speter * Save all the device control registers except the fifo register 284851078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 284951078Speter * We can't save the fifo register since it is read-only. 285051078Speter */ 285151078Speter sp->ier = inb(iobase + com_ier); 285251078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 285351078Speter siocntxwait(iobase); 285451078Speter sp->cfcr = inb(iobase + com_cfcr); 285551078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 285651078Speter sp->dlbl = inb(iobase + com_dlbl); 285751078Speter sp->dlbh = inb(iobase + com_dlbh); 285851078Speter /* 285951078Speter * Only set the divisor registers if they would change, since on 286051078Speter * some 16550 incompatibles (Startech), setting them clears the 286151078Speter * data input register. This also reduces the effects of the 286251078Speter * UMC8669F bug. 286351078Speter */ 286489986Sjhay divisor = siodivisor(comdefaultrclk, speed); 286551078Speter dlbl = divisor & 0xFF; 286651078Speter if (sp->dlbl != dlbl) 286751078Speter outb(iobase + com_dlbl, dlbl); 286889986Sjhay dlbh = divisor >> 8; 286951078Speter if (sp->dlbh != dlbh) 287051078Speter outb(iobase + com_dlbh, dlbh); 287151078Speter outb(iobase + com_cfcr, CFCR_8BITS); 287251078Speter sp->mcr = inb(iobase + com_mcr); 287351078Speter /* 287451078Speter * We don't want interrupts, but must be careful not to "disable" 287551078Speter * them by clearing the MCR_IENABLE bit, since that might cause 287651078Speter * an interrupt by floating the IRQ line. 287751078Speter */ 287851078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 287951078Speter} 288051078Speter 288151078Speterstatic void 288251078Spetersiocnclose(sp, iobase) 288351078Speter struct siocnstate *sp; 288451078Speter Port_t iobase; 288551078Speter{ 288651078Speter /* 288751078Speter * Restore the device control registers. 288851078Speter */ 288951078Speter siocntxwait(iobase); 289051078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 289151078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 289251078Speter outb(iobase + com_dlbl, sp->dlbl); 289351078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 289451078Speter outb(iobase + com_dlbh, sp->dlbh); 289551078Speter outb(iobase + com_cfcr, sp->cfcr); 289651078Speter /* 289751078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 289851078Speter */ 289951078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 290051078Speter outb(iobase + com_ier, sp->ier); 290151078Speter} 290251078Speter 290366230Sjhb#ifndef __alpha__ 290466230Sjhb 290551078Speterstatic void 290651078Spetersiocnprobe(cp) 290751078Speter struct consdev *cp; 290851078Speter{ 290951078Speter speed_t boot_speed; 291051078Speter u_char cfcr; 291189986Sjhay u_int divisor; 291251078Speter int s, unit; 291351078Speter struct siocnstate sp; 291451078Speter 291551078Speter /* 291651078Speter * Find our first enabled console, if any. If it is a high-level 291751078Speter * console device, then initialize it and return successfully. 291851078Speter * If it is a low-level console device, then initialize it and 291951078Speter * return unsuccessfully. It must be initialized in both cases 292051078Speter * for early use by console drivers and debuggers. Initializing 292151078Speter * the hardware is not necessary in all cases, since the i/o 292251078Speter * routines initialize it on the fly, but it is necessary if 292351078Speter * input might arrive while the hardware is switched back to an 292451078Speter * uninitialized state. We can't handle multiple console devices 292551078Speter * yet because our low-level routines don't take a device arg. 292651078Speter * We trust the user to set the console flags properly so that we 292751078Speter * don't need to probe. 292851078Speter */ 292951078Speter cp->cn_pri = CN_DEAD; 293051078Speter 293151078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 293251078Speter int flags; 293351078Speter int disabled; 293451078Speter if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 293551078Speter if (disabled) 293651078Speter continue; 293751078Speter } 293851078Speter if (resource_int_value("sio", unit, "flags", &flags)) 293951078Speter continue; 294051078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 294151078Speter int port; 294251078Speter Port_t iobase; 294351078Speter 294451078Speter if (resource_int_value("sio", unit, "port", &port)) 294551078Speter continue; 294651078Speter iobase = port; 294751078Speter s = spltty(); 294851078Speter if (boothowto & RB_SERIAL) { 294989986Sjhay boot_speed = 295089986Sjhay siocngetspeed(iobase, comdefaultrclk); 295151078Speter if (boot_speed) 295251078Speter comdefaultrate = boot_speed; 295351078Speter } 295451078Speter 295551078Speter /* 295651078Speter * Initialize the divisor latch. We can't rely on 295751078Speter * siocnopen() to do this the first time, since it 295851078Speter * avoids writing to the latch if the latch appears 295951078Speter * to have the correct value. Also, if we didn't 296051078Speter * just read the speed from the hardware, then we 296151078Speter * need to set the speed in hardware so that 296251078Speter * switching it later is null. 296351078Speter */ 296451078Speter cfcr = inb(iobase + com_cfcr); 296551078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 296689986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 296789986Sjhay outb(iobase + com_dlbl, divisor & 0xff); 296889986Sjhay outb(iobase + com_dlbh, divisor >> 8); 296951078Speter outb(iobase + com_cfcr, cfcr); 297051078Speter 297151078Speter siocnopen(&sp, iobase, comdefaultrate); 297251078Speter 297351078Speter splx(s); 297451078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 297551078Speter cp->cn_dev = makedev(CDEV_MAJOR, unit); 297651078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 297751078Speter || boothowto & RB_SERIAL 297851078Speter ? CN_REMOTE : CN_NORMAL; 297951078Speter siocniobase = iobase; 298051078Speter siocnunit = unit; 298151078Speter } 298251078Speter if (COM_DEBUGGER(flags)) { 298351078Speter printf("sio%d: gdb debugging port\n", unit); 298451078Speter siogdbiobase = iobase; 298551078Speter siogdbunit = unit; 298651078Speter#if DDB > 0 298751078Speter gdbdev = makedev(CDEV_MAJOR, unit); 298851078Speter gdb_getc = siocngetc; 298951078Speter gdb_putc = siocnputc; 299051078Speter#endif 299151078Speter } 299251078Speter } 299351078Speter } 299451078Speter#ifdef __i386__ 299551078Speter#if DDB > 0 299651078Speter /* 299751078Speter * XXX Ugly Compatability. 299851078Speter * If no gdb port has been specified, set it to be the console 299951078Speter * as some configuration files don't specify the gdb port. 300051078Speter */ 300151078Speter if (gdbdev == NODEV && (boothowto & RB_GDB)) { 300251078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 300351078Speter siocnunit); 300451078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 300551078Speter printf("configuration file (currently sio only).\n"); 300651078Speter siogdbiobase = siocniobase; 300751078Speter siogdbunit = siocnunit; 300851078Speter gdbdev = makedev(CDEV_MAJOR, siocnunit); 300951078Speter gdb_getc = siocngetc; 301051078Speter gdb_putc = siocnputc; 301151078Speter } 301251078Speter#endif 301351078Speter#endif 301451078Speter} 301551078Speter 301666230Sjhbstatic void 301766230Sjhbsiocninit(cp) 301866230Sjhb struct consdev *cp; 301966230Sjhb{ 302066230Sjhb comconsole = DEV_TO_UNIT(cp->cn_dev); 302166230Sjhb} 302266230Sjhb 302385371Sjlemonstatic void 302485371Sjlemonsiocnterm(cp) 302585371Sjlemon struct consdev *cp; 302685371Sjlemon{ 302785371Sjlemon comconsole = -1; 302885371Sjlemon} 302985371Sjlemon 303066230Sjhb#endif 303166230Sjhb 303251078Speter#ifdef __alpha__ 303351078Speter 303455868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 303551078Speter 303651078Speterint 303751078Spetersiocnattach(port, speed) 303851078Speter int port; 303951078Speter int speed; 304051078Speter{ 304151078Speter int s; 304251078Speter u_char cfcr; 304389986Sjhay u_int divisor; 304451078Speter struct siocnstate sp; 304598691Sn_hibma int unit = 0; /* XXX random value! */ 304651078Speter 304751078Speter siocniobase = port; 304898691Sn_hibma siocnunit = unit; 304951078Speter comdefaultrate = speed; 305051078Speter sio_consdev.cn_pri = CN_NORMAL; 305198691Sn_hibma sio_consdev.cn_dev = makedev(CDEV_MAJOR, unit); 305251078Speter 305351078Speter s = spltty(); 305451078Speter 305551078Speter /* 305651078Speter * Initialize the divisor latch. We can't rely on 305751078Speter * siocnopen() to do this the first time, since it 305851078Speter * avoids writing to the latch if the latch appears 305951078Speter * to have the correct value. Also, if we didn't 306051078Speter * just read the speed from the hardware, then we 306151078Speter * need to set the speed in hardware so that 306251078Speter * switching it later is null. 306351078Speter */ 306451078Speter cfcr = inb(siocniobase + com_cfcr); 306551078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 306689986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 306789986Sjhay outb(siocniobase + com_dlbl, divisor & 0xff); 306889986Sjhay outb(siocniobase + com_dlbh, divisor >> 8); 306951078Speter outb(siocniobase + com_cfcr, cfcr); 307051078Speter 307151078Speter siocnopen(&sp, siocniobase, comdefaultrate); 307251078Speter splx(s); 307351078Speter 307485426Sjlemon cnadd(&sio_consdev); 307558885Simp return (0); 307651078Speter} 307751078Speter 307851078Speterint 307951078Spetersiogdbattach(port, speed) 308051078Speter int port; 308151078Speter int speed; 308251078Speter{ 308351078Speter int s; 308451078Speter u_char cfcr; 308589986Sjhay u_int divisor; 308651078Speter struct siocnstate sp; 308798691Sn_hibma int unit = 1; /* XXX random value! */ 308851078Speter 308951078Speter siogdbiobase = port; 309051078Speter gdbdefaultrate = speed; 309151078Speter 309265714Sjhb printf("sio%d: gdb debugging port\n", unit); 309365714Sjhb siogdbunit = unit; 309465714Sjhb#if DDB > 0 309565714Sjhb gdbdev = makedev(CDEV_MAJOR, unit); 309665714Sjhb gdb_getc = siocngetc; 309765714Sjhb gdb_putc = siocnputc; 309865714Sjhb#endif 309965714Sjhb 310051078Speter s = spltty(); 310151078Speter 310251078Speter /* 310351078Speter * Initialize the divisor latch. We can't rely on 310451078Speter * siocnopen() to do this the first time, since it 310551078Speter * avoids writing to the latch if the latch appears 310651078Speter * to have the correct value. Also, if we didn't 310751078Speter * just read the speed from the hardware, then we 310851078Speter * need to set the speed in hardware so that 310951078Speter * switching it later is null. 311051078Speter */ 311151078Speter cfcr = inb(siogdbiobase + com_cfcr); 311251078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 311389986Sjhay divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 311489986Sjhay outb(siogdbiobase + com_dlbl, divisor & 0xff); 311589986Sjhay outb(siogdbiobase + com_dlbh, divisor >> 8); 311651078Speter outb(siogdbiobase + com_cfcr, cfcr); 311751078Speter 311851078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 311951078Speter splx(s); 312051078Speter 312158885Simp return (0); 312251078Speter} 312351078Speter 312451078Speter#endif 312551078Speter 312651078Speterstatic int 312751078Spetersiocncheckc(dev) 312851078Speter dev_t dev; 312951078Speter{ 313051078Speter int c; 313151078Speter Port_t iobase; 313251078Speter int s; 313351078Speter struct siocnstate sp; 313498401Sn_hibma speed_t speed; 313551078Speter 313698401Sn_hibma if (minor(dev) == siocnunit) { 313798401Sn_hibma iobase = siocniobase; 313898401Sn_hibma speed = comdefaultrate; 313998401Sn_hibma } else { 314051078Speter iobase = siogdbiobase; 314198401Sn_hibma speed = gdbdefaultrate; 314298401Sn_hibma } 314351078Speter s = spltty(); 314498401Sn_hibma siocnopen(&sp, iobase, speed); 314551078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 314651078Speter c = inb(iobase + com_data); 314751078Speter else 314851078Speter c = -1; 314951078Speter siocnclose(&sp, iobase); 315051078Speter splx(s); 315151078Speter return (c); 315251078Speter} 315351078Speter 315451078Speter 315551078Speterint 315651078Spetersiocngetc(dev) 315751078Speter dev_t dev; 315851078Speter{ 315951078Speter int c; 316051078Speter Port_t iobase; 316151078Speter int s; 316251078Speter struct siocnstate sp; 316398401Sn_hibma speed_t speed; 316451078Speter 316598401Sn_hibma if (minor(dev) == siocnunit) { 316698401Sn_hibma iobase = siocniobase; 316798401Sn_hibma speed = comdefaultrate; 316898401Sn_hibma } else { 316951078Speter iobase = siogdbiobase; 317098401Sn_hibma speed = gdbdefaultrate; 317198401Sn_hibma } 317251078Speter s = spltty(); 317398401Sn_hibma siocnopen(&sp, iobase, speed); 317451078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 317551078Speter ; 317651078Speter c = inb(iobase + com_data); 317751078Speter siocnclose(&sp, iobase); 317851078Speter splx(s); 317951078Speter return (c); 318051078Speter} 318151078Speter 318251078Spetervoid 318351078Spetersiocnputc(dev, c) 318451078Speter dev_t dev; 318551078Speter int c; 318651078Speter{ 318788582Sbde int need_unlock; 318851078Speter int s; 318951078Speter struct siocnstate sp; 319051078Speter Port_t iobase; 319198401Sn_hibma speed_t speed; 319251078Speter 319398401Sn_hibma if (minor(dev) == siocnunit) { 319498401Sn_hibma iobase = siocniobase; 319598401Sn_hibma speed = comdefaultrate; 319698401Sn_hibma } else { 319751078Speter iobase = siogdbiobase; 319898401Sn_hibma speed = gdbdefaultrate; 319998401Sn_hibma } 320051078Speter s = spltty(); 320188582Sbde need_unlock = 0; 320288582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 320384029Sjlemon mtx_lock_spin(&sio_lock); 320488582Sbde need_unlock = 1; 320588582Sbde } 320698401Sn_hibma siocnopen(&sp, iobase, speed); 320751078Speter siocntxwait(iobase); 320851078Speter outb(iobase + com_data, c); 320951078Speter siocnclose(&sp, iobase); 321088582Sbde if (need_unlock) 321184029Sjlemon mtx_unlock_spin(&sio_lock); 321251078Speter splx(s); 321351078Speter} 321451078Speter 321551078Speter#ifdef __alpha__ 321651078Speterint 321751078Spetersiogdbgetc() 321851078Speter{ 321951078Speter int c; 322051078Speter Port_t iobase; 322198401Sn_hibma speed_t speed; 322251078Speter int s; 322351078Speter struct siocnstate sp; 322451078Speter 322598619Sn_hibma if (siogdbunit == siocnunit) { 322698401Sn_hibma iobase = siocniobase; 322798401Sn_hibma speed = comdefaultrate; 322898401Sn_hibma } else { 322998401Sn_hibma iobase = siogdbiobase; 323098401Sn_hibma speed = gdbdefaultrate; 323198401Sn_hibma } 323298401Sn_hibma 323351078Speter s = spltty(); 323498401Sn_hibma siocnopen(&sp, iobase, speed); 323551078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 323651078Speter ; 323751078Speter c = inb(iobase + com_data); 323851078Speter siocnclose(&sp, iobase); 323951078Speter splx(s); 324051078Speter return (c); 324151078Speter} 324251078Speter 324351078Spetervoid 324451078Spetersiogdbputc(c) 324551078Speter int c; 324651078Speter{ 324798401Sn_hibma Port_t iobase; 324898401Sn_hibma speed_t speed; 324951078Speter int s; 325051078Speter struct siocnstate sp; 325151078Speter 325298619Sn_hibma if (siogdbunit == siocnunit) { 325398401Sn_hibma iobase = siocniobase; 325498401Sn_hibma speed = comdefaultrate; 325598401Sn_hibma } else { 325698401Sn_hibma iobase = siogdbiobase; 325798401Sn_hibma speed = gdbdefaultrate; 325898401Sn_hibma } 325998401Sn_hibma 326051078Speter s = spltty(); 326198401Sn_hibma siocnopen(&sp, iobase, speed); 326251078Speter siocntxwait(siogdbiobase); 326351078Speter outb(siogdbiobase + com_data, c); 326451078Speter siocnclose(&sp, siogdbiobase); 326551078Speter splx(s); 326651078Speter} 326751078Speter#endif 3268