if_fea.c revision 152296
1/*- 2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. The name of the author may not be used to endorse or promote products 11 * derived from this software without specific prior written permission 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * $FreeBSD: head/sys/dev/pdq/if_fea.c 152296 2005-11-11 07:36:14Z ru $ 25 */ 26 27/* 28 * DEC PDQ FDDI Controller 29 * 30 * This module support the DEFEA EISA FDDI Controller. 31 */ 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/kernel.h> 36#include <sys/socket.h> 37 38#include <sys/module.h> 39#include <sys/bus.h> 40 41#include <machine/bus.h> 42#include <machine/resource.h> 43#include <sys/rman.h> 44 45#include <net/if.h> 46#include <net/if_media.h> 47#include <net/fddi.h> 48 49#include <dev/eisa/eisaconf.h> 50 51#include <dev/pdq/pdq_freebsd.h> 52#include <dev/pdq/pdqreg.h> 53 54static void pdq_eisa_subprobe (pdq_bus_t, u_int32_t, u_int32_t *, u_int32_t *, u_int32_t *); 55static void pdq_eisa_devinit (pdq_softc_t *); 56static const char * pdq_eisa_match (eisa_id_t); 57 58static int pdq_eisa_probe (device_t); 59static int pdq_eisa_attach (device_t); 60static int pdq_eisa_detach (device_t); 61static int pdq_eisa_shutdown (device_t); 62static void pdq_eisa_ifintr (void *); 63 64#define DEFEA_IRQS 0x0000FBA9U 65 66#define DEFEA_INTRENABLE 0x8 /* level interrupt */ 67#define DEFEA_DECODE_IRQ(n) ((DEFEA_IRQS >> ((n) << 2)) & 0x0f) 68 69#define EISA_DEVICE_ID_DEC_DEC3001 0x10a33001 70#define EISA_DEVICE_ID_DEC_DEC3002 0x10a33002 71#define EISA_DEVICE_ID_DEC_DEC3003 0x10a33003 72#define EISA_DEVICE_ID_DEC_DEC3004 0x10a33004 73 74static void 75pdq_eisa_subprobe(bc, iobase, maddr, msize, irq) 76 pdq_bus_t bc; 77 u_int32_t iobase; 78 u_int32_t *maddr; 79 u_int32_t *msize; 80 u_int32_t *irq; 81{ 82 if (irq != NULL) 83 *irq = DEFEA_DECODE_IRQ(PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_IO_CONFIG_STAT_0) & 3); 84 *maddr = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_0) << 8) 85 | (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_1) << 16); 86 *msize = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_MASK_0) + 4) << 8; 87 88 return; 89} 90 91static void 92pdq_eisa_devinit (sc) 93 pdq_softc_t *sc; 94{ 95 pdq_uint8_t data; 96 97 /* 98 * Do the standard initialization for the DEFEA registers. 99 */ 100 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_FUNCTION_CTRL, 0x23); 101 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_1_1, (sc->io_bsh >> 8) & 0xF0); 102 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_0_1, (sc->io_bsh >> 8) & 0xF0); 103 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_SLOT_CTRL, 0x01); 104 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF); 105#if defined(PDQ_IOMAPPED) 106 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data & ~1); 107#else 108 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data | 1); 109#endif 110 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0); 111 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0, data | DEFEA_INTRENABLE); 112 113 return; 114} 115 116static const char * 117pdq_eisa_match (type) 118 eisa_id_t type; 119{ 120 switch (type) { 121 case EISA_DEVICE_ID_DEC_DEC3001: 122 case EISA_DEVICE_ID_DEC_DEC3002: 123 case EISA_DEVICE_ID_DEC_DEC3003: 124 case EISA_DEVICE_ID_DEC_DEC3004: 125 return ("DEC FDDIcontroller/EISA Adapter"); 126 break; 127 default: 128 break; 129 } 130 return (NULL); 131} 132 133static int 134pdq_eisa_probe (dev) 135 device_t dev; 136{ 137 const char *desc; 138 u_int32_t iobase; 139 u_int32_t irq; 140 u_int32_t maddr; 141 u_int32_t msize; 142 143 u_int32_t eisa_id = eisa_get_id(dev);; 144 145 desc = pdq_eisa_match(eisa_id); 146 if (!desc) { 147 return (ENXIO); 148 } 149 150 device_set_desc(dev, desc); 151 152 iobase = eisa_get_slot(dev) * EISA_SLOT_SIZE; 153 pdq_eisa_subprobe((pdq_bus_t)SYS_RES_IOPORT, iobase, &maddr, &msize, &irq); 154 155 eisa_add_iospace(dev, iobase, 0x200, RESVADDR_NONE); 156 eisa_add_mspace(dev, maddr, msize, RESVADDR_NONE); 157 eisa_add_intr(dev, irq, EISA_TRIGGER_LEVEL); 158 159 return (0); 160} 161 162static void 163pdq_eisa_ifintr(arg) 164 void * arg; 165{ 166 device_t dev; 167 pdq_softc_t * sc; 168 169 dev = (device_t)arg; 170 sc = device_get_softc(dev); 171 172 PDQ_LOCK(sc); 173 (void) pdq_interrupt(sc->sc_pdq); 174 PDQ_LOCK(sc); 175 176 return; 177} 178 179static int 180pdq_eisa_attach (dev) 181 device_t dev; 182{ 183 pdq_softc_t * sc; 184 struct ifnet * ifp; 185 int error; 186 187 sc = device_get_softc(dev); 188 ifp = sc->ifp; 189 190 sc->dev = dev; 191 192 sc->io_rid = 0; 193 sc->io_type = SYS_RES_IOPORT; 194 sc->io = bus_alloc_resource_any(dev, sc->io_type, &sc->io_rid, 195 RF_ACTIVE); 196 if (!sc->io) { 197 device_printf(dev, "Unable to allocate I/O space resource.\n"); 198 error = ENXIO; 199 goto bad; 200 } 201 sc->io_bsh = rman_get_bushandle(sc->io); 202 sc->io_bst = rman_get_bustag(sc->io); 203 204 sc->mem_rid = 0; 205 sc->mem_type = SYS_RES_MEMORY; 206 sc->mem = bus_alloc_resource_any(dev, sc->mem_type, &sc->mem_rid, 207 RF_ACTIVE); 208 if (!sc->mem) { 209 device_printf(dev, "Unable to allocate memory resource.\n"); 210 error = ENXIO; 211 goto bad; 212 } 213 sc->mem_bsh = rman_get_bushandle(sc->mem); 214 sc->mem_bst = rman_get_bustag(sc->mem); 215 216 sc->irq_rid = 0; 217 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, 218 RF_SHAREABLE | RF_ACTIVE); 219 if (!sc->irq) { 220 device_printf(dev, "Unable to allocate interrupt resource.\n"); 221 error = ENXIO; 222 goto bad; 223 } 224 225 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 226 227 pdq_eisa_devinit(sc); 228 sc->sc_pdq = pdq_initialize(sc->mem_bst, sc->mem_bsh, 229 ifp->if_xname, -1, 230 (void *)sc, PDQ_DEFEA); 231 if (sc->sc_pdq == NULL) { 232 device_printf(dev, "Initialization failed.\n"); 233 error = ENXIO; 234 goto bad; 235 } 236 237 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET, 238 pdq_eisa_ifintr, dev, &sc->irq_ih); 239 if (error) { 240 device_printf(dev, "Failed to setup interrupt handler.\n"); 241 error = ENXIO; 242 goto bad; 243 } 244 245 pdq_ifattach(sc, sc->sc_pdq->pdq_hwaddr.lanaddr_bytes); 246 247 return (0); 248bad: 249 pdq_free(dev); 250 return (error); 251} 252 253static int 254pdq_eisa_detach (dev) 255 device_t dev; 256{ 257 pdq_softc_t * sc; 258 259 sc = device_get_softc(dev); 260 pdq_ifdetach(sc); 261 262 return (0); 263} 264 265static int 266pdq_eisa_shutdown(dev) 267 device_t dev; 268{ 269 pdq_softc_t * sc; 270 271 sc = device_get_softc(dev); 272 pdq_hwreset(sc->sc_pdq); 273 274 return (0); 275} 276 277static device_method_t pdq_eisa_methods[] = { 278 DEVMETHOD(device_probe, pdq_eisa_probe), 279 DEVMETHOD(device_attach, pdq_eisa_attach), 280 DEVMETHOD(device_attach, pdq_eisa_detach), 281 DEVMETHOD(device_shutdown, pdq_eisa_shutdown), 282 283 { 0, 0 } 284}; 285 286static driver_t pdq_eisa_driver = { 287 "fea", 288 pdq_eisa_methods, 289 sizeof(pdq_softc_t), 290}; 291 292DRIVER_MODULE(fea, eisa, pdq_eisa_driver, pdq_devclass, 0, 0); 293/* MODULE_DEPEND(fea, eisa, 1, 1, 1); */ 294MODULE_DEPEND(fea, fddi, 1, 1, 1); 295