rlswitch.c revision 213364
1/*- 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * Copyright (c) 2006 Bernd Walter. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include <sys/cdefs.h> 35__FBSDID("$FreeBSD: head/sys/dev/mii/rlswitch.c 213364 2010-10-02 18:53:12Z marius $"); 36 37/* 38 * driver for RealTek 8305 pseudo PHYs 39 */ 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/kernel.h> 44#include <sys/module.h> 45#include <sys/socket.h> 46#include <sys/bus.h> 47 48#include <net/if.h> 49#include <net/if_arp.h> 50#include <net/if_media.h> 51 52#include <dev/mii/mii.h> 53#include <dev/mii/miivar.h> 54#include "miidevs.h" 55 56#include <machine/bus.h> 57#include <pci/if_rlreg.h> 58 59#include "miibus_if.h" 60 61//#define RL_DEBUG 62#define RL_VLAN 63 64static int rlswitch_probe(device_t); 65static int rlswitch_attach(device_t); 66 67static device_method_t rlswitch_methods[] = { 68 /* device interface */ 69 DEVMETHOD(device_probe, rlswitch_probe), 70 DEVMETHOD(device_attach, rlswitch_attach), 71 DEVMETHOD(device_detach, mii_phy_detach), 72 DEVMETHOD(device_shutdown, bus_generic_shutdown), 73 { 0, 0 } 74}; 75 76static devclass_t rlswitch_devclass; 77 78static driver_t rlswitch_driver = { 79 "rlswitch", 80 rlswitch_methods, 81 sizeof(struct mii_softc) 82}; 83 84DRIVER_MODULE(rlswitch, miibus, rlswitch_driver, rlswitch_devclass, 0, 0); 85 86static int rlswitch_service(struct mii_softc *, struct mii_data *, int); 87static void rlswitch_status(struct mii_softc *); 88 89#ifdef RL_DEBUG 90static void rlswitch_phydump(device_t dev); 91#endif 92 93static const struct mii_phydesc rlswitches[] = { 94 MII_PHY_DESC(xxREALTEK, RTL8305SC), 95 MII_PHY_END 96}; 97 98static int 99rlswitch_probe(device_t dev) 100{ 101 int rv; 102 103 rv = mii_phy_dev_probe(dev, rlswitches, BUS_PROBE_DEFAULT); 104 if (rv <= 0) 105 return (rv); 106 107 return (ENXIO); 108} 109 110static int 111rlswitch_attach(device_t dev) 112{ 113 struct mii_softc *sc; 114 struct mii_attach_args *ma; 115 struct mii_data *mii; 116 117 sc = device_get_softc(dev); 118 ma = device_get_ivars(dev); 119 sc->mii_dev = device_get_parent(dev); 120 mii = ma->mii_data; 121 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 122 123 sc->mii_inst = mii->mii_instance++; 124 sc->mii_phy = ma->mii_phyno; 125 sc->mii_service = rlswitch_service; 126 sc->mii_pdata = mii; 127 128 /* 129 * We handle all pseudo PHYs in a single instance. 130 */ 131 sc->mii_flags |= MIIF_NOISOLATE; 132 133#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 134 135#if 0 136 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 137 MII_MEDIA_100_TX); 138#endif 139 140 sc->mii_capabilities = BMSR_100TXFDX & ma->mii_capmask; 141 device_printf(dev, " "); 142 mii_phy_add_media(sc); 143 printf("\n"); 144#undef ADD 145#ifdef RL_DEBUG 146 rlswitch_phydump(dev); 147#endif 148 149#ifdef RL_VLAN 150 int val; 151 152 /* Global Control 0 */ 153 val = 0; 154 val |= 0 << 10; /* enable 802.1q VLAN Tag support */ 155 val |= 0 << 9; /* enable VLAN ingress filtering */ 156 val |= 1 << 8; /* disable VLAN tag admit control */ 157 val |= 1 << 6; /* internal use */ 158 val |= 1 << 5; /* internal use */ 159 val |= 1 << 4; /* internal use */ 160 val |= 1 << 3; /* internal use */ 161 val |= 1 << 1; /* reserved */ 162 MIIBUS_WRITEREG(sc->mii_dev, 0, 16, val); 163 164 /* Global Control 2 */ 165 val = 0; 166 val |= 1 << 15; /* reserved */ 167 val |= 0 << 14; /* enable 1552 Bytes support */ 168 val |= 1 << 13; /* enable broadcast input drop */ 169 val |= 1 << 12; /* forward reserved control frames */ 170 val |= 1 << 11; /* disable forwarding unicast frames to other VLAN's */ 171 val |= 1 << 10; /* disable forwarding ARP broadcasts to other VLAN's */ 172 val |= 1 << 9; /* enable 48 pass 1 */ 173 val |= 0 << 8; /* enable VLAN */ 174 val |= 1 << 7; /* reserved */ 175 val |= 1 << 6; /* enable defer */ 176 val |= 1 << 5; /* 43ms LED blink time */ 177 val |= 3 << 3; /* 16:1 queue weight */ 178 val |= 1 << 2; /* disable broadcast storm control */ 179 val |= 1 << 1; /* enable power-on LED blinking */ 180 val |= 1 << 0; /* reserved */ 181 MIIBUS_WRITEREG(sc->mii_dev, 0, 18, val); 182 183 /* Port 0 Control Register 0 */ 184 val = 0; 185 val |= 1 << 15; /* reserved */ 186 val |= 1 << 11; /* drop received packets with wrong VLAN tag */ 187 val |= 1 << 10; /* disable 802.1p priority classification */ 188 val |= 1 << 9; /* disable diffserv priority classification */ 189 val |= 1 << 6; /* internal use */ 190 val |= 3 << 4; /* internal use */ 191 val |= 1 << 3; /* internal use */ 192 val |= 1 << 2; /* internal use */ 193 val |= 1 << 0; /* remove VLAN tags on output */ 194 MIIBUS_WRITEREG(sc->mii_dev, 0, 22, val); 195 196 /* Port 1 Control Register 0 */ 197 val = 0; 198 val |= 1 << 15; /* reserved */ 199 val |= 1 << 11; /* drop received packets with wrong VLAN tag */ 200 val |= 1 << 10; /* disable 802.1p priority classification */ 201 val |= 1 << 9; /* disable diffserv priority classification */ 202 val |= 1 << 6; /* internal use */ 203 val |= 3 << 4; /* internal use */ 204 val |= 1 << 3; /* internal use */ 205 val |= 1 << 2; /* internal use */ 206 val |= 1 << 0; /* remove VLAN tags on output */ 207 MIIBUS_WRITEREG(sc->mii_dev, 1, 22, val); 208 209 /* Port 2 Control Register 0 */ 210 val = 0; 211 val |= 1 << 15; /* reserved */ 212 val |= 1 << 11; /* drop received packets with wrong VLAN tag */ 213 val |= 1 << 10; /* disable 802.1p priority classification */ 214 val |= 1 << 9; /* disable diffserv priority classification */ 215 val |= 1 << 6; /* internal use */ 216 val |= 3 << 4; /* internal use */ 217 val |= 1 << 3; /* internal use */ 218 val |= 1 << 2; /* internal use */ 219 val |= 1 << 0; /* remove VLAN tags on output */ 220 MIIBUS_WRITEREG(sc->mii_dev, 2, 22, val); 221 222 /* Port 3 Control Register 0 */ 223 val = 0; 224 val |= 1 << 15; /* reserved */ 225 val |= 1 << 11; /* drop received packets with wrong VLAN tag */ 226 val |= 1 << 10; /* disable 802.1p priority classification */ 227 val |= 1 << 9; /* disable diffserv priority classification */ 228 val |= 1 << 6; /* internal use */ 229 val |= 3 << 4; /* internal use */ 230 val |= 1 << 3; /* internal use */ 231 val |= 1 << 2; /* internal use */ 232 val |= 1 << 0; /* remove VLAN tags on output */ 233 MIIBUS_WRITEREG(sc->mii_dev, 3, 22, val); 234 235 /* Port 4 (system port) Control Register 0 */ 236 val = 0; 237 val |= 1 << 15; /* reserved */ 238 val |= 0 << 11; /* don't drop received packets with wrong VLAN tag */ 239 val |= 1 << 10; /* disable 802.1p priority classification */ 240 val |= 1 << 9; /* disable diffserv priority classification */ 241 val |= 1 << 6; /* internal use */ 242 val |= 3 << 4; /* internal use */ 243 val |= 1 << 3; /* internal use */ 244 val |= 1 << 2; /* internal use */ 245 val |= 2 << 0; /* add VLAN tags for untagged packets on output */ 246 MIIBUS_WRITEREG(sc->mii_dev, 4, 22, val); 247 248 /* Port 0 Control Register 1 and VLAN A */ 249 val = 0; 250 val |= 0x0 << 12; /* Port 0 VLAN Index */ 251 val |= 1 << 11; /* internal use */ 252 val |= 1 << 10; /* internal use */ 253 val |= 1 << 9; /* internal use */ 254 val |= 1 << 7; /* internal use */ 255 val |= 1 << 6; /* internal use */ 256 val |= 0x11 << 0; /* VLAN A membership */ 257 MIIBUS_WRITEREG(sc->mii_dev, 0, 24, val); 258 259 /* Port 0 Control Register 2 and VLAN A */ 260 val = 0; 261 val |= 1 << 15; /* internal use */ 262 val |= 1 << 14; /* internal use */ 263 val |= 1 << 13; /* internal use */ 264 val |= 1 << 12; /* internal use */ 265 val |= 0x100 << 0; /* VLAN A ID */ 266 MIIBUS_WRITEREG(sc->mii_dev, 0, 25, val); 267 268 /* Port 1 Control Register 1 and VLAN B */ 269 val = 0; 270 val |= 0x1 << 12; /* Port 1 VLAN Index */ 271 val |= 1 << 11; /* internal use */ 272 val |= 1 << 10; /* internal use */ 273 val |= 1 << 9; /* internal use */ 274 val |= 1 << 7; /* internal use */ 275 val |= 1 << 6; /* internal use */ 276 val |= 0x12 << 0; /* VLAN B membership */ 277 MIIBUS_WRITEREG(sc->mii_dev, 1, 24, val); 278 279 /* Port 1 Control Register 2 and VLAN B */ 280 val = 0; 281 val |= 1 << 15; /* internal use */ 282 val |= 1 << 14; /* internal use */ 283 val |= 1 << 13; /* internal use */ 284 val |= 1 << 12; /* internal use */ 285 val |= 0x101 << 0; /* VLAN B ID */ 286 MIIBUS_WRITEREG(sc->mii_dev, 1, 25, val); 287 288 /* Port 2 Control Register 1 and VLAN C */ 289 val = 0; 290 val |= 0x2 << 12; /* Port 2 VLAN Index */ 291 val |= 1 << 11; /* internal use */ 292 val |= 1 << 10; /* internal use */ 293 val |= 1 << 9; /* internal use */ 294 val |= 1 << 7; /* internal use */ 295 val |= 1 << 6; /* internal use */ 296 val |= 0x14 << 0; /* VLAN C membership */ 297 MIIBUS_WRITEREG(sc->mii_dev, 2, 24, val); 298 299 /* Port 2 Control Register 2 and VLAN C */ 300 val = 0; 301 val |= 1 << 15; /* internal use */ 302 val |= 1 << 14; /* internal use */ 303 val |= 1 << 13; /* internal use */ 304 val |= 1 << 12; /* internal use */ 305 val |= 0x102 << 0; /* VLAN C ID */ 306 MIIBUS_WRITEREG(sc->mii_dev, 2, 25, val); 307 308 /* Port 3 Control Register 1 and VLAN D */ 309 val = 0; 310 val |= 0x3 << 12; /* Port 3 VLAN Index */ 311 val |= 1 << 11; /* internal use */ 312 val |= 1 << 10; /* internal use */ 313 val |= 1 << 9; /* internal use */ 314 val |= 1 << 7; /* internal use */ 315 val |= 1 << 6; /* internal use */ 316 val |= 0x18 << 0; /* VLAN D membership */ 317 MIIBUS_WRITEREG(sc->mii_dev, 3, 24, val); 318 319 /* Port 3 Control Register 2 and VLAN D */ 320 val = 0; 321 val |= 1 << 15; /* internal use */ 322 val |= 1 << 14; /* internal use */ 323 val |= 1 << 13; /* internal use */ 324 val |= 1 << 12; /* internal use */ 325 val |= 0x103 << 0; /* VLAN D ID */ 326 MIIBUS_WRITEREG(sc->mii_dev, 3, 25, val); 327 328 /* Port 4 Control Register 1 and VLAN E */ 329 val = 0; 330 val |= 0x0 << 12; /* Port 4 VLAN Index */ 331 val |= 1 << 11; /* internal use */ 332 val |= 1 << 10; /* internal use */ 333 val |= 1 << 9; /* internal use */ 334 val |= 1 << 7; /* internal use */ 335 val |= 1 << 6; /* internal use */ 336 val |= 0 << 0; /* VLAN E membership */ 337 MIIBUS_WRITEREG(sc->mii_dev, 4, 24, val); 338 339 /* Port 4 Control Register 2 and VLAN E */ 340 val = 0; 341 val |= 1 << 15; /* internal use */ 342 val |= 1 << 14; /* internal use */ 343 val |= 1 << 13; /* internal use */ 344 val |= 1 << 12; /* internal use */ 345 val |= 0x104 << 0; /* VLAN E ID */ 346 MIIBUS_WRITEREG(sc->mii_dev, 4, 25, val); 347#endif 348 349#ifdef RL_DEBUG 350 rlswitch_phydump(dev); 351#endif 352 MIIBUS_MEDIAINIT(sc->mii_dev); 353 return (0); 354} 355 356static int 357rlswitch_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 358{ 359 360 switch (cmd) { 361 case MII_POLLSTAT: 362 break; 363 364 case MII_MEDIACHG: 365 break; 366 367 case MII_TICK: 368 /* 369 * Is the interface even up? 370 */ 371 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 372 return (0); 373 break; 374 } 375 376 /* Update the media status. */ 377 rlswitch_status(sc); 378 379 /* Callback if something changed. */ 380 // mii_phy_update(sc, cmd); 381 return (0); 382} 383 384static void 385rlswitch_status(struct mii_softc *phy) 386{ 387 struct mii_data *mii = phy->mii_pdata; 388 389 mii->mii_media_status = IFM_AVALID; 390 mii->mii_media_active = IFM_ETHER; 391 mii->mii_media_status |= IFM_ACTIVE; 392 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 393} 394 395#ifdef RL_DEBUG 396static void 397rlswitch_phydump(device_t dev) { 398 int phy, reg, val; 399 struct mii_softc *sc; 400 401 sc = device_get_softc(dev); 402 device_printf(dev, "rlswitchphydump\n"); 403 for (phy = 0; phy <= 5; phy++) { 404 printf("PHY%i:", phy); 405 for (reg = 0; reg <= 31; reg++) { 406 val = MIIBUS_READREG(sc->mii_dev, phy, reg); 407 printf(" 0x%x", val); 408 } 409 printf("\n"); 410 } 411} 412#endif 413