175353Smjacob/* $FreeBSD: releng/10.2/sys/dev/mii/e1000phyreg.h 220938 2011-04-22 09:22:27Z marius $ */ 2139749Simp/*- 375353Smjacob * Principal Author: Parag Patel 475353Smjacob * Copyright (c) 2001 575353Smjacob * All rights reserved. 675353Smjacob * 775353Smjacob * Redistribution and use in source and binary forms, with or without 875353Smjacob * modification, are permitted provided that the following conditions 975353Smjacob * are met: 1075353Smjacob * 1. Redistributions of source code must retain the above copyright 1175353Smjacob * notice unmodified, this list of conditions, and the following 1275353Smjacob * disclaimer. 1375353Smjacob * 2. Redistributions in binary form must reproduce the above copyright 1475353Smjacob * notice, this list of conditions and the following disclaimer in the 1575353Smjacob * documentation and/or other materials provided with the distribution. 1675353Smjacob * 1775353Smjacob * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1875353Smjacob * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1975353Smjacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2075353Smjacob * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2175353Smjacob * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2275353Smjacob * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2375353Smjacob * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2475353Smjacob * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2575353Smjacob * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2675353Smjacob * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2775353Smjacob * SUCH DAMAGE. 2875353Smjacob * 29220938Smarius * Additional Copyright (c) 2001 by Traakan Software under same licence. 3075353Smjacob * Secondary Author: Matthew Jacob 3175353Smjacob */ 3275353Smjacob 33139749Simp/*- 3475353Smjacob * Derived by information released by Intel under the following license: 3575353Smjacob * 3675353Smjacob * Copyright (c) 1999 - 2001, Intel Corporation 3775353Smjacob * 3875353Smjacob * All rights reserved. 3975353Smjacob * 4075353Smjacob * Redistribution and use in source and binary forms, with or without 4175353Smjacob * modification, are permitted provided that the following conditions are met: 4275353Smjacob * 4375353Smjacob * 1. Redistributions of source code must retain the above copyright notice, 4475353Smjacob * this list of conditions and the following disclaimer. 4575353Smjacob * 4675353Smjacob * 2. Redistributions in binary form must reproduce the above copyright notice, 4775353Smjacob * this list of conditions and the following disclaimer in the 4875353Smjacob * documentation and/or other materials provided with the distribution. 4975353Smjacob * 5075353Smjacob * 3. Neither the name of Intel Corporation nor the names of its contributors 5175353Smjacob * may be used to endorse or promote products derived from this software 5275353Smjacob * without specific prior written permission. 5375353Smjacob * 5475353Smjacob * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' 5575353Smjacob * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 5675353Smjacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 5775353Smjacob * ARE DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 5875353Smjacob * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 5975353Smjacob * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 6075353Smjacob * LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 6175353Smjacob * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 6275353Smjacob * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 6375353Smjacob * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 6475353Smjacob * 6575353Smjacob */ 6675353Smjacob 6775353Smjacob/* 6875353Smjacob * Marvell E1000 PHY registers 6975353Smjacob */ 7075353Smjacob 7175353Smjacob#define E1000_MAX_REG_ADDRESS 0x1F 7275353Smjacob 7375353Smjacob#define E1000_CR 0x00 /* control register */ 7475353Smjacob#define E1000_CR_SPEED_SELECT_MSB 0x0040 7575353Smjacob#define E1000_CR_COLL_TEST_ENABLE 0x0080 7675353Smjacob#define E1000_CR_FULL_DUPLEX 0x0100 7775353Smjacob#define E1000_CR_RESTART_AUTO_NEG 0x0200 7875353Smjacob#define E1000_CR_ISOLATE 0x0400 7975353Smjacob#define E1000_CR_POWER_DOWN 0x0800 8075353Smjacob#define E1000_CR_AUTO_NEG_ENABLE 0x1000 8175353Smjacob#define E1000_CR_SPEED_SELECT_LSB 0x2000 8275353Smjacob#define E1000_CR_LOOPBACK 0x4000 8375353Smjacob#define E1000_CR_RESET 0x8000 8475353Smjacob 8575353Smjacob#define E1000_CR_SPEED_1000 0x0040 8675353Smjacob#define E1000_CR_SPEED_100 0x2000 8775353Smjacob#define E1000_CR_SPEED_10 0x0000 8875353Smjacob 8975353Smjacob#define E1000_SR 0x01 /* status register */ 9075353Smjacob#define E1000_SR_EXTENDED 0x0001 9175353Smjacob#define E1000_SR_JABBER_DETECT 0x0002 9275353Smjacob#define E1000_SR_LINK_STATUS 0x0004 9375353Smjacob#define E1000_SR_AUTO_NEG 0x0008 9475353Smjacob#define E1000_SR_REMOTE_FAULT 0x0010 9575353Smjacob#define E1000_SR_AUTO_NEG_COMPLETE 0x0020 9675353Smjacob#define E1000_SR_PREAMBLE_SUPPRESS 0x0040 9775353Smjacob#define E1000_SR_EXTENDED_STATUS 0x0100 9875353Smjacob#define E1000_SR_100T2 0x0200 9975353Smjacob#define E1000_SR_100T2_FD 0x0400 10075353Smjacob#define E1000_SR_10T 0x0800 10175353Smjacob#define E1000_SR_10T_FD 0x1000 10275353Smjacob#define E1000_SR_100TX 0x2000 10375353Smjacob#define E1000_SR_100TX_FD 0x4000 10475353Smjacob#define E1000_SR_100T4 0x8000 10575353Smjacob 10675353Smjacob#define E1000_ID1 0x02 /* ID register 1 */ 10775353Smjacob#define E1000_ID2 0x03 /* ID register 2 */ 10875353Smjacob#define E1000_ID_88E1000 0x01410C50 10975353Smjacob#define E1000_ID_88E1000S 0x01410C40 110120281Swilko#define E1000_ID_88E1011 0x01410C20 11175353Smjacob#define E1000_ID_MASK 0xFFFFFFF0 11275353Smjacob 11375353Smjacob#define E1000_AR 0x04 /* autonegotiation advertise reg */ 11475353Smjacob#define E1000_AR_SELECTOR_FIELD 0x0001 11575353Smjacob#define E1000_AR_10T 0x0020 11675353Smjacob#define E1000_AR_10T_FD 0x0040 11775353Smjacob#define E1000_AR_100TX 0x0080 11875353Smjacob#define E1000_AR_100TX_FD 0x0100 11975353Smjacob#define E1000_AR_100T4 0x0200 12075353Smjacob#define E1000_AR_PAUSE 0x0400 12175353Smjacob#define E1000_AR_ASM_DIR 0x0800 12275353Smjacob#define E1000_AR_REMOTE_FAULT 0x2000 12375353Smjacob#define E1000_AR_NEXT_PAGE 0x8000 12475353Smjacob#define E1000_AR_SPEED_MASK 0x01E0 12575353Smjacob 126120281Swilko/* Autonegotiation register bits for fiber cards (Alaska Only!) */ 127120281Swilko#define E1000_FA_1000X_FD 0x0020 128120281Swilko#define E1000_FA_1000X 0x0040 129120281Swilko#define E1000_FA_SYM_PAUSE 0x0080 130120281Swilko#define E1000_FA_ASYM_PAUSE 0x0100 131120281Swilko#define E1000_FA_FAULT1 0x1000 132120281Swilko#define E1000_FA_FAULT2 0x2000 133120281Swilko#define E1000_FA_NEXT_PAGE 0x8000 134120281Swilko 13575353Smjacob#define E1000_LPAR 0x05 /* autoneg link partner abilities reg */ 13675353Smjacob#define E1000_LPAR_SELECTOR_FIELD 0x0001 13775353Smjacob#define E1000_LPAR_10T 0x0020 13875353Smjacob#define E1000_LPAR_10T_FD 0x0040 13975353Smjacob#define E1000_LPAR_100TX 0x0080 14075353Smjacob#define E1000_LPAR_100TX_FD 0x0100 14175353Smjacob#define E1000_LPAR_100T4 0x0200 14275353Smjacob#define E1000_LPAR_PAUSE 0x0400 14375353Smjacob#define E1000_LPAR_ASM_DIR 0x0800 14475353Smjacob#define E1000_LPAR_REMOTE_FAULT 0x2000 14575353Smjacob#define E1000_LPAR_ACKNOWLEDGE 0x4000 14675353Smjacob#define E1000_LPAR_NEXT_PAGE 0x8000 14775353Smjacob 148120281Swilko/* autoneg link partner ability register bits for fiber cards (Alaska Only!) */ 149120281Swilko#define E1000_FPAR_1000X_FD 0x0020 150120281Swilko#define E1000_FPAR_1000X 0x0040 151120281Swilko#define E1000_FPAR_SYM_PAUSE 0x0080 152120281Swilko#define E1000_FPAR_ASYM_PAUSE 0x0100 153120281Swilko#define E1000_FPAR_FAULT1 0x1000 154120281Swilko#define E1000_FPAR_FAULT2 0x2000 155120281Swilko#define E1000_FPAR_ACK 0x4000 156120281Swilko#define E1000_FPAR_NEXT_PAGE 0x8000 157120281Swilko 15875353Smjacob#define E1000_ER 0x06 /* autoneg expansion reg */ 15975353Smjacob#define E1000_ER_LP_NWAY 0x0001 16075353Smjacob#define E1000_ER_PAGE_RXD 0x0002 16175353Smjacob#define E1000_ER_NEXT_PAGE 0x0004 16275353Smjacob#define E1000_ER_LP_NEXT_PAGE 0x0008 16375353Smjacob#define E1000_ER_PAR_DETECT_FAULT 0x0100 16475353Smjacob 16575353Smjacob#define E1000_NPTX 0x07 /* autoneg next page TX */ 16675353Smjacob#define E1000_NPTX_MSG_CODE_FIELD 0x0001 16775353Smjacob#define E1000_NPTX_TOGGLE 0x0800 16875353Smjacob#define E1000_NPTX_ACKNOWLDGE2 0x1000 16975353Smjacob#define E1000_NPTX_MSG_PAGE 0x2000 17075353Smjacob#define E1000_NPTX_NEXT_PAGE 0x8000 17175353Smjacob 17275353Smjacob#define E1000_RNPR 0x08 /* autoneg link-partner (?) next page */ 17375353Smjacob#define E1000_RNPR_MSG_CODE_FIELD 0x0001 17475353Smjacob#define E1000_RNPR_TOGGLE 0x0800 17575353Smjacob#define E1000_RNPR_ACKNOWLDGE2 0x1000 17675353Smjacob#define E1000_RNPR_MSG_PAGE 0x2000 17775353Smjacob#define E1000_RNPR_ACKNOWLDGE 0x4000 17875353Smjacob#define E1000_RNPR_NEXT_PAGE 0x8000 17975353Smjacob 18075353Smjacob#define E1000_1GCR 0x09 /* 1000T (1G) control reg */ 18175353Smjacob#define E1000_1GCR_ASYM_PAUSE 0x0080 18275353Smjacob#define E1000_1GCR_1000T 0x0100 18375353Smjacob#define E1000_1GCR_1000T_FD 0x0200 18475353Smjacob#define E1000_1GCR_REPEATER_DTE 0x0400 18575353Smjacob#define E1000_1GCR_MS_VALUE 0x0800 18675353Smjacob#define E1000_1GCR_MS_ENABLE 0x1000 18775353Smjacob#define E1000_1GCR_TEST_MODE_NORMAL 0x0000 18875353Smjacob#define E1000_1GCR_TEST_MODE_1 0x2000 18975353Smjacob#define E1000_1GCR_TEST_MODE_2 0x4000 19075353Smjacob#define E1000_1GCR_TEST_MODE_3 0x6000 19175353Smjacob#define E1000_1GCR_TEST_MODE_4 0x8000 19275353Smjacob#define E1000_1GCR_SPEED_MASK 0x0300 19375353Smjacob 19475353Smjacob#define E1000_1GSR 0x0A /* 1000T (1G) status reg */ 19575353Smjacob#define E1000_1GSR_IDLE_ERROR_CNT 0x0000 19675353Smjacob#define E1000_1GSR_ASYM_PAUSE_DIR 0x0100 19775353Smjacob#define E1000_1GSR_LP 0x0400 19875353Smjacob#define E1000_1GSR_LP_FD 0x0800 19975353Smjacob#define E1000_1GSR_REMOTE_RX_STATUS 0x1000 20075353Smjacob#define E1000_1GSR_LOCAL_RX_STATUS 0x2000 20175353Smjacob#define E1000_1GSR_MS_CONFIG_RES 0x4000 20275353Smjacob#define E1000_1GSR_MS_CONFIG_FAULT 0x8000 20375353Smjacob 20475353Smjacob#define E1000_ESR 0x0F /* IEEE extended status reg */ 20575353Smjacob#define E1000_ESR_1000T 0x1000 20675353Smjacob#define E1000_ESR_1000T_FD 0x2000 20775353Smjacob#define E1000_ESR_1000X 0x4000 20875353Smjacob#define E1000_ESR_1000X_FD 0x8000 20975353Smjacob 21075353Smjacob#define E1000_TX_POLARITY_MASK 0x0100 21175353Smjacob#define E1000_TX_NORMAL_POLARITY 0 21275353Smjacob 21375353Smjacob#define E1000_AUTO_POLARITY_DISABLE 0x0010 21475353Smjacob 21575353Smjacob#define E1000_SCR 0x10 /* special control register */ 21675353Smjacob#define E1000_SCR_JABBER_DISABLE 0x0001 21775353Smjacob#define E1000_SCR_POLARITY_REVERSAL 0x0002 21875353Smjacob#define E1000_SCR_SQE_TEST 0x0004 21975353Smjacob#define E1000_SCR_INT_FIFO_DISABLE 0x0008 22075353Smjacob#define E1000_SCR_CLK125_DISABLE 0x0010 22175353Smjacob#define E1000_SCR_MDI_MANUAL_MODE 0x0000 22275353Smjacob#define E1000_SCR_MDIX_MANUAL_MODE 0x0020 22375353Smjacob#define E1000_SCR_AUTO_X_1000T 0x0040 22475353Smjacob#define E1000_SCR_AUTO_X_MODE 0x0060 22575353Smjacob#define E1000_SCR_10BT_EXT_ENABLE 0x0080 22675353Smjacob#define E1000_SCR_MII_5BIT_ENABLE 0x0100 22775353Smjacob#define E1000_SCR_SCRAMBLER_DISABLE 0x0200 22875353Smjacob#define E1000_SCR_FORCE_LINK_GOOD 0x0400 22975353Smjacob#define E1000_SCR_ASSERT_CRS_ON_TX 0x0800 23075353Smjacob#define E1000_SCR_RX_FIFO_DEPTH_6 0x0000 23175353Smjacob#define E1000_SCR_RX_FIFO_DEPTH_8 0x1000 23275353Smjacob#define E1000_SCR_RX_FIFO_DEPTH_10 0x2000 23375353Smjacob#define E1000_SCR_RX_FIFO_DEPTH_12 0x3000 23475353Smjacob#define E1000_SCR_TX_FIFO_DEPTH_6 0x0000 23575353Smjacob#define E1000_SCR_TX_FIFO_DEPTH_8 0x4000 23675353Smjacob#define E1000_SCR_TX_FIFO_DEPTH_10 0x8000 23775353Smjacob#define E1000_SCR_TX_FIFO_DEPTH_12 0xC000 23875353Smjacob 239192713Syongari/* 88E3016 only */ 240192713Syongari#define E1000_SCR_AUTO_MDIX 0x0030 241192713Syongari#define E1000_SCR_SIGDET_POLARITY 0x0040 242192713Syongari#define E1000_SCR_EXT_DISTANCE 0x0080 243192713Syongari#define E1000_SCR_FEFI_DISABLE 0x0100 244192713Syongari#define E1000_SCR_NLP_GEN_DISABLE 0x0800 245192713Syongari#define E1000_SCR_LPNP 0x1000 246192713Syongari#define E1000_SCR_NLP_CHK_DISABLE 0x2000 247192713Syongari#define E1000_SCR_EN_DETECT 0x4000 248192713Syongari 249165097Syongari#define E1000_SCR_EN_DETECT_MASK 0x0300 250165097Syongari 251197590Syongari/* 88E1112 page 1 fiber specific control */ 252197590Syongari#define E1000_SCR_FIB_TX_DIS 0x0008 253197590Syongari#define E1000_SCR_FIB_SIGDET_POLARITY 0x0200 254197590Syongari#define E1000_SCR_FIB_FORCE_LINK 0x0400 255197590Syongari 256165097Syongari/* 88E1112 page 2 */ 257165097Syongari#define E1000_SCR_MODE_MASK 0x0380 258165097Syongari#define E1000_SCR_MODE_AUTO 0x0180 259165097Syongari#define E1000_SCR_MODE_COPPER 0x0280 260165097Syongari#define E1000_SCR_MODE_1000BX 0x0380 261165097Syongari 262173133Syongari/* 88E1116 page 0 */ 263173133Syongari#define E1000_SCR_POWER_DOWN 0x0004 264193291Syongari/* 88E1116, 88E1149 page 2 */ 265173133Syongari#define E1000_SCR_RGMII_POWER_UP 0x0008 266173133Syongari 267193291Syongari/* 88E1116, 88E1149 page 3 */ 268193291Syongari#define E1000_SCR_LED_STAT0_MASK 0x000F 269193291Syongari#define E1000_SCR_LED_STAT1_MASK 0x00F0 270193291Syongari#define E1000_SCR_LED_INIT_MASK 0x0F00 271193291Syongari#define E1000_SCR_LED_LOS_MASK 0xF000 272193291Syongari#define E1000_SCR_LED_STAT0(x) ((x) & E1000_SCR_LED_STAT0_MASK) 273193291Syongari#define E1000_SCR_LED_STAT1(x) ((x) & E1000_SCR_LED_STAT1_MASK) 274193291Syongari#define E1000_SCR_LED_INIT(x) ((x) & E1000_SCR_LED_INIT_MASK) 275193291Syongari#define E1000_SCR_LED_LOS(x) ((x) & E1000_SCR_LED_LOS_MASK) 276193291Syongari 27775353Smjacob#define E1000_SSR 0x11 /* special status register */ 27875353Smjacob#define E1000_SSR_JABBER 0x0001 27975353Smjacob#define E1000_SSR_REV_POLARITY 0x0002 28075353Smjacob#define E1000_SSR_MDIX 0x0020 28175353Smjacob#define E1000_SSR_LINK 0x0400 28275353Smjacob#define E1000_SSR_SPD_DPLX_RESOLVED 0x0800 28375353Smjacob#define E1000_SSR_PAGE_RCVD 0x1000 28475353Smjacob#define E1000_SSR_DUPLEX 0x2000 28575353Smjacob#define E1000_SSR_SPEED 0xC000 28675353Smjacob#define E1000_SSR_10MBS 0x0000 28775353Smjacob#define E1000_SSR_100MBS 0x4000 28875353Smjacob#define E1000_SSR_1000MBS 0x8000 28975353Smjacob 29075353Smjacob#define E1000_IER 0x12 /* interrupt enable reg */ 29175353Smjacob#define E1000_IER_JABBER 0x0001 29275353Smjacob#define E1000_IER_POLARITY_CHANGE 0x0002 29375353Smjacob#define E1000_IER_MDIX_CHANGE 0x0040 29475353Smjacob#define E1000_IER_FIFO_OVER_UNDERUN 0x0080 29575353Smjacob#define E1000_IER_FALSE_CARRIER 0x0100 29675353Smjacob#define E1000_IER_SYMBOL_ERROR 0x0200 29775353Smjacob#define E1000_IER_LINK_STAT_CHANGE 0x0400 29875353Smjacob#define E1000_IER_AUTO_NEG_COMPLETE 0x0800 29975353Smjacob#define E1000_IER_PAGE_RECEIVED 0x1000 30075353Smjacob#define E1000_IER_DUPLEX_CHANGED 0x2000 30175353Smjacob#define E1000_IER_SPEED_CHANGED 0x4000 30275353Smjacob#define E1000_IER_AUTO_NEG_ERR 0x8000 30375353Smjacob 304193291Syongari/* 88E1116, 88E1149 page 3, LED timer control. */ 305193291Syongari#define E1000_PULSE_MASK 0x7000 306193291Syongari#define E1000_PULSE_NO_STR 0 /* no pulse stretching */ 307193291Syongari#define E1000_PULSE_21MS 1 /* 21 ms to 42 ms */ 308193291Syongari#define E1000_PULSE_42MS 2 /* 42 ms to 84 ms */ 309193291Syongari#define E1000_PULSE_84MS 3 /* 84 ms to 170 ms */ 310193291Syongari#define E1000_PULSE_170MS 4 /* 170 ms to 340 ms */ 311193291Syongari#define E1000_PULSE_340MS 5 /* 340 ms to 670 ms */ 312193291Syongari#define E1000_PULSE_670MS 6 /* 670 ms to 1300 ms */ 313193291Syongari#define E1000_PULSE_1300MS 7 /* 1300 ms to 2700 ms */ 314193291Syongari#define E1000_PULSE_DUR(x) ((x) & E1000_PULSE_MASK) 315193291Syongari 316193291Syongari#define E1000_BLINK_MASK 0x0700 317193291Syongari#define E1000_BLINK_42MS 0 /* 42 ms */ 318193291Syongari#define E1000_BLINK_84MS 1 /* 84 ms */ 319193291Syongari#define E1000_BLINK_170MS 2 /* 170 ms */ 320193291Syongari#define E1000_BLINK_340MS 3 /* 340 ms */ 321193291Syongari#define E1000_BLINK_670MS 4 /* 670 ms */ 322193291Syongari#define E1000_BLINK_RATE(x) ((x) & E1000_BLINK_MASK) 323193291Syongari 32475353Smjacob#define E1000_ISR 0x13 /* interrupt status reg */ 32575353Smjacob#define E1000_ISR_JABBER 0x0001 32675353Smjacob#define E1000_ISR_POLARITY_CHANGE 0x0002 32775353Smjacob#define E1000_ISR_MDIX_CHANGE 0x0040 32875353Smjacob#define E1000_ISR_FIFO_OVER_UNDERUN 0x0080 32975353Smjacob#define E1000_ISR_FALSE_CARRIER 0x0100 33075353Smjacob#define E1000_ISR_SYMBOL_ERROR 0x0200 33175353Smjacob#define E1000_ISR_LINK_STAT_CHANGE 0x0400 33275353Smjacob#define E1000_ISR_AUTO_NEG_COMPLETE 0x0800 33375353Smjacob#define E1000_ISR_PAGE_RECEIVED 0x1000 33475353Smjacob#define E1000_ISR_DUPLEX_CHANGED 0x2000 33575353Smjacob#define E1000_ISR_SPEED_CHANGED 0x4000 33675353Smjacob#define E1000_ISR_AUTO_NEG_ERR 0x8000 33775353Smjacob 33875353Smjacob#define E1000_ESCR 0x14 /* extended special control reg */ 33975353Smjacob#define E1000_ESCR_FIBER_LOOPBACK 0x4000 34075353Smjacob#define E1000_ESCR_DOWN_NO_IDLE 0x8000 34175353Smjacob#define E1000_ESCR_TX_CLK_2_5 0x0060 34275353Smjacob#define E1000_ESCR_TX_CLK_25 0x0070 34375353Smjacob#define E1000_ESCR_TX_CLK_0 0x0000 34475353Smjacob 34575353Smjacob#define E1000_RECR 0x15 /* RX error counter reg */ 34675353Smjacob 347165097Syongari#define E1000_EADR 0x16 /* extended address reg */ 348165097Syongari 34975353Smjacob#define E1000_LCR 0x18 /* LED control reg */ 35075353Smjacob#define E1000_LCR_LED_TX 0x0001 35175353Smjacob#define E1000_LCR_LED_RX 0x0002 35275353Smjacob#define E1000_LCR_LED_DUPLEX 0x0004 35375353Smjacob#define E1000_LCR_LINK 0x0008 35475353Smjacob#define E1000_LCR_BLINK_42MS 0x0000 35575353Smjacob#define E1000_LCR_BLINK_84MS 0x0100 35675353Smjacob#define E1000_LCR_BLINK_170MS 0x0200 35775353Smjacob#define E1000_LCR_BLINK_340MS 0x0300 35875353Smjacob#define E1000_LCR_BLINK_670MS 0x0400 35975353Smjacob#define E1000_LCR_PULSE_OFF 0x0000 36075353Smjacob#define E1000_LCR_PULSE_21_42MS 0x1000 36175353Smjacob#define E1000_LCR_PULSE_42_84MS 0x2000 36275353Smjacob#define E1000_LCR_PULSE_84_170MS 0x3000 36375353Smjacob#define E1000_LCR_PULSE_170_340MS 0x4000 36475353Smjacob#define E1000_LCR_PULSE_340_670MS 0x5000 36575353Smjacob#define E1000_LCR_PULSE_670_13S 0x6000 36675353Smjacob#define E1000_LCR_PULSE_13_26S 0x7000 367120281Swilko 368120281Swilko/* The following register is found only on the 88E1011 Alaska PHY */ 369120281Swilko#define E1000_ESSR 0x1B /* Extended PHY specific sts */ 370120281Swilko#define E1000_ESSR_FIBER_LINK 0x2000 371120281Swilko#define E1000_ESSR_GMII_COPPER 0x000f 372120281Swilko#define E1000_ESSR_GMII_FIBER 0x0007 373120281Swilko#define E1000_ESSR_TBI_COPPER 0x000d 374120281Swilko#define E1000_ESSR_TBI_FIBER 0x0005 375