ciphy.c revision 217413
1139749Simp/*- 2135048Swpaul * Copyright (c) 2004 3135048Swpaul * Bill Paul <wpaul@windriver.com>. All rights reserved. 4135048Swpaul * 5135048Swpaul * Redistribution and use in source and binary forms, with or without 6135048Swpaul * modification, are permitted provided that the following conditions 7135048Swpaul * are met: 8135048Swpaul * 1. Redistributions of source code must retain the above copyright 9135048Swpaul * notice, this list of conditions and the following disclaimer. 10135048Swpaul * 2. Redistributions in binary form must reproduce the above copyright 11135048Swpaul * notice, this list of conditions and the following disclaimer in the 12135048Swpaul * documentation and/or other materials provided with the distribution. 13135048Swpaul * 3. All advertising materials mentioning features or use of this software 14135048Swpaul * must display the following acknowledgement: 15135048Swpaul * This product includes software developed by Bill Paul. 16135048Swpaul * 4. Neither the name of the author nor the names of any co-contributors 17135048Swpaul * may be used to endorse or promote products derived from this software 18135048Swpaul * without specific prior written permission. 19135048Swpaul * 20135048Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21135048Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22135048Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23135048Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24135048Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25135048Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26135048Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27135048Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28135048Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29135048Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30135048Swpaul * THE POSSIBILITY OF SUCH DAMAGE. 31135048Swpaul */ 32135048Swpaul 33135048Swpaul#include <sys/cdefs.h> 34135048Swpaul__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 217413 2011-01-14 19:29:53Z marius $"); 35135048Swpaul 36135048Swpaul/* 37178598Sraj * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY. 38135048Swpaul */ 39135048Swpaul 40135048Swpaul#include <sys/param.h> 41135048Swpaul#include <sys/systm.h> 42135048Swpaul#include <sys/kernel.h> 43135048Swpaul#include <sys/module.h> 44135048Swpaul#include <sys/socket.h> 45135048Swpaul#include <sys/bus.h> 46135048Swpaul 47135048Swpaul#include <net/if.h> 48135048Swpaul#include <net/if_arp.h> 49135048Swpaul#include <net/if_media.h> 50135048Swpaul 51135048Swpaul#include <dev/mii/mii.h> 52135048Swpaul#include <dev/mii/miivar.h> 53135048Swpaul#include "miidevs.h" 54135048Swpaul 55135048Swpaul#include <dev/mii/ciphyreg.h> 56135048Swpaul 57135048Swpaul#include "miibus_if.h" 58135048Swpaul 59135048Swpaul#include <machine/bus.h> 60213893Smarius 61135048Swpaulstatic int ciphy_probe(device_t); 62135048Swpaulstatic int ciphy_attach(device_t); 63135048Swpaul 64135048Swpaulstatic device_method_t ciphy_methods[] = { 65135048Swpaul /* device interface */ 66135048Swpaul DEVMETHOD(device_probe, ciphy_probe), 67135048Swpaul DEVMETHOD(device_attach, ciphy_attach), 68135048Swpaul DEVMETHOD(device_detach, mii_phy_detach), 69135048Swpaul DEVMETHOD(device_shutdown, bus_generic_shutdown), 70135048Swpaul { 0, 0 } 71135048Swpaul}; 72135048Swpaul 73135048Swpaulstatic devclass_t ciphy_devclass; 74135048Swpaul 75135048Swpaulstatic driver_t ciphy_driver = { 76135048Swpaul "ciphy", 77135048Swpaul ciphy_methods, 78135048Swpaul sizeof(struct mii_softc) 79135048Swpaul}; 80135048Swpaul 81135048SwpaulDRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0); 82135048Swpaul 83135048Swpaulstatic int ciphy_service(struct mii_softc *, struct mii_data *, int); 84135048Swpaulstatic void ciphy_status(struct mii_softc *); 85135048Swpaulstatic void ciphy_reset(struct mii_softc *); 86135048Swpaulstatic void ciphy_fixup(struct mii_softc *); 87135048Swpaul 88164827Smariusstatic const struct mii_phydesc ciphys[] = { 89164827Smarius MII_PHY_DESC(CICADA, CS8201), 90164827Smarius MII_PHY_DESC(CICADA, CS8201A), 91164827Smarius MII_PHY_DESC(CICADA, CS8201B), 92176773Sraj MII_PHY_DESC(CICADA, CS8204), 93184192Syongari MII_PHY_DESC(CICADA, VSC8211), 94178598Sraj MII_PHY_DESC(CICADA, CS8244), 95170365Syongari MII_PHY_DESC(VITESSE, VSC8601), 96164827Smarius MII_PHY_END 97164827Smarius}; 98164827Smarius 99135048Swpaulstatic int 100150763Simpciphy_probe(device_t dev) 101135048Swpaul{ 102135048Swpaul 103164827Smarius return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT)); 104135048Swpaul} 105135048Swpaul 106135048Swpaulstatic int 107150763Simpciphy_attach(device_t dev) 108135048Swpaul{ 109135048Swpaul struct mii_softc *sc; 110135048Swpaul struct mii_attach_args *ma; 111135048Swpaul struct mii_data *mii; 112135048Swpaul 113135048Swpaul sc = device_get_softc(dev); 114135048Swpaul ma = device_get_ivars(dev); 115135048Swpaul sc->mii_dev = device_get_parent(dev); 116213229Smarius mii = ma->mii_data; 117135048Swpaul LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 118135048Swpaul 119213893Smarius sc->mii_flags = miibus_get_flags(dev); 120213364Smarius sc->mii_inst = mii->mii_instance++; 121135048Swpaul sc->mii_phy = ma->mii_phyno; 122135048Swpaul sc->mii_service = ciphy_service; 123135048Swpaul sc->mii_pdata = mii; 124135048Swpaul 125135048Swpaul sc->mii_flags |= MIIF_NOISOLATE; 126135048Swpaul 127135048Swpaul ciphy_reset(sc); 128135048Swpaul 129213364Smarius sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 130135048Swpaul if (sc->mii_capabilities & BMSR_EXTSTAT) 131135048Swpaul sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 132135048Swpaul device_printf(dev, " "); 133135048Swpaul mii_phy_add_media(sc); 134135048Swpaul printf("\n"); 135135048Swpaul 136135048Swpaul MIIBUS_MEDIAINIT(sc->mii_dev); 137164705Smarius return (0); 138135048Swpaul} 139135048Swpaul 140135048Swpaulstatic int 141150763Simpciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 142135048Swpaul{ 143135048Swpaul struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 144135048Swpaul int reg, speed, gig; 145135048Swpaul 146135048Swpaul switch (cmd) { 147135048Swpaul case MII_POLLSTAT: 148135048Swpaul break; 149135048Swpaul 150135048Swpaul case MII_MEDIACHG: 151135048Swpaul /* 152135048Swpaul * If the interface is not up, don't do anything. 153135048Swpaul */ 154135048Swpaul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 155135048Swpaul break; 156135048Swpaul 157135048Swpaul ciphy_fixup(sc); /* XXX hardware bug work-around */ 158135048Swpaul 159135048Swpaul switch (IFM_SUBTYPE(ife->ifm_media)) { 160135048Swpaul case IFM_AUTO: 161135048Swpaul#ifdef foo 162135048Swpaul /* 163135048Swpaul * If we're already in auto mode, just return. 164135048Swpaul */ 165135048Swpaul if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN) 166135048Swpaul return (0); 167135048Swpaul#endif 168215297Smarius (void)mii_phy_auto(sc); 169135048Swpaul break; 170135048Swpaul case IFM_1000_T: 171135048Swpaul speed = CIPHY_S1000; 172135048Swpaul goto setit; 173135048Swpaul case IFM_100_TX: 174135048Swpaul speed = CIPHY_S100; 175135048Swpaul goto setit; 176135048Swpaul case IFM_10_T: 177135048Swpaul speed = CIPHY_S10; 178135048Swpaulsetit: 179217413Smarius if ((ife->ifm_media & IFM_FDX) != 0) { 180135048Swpaul speed |= CIPHY_BMCR_FDX; 181135048Swpaul gig = CIPHY_1000CTL_AFD; 182217413Smarius } else 183135048Swpaul gig = CIPHY_1000CTL_AHD; 184135048Swpaul 185217413Smarius if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 186217413Smarius gig |= CIPHY_1000CTL_MSE; 187217413Smarius if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 188217413Smarius gig |= CIPHY_1000CTL_MSC; 189217413Smarius speed |= 190217413Smarius CIPHY_BMCR_AUTOEN | CIPHY_BMCR_STARTNEG; 191217413Smarius } else 192217413Smarius gig = 0; 193217413Smarius PHY_WRITE(sc, CIPHY_MII_1000CTL, gig); 194135048Swpaul PHY_WRITE(sc, CIPHY_MII_BMCR, speed); 195135048Swpaul PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE); 196135048Swpaul break; 197135048Swpaul case IFM_NONE: 198215297Smarius PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN); 199135048Swpaul break; 200135048Swpaul default: 201135048Swpaul return (EINVAL); 202135048Swpaul } 203135048Swpaul break; 204135048Swpaul 205135048Swpaul case MII_TICK: 206135048Swpaul /* 207135048Swpaul * Is the interface even up? 208135048Swpaul */ 209135048Swpaul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 210135048Swpaul return (0); 211135048Swpaul 212135048Swpaul /* 213135048Swpaul * Only used for autonegotiation. 214135048Swpaul */ 215135048Swpaul if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 216135048Swpaul break; 217135048Swpaul 218135048Swpaul /* 219135048Swpaul * Check to see if we have link. If we do, we don't 220135048Swpaul * need to restart the autonegotiation process. Read 221135048Swpaul * the BMSR twice in case it's latched. 222135048Swpaul */ 223135048Swpaul reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 224135048Swpaul if (reg & BMSR_LINK) 225135048Swpaul break; 226135048Swpaul 227183488Syongari /* Announce link loss right after it happens. */ 228183488Syongari if (++sc->mii_ticks == 0) 229183488Syongari break; 230135048Swpaul /* 231183489Syongari * Only retry autonegotiation every mii_anegticks seconds. 232135048Swpaul */ 233183489Syongari if (sc->mii_ticks <= sc->mii_anegticks) 234135048Swpaul break; 235164705Smarius 236135048Swpaul sc->mii_ticks = 0; 237135048Swpaul mii_phy_auto(sc); 238183490Syongari break; 239135048Swpaul } 240135048Swpaul 241135048Swpaul /* Update the media status. */ 242135048Swpaul ciphy_status(sc); 243135048Swpaul 244135048Swpaul /* 245135048Swpaul * Callback if something changed. Note that we need to poke 246135048Swpaul * apply fixups for certain PHY revs. 247135048Swpaul */ 248164705Smarius if (sc->mii_media_active != mii->mii_media_active || 249135048Swpaul sc->mii_media_status != mii->mii_media_status || 250135048Swpaul cmd == MII_MEDIACHG) { 251135048Swpaul ciphy_fixup(sc); 252135048Swpaul } 253135048Swpaul mii_phy_update(sc, cmd); 254135048Swpaul return (0); 255135048Swpaul} 256135048Swpaul 257135048Swpaulstatic void 258150763Simpciphy_status(struct mii_softc *sc) 259135048Swpaul{ 260135048Swpaul struct mii_data *mii = sc->mii_pdata; 261135048Swpaul int bmsr, bmcr; 262135048Swpaul 263135048Swpaul mii->mii_media_status = IFM_AVALID; 264135048Swpaul mii->mii_media_active = IFM_ETHER; 265135048Swpaul 266135048Swpaul bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 267135048Swpaul 268135048Swpaul if (bmsr & BMSR_LINK) 269135048Swpaul mii->mii_media_status |= IFM_ACTIVE; 270135048Swpaul 271135048Swpaul bmcr = PHY_READ(sc, CIPHY_MII_BMCR); 272135048Swpaul 273135048Swpaul if (bmcr & CIPHY_BMCR_LOOP) 274135048Swpaul mii->mii_media_active |= IFM_LOOP; 275135048Swpaul 276135048Swpaul if (bmcr & CIPHY_BMCR_AUTOEN) { 277135048Swpaul if ((bmsr & CIPHY_BMSR_ACOMP) == 0) { 278135048Swpaul /* Erg, still trying, I guess... */ 279135048Swpaul mii->mii_media_active |= IFM_NONE; 280135048Swpaul return; 281135048Swpaul } 282135048Swpaul } 283135048Swpaul 284135048Swpaul bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR); 285135048Swpaul switch (bmsr & CIPHY_AUXCSR_SPEED) { 286135048Swpaul case CIPHY_SPEED10: 287135048Swpaul mii->mii_media_active |= IFM_10_T; 288135048Swpaul break; 289135048Swpaul case CIPHY_SPEED100: 290135048Swpaul mii->mii_media_active |= IFM_100_TX; 291135048Swpaul break; 292135048Swpaul case CIPHY_SPEED1000: 293135048Swpaul mii->mii_media_active |= IFM_1000_T; 294135048Swpaul break; 295135048Swpaul default: 296135048Swpaul device_printf(sc->mii_dev, "unknown PHY speed %x\n", 297135048Swpaul bmsr & CIPHY_AUXCSR_SPEED); 298135048Swpaul break; 299135048Swpaul } 300135048Swpaul 301135048Swpaul if (bmsr & CIPHY_AUXCSR_FDX) 302135048Swpaul mii->mii_media_active |= IFM_FDX; 303183491Syongari else 304183491Syongari mii->mii_media_active |= IFM_HDX; 305215297Smarius 306215297Smarius if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) && 307215297Smarius (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0) 308215297Smarius mii->mii_media_active |= IFM_ETH_MASTER; 309135048Swpaul} 310135048Swpaul 311135048Swpaulstatic void 312135048Swpaulciphy_reset(struct mii_softc *sc) 313135048Swpaul{ 314164830Smarius 315135048Swpaul mii_phy_reset(sc); 316135048Swpaul DELAY(1000); 317135048Swpaul} 318135048Swpaul 319135048Swpaul#define PHY_SETBIT(x, y, z) \ 320135048Swpaul PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) 321135048Swpaul#define PHY_CLRBIT(x, y, z) \ 322135048Swpaul PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) 323135048Swpaul 324135048Swpaulstatic void 325135048Swpaulciphy_fixup(struct mii_softc *sc) 326135048Swpaul{ 327135048Swpaul uint16_t model; 328135048Swpaul uint16_t status, speed; 329170365Syongari uint16_t val; 330135048Swpaul 331135048Swpaul model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); 332135048Swpaul status = PHY_READ(sc, CIPHY_MII_AUXCSR); 333135048Swpaul speed = status & CIPHY_AUXCSR_SPEED; 334135048Swpaul 335170365Syongari if (strcmp(device_get_name(device_get_parent(sc->mii_dev)), 336170365Syongari "nfe") == 0) { 337170365Syongari /* need to set for 2.5V RGMII for NVIDIA adapters */ 338170365Syongari val = PHY_READ(sc, CIPHY_MII_ECTL1); 339170365Syongari val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL); 340170365Syongari val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII); 341170365Syongari PHY_WRITE(sc, CIPHY_MII_ECTL1, val); 342170365Syongari /* From Linux. */ 343170365Syongari val = PHY_READ(sc, CIPHY_MII_AUXCSR); 344170365Syongari val |= CIPHY_AUXCSR_MDPPS; 345170365Syongari PHY_WRITE(sc, CIPHY_MII_AUXCSR, val); 346170365Syongari val = PHY_READ(sc, CIPHY_MII_10BTCSR); 347170365Syongari val |= CIPHY_10BTCSR_ECHO; 348170365Syongari PHY_WRITE(sc, CIPHY_MII_10BTCSR, val); 349170365Syongari } 350170365Syongari 351135048Swpaul switch (model) { 352176773Sraj case MII_MODEL_CICADA_CS8204: 353135048Swpaul case MII_MODEL_CICADA_CS8201: 354135048Swpaul 355135048Swpaul /* Turn off "aux mode" (whatever that means) */ 356135048Swpaul PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); 357135048Swpaul 358135048Swpaul /* 359135048Swpaul * Work around speed polling bug in VT3119/VT3216 360135048Swpaul * when using MII in full duplex mode. 361135048Swpaul */ 362135048Swpaul if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 363135048Swpaul (status & CIPHY_AUXCSR_FDX)) { 364135048Swpaul PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 365135048Swpaul } else { 366135048Swpaul PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 367135048Swpaul } 368135048Swpaul 369135048Swpaul /* Enable link/activity LED blink. */ 370135048Swpaul PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK); 371135048Swpaul 372135048Swpaul break; 373135048Swpaul 374135048Swpaul case MII_MODEL_CICADA_CS8201A: 375135048Swpaul case MII_MODEL_CICADA_CS8201B: 376135048Swpaul 377135048Swpaul /* 378135048Swpaul * Work around speed polling bug in VT3119/VT3216 379135048Swpaul * when using MII in full duplex mode. 380135048Swpaul */ 381135048Swpaul if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 382135048Swpaul (status & CIPHY_AUXCSR_FDX)) { 383135048Swpaul PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 384135048Swpaul } else { 385135048Swpaul PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 386135048Swpaul } 387135048Swpaul 388135048Swpaul break; 389184192Syongari case MII_MODEL_CICADA_VSC8211: 390178598Sraj case MII_MODEL_CICADA_CS8244: 391170365Syongari case MII_MODEL_VITESSE_VSC8601: 392170365Syongari break; 393135048Swpaul default: 394135048Swpaul device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", 395135048Swpaul model); 396135048Swpaul break; 397135048Swpaul } 398135048Swpaul} 399