ciphy.c revision 164830
1135048Swpaul/*- 2135048Swpaul * Copyright (c) 2004 3135048Swpaul * Bill Paul <wpaul@windriver.com>. All rights reserved. 4135048Swpaul * 5135048Swpaul * Redistribution and use in source and binary forms, with or without 6135048Swpaul * modification, are permitted provided that the following conditions 7135048Swpaul * are met: 8135048Swpaul * 1. Redistributions of source code must retain the above copyright 9135048Swpaul * notice, this list of conditions and the following disclaimer. 10135048Swpaul * 2. Redistributions in binary form must reproduce the above copyright 11135048Swpaul * notice, this list of conditions and the following disclaimer in the 12135048Swpaul * documentation and/or other materials provided with the distribution. 13135048Swpaul * 3. All advertising materials mentioning features or use of this software 14135048Swpaul * must display the following acknowledgement: 15135048Swpaul * This product includes software developed by Bill Paul. 16135048Swpaul * 4. Neither the name of the author nor the names of any co-contributors 17135048Swpaul * may be used to endorse or promote products derived from this software 18135048Swpaul * without specific prior written permission. 19135048Swpaul * 20135048Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21135048Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22135048Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23135048Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24135048Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25135048Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26135048Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27135048Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28135048Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29135048Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30135048Swpaul * THE POSSIBILITY OF SUCH DAMAGE. 31135048Swpaul */ 32135048Swpaul 33135048Swpaul#include <sys/cdefs.h> 34135048Swpaul__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 164830 2006-12-02 19:36:25Z marius $"); 35135048Swpaul 36135048Swpaul/* 37135048Swpaul * Driver for the Cicada CS8201 10/100/1000 copper PHY. 38135048Swpaul */ 39135048Swpaul 40135048Swpaul#include <sys/param.h> 41135048Swpaul#include <sys/systm.h> 42135048Swpaul#include <sys/kernel.h> 43135048Swpaul#include <sys/module.h> 44135048Swpaul#include <sys/socket.h> 45135048Swpaul#include <sys/bus.h> 46135048Swpaul 47135048Swpaul#include <net/if.h> 48135048Swpaul#include <net/if_arp.h> 49135048Swpaul#include <net/if_media.h> 50135048Swpaul 51135048Swpaul#include <dev/mii/mii.h> 52135048Swpaul#include <dev/mii/miivar.h> 53135048Swpaul#include "miidevs.h" 54135048Swpaul 55135048Swpaul#include <dev/mii/ciphyreg.h> 56135048Swpaul 57135048Swpaul#include "miibus_if.h" 58135048Swpaul 59135048Swpaul#include <machine/bus.h> 60135048Swpaul/* 61135048Swpaul#include <dev/vge/if_vgereg.h> 62135048Swpaul*/ 63135048Swpaulstatic int ciphy_probe(device_t); 64135048Swpaulstatic int ciphy_attach(device_t); 65135048Swpaul 66135048Swpaulstatic device_method_t ciphy_methods[] = { 67135048Swpaul /* device interface */ 68135048Swpaul DEVMETHOD(device_probe, ciphy_probe), 69135048Swpaul DEVMETHOD(device_attach, ciphy_attach), 70135048Swpaul DEVMETHOD(device_detach, mii_phy_detach), 71135048Swpaul DEVMETHOD(device_shutdown, bus_generic_shutdown), 72135048Swpaul { 0, 0 } 73135048Swpaul}; 74135048Swpaul 75135048Swpaulstatic devclass_t ciphy_devclass; 76135048Swpaul 77135048Swpaulstatic driver_t ciphy_driver = { 78135048Swpaul "ciphy", 79135048Swpaul ciphy_methods, 80135048Swpaul sizeof(struct mii_softc) 81135048Swpaul}; 82135048Swpaul 83135048SwpaulDRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0); 84135048Swpaul 85135048Swpaulstatic int ciphy_service(struct mii_softc *, struct mii_data *, int); 86135048Swpaulstatic void ciphy_status(struct mii_softc *); 87135048Swpaulstatic void ciphy_reset(struct mii_softc *); 88135048Swpaulstatic void ciphy_fixup(struct mii_softc *); 89135048Swpaul 90135048Swpaulstatic const struct mii_phydesc ciphys[] = { 91135048Swpaul MII_PHY_DESC(CICADA, CS8201), 92135048Swpaul MII_PHY_DESC(CICADA, CS8201A), 93135048Swpaul MII_PHY_DESC(CICADA, CS8201B), 94135048Swpaul MII_PHY_END 95135048Swpaul}; 96135048Swpaul 97135048Swpaulstatic int 98135048Swpaulciphy_probe(device_t dev) 99135048Swpaul{ 100135048Swpaul 101135048Swpaul return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT)); 102135048Swpaul} 103135048Swpaul 104135048Swpaulstatic int 105135048Swpaulciphy_attach(device_t dev) 106135048Swpaul{ 107135048Swpaul struct mii_softc *sc; 108135048Swpaul struct mii_attach_args *ma; 109135048Swpaul struct mii_data *mii; 110135048Swpaul 111135048Swpaul sc = device_get_softc(dev); 112135048Swpaul ma = device_get_ivars(dev); 113135048Swpaul sc->mii_dev = device_get_parent(dev); 114135048Swpaul mii = device_get_softc(sc->mii_dev); 115135048Swpaul LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 116135048Swpaul 117135048Swpaul sc->mii_inst = mii->mii_instance; 118135048Swpaul sc->mii_phy = ma->mii_phyno; 119135048Swpaul sc->mii_service = ciphy_service; 120135048Swpaul sc->mii_pdata = mii; 121135048Swpaul 122135048Swpaul sc->mii_flags |= MIIF_NOISOLATE; 123135048Swpaul mii->mii_instance++; 124135048Swpaul 125135048Swpaul ciphy_reset(sc); 126135048Swpaul 127135048Swpaul sc->mii_capabilities = 128135048Swpaul PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 129135048Swpaul if (sc->mii_capabilities & BMSR_EXTSTAT) 130135048Swpaul sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 131135048Swpaul device_printf(dev, " "); 132135048Swpaul mii_phy_add_media(sc); 133135048Swpaul printf("\n"); 134135048Swpaul 135135048Swpaul MIIBUS_MEDIAINIT(sc->mii_dev); 136135048Swpaul return (0); 137135048Swpaul} 138135048Swpaul 139135048Swpaulstatic int 140135048Swpaulciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 141135048Swpaul{ 142135048Swpaul struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 143135048Swpaul int reg, speed, gig; 144135048Swpaul 145135048Swpaul switch (cmd) { 146135048Swpaul case MII_POLLSTAT: 147135048Swpaul /* 148135048Swpaul * If we're not polling our PHY instance, just return. 149135048Swpaul */ 150135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) 151135048Swpaul return (0); 152135048Swpaul break; 153135048Swpaul 154135048Swpaul case MII_MEDIACHG: 155135048Swpaul /* 156135048Swpaul * If the media indicates a different PHY instance, 157135048Swpaul * isolate ourselves. 158135048Swpaul */ 159135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 160135048Swpaul reg = PHY_READ(sc, MII_BMCR); 161135048Swpaul PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 162135048Swpaul return (0); 163135048Swpaul } 164135048Swpaul 165135048Swpaul /* 166135048Swpaul * If the interface is not up, don't do anything. 167135048Swpaul */ 168135048Swpaul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 169135048Swpaul break; 170135048Swpaul 171135048Swpaul ciphy_fixup(sc); /* XXX hardware bug work-around */ 172135048Swpaul 173135048Swpaul switch (IFM_SUBTYPE(ife->ifm_media)) { 174135048Swpaul case IFM_AUTO: 175135048Swpaul#ifdef foo 176135048Swpaul /* 177135048Swpaul * If we're already in auto mode, just return. 178135048Swpaul */ 179135048Swpaul if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN) 180135048Swpaul return (0); 181135048Swpaul#endif 182135048Swpaul (void) mii_phy_auto(sc); 183135048Swpaul break; 184135048Swpaul case IFM_1000_T: 185135048Swpaul speed = CIPHY_S1000; 186135048Swpaul goto setit; 187135048Swpaul case IFM_100_TX: 188135048Swpaul speed = CIPHY_S100; 189135048Swpaul goto setit; 190135048Swpaul case IFM_10_T: 191135048Swpaul speed = CIPHY_S10; 192135048Swpaulsetit: 193135048Swpaul if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 194135048Swpaul speed |= CIPHY_BMCR_FDX; 195135048Swpaul gig = CIPHY_1000CTL_AFD; 196135048Swpaul } else { 197135048Swpaul gig = CIPHY_1000CTL_AHD; 198135048Swpaul } 199135048Swpaul 200135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 0); 201135048Swpaul PHY_WRITE(sc, CIPHY_MII_BMCR, speed); 202135048Swpaul PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE); 203135048Swpaul 204135048Swpaul if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) 205135048Swpaul break; 206135048Swpaul 207135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, gig); 208135048Swpaul PHY_WRITE(sc, CIPHY_MII_BMCR, 209135048Swpaul speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG); 210135048Swpaul 211135048Swpaul /* 212135048Swpaul * When setting the link manually, one side must 213135048Swpaul * be the master and the other the slave. However 214135048Swpaul * ifmedia doesn't give us a good way to specify 215135048Swpaul * this, so we fake it by using one of the LINK 216135048Swpaul * flags. If LINK0 is set, we program the PHY to 217135048Swpaul * be a master, otherwise it's a slave. 218135048Swpaul */ 219135048Swpaul if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 220135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 221135048Swpaul gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC); 222135048Swpaul } else { 223135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 224135048Swpaul gig|CIPHY_1000CTL_MSE); 225135048Swpaul } 226135048Swpaul break; 227135048Swpaul case IFM_NONE: 228135048Swpaul PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 229135048Swpaul break; 230135048Swpaul case IFM_100_T4: 231135048Swpaul default: 232135048Swpaul return (EINVAL); 233135048Swpaul } 234135048Swpaul break; 235135048Swpaul 236135048Swpaul case MII_TICK: 237135048Swpaul /* 238135048Swpaul * If we're not currently selected, just return. 239135048Swpaul */ 240135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) 241135048Swpaul return (0); 242135048Swpaul 243135048Swpaul /* 244135048Swpaul * Is the interface even up? 245135048Swpaul */ 246135048Swpaul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 247135048Swpaul return (0); 248135048Swpaul 249135048Swpaul /* 250135048Swpaul * Only used for autonegotiation. 251135048Swpaul */ 252135048Swpaul if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 253135048Swpaul break; 254135048Swpaul 255135048Swpaul /* 256135048Swpaul * Check to see if we have link. If we do, we don't 257135048Swpaul * need to restart the autonegotiation process. Read 258135048Swpaul * the BMSR twice in case it's latched. 259135048Swpaul */ 260135048Swpaul reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 261135048Swpaul if (reg & BMSR_LINK) 262135048Swpaul break; 263135048Swpaul 264135048Swpaul /* 265135048Swpaul * Only retry autonegotiation every 5 seconds. 266135048Swpaul */ 267135048Swpaul if (++sc->mii_ticks <= MII_ANEGTICKS) 268135048Swpaul break; 269135048Swpaul 270135048Swpaul sc->mii_ticks = 0; 271135048Swpaul mii_phy_auto(sc); 272135048Swpaul return (0); 273135048Swpaul } 274135048Swpaul 275135048Swpaul /* Update the media status. */ 276135048Swpaul ciphy_status(sc); 277135048Swpaul 278135048Swpaul /* 279135048Swpaul * Callback if something changed. Note that we need to poke 280135048Swpaul * apply fixups for certain PHY revs. 281135048Swpaul */ 282135048Swpaul if (sc->mii_media_active != mii->mii_media_active || 283135048Swpaul sc->mii_media_status != mii->mii_media_status || 284135048Swpaul cmd == MII_MEDIACHG) { 285135048Swpaul ciphy_fixup(sc); 286135048Swpaul } 287135048Swpaul mii_phy_update(sc, cmd); 288135048Swpaul return (0); 289135048Swpaul} 290135048Swpaul 291135048Swpaulstatic void 292135048Swpaulciphy_status(struct mii_softc *sc) 293135048Swpaul{ 294135048Swpaul struct mii_data *mii = sc->mii_pdata; 295135048Swpaul int bmsr, bmcr; 296135048Swpaul 297135048Swpaul mii->mii_media_status = IFM_AVALID; 298135048Swpaul mii->mii_media_active = IFM_ETHER; 299135048Swpaul 300135048Swpaul bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 301135048Swpaul 302135048Swpaul if (bmsr & BMSR_LINK) 303135048Swpaul mii->mii_media_status |= IFM_ACTIVE; 304135048Swpaul 305135048Swpaul bmcr = PHY_READ(sc, CIPHY_MII_BMCR); 306135048Swpaul 307135048Swpaul if (bmcr & CIPHY_BMCR_LOOP) 308135048Swpaul mii->mii_media_active |= IFM_LOOP; 309135048Swpaul 310135048Swpaul if (bmcr & CIPHY_BMCR_AUTOEN) { 311135048Swpaul if ((bmsr & CIPHY_BMSR_ACOMP) == 0) { 312135048Swpaul /* Erg, still trying, I guess... */ 313135048Swpaul mii->mii_media_active |= IFM_NONE; 314135048Swpaul return; 315135048Swpaul } 316135048Swpaul } 317135048Swpaul 318135048Swpaul bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR); 319135048Swpaul switch (bmsr & CIPHY_AUXCSR_SPEED) { 320135048Swpaul case CIPHY_SPEED10: 321135048Swpaul mii->mii_media_active |= IFM_10_T; 322135048Swpaul break; 323135048Swpaul case CIPHY_SPEED100: 324135048Swpaul mii->mii_media_active |= IFM_100_TX; 325135048Swpaul break; 326135048Swpaul case CIPHY_SPEED1000: 327135048Swpaul mii->mii_media_active |= IFM_1000_T; 328135048Swpaul break; 329135048Swpaul default: 330135048Swpaul device_printf(sc->mii_dev, "unknown PHY speed %x\n", 331135048Swpaul bmsr & CIPHY_AUXCSR_SPEED); 332135048Swpaul break; 333135048Swpaul } 334135048Swpaul 335135048Swpaul if (bmsr & CIPHY_AUXCSR_FDX) 336135048Swpaul mii->mii_media_active |= IFM_FDX; 337135048Swpaul} 338135048Swpaul 339135048Swpaulstatic void 340135048Swpaulciphy_reset(struct mii_softc *sc) 341135048Swpaul{ 342135048Swpaul 343135048Swpaul mii_phy_reset(sc); 344135048Swpaul DELAY(1000); 345135048Swpaul} 346135048Swpaul 347135048Swpaul#define PHY_SETBIT(x, y, z) \ 348135048Swpaul PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) 349135048Swpaul#define PHY_CLRBIT(x, y, z) \ 350135048Swpaul PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) 351135048Swpaul 352135048Swpaulstatic void 353135048Swpaulciphy_fixup(struct mii_softc *sc) 354135048Swpaul{ 355135048Swpaul uint16_t model; 356135048Swpaul uint16_t status, speed; 357135048Swpaul 358135048Swpaul model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); 359135048Swpaul status = PHY_READ(sc, CIPHY_MII_AUXCSR); 360135048Swpaul speed = status & CIPHY_AUXCSR_SPEED; 361135048Swpaul 362135048Swpaul switch (model) { 363135048Swpaul case MII_MODEL_CICADA_CS8201: 364135048Swpaul 365135048Swpaul /* Turn off "aux mode" (whatever that means) */ 366135048Swpaul PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); 367135048Swpaul 368135048Swpaul /* 369135048Swpaul * Work around speed polling bug in VT3119/VT3216 370135048Swpaul * when using MII in full duplex mode. 371135048Swpaul */ 372135048Swpaul if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 373135048Swpaul (status & CIPHY_AUXCSR_FDX)) { 374135048Swpaul PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 375135048Swpaul } else { 376135048Swpaul PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 377135048Swpaul } 378135048Swpaul 379135048Swpaul /* Enable link/activity LED blink. */ 380135048Swpaul PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK); 381135048Swpaul 382135048Swpaul break; 383135048Swpaul 384135048Swpaul case MII_MODEL_CICADA_CS8201A: 385135048Swpaul case MII_MODEL_CICADA_CS8201B: 386135048Swpaul 387135048Swpaul /* 388135048Swpaul * Work around speed polling bug in VT3119/VT3216 389135048Swpaul * when using MII in full duplex mode. 390135048Swpaul */ 391135048Swpaul if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 392135048Swpaul (status & CIPHY_AUXCSR_FDX)) { 393135048Swpaul PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 394135048Swpaul } else { 395135048Swpaul PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 396135048Swpaul } 397135048Swpaul 398135048Swpaul break; 399135048Swpaul default: 400135048Swpaul device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", 401135048Swpaul model); 402135048Swpaul break; 403135048Swpaul } 404135048Swpaul} 405135048Swpaul