ciphy.c revision 164705
1139749Simp/*- 2135048Swpaul * Copyright (c) 2004 3135048Swpaul * Bill Paul <wpaul@windriver.com>. All rights reserved. 4135048Swpaul * 5135048Swpaul * Redistribution and use in source and binary forms, with or without 6135048Swpaul * modification, are permitted provided that the following conditions 7135048Swpaul * are met: 8135048Swpaul * 1. Redistributions of source code must retain the above copyright 9135048Swpaul * notice, this list of conditions and the following disclaimer. 10135048Swpaul * 2. Redistributions in binary form must reproduce the above copyright 11135048Swpaul * notice, this list of conditions and the following disclaimer in the 12135048Swpaul * documentation and/or other materials provided with the distribution. 13135048Swpaul * 3. All advertising materials mentioning features or use of this software 14135048Swpaul * must display the following acknowledgement: 15135048Swpaul * This product includes software developed by Bill Paul. 16135048Swpaul * 4. Neither the name of the author nor the names of any co-contributors 17135048Swpaul * may be used to endorse or promote products derived from this software 18135048Swpaul * without specific prior written permission. 19135048Swpaul * 20135048Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21135048Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22135048Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23135048Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24135048Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25135048Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26135048Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27135048Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28135048Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29135048Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30135048Swpaul * THE POSSIBILITY OF SUCH DAMAGE. 31135048Swpaul */ 32135048Swpaul 33135048Swpaul#include <sys/cdefs.h> 34135048Swpaul__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 164705 2006-11-28 00:43:38Z marius $"); 35135048Swpaul 36135048Swpaul/* 37135048Swpaul * Driver for the Cicada CS8201 10/100/1000 copper PHY. 38135048Swpaul */ 39135048Swpaul 40135048Swpaul#include <sys/param.h> 41135048Swpaul#include <sys/systm.h> 42135048Swpaul#include <sys/kernel.h> 43135048Swpaul#include <sys/module.h> 44135048Swpaul#include <sys/socket.h> 45135048Swpaul#include <sys/bus.h> 46135048Swpaul 47135048Swpaul 48135048Swpaul#include <net/if.h> 49135048Swpaul#include <net/if_arp.h> 50135048Swpaul#include <net/if_media.h> 51135048Swpaul 52135048Swpaul#include <dev/mii/mii.h> 53135048Swpaul#include <dev/mii/miivar.h> 54135048Swpaul#include "miidevs.h" 55135048Swpaul 56135048Swpaul#include <dev/mii/ciphyreg.h> 57135048Swpaul 58135048Swpaul#include "miibus_if.h" 59135048Swpaul 60135048Swpaul#include <machine/bus.h> 61135048Swpaul/* 62135048Swpaul#include <dev/vge/if_vgereg.h> 63135048Swpaul*/ 64135048Swpaulstatic int ciphy_probe(device_t); 65135048Swpaulstatic int ciphy_attach(device_t); 66135048Swpaul 67135048Swpaulstatic device_method_t ciphy_methods[] = { 68135048Swpaul /* device interface */ 69135048Swpaul DEVMETHOD(device_probe, ciphy_probe), 70135048Swpaul DEVMETHOD(device_attach, ciphy_attach), 71135048Swpaul DEVMETHOD(device_detach, mii_phy_detach), 72135048Swpaul DEVMETHOD(device_shutdown, bus_generic_shutdown), 73135048Swpaul { 0, 0 } 74135048Swpaul}; 75135048Swpaul 76135048Swpaulstatic devclass_t ciphy_devclass; 77135048Swpaul 78135048Swpaulstatic driver_t ciphy_driver = { 79135048Swpaul "ciphy", 80135048Swpaul ciphy_methods, 81135048Swpaul sizeof(struct mii_softc) 82135048Swpaul}; 83135048Swpaul 84135048SwpaulDRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0); 85135048Swpaul 86135048Swpaulstatic int ciphy_service(struct mii_softc *, struct mii_data *, int); 87135048Swpaulstatic void ciphy_status(struct mii_softc *); 88135048Swpaulstatic void ciphy_reset(struct mii_softc *); 89135048Swpaulstatic void ciphy_fixup(struct mii_softc *); 90135048Swpaul 91135048Swpaulstatic int 92150763Simpciphy_probe(device_t dev) 93135048Swpaul{ 94135048Swpaul struct mii_attach_args *ma; 95135048Swpaul 96135048Swpaul ma = device_get_ivars(dev); 97135048Swpaul 98135048Swpaul if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA && 99135048Swpaul MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201) { 100135048Swpaul device_set_desc(dev, MII_STR_CICADA_CS8201); 101164705Smarius return (BUS_PROBE_DEFAULT); 102135048Swpaul } 103135048Swpaul 104135048Swpaul if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA && 105135048Swpaul MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201A) { 106135048Swpaul device_set_desc(dev, MII_STR_CICADA_CS8201A); 107164705Smarius return (BUS_PROBE_DEFAULT); 108135048Swpaul } 109135048Swpaul 110135048Swpaul if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA && 111135048Swpaul MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201B) { 112135048Swpaul device_set_desc(dev, MII_STR_CICADA_CS8201B); 113164705Smarius return (BUS_PROBE_DEFAULT); 114135048Swpaul } 115135048Swpaul 116164705Smarius return (ENXIO); 117135048Swpaul} 118135048Swpaul 119135048Swpaulstatic int 120150763Simpciphy_attach(device_t dev) 121135048Swpaul{ 122135048Swpaul struct mii_softc *sc; 123135048Swpaul struct mii_attach_args *ma; 124135048Swpaul struct mii_data *mii; 125135048Swpaul 126135048Swpaul sc = device_get_softc(dev); 127135048Swpaul ma = device_get_ivars(dev); 128135048Swpaul sc->mii_dev = device_get_parent(dev); 129135048Swpaul mii = device_get_softc(sc->mii_dev); 130135048Swpaul LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 131135048Swpaul 132135048Swpaul sc->mii_inst = mii->mii_instance; 133135048Swpaul sc->mii_phy = ma->mii_phyno; 134135048Swpaul sc->mii_service = ciphy_service; 135135048Swpaul sc->mii_pdata = mii; 136135048Swpaul 137135048Swpaul sc->mii_flags |= MIIF_NOISOLATE; 138135048Swpaul mii->mii_instance++; 139135048Swpaul 140135048Swpaul ciphy_reset(sc); 141135048Swpaul 142135048Swpaul sc->mii_capabilities = 143135048Swpaul PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 144135048Swpaul if (sc->mii_capabilities & BMSR_EXTSTAT) 145135048Swpaul sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 146135048Swpaul device_printf(dev, " "); 147135048Swpaul mii_phy_add_media(sc); 148135048Swpaul printf("\n"); 149135048Swpaul 150135048Swpaul MIIBUS_MEDIAINIT(sc->mii_dev); 151164705Smarius return (0); 152135048Swpaul} 153135048Swpaul 154135048Swpaulstatic int 155150763Simpciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 156135048Swpaul{ 157135048Swpaul struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 158135048Swpaul int reg, speed, gig; 159135048Swpaul 160135048Swpaul switch (cmd) { 161135048Swpaul case MII_POLLSTAT: 162135048Swpaul /* 163135048Swpaul * If we're not polling our PHY instance, just return. 164135048Swpaul */ 165135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) 166135048Swpaul return (0); 167135048Swpaul break; 168135048Swpaul 169135048Swpaul case MII_MEDIACHG: 170135048Swpaul /* 171135048Swpaul * If the media indicates a different PHY instance, 172135048Swpaul * isolate ourselves. 173135048Swpaul */ 174135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 175135048Swpaul reg = PHY_READ(sc, MII_BMCR); 176135048Swpaul PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 177135048Swpaul return (0); 178135048Swpaul } 179135048Swpaul 180135048Swpaul /* 181135048Swpaul * If the interface is not up, don't do anything. 182135048Swpaul */ 183135048Swpaul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 184135048Swpaul break; 185135048Swpaul 186135048Swpaul ciphy_fixup(sc); /* XXX hardware bug work-around */ 187135048Swpaul 188135048Swpaul switch (IFM_SUBTYPE(ife->ifm_media)) { 189135048Swpaul case IFM_AUTO: 190135048Swpaul#ifdef foo 191135048Swpaul /* 192135048Swpaul * If we're already in auto mode, just return. 193135048Swpaul */ 194135048Swpaul if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN) 195135048Swpaul return (0); 196135048Swpaul#endif 197135048Swpaul (void) mii_phy_auto(sc); 198135048Swpaul break; 199135048Swpaul case IFM_1000_T: 200135048Swpaul speed = CIPHY_S1000; 201135048Swpaul goto setit; 202135048Swpaul case IFM_100_TX: 203135048Swpaul speed = CIPHY_S100; 204135048Swpaul goto setit; 205135048Swpaul case IFM_10_T: 206135048Swpaul speed = CIPHY_S10; 207135048Swpaulsetit: 208135048Swpaul if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 209135048Swpaul speed |= CIPHY_BMCR_FDX; 210135048Swpaul gig = CIPHY_1000CTL_AFD; 211135048Swpaul } else { 212135048Swpaul gig = CIPHY_1000CTL_AHD; 213135048Swpaul } 214135048Swpaul 215135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 0); 216135048Swpaul PHY_WRITE(sc, CIPHY_MII_BMCR, speed); 217135048Swpaul PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE); 218135048Swpaul 219164705Smarius if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) 220135048Swpaul break; 221135048Swpaul 222135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, gig); 223135048Swpaul PHY_WRITE(sc, CIPHY_MII_BMCR, 224135048Swpaul speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG); 225135048Swpaul 226135048Swpaul /* 227135048Swpaul * When setting the link manually, one side must 228135048Swpaul * be the master and the other the slave. However 229135048Swpaul * ifmedia doesn't give us a good way to specify 230135048Swpaul * this, so we fake it by using one of the LINK 231135048Swpaul * flags. If LINK0 is set, we program the PHY to 232135048Swpaul * be a master, otherwise it's a slave. 233135048Swpaul */ 234135048Swpaul if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 235135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 236135048Swpaul gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC); 237135048Swpaul } else { 238135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 239135048Swpaul gig|CIPHY_1000CTL_MSE); 240135048Swpaul } 241135048Swpaul break; 242135048Swpaul case IFM_NONE: 243135048Swpaul PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 244135048Swpaul break; 245135048Swpaul case IFM_100_T4: 246135048Swpaul default: 247135048Swpaul return (EINVAL); 248135048Swpaul } 249135048Swpaul break; 250135048Swpaul 251135048Swpaul case MII_TICK: 252135048Swpaul /* 253135048Swpaul * If we're not currently selected, just return. 254135048Swpaul */ 255135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) 256135048Swpaul return (0); 257135048Swpaul 258135048Swpaul /* 259135048Swpaul * Is the interface even up? 260135048Swpaul */ 261135048Swpaul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 262135048Swpaul return (0); 263135048Swpaul 264135048Swpaul /* 265135048Swpaul * Only used for autonegotiation. 266135048Swpaul */ 267135048Swpaul if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 268135048Swpaul break; 269135048Swpaul 270135048Swpaul /* 271135048Swpaul * Check to see if we have link. If we do, we don't 272135048Swpaul * need to restart the autonegotiation process. Read 273135048Swpaul * the BMSR twice in case it's latched. 274135048Swpaul */ 275135048Swpaul reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 276135048Swpaul if (reg & BMSR_LINK) 277135048Swpaul break; 278135048Swpaul 279135048Swpaul /* 280135048Swpaul * Only retry autonegotiation every 5 seconds. 281135048Swpaul */ 282135048Swpaul if (++sc->mii_ticks <= 5/*10*/) 283135048Swpaul break; 284164705Smarius 285135048Swpaul sc->mii_ticks = 0; 286135048Swpaul mii_phy_auto(sc); 287135048Swpaul return (0); 288135048Swpaul } 289135048Swpaul 290135048Swpaul /* Update the media status. */ 291135048Swpaul ciphy_status(sc); 292135048Swpaul 293135048Swpaul /* 294135048Swpaul * Callback if something changed. Note that we need to poke 295135048Swpaul * apply fixups for certain PHY revs. 296135048Swpaul */ 297164705Smarius if (sc->mii_media_active != mii->mii_media_active || 298135048Swpaul sc->mii_media_status != mii->mii_media_status || 299135048Swpaul cmd == MII_MEDIACHG) { 300135048Swpaul ciphy_fixup(sc); 301135048Swpaul } 302135048Swpaul mii_phy_update(sc, cmd); 303135048Swpaul return (0); 304135048Swpaul} 305135048Swpaul 306135048Swpaulstatic void 307150763Simpciphy_status(struct mii_softc *sc) 308135048Swpaul{ 309135048Swpaul struct mii_data *mii = sc->mii_pdata; 310135048Swpaul int bmsr, bmcr; 311135048Swpaul 312135048Swpaul mii->mii_media_status = IFM_AVALID; 313135048Swpaul mii->mii_media_active = IFM_ETHER; 314135048Swpaul 315135048Swpaul bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 316135048Swpaul 317135048Swpaul if (bmsr & BMSR_LINK) 318135048Swpaul mii->mii_media_status |= IFM_ACTIVE; 319135048Swpaul 320135048Swpaul bmcr = PHY_READ(sc, CIPHY_MII_BMCR); 321135048Swpaul 322135048Swpaul if (bmcr & CIPHY_BMCR_LOOP) 323135048Swpaul mii->mii_media_active |= IFM_LOOP; 324135048Swpaul 325135048Swpaul if (bmcr & CIPHY_BMCR_AUTOEN) { 326135048Swpaul if ((bmsr & CIPHY_BMSR_ACOMP) == 0) { 327135048Swpaul /* Erg, still trying, I guess... */ 328135048Swpaul mii->mii_media_active |= IFM_NONE; 329135048Swpaul return; 330135048Swpaul } 331135048Swpaul } 332135048Swpaul 333135048Swpaul bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR); 334135048Swpaul switch (bmsr & CIPHY_AUXCSR_SPEED) { 335135048Swpaul case CIPHY_SPEED10: 336135048Swpaul mii->mii_media_active |= IFM_10_T; 337135048Swpaul break; 338135048Swpaul case CIPHY_SPEED100: 339135048Swpaul mii->mii_media_active |= IFM_100_TX; 340135048Swpaul break; 341135048Swpaul case CIPHY_SPEED1000: 342135048Swpaul mii->mii_media_active |= IFM_1000_T; 343135048Swpaul break; 344135048Swpaul default: 345135048Swpaul device_printf(sc->mii_dev, "unknown PHY speed %x\n", 346135048Swpaul bmsr & CIPHY_AUXCSR_SPEED); 347135048Swpaul break; 348135048Swpaul } 349135048Swpaul 350135048Swpaul if (bmsr & CIPHY_AUXCSR_FDX) 351135048Swpaul mii->mii_media_active |= IFM_FDX; 352135048Swpaul 353135048Swpaul return; 354135048Swpaul} 355135048Swpaul 356135048Swpaulstatic void 357135048Swpaulciphy_reset(struct mii_softc *sc) 358135048Swpaul{ 359135048Swpaul mii_phy_reset(sc); 360135048Swpaul DELAY(1000); 361135048Swpaul 362135048Swpaul return; 363135048Swpaul} 364135048Swpaul 365135048Swpaul#define PHY_SETBIT(x, y, z) \ 366135048Swpaul PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) 367135048Swpaul#define PHY_CLRBIT(x, y, z) \ 368135048Swpaul PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) 369135048Swpaul 370135048Swpaulstatic void 371135048Swpaulciphy_fixup(struct mii_softc *sc) 372135048Swpaul{ 373135048Swpaul uint16_t model; 374135048Swpaul uint16_t status, speed; 375135048Swpaul 376135048Swpaul model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); 377135048Swpaul status = PHY_READ(sc, CIPHY_MII_AUXCSR); 378135048Swpaul speed = status & CIPHY_AUXCSR_SPEED; 379135048Swpaul 380135048Swpaul switch (model) { 381135048Swpaul case MII_MODEL_CICADA_CS8201: 382135048Swpaul 383135048Swpaul /* Turn off "aux mode" (whatever that means) */ 384135048Swpaul PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); 385135048Swpaul 386135048Swpaul /* 387135048Swpaul * Work around speed polling bug in VT3119/VT3216 388135048Swpaul * when using MII in full duplex mode. 389135048Swpaul */ 390135048Swpaul if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 391135048Swpaul (status & CIPHY_AUXCSR_FDX)) { 392135048Swpaul PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 393135048Swpaul } else { 394135048Swpaul PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 395135048Swpaul } 396135048Swpaul 397135048Swpaul /* Enable link/activity LED blink. */ 398135048Swpaul PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK); 399135048Swpaul 400135048Swpaul break; 401135048Swpaul 402135048Swpaul case MII_MODEL_CICADA_CS8201A: 403135048Swpaul case MII_MODEL_CICADA_CS8201B: 404135048Swpaul 405135048Swpaul /* 406135048Swpaul * Work around speed polling bug in VT3119/VT3216 407135048Swpaul * when using MII in full duplex mode. 408135048Swpaul */ 409135048Swpaul if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 410135048Swpaul (status & CIPHY_AUXCSR_FDX)) { 411135048Swpaul PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 412135048Swpaul } else { 413135048Swpaul PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 414135048Swpaul } 415135048Swpaul 416135048Swpaul break; 417135048Swpaul default: 418135048Swpaul device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", 419135048Swpaul model); 420135048Swpaul break; 421135048Swpaul } 422135048Swpaul 423135048Swpaul return; 424135048Swpaul} 425