ciphy.c revision 135048
1139749Simp/* 2135048Swpaul * Copyright (c) 2004 3135048Swpaul * Bill Paul <wpaul@windriver.com>. All rights reserved. 4135048Swpaul * 5135048Swpaul * Redistribution and use in source and binary forms, with or without 6135048Swpaul * modification, are permitted provided that the following conditions 7135048Swpaul * are met: 8135048Swpaul * 1. Redistributions of source code must retain the above copyright 9135048Swpaul * notice, this list of conditions and the following disclaimer. 10135048Swpaul * 2. Redistributions in binary form must reproduce the above copyright 11135048Swpaul * notice, this list of conditions and the following disclaimer in the 12135048Swpaul * documentation and/or other materials provided with the distribution. 13135048Swpaul * 3. All advertising materials mentioning features or use of this software 14135048Swpaul * must display the following acknowledgement: 15135048Swpaul * This product includes software developed by Bill Paul. 16135048Swpaul * 4. Neither the name of the author nor the names of any co-contributors 17135048Swpaul * may be used to endorse or promote products derived from this software 18135048Swpaul * without specific prior written permission. 19135048Swpaul * 20135048Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21135048Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22135048Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23135048Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24135048Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25135048Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26135048Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27135048Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28135048Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29135048Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30135048Swpaul * THE POSSIBILITY OF SUCH DAMAGE. 31135048Swpaul * 32135048Swpaul * $FreeBSD: head/sys/dev/mii/ciphy.c 135048 2004-09-10 20:57:46Z wpaul $ 33135048Swpaul */ 34135048Swpaul 35135048Swpaul#include <sys/cdefs.h> 36135048Swpaul__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 135048 2004-09-10 20:57:46Z wpaul $"); 37135048Swpaul 38135048Swpaul/* 39135048Swpaul * Driver for the Cicada CS8201 10/100/1000 copper PHY. 40135048Swpaul */ 41135048Swpaul 42135048Swpaul#include <sys/param.h> 43135048Swpaul#include <sys/systm.h> 44135048Swpaul#include <sys/kernel.h> 45135048Swpaul#include <sys/module.h> 46135048Swpaul#include <sys/socket.h> 47135048Swpaul#include <sys/bus.h> 48135048Swpaul 49135048Swpaul#include <machine/clock.h> 50135048Swpaul 51135048Swpaul#include <net/if.h> 52135048Swpaul#include <net/if_arp.h> 53135048Swpaul#include <net/if_media.h> 54135048Swpaul 55135048Swpaul#include <dev/mii/mii.h> 56135048Swpaul#include <dev/mii/miivar.h> 57135048Swpaul#include "miidevs.h" 58135048Swpaul 59135048Swpaul#include <dev/mii/ciphyreg.h> 60135048Swpaul 61135048Swpaul#include "miibus_if.h" 62135048Swpaul 63135048Swpaul#include <machine/bus.h> 64135048Swpaul/* 65135048Swpaul#include <dev/vge/if_vgereg.h> 66135048Swpaul*/ 67135048Swpaulstatic int ciphy_probe(device_t); 68135048Swpaulstatic int ciphy_attach(device_t); 69135048Swpaul 70135048Swpaulstatic device_method_t ciphy_methods[] = { 71135048Swpaul /* device interface */ 72135048Swpaul DEVMETHOD(device_probe, ciphy_probe), 73135048Swpaul DEVMETHOD(device_attach, ciphy_attach), 74135048Swpaul DEVMETHOD(device_detach, mii_phy_detach), 75135048Swpaul DEVMETHOD(device_shutdown, bus_generic_shutdown), 76135048Swpaul { 0, 0 } 77135048Swpaul}; 78135048Swpaul 79135048Swpaulstatic devclass_t ciphy_devclass; 80135048Swpaul 81135048Swpaulstatic driver_t ciphy_driver = { 82135048Swpaul "ciphy", 83135048Swpaul ciphy_methods, 84135048Swpaul sizeof(struct mii_softc) 85135048Swpaul}; 86135048Swpaul 87135048SwpaulDRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0); 88135048Swpaul 89135048Swpaulstatic int ciphy_service(struct mii_softc *, struct mii_data *, int); 90164827Smariusstatic void ciphy_status(struct mii_softc *); 91164827Smariusstatic void ciphy_reset(struct mii_softc *); 92164827Smariusstatic void ciphy_fixup(struct mii_softc *); 93164827Smarius 94164827Smariusstatic int 95164827Smariusciphy_probe(dev) 96164827Smarius device_t dev; 97135048Swpaul{ 98150763Simp struct mii_attach_args *ma; 99135048Swpaul 100135048Swpaul ma = device_get_ivars(dev); 101164827Smarius 102135048Swpaul if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA && 103135048Swpaul MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201) { 104135048Swpaul device_set_desc(dev, MII_STR_CICADA_CS8201); 105150763Simp return(0); 106135048Swpaul } 107135048Swpaul 108135048Swpaul if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA && 109135048Swpaul MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201A) { 110135048Swpaul device_set_desc(dev, MII_STR_CICADA_CS8201A); 111135048Swpaul return(0); 112135048Swpaul } 113135048Swpaul 114135048Swpaul if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA && 115135048Swpaul MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201B) { 116135048Swpaul device_set_desc(dev, MII_STR_CICADA_CS8201B); 117135048Swpaul return(0); 118135048Swpaul } 119135048Swpaul 120135048Swpaul return(ENXIO); 121135048Swpaul} 122135048Swpaul 123135048Swpaulstatic int 124135048Swpaulciphy_attach(dev) 125135048Swpaul device_t dev; 126135048Swpaul{ 127135048Swpaul struct mii_softc *sc; 128135048Swpaul struct mii_attach_args *ma; 129135048Swpaul struct mii_data *mii; 130135048Swpaul 131135048Swpaul sc = device_get_softc(dev); 132135048Swpaul ma = device_get_ivars(dev); 133135048Swpaul sc->mii_dev = device_get_parent(dev); 134135048Swpaul mii = device_get_softc(sc->mii_dev); 135135048Swpaul LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 136164705Smarius 137135048Swpaul sc->mii_inst = mii->mii_instance; 138135048Swpaul sc->mii_phy = ma->mii_phyno; 139135048Swpaul sc->mii_service = ciphy_service; 140150763Simp sc->mii_pdata = mii; 141135048Swpaul 142135048Swpaul sc->mii_flags |= MIIF_NOISOLATE; 143135048Swpaul mii->mii_instance++; 144135048Swpaul 145135048Swpaul ciphy_reset(sc); 146135048Swpaul 147135048Swpaul sc->mii_capabilities = 148135048Swpaul PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 149135048Swpaul if (sc->mii_capabilities & BMSR_EXTSTAT) 150135048Swpaul sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 151135048Swpaul device_printf(dev, " "); 152135048Swpaul mii_phy_add_media(sc); 153135048Swpaul printf("\n"); 154135048Swpaul 155135048Swpaul MIIBUS_MEDIAINIT(sc->mii_dev); 156135048Swpaul return(0); 157135048Swpaul} 158135048Swpaul 159135048Swpaulstatic int 160135048Swpaulciphy_service(sc, mii, cmd) 161135048Swpaul struct mii_softc *sc; 162135048Swpaul struct mii_data *mii; 163135048Swpaul int cmd; 164135048Swpaul{ 165135048Swpaul struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 166135048Swpaul int reg, speed, gig; 167135048Swpaul 168135048Swpaul switch (cmd) { 169135048Swpaul case MII_POLLSTAT: 170135048Swpaul /* 171135048Swpaul * If we're not polling our PHY instance, just return. 172135048Swpaul */ 173135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) 174135048Swpaul return (0); 175135048Swpaul break; 176135048Swpaul 177135048Swpaul case MII_MEDIACHG: 178135048Swpaul /* 179135048Swpaul * If the media indicates a different PHY instance, 180135048Swpaul * isolate ourselves. 181135048Swpaul */ 182135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 183135048Swpaul reg = PHY_READ(sc, MII_BMCR); 184135048Swpaul PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 185135048Swpaul return (0); 186135048Swpaul } 187135048Swpaul 188135048Swpaul /* 189135048Swpaul * If the interface is not up, don't do anything. 190135048Swpaul */ 191135048Swpaul if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 192135048Swpaul break; 193135048Swpaul 194135048Swpaul ciphy_fixup(sc); /* XXX hardware bug work-around */ 195135048Swpaul 196135048Swpaul switch (IFM_SUBTYPE(ife->ifm_media)) { 197135048Swpaul case IFM_AUTO: 198135048Swpaul#ifdef foo 199135048Swpaul /* 200135048Swpaul * If we're already in auto mode, just return. 201135048Swpaul */ 202135048Swpaul if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN) 203135048Swpaul return (0); 204164705Smarius#endif 205135048Swpaul (void) mii_phy_auto(sc); 206135048Swpaul break; 207135048Swpaul case IFM_1000_T: 208135048Swpaul speed = CIPHY_S1000; 209135048Swpaul goto setit; 210135048Swpaul case IFM_100_TX: 211135048Swpaul speed = CIPHY_S100; 212135048Swpaul goto setit; 213135048Swpaul case IFM_10_T: 214135048Swpaul speed = CIPHY_S10; 215135048Swpaulsetit: 216135048Swpaul if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 217135048Swpaul speed |= CIPHY_BMCR_FDX; 218135048Swpaul gig = CIPHY_1000CTL_AFD; 219135048Swpaul } else { 220135048Swpaul gig = CIPHY_1000CTL_AHD; 221135048Swpaul } 222135048Swpaul 223135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 0); 224135048Swpaul PHY_WRITE(sc, CIPHY_MII_BMCR, speed); 225135048Swpaul PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE); 226135048Swpaul 227135048Swpaul if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) 228135048Swpaul break; 229135048Swpaul 230135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, gig); 231135048Swpaul PHY_WRITE(sc, CIPHY_MII_BMCR, 232135048Swpaul speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG); 233135048Swpaul 234135048Swpaul /* 235135048Swpaul * When setting the link manually, one side must 236135048Swpaul * be the master and the other the slave. However 237135048Swpaul * ifmedia doesn't give us a good way to specify 238135048Swpaul * this, so we fake it by using one of the LINK 239135048Swpaul * flags. If LINK0 is set, we program the PHY to 240135048Swpaul * be a master, otherwise it's a slave. 241135048Swpaul */ 242135048Swpaul if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 243135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 244135048Swpaul gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC); 245135048Swpaul } else { 246135048Swpaul PHY_WRITE(sc, CIPHY_MII_1000CTL, 247135048Swpaul gig|CIPHY_1000CTL_MSE); 248135048Swpaul } 249135048Swpaul break; 250135048Swpaul case IFM_NONE: 251135048Swpaul PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 252135048Swpaul break; 253135048Swpaul case IFM_100_T4: 254135048Swpaul default: 255135048Swpaul return (EINVAL); 256135048Swpaul } 257135048Swpaul break; 258135048Swpaul 259135048Swpaul case MII_TICK: 260135048Swpaul /* 261135048Swpaul * If we're not currently selected, just return. 262135048Swpaul */ 263135048Swpaul if (IFM_INST(ife->ifm_media) != sc->mii_inst) 264135048Swpaul return (0); 265135048Swpaul 266135048Swpaul /* 267164830Smarius * Is the interface even up? 268135048Swpaul */ 269164705Smarius if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 270135048Swpaul return (0); 271135048Swpaul 272135048Swpaul /* 273135048Swpaul * Only used for autonegotiation. 274135048Swpaul */ 275135048Swpaul if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 276135048Swpaul break; 277135048Swpaul 278135048Swpaul /* 279135048Swpaul * Check to see if we have link. If we do, we don't 280135048Swpaul * need to restart the autonegotiation process. Read 281135048Swpaul * the BMSR twice in case it's latched. 282164705Smarius */ 283135048Swpaul reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 284135048Swpaul if (reg & BMSR_LINK) 285135048Swpaul break; 286135048Swpaul 287135048Swpaul /* 288135048Swpaul * Only retry autonegotiation every 5 seconds. 289135048Swpaul */ 290135048Swpaul if (++sc->mii_ticks <= 5/*10*/) 291135048Swpaul break; 292150763Simp 293135048Swpaul sc->mii_ticks = 0; 294135048Swpaul mii_phy_auto(sc); 295135048Swpaul return (0); 296135048Swpaul } 297135048Swpaul 298135048Swpaul /* Update the media status. */ 299135048Swpaul ciphy_status(sc); 300135048Swpaul 301135048Swpaul /* 302135048Swpaul * Callback if something changed. Note that we need to poke 303135048Swpaul * apply fixups for certain PHY revs. 304135048Swpaul */ 305135048Swpaul if (sc->mii_media_active != mii->mii_media_active || 306135048Swpaul sc->mii_media_status != mii->mii_media_status || 307135048Swpaul cmd == MII_MEDIACHG) { 308135048Swpaul ciphy_fixup(sc); 309135048Swpaul } 310135048Swpaul mii_phy_update(sc, cmd); 311135048Swpaul return (0); 312135048Swpaul} 313135048Swpaul 314135048Swpaulstatic void 315135048Swpaulciphy_status(sc) 316135048Swpaul struct mii_softc *sc; 317135048Swpaul{ 318135048Swpaul struct mii_data *mii = sc->mii_pdata; 319135048Swpaul int bmsr, bmcr; 320135048Swpaul 321135048Swpaul mii->mii_media_status = IFM_AVALID; 322135048Swpaul mii->mii_media_active = IFM_ETHER; 323135048Swpaul 324135048Swpaul bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 325135048Swpaul 326135048Swpaul if (bmsr & BMSR_LINK) 327135048Swpaul mii->mii_media_status |= IFM_ACTIVE; 328135048Swpaul 329135048Swpaul bmcr = PHY_READ(sc, CIPHY_MII_BMCR); 330135048Swpaul 331135048Swpaul if (bmcr & CIPHY_BMCR_LOOP) 332135048Swpaul mii->mii_media_active |= IFM_LOOP; 333135048Swpaul 334135048Swpaul if (bmcr & CIPHY_BMCR_AUTOEN) { 335135048Swpaul if ((bmsr & CIPHY_BMSR_ACOMP) == 0) { 336135048Swpaul /* Erg, still trying, I guess... */ 337135048Swpaul mii->mii_media_active |= IFM_NONE; 338135048Swpaul return; 339135048Swpaul } 340135048Swpaul } 341135048Swpaul 342164830Smarius bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR); 343135048Swpaul switch (bmsr & CIPHY_AUXCSR_SPEED) { 344135048Swpaul case CIPHY_SPEED10: 345135048Swpaul mii->mii_media_active |= IFM_10_T; 346135048Swpaul break; 347135048Swpaul case CIPHY_SPEED100: 348135048Swpaul mii->mii_media_active |= IFM_100_TX; 349135048Swpaul break; 350135048Swpaul case CIPHY_SPEED1000: 351135048Swpaul mii->mii_media_active |= IFM_1000_T; 352135048Swpaul break; 353135048Swpaul default: 354135048Swpaul device_printf(sc->mii_dev, "unknown PHY speed %x\n", 355135048Swpaul bmsr & CIPHY_AUXCSR_SPEED); 356135048Swpaul break; 357135048Swpaul } 358135048Swpaul 359135048Swpaul if (bmsr & CIPHY_AUXCSR_FDX) 360135048Swpaul mii->mii_media_active |= IFM_FDX; 361135048Swpaul 362135048Swpaul return; 363135048Swpaul} 364135048Swpaul 365135048Swpaulstatic void 366135048Swpaulciphy_reset(struct mii_softc *sc) 367135048Swpaul{ 368135048Swpaul mii_phy_reset(sc); 369135048Swpaul DELAY(1000); 370135048Swpaul 371135048Swpaul return; 372135048Swpaul} 373135048Swpaul 374135048Swpaul#define PHY_SETBIT(x, y, z) \ 375135048Swpaul PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) 376135048Swpaul#define PHY_CLRBIT(x, y, z) \ 377135048Swpaul PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) 378135048Swpaul 379135048Swpaulstatic void 380135048Swpaulciphy_fixup(struct mii_softc *sc) 381135048Swpaul{ 382135048Swpaul uint16_t model; 383135048Swpaul uint16_t status, speed; 384135048Swpaul 385135048Swpaul model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); 386135048Swpaul status = PHY_READ(sc, CIPHY_MII_AUXCSR); 387135048Swpaul speed = status & CIPHY_AUXCSR_SPEED; 388135048Swpaul 389135048Swpaul switch (model) { 390135048Swpaul case MII_MODEL_CICADA_CS8201: 391135048Swpaul 392135048Swpaul /* Turn off "aux mode" (whatever that means) */ 393135048Swpaul PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); 394135048Swpaul 395135048Swpaul /* 396135048Swpaul * Work around speed polling bug in VT3119/VT3216 397135048Swpaul * when using MII in full duplex mode. 398135048Swpaul */ 399135048Swpaul if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 400135048Swpaul (status & CIPHY_AUXCSR_FDX)) { 401135048Swpaul PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 402135048Swpaul } else { 403135048Swpaul PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 404135048Swpaul } 405 406 /* Enable link/activity LED blink. */ 407 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK); 408 409 break; 410 411 case MII_MODEL_CICADA_CS8201A: 412 case MII_MODEL_CICADA_CS8201B: 413 414 /* 415 * Work around speed polling bug in VT3119/VT3216 416 * when using MII in full duplex mode. 417 */ 418 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 419 (status & CIPHY_AUXCSR_FDX)) { 420 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 421 } else { 422 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 423 } 424 425 break; 426 default: 427 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", 428 model); 429 break; 430 } 431 432 return; 433} 434