if_malo.c revision 190526
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3 * Copyright (c) 2007 Marvell Semiconductor, Inc. 4 * Copyright (c) 2007 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 18 * NO WARRANTY 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29 * THE POSSIBILITY OF SUCH DAMAGES. 30 */ 31 32#include <sys/cdefs.h> 33#ifdef __FreeBSD__ 34__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 190526 2009-03-29 17:59:14Z sam $"); 35#endif 36 37#include "opt_malo.h" 38 39#include <sys/param.h> 40#include <sys/endian.h> 41#include <sys/kernel.h> 42#include <sys/socket.h> 43#include <sys/sockio.h> 44#include <sys/sysctl.h> 45#include <sys/taskqueue.h> 46 47#include <machine/bus.h> 48#include <sys/bus.h> 49 50#include <net/if.h> 51#include <net/if_dl.h> 52#include <net/if_media.h> 53#include <net/if_types.h> 54#include <net/ethernet.h> 55 56#include <net80211/ieee80211_var.h> 57#include <net80211/ieee80211_regdomain.h> 58 59#include <net/bpf.h> 60 61#include <dev/malo/if_malo.h> 62 63SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 64 "Marvell 88w8335 driver parameters"); 65 66static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 67SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce, 68 0, "tx buffers to send at once"); 69TUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce); 70static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf, 72 0, "rx buffers allocated"); 73TUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf); 74static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 75SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota, 76 0, "max rx buffers to process per interrupt"); 77TUNABLE_INT("hw.malo.rxquota", &malo_rxquota); 78static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 79SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf, 80 0, "tx buffers allocated"); 81TUNABLE_INT("hw.malo.txbuf", &malo_txbuf); 82 83#ifdef MALO_DEBUG 84static int malo_debug = 0; 85SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug, 86 0, "control debugging printfs"); 87TUNABLE_INT("hw.malo.debug", &malo_debug); 88enum { 89 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 91 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 92 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 93 MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 94 MALO_DEBUG_INTR = 0x00000040, /* ISR */ 95 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 96 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 97 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 98 MALO_DEBUG_NODE = 0x00000800, /* node management */ 99 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 100 MALO_DEBUG_FW = 0x00008000, /* firmware */ 101 MALO_DEBUG_ANY = 0xffffffff 102}; 103#define IS_BEACON(wh) \ 104 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 105 IEEE80211_FC0_SUBTYPE_MASK)) == \ 106 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 107#define IFF_DUMPPKTS_RECV(sc, wh) \ 108 (((sc->malo_debug & MALO_DEBUG_RECV) && \ 109 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 110 (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \ 111 (IFF_DEBUG|IFF_LINK2)) 112#define IFF_DUMPPKTS_XMIT(sc) \ 113 ((sc->malo_debug & MALO_DEBUG_XMIT) || \ 114 (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \ 115 (IFF_DEBUG | IFF_LINK2)) 116#define DPRINTF(sc, m, fmt, ...) do { \ 117 if (sc->malo_debug & (m)) \ 118 printf(fmt, __VA_ARGS__); \ 119} while (0) 120#else 121#define DPRINTF(sc, m, fmt, ...) do { \ 122 (void) sc; \ 123} while (0) 124#endif 125 126MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 127 128static struct ieee80211vap *malo_vap_create(struct ieee80211com *ic, 129 const char name[IFNAMSIZ], int unit, int opmode, int flags, 130 const uint8_t bssid[IEEE80211_ADDR_LEN], 131 const uint8_t mac[IEEE80211_ADDR_LEN]); 132static void malo_vap_delete(struct ieee80211vap *); 133static int malo_dma_setup(struct malo_softc *); 134static int malo_setup_hwdma(struct malo_softc *); 135static void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 136static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 137static void malo_start(struct ifnet *); 138static void malo_watchdog(struct ifnet *); 139static int malo_ioctl(struct ifnet *, u_long, caddr_t); 140static void malo_updateslot(struct ifnet *); 141static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 142static void malo_scan_start(struct ieee80211com *); 143static void malo_scan_end(struct ieee80211com *); 144static void malo_set_channel(struct ieee80211com *); 145static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 146 const struct ieee80211_bpf_params *); 147static void malo_bpfattach(struct malo_softc *); 148static void malo_sysctlattach(struct malo_softc *); 149static void malo_announce(struct malo_softc *); 150static void malo_dma_cleanup(struct malo_softc *); 151static void malo_stop_locked(struct ifnet *, int); 152static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 153static int malo_mode_init(struct malo_softc *); 154static void malo_tx_proc(void *, int); 155static void malo_rx_proc(void *, int); 156static void malo_init(void *); 157 158/* 159 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 160 * operations are done in the "hal" except getting H/W MAC address at 161 * malo_attach and there should be no reference to them here. 162 */ 163static uint32_t 164malo_bar0_read4(struct malo_softc *sc, bus_size_t off) 165{ 166 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 167} 168 169static void 170malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 171{ 172 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%zx val 0x%x\n", 173 __func__, off, val); 174 175 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 176} 177 178int 179malo_attach(uint16_t devid, struct malo_softc *sc) 180{ 181 int error; 182 struct ieee80211com *ic; 183 struct ifnet *ifp; 184 struct malo_hal *mh; 185 uint8_t bands; 186 187 ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211); 188 if (ifp == NULL) { 189 device_printf(sc->malo_dev, "can not if_alloc()\n"); 190 return ENOSPC; 191 } 192 ic = ifp->if_l2com; 193 194 MALO_LOCK_INIT(sc); 195 196 /* set these up early for if_printf use */ 197 if_initname(ifp, device_get_name(sc->malo_dev), 198 device_get_unit(sc->malo_dev)); 199 200 mh = malo_hal_attach(sc->malo_dev, devid, 201 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 202 if (mh == NULL) { 203 if_printf(ifp, "unable to attach HAL\n"); 204 error = EIO; 205 goto bad; 206 } 207 sc->malo_mh = mh; 208 209 /* 210 * Load firmware so we can get setup. We arbitrarily pick station 211 * firmware; we'll re-load firmware as needed so setting up 212 * the wrong mode isn't a big deal. 213 */ 214 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 215 if (error != 0) { 216 if_printf(ifp, "unable to setup firmware\n"); 217 goto bad1; 218 } 219 /* XXX gethwspecs() extracts correct informations? not maybe! */ 220 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 221 if (error != 0) { 222 if_printf(ifp, "unable to fetch h/w specs\n"); 223 goto bad1; 224 } 225 226 DPRINTF(sc, MALO_DEBUG_FW, 227 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 228 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 229 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 230 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 231 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 232 sc->malo_hwspecs.hwversion, 233 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 234 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 235 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 236 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 237 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 238 sc->malo_hwspecs.ul_fw_awakecookie, 239 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 240 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 241 242 /* NB: firmware looks that it does not export regdomain info API. */ 243 bands = 0; 244 setbit(&bands, IEEE80211_MODE_11B); 245 setbit(&bands, IEEE80211_MODE_11G); 246 ieee80211_init_channels(ic, NULL, &bands); 247 248 sc->malo_txantenna = 0x2; /* h/w default */ 249 sc->malo_rxantenna = 0xffff; /* h/w default */ 250 251 /* 252 * Allocate tx + rx descriptors and populate the lists. 253 * We immediately push the information to the firmware 254 * as otherwise it gets upset. 255 */ 256 error = malo_dma_setup(sc); 257 if (error != 0) { 258 if_printf(ifp, "failed to setup descriptors: %d\n", error); 259 goto bad1; 260 } 261 error = malo_setup_hwdma(sc); /* push to firmware */ 262 if (error != 0) /* NB: malo_setupdma prints msg */ 263 goto bad1; 264 265 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 266 taskqueue_thread_enqueue, &sc->malo_tq); 267 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 268 "%s taskq", ifp->if_xname); 269 270 TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 271 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 272 273 ifp->if_softc = sc; 274 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 275 ifp->if_start = malo_start; 276 ifp->if_watchdog = malo_watchdog; 277 ifp->if_ioctl = malo_ioctl; 278 ifp->if_init = malo_init; 279 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 280 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 281 IFQ_SET_READY(&ifp->if_snd); 282 283 ic->ic_ifp = ifp; 284 /* XXX not right but it's not used anywhere important */ 285 ic->ic_phytype = IEEE80211_T_OFDM; 286 ic->ic_opmode = IEEE80211_M_STA; 287 ic->ic_caps = 288 IEEE80211_C_STA /* station mode supported */ 289 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 290 | IEEE80211_C_MONITOR /* monitor mode */ 291 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 292 | IEEE80211_C_SHSLOT /* short slot time supported */ 293 | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 294 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 295 ; 296 297 /* 298 * Transmit requires space in the packet for a special format transmit 299 * record and optional padding between this record and the payload. 300 * Ask the net80211 layer to arrange this when encapsulating 301 * packets so we can add it efficiently. 302 */ 303 ic->ic_headroom = sizeof(struct malo_txrec) - 304 sizeof(struct ieee80211_frame); 305 306 /* call MI attach routine. */ 307 ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr); 308 /* override default methods */ 309 ic->ic_vap_create = malo_vap_create; 310 ic->ic_vap_delete = malo_vap_delete; 311 ic->ic_raw_xmit = malo_raw_xmit; 312 ic->ic_updateslot = malo_updateslot; 313 314 ic->ic_scan_start = malo_scan_start; 315 ic->ic_scan_end = malo_scan_end; 316 ic->ic_set_channel = malo_set_channel; 317 318 sc->malo_invalid = 0; /* ready to go, enable int handling */ 319 320 malo_bpfattach(sc); 321 322 /* 323 * Setup dynamic sysctl's. 324 */ 325 malo_sysctlattach(sc); 326 327 if (bootverbose) 328 ieee80211_announce(ic); 329 malo_announce(sc); 330 331 return 0; 332bad1: 333 malo_hal_detach(mh); 334bad: 335 if_free(ifp); 336 sc->malo_invalid = 1; 337 338 return error; 339} 340 341static struct ieee80211vap * 342malo_vap_create(struct ieee80211com *ic, 343 const char name[IFNAMSIZ], int unit, int opmode, int flags, 344 const uint8_t bssid[IEEE80211_ADDR_LEN], 345 const uint8_t mac[IEEE80211_ADDR_LEN]) 346{ 347 struct ifnet *ifp = ic->ic_ifp; 348 struct malo_vap *mvp; 349 struct ieee80211vap *vap; 350 351 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 352 if_printf(ifp, "multiple vaps not supported\n"); 353 return NULL; 354 } 355 switch (opmode) { 356 case IEEE80211_M_STA: 357 if (opmode == IEEE80211_M_STA) 358 flags |= IEEE80211_CLONE_NOBEACONS; 359 /* fall thru... */ 360 case IEEE80211_M_MONITOR: 361 break; 362 default: 363 if_printf(ifp, "%s mode not supported\n", 364 ieee80211_opmode_name[opmode]); 365 return NULL; /* unsupported */ 366 } 367 mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap), 368 M_80211_VAP, M_NOWAIT | M_ZERO); 369 if (mvp == NULL) { 370 if_printf(ifp, "cannot allocate vap state block\n"); 371 return NULL; 372 } 373 vap = &mvp->malo_vap; 374 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 375 376 /* override state transition machine */ 377 mvp->malo_newstate = vap->iv_newstate; 378 vap->iv_newstate = malo_newstate; 379 380 /* complete setup */ 381 ieee80211_vap_attach(vap, 382 ieee80211_media_change, ieee80211_media_status); 383 ic->ic_opmode = opmode; 384 return vap; 385} 386 387static void 388malo_vap_delete(struct ieee80211vap *vap) 389{ 390 struct malo_vap *mvp = MALO_VAP(vap); 391 392 ieee80211_vap_detach(vap); 393 free(mvp, M_80211_VAP); 394} 395 396int 397malo_intr(void *arg) 398{ 399 struct malo_softc *sc = arg; 400 struct malo_hal *mh = sc->malo_mh; 401 uint32_t status; 402 403 if (sc->malo_invalid) { 404 /* 405 * The hardware is not ready/present, don't touch anything. 406 * Note this can happen early on if the IRQ is shared. 407 */ 408 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 409 return (FILTER_STRAY); 410 } 411 412 /* 413 * Figure out the reason(s) for the interrupt. 414 */ 415 malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 416 if (status == 0) /* must be a shared irq */ 417 return (FILTER_STRAY); 418 419 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 420 __func__, status, sc->malo_imask); 421 422 if (status & MALO_A2HRIC_BIT_RX_RDY) 423 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 424 if (status & MALO_A2HRIC_BIT_TX_DONE) 425 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 426 if (status & MALO_A2HRIC_BIT_OPC_DONE) 427 malo_hal_cmddone(mh); 428 if (status & MALO_A2HRIC_BIT_MAC_EVENT) 429 ; 430 if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 431 ; 432 if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 433 /* TKIP ICV error */ 434 sc->malo_stats.mst_rx_badtkipicv++; 435 } 436#ifdef MALO_DEBUG 437 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 438 DPRINTF(sc, MALO_DEBUG_INTR, 439 "%s: can't handle interrupt status 0x%x\n", 440 __func__, status); 441#endif 442 return (FILTER_HANDLED); 443} 444 445static void 446malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 447{ 448 bus_addr_t *paddr = (bus_addr_t*) arg; 449 450 KASSERT(error == 0, ("error %u on bus_dma callback", error)); 451 452 *paddr = segs->ds_addr; 453} 454 455static int 456malo_desc_setup(struct malo_softc *sc, const char *name, 457 struct malo_descdma *dd, 458 int nbuf, size_t bufsize, int ndesc, size_t descsize) 459{ 460 int error; 461 struct ifnet *ifp = sc->malo_ifp; 462 uint8_t *ds; 463 464 DPRINTF(sc, MALO_DEBUG_RESET, 465 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 466 __func__, name, nbuf, (uintmax_t) bufsize, 467 ndesc, (uintmax_t) descsize); 468 469 dd->dd_name = name; 470 dd->dd_desc_len = nbuf * ndesc * descsize; 471 472 /* 473 * Setup DMA descriptor area. 474 */ 475 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 476 PAGE_SIZE, 0, /* alignment, bounds */ 477 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 478 BUS_SPACE_MAXADDR, /* highaddr */ 479 NULL, NULL, /* filter, filterarg */ 480 dd->dd_desc_len, /* maxsize */ 481 1, /* nsegments */ 482 dd->dd_desc_len, /* maxsegsize */ 483 BUS_DMA_ALLOCNOW, /* flags */ 484 NULL, /* lockfunc */ 485 NULL, /* lockarg */ 486 &dd->dd_dmat); 487 if (error != 0) { 488 if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 489 return error; 490 } 491 492 /* allocate descriptors */ 493 error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap); 494 if (error != 0) { 495 if_printf(ifp, "unable to create dmamap for %s descriptors, " 496 "error %u\n", dd->dd_name, error); 497 goto fail0; 498 } 499 500 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 501 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 502 if (error != 0) { 503 if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 504 "error %u\n", nbuf * ndesc, dd->dd_name, error); 505 goto fail1; 506 } 507 508 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 509 dd->dd_desc, dd->dd_desc_len, 510 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 511 if (error != 0) { 512 if_printf(ifp, "unable to map %s descriptors, error %u\n", 513 dd->dd_name, error); 514 goto fail2; 515 } 516 517 ds = dd->dd_desc; 518 memset(ds, 0, dd->dd_desc_len); 519 DPRINTF(sc, MALO_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n", 520 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 521 (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 522 523 return 0; 524fail2: 525 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 526fail1: 527 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 528fail0: 529 bus_dma_tag_destroy(dd->dd_dmat); 530 memset(dd, 0, sizeof(*dd)); 531 return error; 532} 533 534#define DS2PHYS(_dd, _ds) \ 535 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 536 537static int 538malo_rxdma_setup(struct malo_softc *sc) 539{ 540 struct ifnet *ifp = sc->malo_ifp; 541 int error, bsize, i; 542 struct malo_rxbuf *bf; 543 struct malo_rxdesc *ds; 544 545 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 546 malo_rxbuf, sizeof(struct malo_rxbuf), 547 1, sizeof(struct malo_rxdesc)); 548 if (error != 0) 549 return error; 550 551 /* 552 * Allocate rx buffers and set them up. 553 */ 554 bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 555 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 556 if (bf == NULL) { 557 if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 558 return error; 559 } 560 sc->malo_rxdma.dd_bufptr = bf; 561 562 STAILQ_INIT(&sc->malo_rxbuf); 563 ds = sc->malo_rxdma.dd_desc; 564 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 565 bf->bf_desc = ds; 566 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 567 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 568 &bf->bf_dmamap); 569 if (error != 0) { 570 if_printf(ifp, "%s: unable to dmamap for rx buffer, " 571 "error %d\n", __func__, error); 572 return error; 573 } 574 /* NB: tail is intentional to preserve descriptor order */ 575 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 576 } 577 return 0; 578} 579 580static int 581malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 582{ 583 struct ifnet *ifp = sc->malo_ifp; 584 int error, bsize, i; 585 struct malo_txbuf *bf; 586 struct malo_txdesc *ds; 587 588 error = malo_desc_setup(sc, "tx", &txq->dma, 589 malo_txbuf, sizeof(struct malo_txbuf), 590 MALO_TXDESC, sizeof(struct malo_txdesc)); 591 if (error != 0) 592 return error; 593 594 /* allocate and setup tx buffers */ 595 bsize = malo_txbuf * sizeof(struct malo_txbuf); 596 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 597 if (bf == NULL) { 598 if_printf(ifp, "malloc of %u tx buffers failed\n", 599 malo_txbuf); 600 return ENOMEM; 601 } 602 txq->dma.dd_bufptr = bf; 603 604 STAILQ_INIT(&txq->free); 605 txq->nfree = 0; 606 ds = txq->dma.dd_desc; 607 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 608 bf->bf_desc = ds; 609 bf->bf_daddr = DS2PHYS(&txq->dma, ds); 610 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 611 &bf->bf_dmamap); 612 if (error != 0) { 613 if_printf(ifp, "unable to create dmamap for tx " 614 "buffer %u, error %u\n", i, error); 615 return error; 616 } 617 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 618 txq->nfree++; 619 } 620 621 return 0; 622} 623 624static void 625malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 626{ 627 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 628 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 629 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 630 bus_dma_tag_destroy(dd->dd_dmat); 631 632 memset(dd, 0, sizeof(*dd)); 633} 634 635static void 636malo_rxdma_cleanup(struct malo_softc *sc) 637{ 638 struct malo_rxbuf *bf; 639 640 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 641 if (bf->bf_m != NULL) { 642 m_freem(bf->bf_m); 643 bf->bf_m = NULL; 644 } 645 if (bf->bf_dmamap != NULL) { 646 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 647 bf->bf_dmamap = NULL; 648 } 649 } 650 STAILQ_INIT(&sc->malo_rxbuf); 651 if (sc->malo_rxdma.dd_bufptr != NULL) { 652 free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 653 sc->malo_rxdma.dd_bufptr = NULL; 654 } 655 if (sc->malo_rxdma.dd_desc_len != 0) 656 malo_desc_cleanup(sc, &sc->malo_rxdma); 657} 658 659static void 660malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 661{ 662 struct malo_txbuf *bf; 663 struct ieee80211_node *ni; 664 665 STAILQ_FOREACH(bf, &txq->free, bf_list) { 666 if (bf->bf_m != NULL) { 667 m_freem(bf->bf_m); 668 bf->bf_m = NULL; 669 } 670 ni = bf->bf_node; 671 bf->bf_node = NULL; 672 if (ni != NULL) { 673 /* 674 * Reclaim node reference. 675 */ 676 ieee80211_free_node(ni); 677 } 678 if (bf->bf_dmamap != NULL) { 679 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 680 bf->bf_dmamap = NULL; 681 } 682 } 683 STAILQ_INIT(&txq->free); 684 txq->nfree = 0; 685 if (txq->dma.dd_bufptr != NULL) { 686 free(txq->dma.dd_bufptr, M_MALODEV); 687 txq->dma.dd_bufptr = NULL; 688 } 689 if (txq->dma.dd_desc_len != 0) 690 malo_desc_cleanup(sc, &txq->dma); 691} 692 693static void 694malo_dma_cleanup(struct malo_softc *sc) 695{ 696 int i; 697 698 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 699 malo_txdma_cleanup(sc, &sc->malo_txq[i]); 700 701 malo_rxdma_cleanup(sc); 702} 703 704static int 705malo_dma_setup(struct malo_softc *sc) 706{ 707 int error, i; 708 709 /* rxdma initializing. */ 710 error = malo_rxdma_setup(sc); 711 if (error != 0) 712 return error; 713 714 /* NB: we just have 1 tx queue now. */ 715 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 716 error = malo_txdma_setup(sc, &sc->malo_txq[i]); 717 if (error != 0) { 718 malo_dma_cleanup(sc); 719 720 return error; 721 } 722 723 malo_txq_init(sc, &sc->malo_txq[i], i); 724 } 725 726 return 0; 727} 728 729static void 730malo_hal_set_rxtxdma(struct malo_softc *sc) 731{ 732 int i; 733 734 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 735 sc->malo_hwdma.rxdesc_read); 736 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 737 sc->malo_hwdma.rxdesc_read); 738 739 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 740 malo_bar0_write4(sc, 741 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 742 } 743} 744 745/* 746 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 747 * for compatibility with older firmware. For current firmware we send 748 * this information with a cmd block via malo_hal_sethwdma. 749 */ 750static int 751malo_setup_hwdma(struct malo_softc *sc) 752{ 753 int i; 754 struct malo_txq *txq; 755 756 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 757 758 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 759 txq = &sc->malo_txq[i]; 760 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 761 } 762 sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 763 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 764 765 malo_hal_set_rxtxdma(sc); 766 767 return 0; 768} 769 770static void 771malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 772{ 773 struct malo_txbuf *bf, *bn; 774 struct malo_txdesc *ds; 775 776 MALO_TXQ_LOCK_INIT(sc, txq); 777 txq->qnum = qnum; 778 txq->txpri = 0; /* XXX */ 779 780 STAILQ_FOREACH(bf, &txq->free, bf_list) { 781 bf->bf_txq = txq; 782 783 ds = bf->bf_desc; 784 bn = STAILQ_NEXT(bf, bf_list); 785 if (bn == NULL) 786 bn = STAILQ_FIRST(&txq->free); 787 ds->physnext = htole32(bn->bf_daddr); 788 } 789 STAILQ_INIT(&txq->active); 790} 791 792/* 793 * Reclaim resources for a setup queue. 794 */ 795static void 796malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 797{ 798 /* XXX hal work? */ 799 MALO_TXQ_LOCK_DESTROY(txq); 800} 801 802/* 803 * Allocate a tx buffer for sending a frame. 804 */ 805static struct malo_txbuf * 806malo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 807{ 808 struct malo_txbuf *bf; 809 810 MALO_TXQ_LOCK(txq); 811 bf = STAILQ_FIRST(&txq->free); 812 if (bf != NULL) { 813 STAILQ_REMOVE_HEAD(&txq->free, bf_list); 814 txq->nfree--; 815 } 816 MALO_TXQ_UNLOCK(txq); 817 if (bf == NULL) { 818 DPRINTF(sc, MALO_DEBUG_XMIT, 819 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 820 sc->malo_stats.mst_tx_qstop++; 821 } 822 return bf; 823} 824 825static int 826malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 827{ 828 struct mbuf *m; 829 int error; 830 831 /* 832 * Load the DMA map so any coalescing is done. This also calculates 833 * the number of descriptors we need. 834 */ 835 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 836 bf->bf_segs, &bf->bf_nseg, 837 BUS_DMA_NOWAIT); 838 if (error == EFBIG) { 839 /* XXX packet requires too many descriptors */ 840 bf->bf_nseg = MALO_TXDESC + 1; 841 } else if (error != 0) { 842 sc->malo_stats.mst_tx_busdma++; 843 m_freem(m0); 844 return error; 845 } 846 /* 847 * Discard null packets and check for packets that require too many 848 * TX descriptors. We try to convert the latter to a cluster. 849 */ 850 if (error == EFBIG) { /* too many desc's, linearize */ 851 sc->malo_stats.mst_tx_linear++; 852 m = m_defrag(m0, M_DONTWAIT); 853 if (m == NULL) { 854 m_freem(m0); 855 sc->malo_stats.mst_tx_nombuf++; 856 return ENOMEM; 857 } 858 m0 = m; 859 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 860 bf->bf_segs, &bf->bf_nseg, 861 BUS_DMA_NOWAIT); 862 if (error != 0) { 863 sc->malo_stats.mst_tx_busdma++; 864 m_freem(m0); 865 return error; 866 } 867 KASSERT(bf->bf_nseg <= MALO_TXDESC, 868 ("too many segments after defrag; nseg %u", bf->bf_nseg)); 869 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 870 sc->malo_stats.mst_tx_nodata++; 871 m_freem(m0); 872 return EIO; 873 } 874 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 875 __func__, m0, m0->m_pkthdr.len); 876 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 877 bf->bf_m = m0; 878 879 return 0; 880} 881 882#ifdef MALO_DEBUG 883static void 884malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 885{ 886 const struct malo_rxdesc *ds = bf->bf_desc; 887 uint32_t status = le32toh(ds->status); 888 889 printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n" 890 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 891 " RATE:%02x QOS:%04x\n", 892 ix, ds, (const struct malo_desc *)bf->bf_daddr, 893 le32toh(ds->physnext), le32toh(ds->physbuffdata), 894 ds->rxcontrol, 895 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 896 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 897 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 898 ds->rate, le16toh(ds->qosctrl)); 899} 900 901static void 902malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 903{ 904 const struct malo_txdesc *ds = bf->bf_desc; 905 uint32_t status = le32toh(ds->status); 906 907 printf("Q%u[%3u]", qnum, ix); 908 printf(" (DS.V:%p DS.P:%p)\n", 909 ds, (const struct malo_txdesc *)bf->bf_daddr); 910 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 911 le32toh(ds->physnext), 912 le32toh(ds->pktptr), le16toh(ds->pktlen), status, 913 status & MALO_TXD_STATUS_USED ? 914 "" : (status & 3) != 0 ? " *" : " !"); 915 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 916 ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 917 le32toh(ds->sap_pktinfo), le16toh(ds->format)); 918#if 0 919 { 920 const uint8_t *cp = (const uint8_t *) ds; 921 int i; 922 for (i = 0; i < sizeof(struct malo_txdesc); i++) { 923 printf("%02x ", cp[i]); 924 if (((i+1) % 16) == 0) 925 printf("\n"); 926 } 927 printf("\n"); 928 } 929#endif 930} 931#endif /* MALO_DEBUG */ 932 933static __inline void 934malo_updatetxrate(struct ieee80211_node *ni, int rix) 935{ 936#define N(x) (sizeof(x)/sizeof(x[0])) 937 static const int ieeerates[] = 938 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 939 if (rix < N(ieeerates)) 940 ni->ni_txrate = ieeerates[rix]; 941#undef N 942} 943 944static int 945malo_fix2rate(int fix_rate) 946{ 947#define N(x) (sizeof(x)/sizeof(x[0])) 948 static const int rates[] = 949 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 950 return (fix_rate < N(rates) ? rates[fix_rate] : 0); 951#undef N 952} 953 954/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 955#define MS(v,x) (((v) & x) >> x##_S) 956#define SM(v,x) (((v) << x##_S) & x) 957 958/* 959 * Process completed xmit descriptors from the specified queue. 960 */ 961static int 962malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 963{ 964 struct malo_txbuf *bf; 965 struct malo_txdesc *ds; 966 struct ieee80211_node *ni; 967 int nreaped; 968 uint32_t status; 969 970 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 971 __func__, txq->qnum); 972 for (nreaped = 0;; nreaped++) { 973 MALO_TXQ_LOCK(txq); 974 bf = STAILQ_FIRST(&txq->active); 975 if (bf == NULL) { 976 MALO_TXQ_UNLOCK(txq); 977 break; 978 } 979 ds = bf->bf_desc; 980 MALO_TXDESC_SYNC(txq, ds, 981 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 982 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 983 MALO_TXQ_UNLOCK(txq); 984 break; 985 } 986 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 987 MALO_TXQ_UNLOCK(txq); 988 989#ifdef MALO_DEBUG 990 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 991 malo_printtxbuf(bf, txq->qnum, nreaped); 992#endif 993 ni = bf->bf_node; 994 if (ni != NULL) { 995 status = le32toh(ds->status); 996 if (status & MALO_TXD_STATUS_OK) { 997 uint16_t format = le16toh(ds->format); 998 uint8_t txant = MS(format, MALO_TXD_ANTENNA); 999 1000 sc->malo_stats.mst_ant_tx[txant]++; 1001 if (status & MALO_TXD_STATUS_OK_RETRY) 1002 sc->malo_stats.mst_tx_retries++; 1003 if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 1004 sc->malo_stats.mst_tx_mretries++; 1005 malo_updatetxrate(ni, ds->datarate); 1006 sc->malo_stats.mst_tx_rate = ds->datarate; 1007 } else { 1008 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 1009 sc->malo_stats.mst_tx_linkerror++; 1010 if (status & MALO_TXD_STATUS_FAILED_XRETRY) 1011 sc->malo_stats.mst_tx_xretries++; 1012 if (status & MALO_TXD_STATUS_FAILED_AGING) 1013 sc->malo_stats.mst_tx_aging++; 1014 } 1015 /* 1016 * Do any tx complete callback. Note this must 1017 * be done before releasing the node reference. 1018 * XXX no way to figure out if frame was ACK'd 1019 */ 1020 if (bf->bf_m->m_flags & M_TXCB) { 1021 /* XXX strip fw len in case header inspected */ 1022 m_adj(bf->bf_m, sizeof(uint16_t)); 1023 ieee80211_process_callback(ni, bf->bf_m, 1024 (status & MALO_TXD_STATUS_OK) == 0); 1025 } 1026 /* 1027 * Reclaim reference to node. 1028 * 1029 * NB: the node may be reclaimed here if, for example 1030 * this is a DEAUTH message that was sent and the 1031 * node was timed out due to inactivity. 1032 */ 1033 ieee80211_free_node(ni); 1034 } 1035 ds->status = htole32(MALO_TXD_STATUS_IDLE); 1036 ds->pktlen = htole32(0); 1037 1038 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1039 BUS_DMASYNC_POSTWRITE); 1040 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1041 m_freem(bf->bf_m); 1042 bf->bf_m = NULL; 1043 bf->bf_node = NULL; 1044 1045 MALO_TXQ_LOCK(txq); 1046 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1047 txq->nfree++; 1048 MALO_TXQ_UNLOCK(txq); 1049 } 1050 return nreaped; 1051} 1052 1053/* 1054 * Deferred processing of transmit interrupt. 1055 */ 1056static void 1057malo_tx_proc(void *arg, int npending) 1058{ 1059 struct malo_softc *sc = arg; 1060 struct ifnet *ifp = sc->malo_ifp; 1061 int i, nreaped; 1062 1063 /* 1064 * Process each active queue. 1065 */ 1066 nreaped = 0; 1067 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1068 if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1069 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1070 } 1071 1072 if (nreaped != 0) { 1073 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1074 ifp->if_timer = 0; 1075 malo_start(ifp); 1076 } 1077} 1078 1079static int 1080malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1081 struct malo_txbuf *bf, struct mbuf *m0) 1082{ 1083#define IEEE80211_DIR_DSTODS(wh) \ 1084 ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1085#define IS_DATA_FRAME(wh) \ 1086 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1087 int error, ismcast, iswep; 1088 int copyhdrlen, hdrlen, pktlen; 1089 struct ieee80211_frame *wh; 1090 struct ifnet *ifp = sc->malo_ifp; 1091 struct ieee80211com *ic = ifp->if_l2com; 1092 struct malo_txdesc *ds; 1093 struct malo_txrec *tr; 1094 struct malo_txq *txq; 1095 uint16_t qos; 1096 1097 wh = mtod(m0, struct ieee80211_frame *); 1098 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 1099 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1100 copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1101 pktlen = m0->m_pkthdr.len; 1102 if (IEEE80211_QOS_HAS_SEQ(wh)) { 1103 if (IEEE80211_DIR_DSTODS(wh)) { 1104 qos = *(uint16_t *) 1105 (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1106 copyhdrlen -= sizeof(qos); 1107 } else 1108 qos = *(uint16_t *) 1109 (((struct ieee80211_qosframe *) wh)->i_qos); 1110 } else 1111 qos = 0; 1112 1113 if (iswep) { 1114 struct ieee80211_key *k; 1115 1116 /* 1117 * Construct the 802.11 header+trailer for an encrypted 1118 * frame. The only reason this can fail is because of an 1119 * unknown or unsupported cipher/key type. 1120 * 1121 * NB: we do this even though the firmware will ignore 1122 * what we've done for WEP and TKIP as we need the 1123 * ExtIV filled in for CCMP and this also adjusts 1124 * the headers which simplifies our work below. 1125 */ 1126 k = ieee80211_crypto_encap(ni, m0); 1127 if (k == NULL) { 1128 /* 1129 * This can happen when the key is yanked after the 1130 * frame was queued. Just discard the frame; the 1131 * 802.11 layer counts failures and provides 1132 * debugging/diagnostics. 1133 */ 1134 m_freem(m0); 1135 return EIO; 1136 } 1137 1138 /* 1139 * Adjust the packet length for the crypto additions 1140 * done during encap and any other bits that the f/w 1141 * will add later on. 1142 */ 1143 pktlen = m0->m_pkthdr.len; 1144 1145 /* packet header may have moved, reset our local pointer */ 1146 wh = mtod(m0, struct ieee80211_frame *); 1147 } 1148 1149 if (bpf_peers_present(ifp->if_bpf)) { 1150 sc->malo_tx_th.wt_flags = 0; /* XXX */ 1151 if (iswep) 1152 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1153 sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1154 sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1155 1156 bpf_mtap2(ifp->if_bpf, &sc->malo_tx_th, sc->malo_tx_th_len, m0); 1157 } 1158 1159 /* 1160 * Copy up/down the 802.11 header; the firmware requires 1161 * we present a 2-byte payload length followed by a 1162 * 4-address header (w/o QoS), followed (optionally) by 1163 * any WEP/ExtIV header (but only filled in for CCMP). 1164 * We are assured the mbuf has sufficient headroom to 1165 * prepend in-place by the setup of ic_headroom in 1166 * malo_attach. 1167 */ 1168 if (hdrlen < sizeof(struct malo_txrec)) { 1169 const int space = sizeof(struct malo_txrec) - hdrlen; 1170 if (M_LEADINGSPACE(m0) < space) { 1171 /* NB: should never happen */ 1172 device_printf(sc->malo_dev, 1173 "not enough headroom, need %d found %zd, " 1174 "m_flags 0x%x m_len %d\n", 1175 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1176 ieee80211_dump_pkt(ic, 1177 mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1178 m_freem(m0); 1179 /* XXX stat */ 1180 return EIO; 1181 } 1182 M_PREPEND(m0, space, M_NOWAIT); 1183 } 1184 tr = mtod(m0, struct malo_txrec *); 1185 if (wh != (struct ieee80211_frame *) &tr->wh) 1186 ovbcopy(wh, &tr->wh, hdrlen); 1187 /* 1188 * Note: the "firmware length" is actually the length of the fully 1189 * formed "802.11 payload". That is, it's everything except for 1190 * the 802.11 header. In particular this includes all crypto 1191 * material including the MIC! 1192 */ 1193 tr->fwlen = htole16(pktlen - hdrlen); 1194 1195 /* 1196 * Load the DMA map so any coalescing is done. This 1197 * also calculates the number of descriptors we need. 1198 */ 1199 error = malo_tx_dmasetup(sc, bf, m0); 1200 if (error != 0) 1201 return error; 1202 bf->bf_node = ni; /* NB: held reference */ 1203 m0 = bf->bf_m; /* NB: may have changed */ 1204 tr = mtod(m0, struct malo_txrec *); 1205 wh = (struct ieee80211_frame *)&tr->wh; 1206 1207 /* 1208 * Formulate tx descriptor. 1209 */ 1210 ds = bf->bf_desc; 1211 txq = bf->bf_txq; 1212 1213 ds->qosctrl = qos; /* NB: already little-endian */ 1214 ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1215 ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1216 /* NB: pPhysNext setup once, don't touch */ 1217 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1218 ds->sap_pktinfo = 0; 1219 ds->format = 0; 1220 1221 /* 1222 * Select transmit rate. 1223 */ 1224 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1225 case IEEE80211_FC0_TYPE_MGT: 1226 sc->malo_stats.mst_tx_mgmt++; 1227 /* fall thru... */ 1228 case IEEE80211_FC0_TYPE_CTL: 1229 ds->txpriority = 1; 1230 break; 1231 case IEEE80211_FC0_TYPE_DATA: 1232 ds->txpriority = txq->qnum; 1233 break; 1234 default: 1235 if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1236 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1237 /* XXX statistic */ 1238 m_freem(m0); 1239 return EIO; 1240 } 1241 1242#ifdef MALO_DEBUG 1243 if (IFF_DUMPPKTS_XMIT(sc)) 1244 ieee80211_dump_pkt(ic, 1245 mtod(m0, const uint8_t *)+sizeof(uint16_t), 1246 m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1247#endif 1248 1249 MALO_TXQ_LOCK(txq); 1250 if (!IS_DATA_FRAME(wh)) 1251 ds->status |= htole32(1); 1252 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1253 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1254 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1255 1256 ifp->if_opackets++; 1257 ifp->if_timer = 5; 1258 MALO_TXQ_UNLOCK(txq); 1259 return 0; 1260#undef IEEE80211_DIR_DSTODS 1261} 1262 1263static void 1264malo_start(struct ifnet *ifp) 1265{ 1266 struct malo_softc *sc = ifp->if_softc; 1267 struct ieee80211_node *ni; 1268 struct malo_txq *txq = &sc->malo_txq[0]; 1269 struct malo_txbuf *bf = NULL; 1270 struct mbuf *m; 1271 int nqueued = 0; 1272 1273 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) 1274 return; 1275 1276 for (;;) { 1277 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1278 if (m == NULL) 1279 break; 1280 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1281 bf = malo_getbuf(sc, txq); 1282 if (bf == NULL) { 1283 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1284 1285 /* XXX blocks other traffic */ 1286 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1287 sc->malo_stats.mst_tx_qstop++; 1288 break; 1289 } 1290 /* 1291 * Encapsulate the packet in prep for transmission. 1292 */ 1293 m = ieee80211_encap(ni, m); 1294 if (m == NULL) { 1295 DPRINTF(sc, MALO_DEBUG_XMIT, 1296 "%s: encapsulation failure\n", __func__); 1297 sc->malo_stats.mst_tx_encap++; 1298 goto bad; 1299 } 1300 /* 1301 * Pass the frame to the h/w for transmission. 1302 */ 1303 if (malo_tx_start(sc, ni, bf, m)) { 1304 bad: 1305 ifp->if_oerrors++; 1306 if (bf != NULL) { 1307 bf->bf_m = NULL; 1308 bf->bf_node = NULL; 1309 MALO_TXQ_LOCK(txq); 1310 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1311 MALO_TXQ_UNLOCK(txq); 1312 } 1313 ieee80211_free_node(ni); 1314 continue; 1315 } 1316 nqueued++; 1317 1318 if (nqueued >= malo_txcoalesce) { 1319 /* 1320 * Poke the firmware to process queued frames; 1321 * see below about (lack of) locking. 1322 */ 1323 nqueued = 0; 1324 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1325 } 1326 } 1327 1328 if (nqueued) { 1329 /* 1330 * NB: We don't need to lock against tx done because 1331 * this just prods the firmware to check the transmit 1332 * descriptors. The firmware will also start fetching 1333 * descriptors by itself if it notices new ones are 1334 * present when it goes to deliver a tx done interrupt 1335 * to the host. So if we race with tx done processing 1336 * it's ok. Delivering the kick here rather than in 1337 * malo_tx_start is an optimization to avoid poking the 1338 * firmware for each packet. 1339 * 1340 * NB: the queue id isn't used so 0 is ok. 1341 */ 1342 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1343 } 1344} 1345 1346static void 1347malo_watchdog(struct ifnet *ifp) 1348{ 1349 struct malo_softc *sc = ifp->if_softc; 1350 1351 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) { 1352 if_printf(ifp, "watchdog timeout\n"); 1353 1354 /* XXX no way to reset h/w. now */ 1355 1356 ifp->if_oerrors++; 1357 sc->malo_stats.mst_watchdog++; 1358 } 1359} 1360 1361static int 1362malo_hal_reset(struct malo_softc *sc) 1363{ 1364 static int first = 0; 1365 struct ifnet *ifp = sc->malo_ifp; 1366 struct ieee80211com *ic = ifp->if_l2com; 1367 struct malo_hal *mh = sc->malo_mh; 1368 1369 if (first == 0) { 1370 /* 1371 * NB: when the device firstly is initialized, sometimes 1372 * firmware could override rx/tx dma registers so we re-set 1373 * these values once. 1374 */ 1375 malo_hal_set_rxtxdma(sc); 1376 first = 1; 1377 } 1378 1379 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1380 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1381 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1382 malo_chan_set(sc, ic->ic_curchan); 1383 1384 /* XXX needs other stuffs? */ 1385 1386 return 1; 1387} 1388 1389static __inline struct mbuf * 1390malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1391{ 1392 struct mbuf *m; 1393 bus_addr_t paddr; 1394 int error; 1395 1396 /* XXX don't need mbuf, just dma buffer */ 1397 m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1398 if (m == NULL) { 1399 sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1400 return NULL; 1401 } 1402 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1403 mtod(m, caddr_t), MJUMPAGESIZE, 1404 malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1405 if (error != 0) { 1406 if_printf(sc->malo_ifp, 1407 "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1408 m_freem(m); 1409 return NULL; 1410 } 1411 bf->bf_data = paddr; 1412 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1413 1414 return m; 1415} 1416 1417static int 1418malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1419{ 1420 struct malo_rxdesc *ds; 1421 1422 ds = bf->bf_desc; 1423 if (bf->bf_m == NULL) { 1424 bf->bf_m = malo_getrxmbuf(sc, bf); 1425 if (bf->bf_m == NULL) { 1426 /* mark descriptor to be skipped */ 1427 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1428 /* NB: don't need PREREAD */ 1429 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1430 return ENOMEM; 1431 } 1432 } 1433 1434 /* 1435 * Setup descriptor. 1436 */ 1437 ds->qosctrl = 0; 1438 ds->snr = 0; 1439 ds->status = MALO_RXD_STATUS_IDLE; 1440 ds->channel = 0; 1441 ds->pktlen = htole16(MALO_RXSIZE); 1442 ds->nf = 0; 1443 ds->physbuffdata = htole32(bf->bf_data); 1444 /* NB: don't touch pPhysNext, set once */ 1445 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1446 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1447 1448 return 0; 1449} 1450 1451/* 1452 * Setup the rx data structures. This should only be done once or we may get 1453 * out of sync with the firmware. 1454 */ 1455static int 1456malo_startrecv(struct malo_softc *sc) 1457{ 1458 struct malo_rxbuf *bf, *prev; 1459 struct malo_rxdesc *ds; 1460 1461 if (sc->malo_recvsetup == 1) { 1462 malo_mode_init(sc); /* set filters, etc. */ 1463 return 0; 1464 } 1465 1466 prev = NULL; 1467 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1468 int error = malo_rxbuf_init(sc, bf); 1469 if (error != 0) { 1470 DPRINTF(sc, MALO_DEBUG_RECV, 1471 "%s: malo_rxbuf_init failed %d\n", 1472 __func__, error); 1473 return error; 1474 } 1475 if (prev != NULL) { 1476 ds = prev->bf_desc; 1477 ds->physnext = htole32(bf->bf_daddr); 1478 } 1479 prev = bf; 1480 } 1481 if (prev != NULL) { 1482 ds = prev->bf_desc; 1483 ds->physnext = 1484 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1485 } 1486 1487 sc->malo_recvsetup = 1; 1488 1489 malo_mode_init(sc); /* set filters, etc. */ 1490 1491 return 0; 1492} 1493 1494static void 1495malo_init_locked(struct malo_softc *sc) 1496{ 1497 struct ifnet *ifp = sc->malo_ifp; 1498 struct malo_hal *mh = sc->malo_mh; 1499 int error; 1500 1501 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1502 __func__, ifp->if_flags); 1503 1504 MALO_LOCK_ASSERT(sc); 1505 1506 /* 1507 * Stop anything previously setup. This is safe whether this is 1508 * the first time through or not. 1509 */ 1510 malo_stop_locked(ifp, 0); 1511 1512 /* 1513 * Push state to the firmware. 1514 */ 1515 if (!malo_hal_reset(sc)) { 1516 if_printf(ifp, "%s: unable to reset hardware\n", __func__); 1517 return; 1518 } 1519 1520 /* 1521 * Setup recv (once); transmit is already good to go. 1522 */ 1523 error = malo_startrecv(sc); 1524 if (error != 0) { 1525 if_printf(ifp, "%s: unable to start recv logic, error %d\n", 1526 __func__, error); 1527 return; 1528 } 1529 1530 /* 1531 * Enable interrupts. 1532 */ 1533 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1534 | MALO_A2HRIC_BIT_TX_DONE 1535 | MALO_A2HRIC_BIT_OPC_DONE 1536 | MALO_A2HRIC_BIT_MAC_EVENT 1537 | MALO_A2HRIC_BIT_RX_PROBLEM 1538 | MALO_A2HRIC_BIT_ICV_ERROR 1539 | MALO_A2HRIC_BIT_RADAR_DETECT 1540 | MALO_A2HRIC_BIT_CHAN_SWITCH; 1541 1542 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1543 malo_hal_intrset(mh, sc->malo_imask); 1544} 1545 1546static void 1547malo_init(void *arg) 1548{ 1549 struct malo_softc *sc = (struct malo_softc *) arg; 1550 struct ifnet *ifp = sc->malo_ifp; 1551 struct ieee80211com *ic = ifp->if_l2com; 1552 1553 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1554 __func__, ifp->if_flags); 1555 1556 MALO_LOCK(sc); 1557 malo_init_locked(sc); 1558 1559 MALO_UNLOCK(sc); 1560 1561 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1562 ieee80211_start_all(ic); /* start all vap's */ 1563} 1564 1565/* 1566 * Set the multicast filter contents into the hardware. 1567 */ 1568static void 1569malo_setmcastfilter(struct malo_softc *sc) 1570{ 1571 struct ifnet *ifp = sc->malo_ifp; 1572 struct ieee80211com *ic = ifp->if_l2com; 1573 struct ifmultiaddr *ifma; 1574 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1575 uint8_t *mp; 1576 int nmc; 1577 1578 mp = macs; 1579 nmc = 0; 1580 1581 if (ic->ic_opmode == IEEE80211_M_MONITOR || 1582 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) 1583 goto all; 1584 1585 IF_ADDR_LOCK(ifp); 1586 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1587 if (ifma->ifma_addr->sa_family != AF_LINK) 1588 continue; 1589 1590 if (nmc == MALO_HAL_MCAST_MAX) { 1591 ifp->if_flags |= IFF_ALLMULTI; 1592 IF_ADDR_UNLOCK(ifp); 1593 goto all; 1594 } 1595 IEEE80211_ADDR_COPY(mp, 1596 LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1597 1598 mp += IEEE80211_ADDR_LEN, nmc++; 1599 } 1600 IF_ADDR_UNLOCK(ifp); 1601 1602 malo_hal_setmcast(sc->malo_mh, nmc, macs); 1603 1604all: 1605 /* 1606 * XXX we don't know how to set the f/w for supporting 1607 * IFF_ALLMULTI | IFF_PROMISC cases 1608 */ 1609 return; 1610} 1611 1612static int 1613malo_mode_init(struct malo_softc *sc) 1614{ 1615 struct ifnet *ifp = sc->malo_ifp; 1616 struct ieee80211com *ic = ifp->if_l2com; 1617 struct malo_hal *mh = sc->malo_mh; 1618 1619 /* 1620 * NB: Ignore promisc in hostap mode; it's set by the 1621 * bridge. This is wrong but we have no way to 1622 * identify internal requests (from the bridge) 1623 * versus external requests such as for tcpdump. 1624 */ 1625 malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1626 ic->ic_opmode != IEEE80211_M_HOSTAP); 1627 malo_setmcastfilter(sc); 1628 1629 return ENXIO; 1630} 1631 1632static void 1633malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1634{ 1635 struct ieee80211_node *ni; 1636 struct malo_txbuf *bf; 1637 u_int ix; 1638 1639 /* 1640 * NB: this assumes output has been stopped and 1641 * we do not need to block malo_tx_tasklet 1642 */ 1643 for (ix = 0;; ix++) { 1644 MALO_TXQ_LOCK(txq); 1645 bf = STAILQ_FIRST(&txq->active); 1646 if (bf == NULL) { 1647 MALO_TXQ_UNLOCK(txq); 1648 break; 1649 } 1650 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1651 MALO_TXQ_UNLOCK(txq); 1652#ifdef MALO_DEBUG 1653 if (sc->malo_debug & MALO_DEBUG_RESET) { 1654 struct ifnet *ifp = sc->malo_ifp; 1655 struct ieee80211com *ic = ifp->if_l2com; 1656 const struct malo_txrec *tr = 1657 mtod(bf->bf_m, const struct malo_txrec *); 1658 malo_printtxbuf(bf, txq->qnum, ix); 1659 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1660 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1661 } 1662#endif /* MALO_DEBUG */ 1663 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1664 ni = bf->bf_node; 1665 bf->bf_node = NULL; 1666 if (ni != NULL) { 1667 /* 1668 * Reclaim node reference. 1669 */ 1670 ieee80211_free_node(ni); 1671 } 1672 m_freem(bf->bf_m); 1673 bf->bf_m = NULL; 1674 1675 MALO_TXQ_LOCK(txq); 1676 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1677 txq->nfree++; 1678 MALO_TXQ_UNLOCK(txq); 1679 } 1680} 1681 1682static void 1683malo_stop_locked(struct ifnet *ifp, int disable) 1684{ 1685 struct malo_softc *sc = ifp->if_softc; 1686 struct malo_hal *mh = sc->malo_mh; 1687 int i; 1688 1689 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1690 __func__, sc->malo_invalid, ifp->if_flags); 1691 1692 MALO_LOCK_ASSERT(sc); 1693 1694 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1695 return; 1696 1697 /* 1698 * Shutdown the hardware and driver: 1699 * disable interrupts 1700 * turn off the radio 1701 * drain and release tx queues 1702 * 1703 * Note that some of this work is not possible if the hardware 1704 * is gone (invalid). 1705 */ 1706 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1707 ifp->if_timer = 0; 1708 /* diable interrupt. */ 1709 malo_hal_intrset(mh, 0); 1710 /* turn off the radio. */ 1711 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1712 1713 /* drain and release tx queues. */ 1714 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1715 malo_tx_draintxq(sc, &sc->malo_txq[i]); 1716} 1717 1718static int 1719malo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1720{ 1721#define MALO_IS_RUNNING(ifp) \ 1722 ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1723 struct malo_softc *sc = ifp->if_softc; 1724 struct ieee80211com *ic = ifp->if_l2com; 1725 struct ifreq *ifr = (struct ifreq *) data; 1726 int error = 0, startall = 0; 1727 1728 MALO_LOCK(sc); 1729 switch (cmd) { 1730 case SIOCSIFFLAGS: 1731 if (MALO_IS_RUNNING(ifp)) { 1732 /* 1733 * To avoid rescanning another access point, 1734 * do not call malo_init() here. Instead, 1735 * only reflect promisc mode settings. 1736 */ 1737 malo_mode_init(sc); 1738 } else if (ifp->if_flags & IFF_UP) { 1739 /* 1740 * Beware of being called during attach/detach 1741 * to reset promiscuous mode. In that case we 1742 * will still be marked UP but not RUNNING. 1743 * However trying to re-init the interface 1744 * is the wrong thing to do as we've already 1745 * torn down much of our state. There's 1746 * probably a better way to deal with this. 1747 */ 1748 if (!sc->malo_invalid) { 1749 malo_init_locked(sc); 1750 startall = 1; 1751 } 1752 } else 1753 malo_stop_locked(ifp, 1); 1754 break; 1755 case SIOCGIFMEDIA: 1756 case SIOCSIFMEDIA: 1757 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1758 break; 1759 default: 1760 error = ether_ioctl(ifp, cmd, data); 1761 break; 1762 } 1763 MALO_UNLOCK(sc); 1764 1765 if (startall) 1766 ieee80211_start_all(ic); 1767 return error; 1768#undef MALO_IS_RUNNING 1769} 1770 1771/* 1772 * Callback from the 802.11 layer to update the slot time 1773 * based on the current setting. We use it to notify the 1774 * firmware of ERP changes and the f/w takes care of things 1775 * like slot time and preamble. 1776 */ 1777static void 1778malo_updateslot(struct ifnet *ifp) 1779{ 1780 struct malo_softc *sc = ifp->if_softc; 1781 struct ieee80211com *ic = ifp->if_l2com; 1782 struct malo_hal *mh = sc->malo_mh; 1783 int error; 1784 1785 /* NB: can be called early; suppress needless cmds */ 1786 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1787 return; 1788 1789 DPRINTF(sc, MALO_DEBUG_RESET, 1790 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1791 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1792 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1793 1794 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1795 error = malo_hal_set_slot(mh, 1); 1796 else 1797 error = malo_hal_set_slot(mh, 0); 1798 1799 if (error != 0) 1800 device_printf(sc->malo_dev, "setting %s slot failed\n", 1801 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1802} 1803 1804static int 1805malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1806{ 1807 struct ieee80211com *ic = vap->iv_ic; 1808 struct malo_softc *sc = ic->ic_ifp->if_softc; 1809 struct malo_hal *mh = sc->malo_mh; 1810 int error; 1811 1812 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1813 ieee80211_state_name[vap->iv_state], 1814 ieee80211_state_name[nstate]); 1815 1816 /* 1817 * Invoke the net80211 layer first so iv_bss is setup. 1818 */ 1819 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1820 if (error != 0) 1821 return error; 1822 1823 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1824 struct ieee80211_node *ni = vap->iv_bss; 1825 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1826 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1827 1828 DPRINTF(sc, MALO_DEBUG_STATE, 1829 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1830 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1831 vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1832 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1833 ieee80211_chan2ieee(ic, ic->ic_curchan), 1834 ni->ni_associd, mode, tp->ucastrate); 1835 1836 malo_hal_setradio(mh, 1, 1837 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1838 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1839 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1840 malo_hal_set_rate(mh, mode, 1841 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1842 0 : malo_fix2rate(tp->ucastrate)); 1843 } 1844 return 0; 1845} 1846 1847static int 1848malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1849 const struct ieee80211_bpf_params *params) 1850{ 1851 struct ieee80211com *ic = ni->ni_ic; 1852 struct ifnet *ifp = ic->ic_ifp; 1853 struct malo_softc *sc = ifp->if_softc; 1854 struct malo_txbuf *bf; 1855 struct malo_txq *txq; 1856 1857 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) { 1858 ieee80211_free_node(ni); 1859 m_freem(m); 1860 return ENETDOWN; 1861 } 1862 1863 /* 1864 * Grab a TX buffer and associated resources. Note that we depend 1865 * on the classification by the 802.11 layer to get to the right h/w 1866 * queue. Management frames must ALWAYS go on queue 1 but we 1867 * cannot just force that here because we may receive non-mgt frames. 1868 */ 1869 txq = &sc->malo_txq[0]; 1870 bf = malo_getbuf(sc, txq); 1871 if (bf == NULL) { 1872 /* XXX blocks other traffic */ 1873 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1874 ieee80211_free_node(ni); 1875 m_freem(m); 1876 return ENOBUFS; 1877 } 1878 1879 /* 1880 * Pass the frame to the h/w for transmission. 1881 */ 1882 if (malo_tx_start(sc, ni, bf, m) != 0) { 1883 ifp->if_oerrors++; 1884 bf->bf_m = NULL; 1885 bf->bf_node = NULL; 1886 MALO_TXQ_LOCK(txq); 1887 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1888 txq->nfree++; 1889 MALO_TXQ_UNLOCK(txq); 1890 1891 ieee80211_free_node(ni); 1892 return EIO; /* XXX */ 1893 } 1894 1895 /* 1896 * NB: We don't need to lock against tx done because this just 1897 * prods the firmware to check the transmit descriptors. The firmware 1898 * will also start fetching descriptors by itself if it notices 1899 * new ones are present when it goes to deliver a tx done interrupt 1900 * to the host. So if we race with tx done processing it's ok. 1901 * Delivering the kick here rather than in malo_tx_start is 1902 * an optimization to avoid poking the firmware for each packet. 1903 * 1904 * NB: the queue id isn't used so 0 is ok. 1905 */ 1906 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1907 1908 return 0; 1909} 1910 1911static void 1912malo_bpfattach(struct malo_softc *sc) 1913{ 1914 struct ifnet *ifp = sc->malo_ifp; 1915 1916 bpfattach(ifp, DLT_IEEE802_11_RADIO, 1917 sizeof(struct ieee80211_frame) + sizeof(sc->malo_tx_th)); 1918 1919 /* 1920 * Initialize constant fields. 1921 * XXX make header lengths a multiple of 32-bits so subsequent 1922 * headers are properly aligned; this is a kludge to keep 1923 * certain applications happy. 1924 * 1925 * NB: the channel is setup each time we transition to the 1926 * RUN state to avoid filling it in for each frame. 1927 */ 1928 sc->malo_tx_th_len = roundup(sizeof(sc->malo_tx_th), sizeof(uint32_t)); 1929 sc->malo_tx_th.wt_ihdr.it_len = htole16(sc->malo_tx_th_len); 1930 sc->malo_tx_th.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT); 1931 1932 sc->malo_rx_th_len = roundup(sizeof(sc->malo_rx_th), sizeof(uint32_t)); 1933 sc->malo_rx_th.wr_ihdr.it_len = htole16(sc->malo_rx_th_len); 1934 sc->malo_rx_th.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT); 1935} 1936 1937static void 1938malo_sysctlattach(struct malo_softc *sc) 1939{ 1940#ifdef MALO_DEBUG 1941 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1942 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1943 1944 sc->malo_debug = malo_debug; 1945 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1946 "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1947 "control debugging printfs"); 1948#endif 1949} 1950 1951static void 1952malo_announce(struct malo_softc *sc) 1953{ 1954 struct ifnet *ifp = sc->malo_ifp; 1955 1956 if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1957 sc->malo_hwspecs.hwversion, 1958 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1959 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1960 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1961 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1962 sc->malo_hwspecs.regioncode); 1963 1964 if (bootverbose || malo_rxbuf != MALO_RXBUF) 1965 if_printf(ifp, "using %u rx buffers\n", malo_rxbuf); 1966 if (bootverbose || malo_txbuf != MALO_TXBUF) 1967 if_printf(ifp, "using %u tx buffers\n", malo_txbuf); 1968} 1969 1970/* 1971 * Convert net80211 channel to a HAL channel. 1972 */ 1973static void 1974malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1975{ 1976 hc->channel = chan->ic_ieee; 1977 1978 *(uint32_t *)&hc->flags = 0; 1979 if (IEEE80211_IS_CHAN_2GHZ(chan)) 1980 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1981} 1982 1983/* 1984 * Set/change channels. If the channel is really being changed, 1985 * it's done by reseting the chip. To accomplish this we must 1986 * first cleanup any pending DMA, then restart stuff after a la 1987 * malo_init. 1988 */ 1989static int 1990malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1991{ 1992 struct malo_hal *mh = sc->malo_mh; 1993 struct malo_hal_channel hchan; 1994 1995 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1996 __func__, chan->ic_freq, chan->ic_flags); 1997 1998 /* 1999 * Convert to a HAL channel description with the flags constrained 2000 * to reflect the current operating mode. 2001 */ 2002 malo_mapchan(&hchan, chan); 2003 malo_hal_intrset(mh, 0); /* disable interrupts */ 2004 malo_hal_setchannel(mh, &hchan); 2005 malo_hal_settxpower(mh, &hchan); 2006 2007 /* 2008 * Update internal state. 2009 */ 2010 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 2011 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 2012 if (IEEE80211_IS_CHAN_ANYG(chan)) { 2013 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 2014 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 2015 } else { 2016 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 2017 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 2018 } 2019 sc->malo_curchan = hchan; 2020 malo_hal_intrset(mh, sc->malo_imask); 2021 2022 return 0; 2023} 2024 2025static void 2026malo_scan_start(struct ieee80211com *ic) 2027{ 2028 struct ifnet *ifp = ic->ic_ifp; 2029 struct malo_softc *sc = ifp->if_softc; 2030 2031 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2032} 2033 2034static void 2035malo_scan_end(struct ieee80211com *ic) 2036{ 2037 struct ifnet *ifp = ic->ic_ifp; 2038 struct malo_softc *sc = ifp->if_softc; 2039 2040 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2041} 2042 2043static void 2044malo_set_channel(struct ieee80211com *ic) 2045{ 2046 struct ifnet *ifp = ic->ic_ifp; 2047 struct malo_softc *sc = ifp->if_softc; 2048 2049 (void) malo_chan_set(sc, ic->ic_curchan); 2050} 2051 2052static void 2053malo_rx_proc(void *arg, int npending) 2054{ 2055#define IEEE80211_DIR_DSTODS(wh) \ 2056 ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 2057 IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2058 struct malo_softc *sc = arg; 2059 struct ifnet *ifp = sc->malo_ifp; 2060 struct ieee80211com *ic = ifp->if_l2com; 2061 struct malo_rxbuf *bf; 2062 struct malo_rxdesc *ds; 2063 struct mbuf *m, *mnew; 2064 struct ieee80211_qosframe *wh; 2065 struct ieee80211_qosframe_addr4 *wh4; 2066 struct ieee80211_node *ni; 2067 int off, len, hdrlen, pktlen, rssi, ntodo; 2068 uint8_t *data, status; 2069 uint32_t readptr, writeptr; 2070 2071 DPRINTF(sc, MALO_DEBUG_RX_PROC, 2072 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 2073 __func__, npending, 2074 sc->malo_hwspecs.rxdesc_read, 2075 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 2076 sc->malo_hwspecs.rxdesc_write, 2077 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 2078 2079 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 2080 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 2081 if (readptr == writeptr) 2082 return; 2083 2084 bf = sc->malo_rxnext; 2085 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 2086 if (bf == NULL) { 2087 bf = STAILQ_FIRST(&sc->malo_rxbuf); 2088 break; 2089 } 2090 ds = bf->bf_desc; 2091 if (bf->bf_m == NULL) { 2092 /* 2093 * If data allocation failed previously there 2094 * will be no buffer; try again to re-populate it. 2095 * Note the firmware will not advance to the next 2096 * descriptor with a dma buffer so we must mimic 2097 * this or we'll get out of sync. 2098 */ 2099 DPRINTF(sc, MALO_DEBUG_ANY, 2100 "%s: rx buf w/o dma memory\n", __func__); 2101 (void)malo_rxbuf_init(sc, bf); 2102 break; 2103 } 2104 MALO_RXDESC_SYNC(sc, ds, 2105 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2106 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2107 break; 2108 2109 readptr = le32toh(ds->physnext); 2110 2111#ifdef MALO_DEBUG 2112 if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2113 malo_printrxbuf(bf, 0); 2114#endif 2115 status = ds->status; 2116 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2117 ifp->if_ierrors++; 2118 goto rx_next; 2119 } 2120 /* 2121 * Sync the data buffer. 2122 */ 2123 len = le16toh(ds->pktlen); 2124 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2125 BUS_DMASYNC_POSTREAD); 2126 /* 2127 * The 802.11 header is provided all or in part at the front; 2128 * use it to calculate the true size of the header that we'll 2129 * construct below. We use this to figure out where to copy 2130 * payload prior to constructing the header. 2131 */ 2132 m = bf->bf_m; 2133 data = mtod(m, uint8_t *);; 2134 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2135 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2136 2137 /* 2138 * Calculate RSSI. XXX wrong 2139 */ 2140 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2141 if (rssi > 100) 2142 rssi = 100; 2143 2144 pktlen = hdrlen + (len - off); 2145 /* 2146 * NB: we know our frame is at least as large as 2147 * IEEE80211_MIN_LEN because there is a 4-address frame at 2148 * the front. Hence there's no need to vet the packet length. 2149 * If the frame in fact is too small it should be discarded 2150 * at the net80211 layer. 2151 */ 2152 2153 /* XXX don't need mbuf, just dma buffer */ 2154 mnew = malo_getrxmbuf(sc, bf); 2155 if (mnew == NULL) { 2156 ifp->if_ierrors++; 2157 goto rx_next; 2158 } 2159 /* 2160 * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2161 * re-setup the rx descriptor using the replacement dma 2162 * buffer we just installed above. 2163 */ 2164 bf->bf_m = mnew; 2165 m->m_data += off - hdrlen; 2166 m->m_pkthdr.len = m->m_len = pktlen; 2167 m->m_pkthdr.rcvif = ifp; 2168 2169 /* 2170 * Piece 802.11 header together. 2171 */ 2172 wh = mtod(m, struct ieee80211_qosframe *); 2173 /* NB: don't need to do this sometimes but ... */ 2174 /* XXX special case so we can memcpy after m_devget? */ 2175 ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2176 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2177 if (IEEE80211_DIR_DSTODS(wh)) { 2178 wh4 = mtod(m, 2179 struct ieee80211_qosframe_addr4*); 2180 *(uint16_t *)wh4->i_qos = ds->qosctrl; 2181 } else { 2182 *(uint16_t *)wh->i_qos = ds->qosctrl; 2183 } 2184 } 2185 if (sc->malo_drvbpf != NULL) { 2186 sc->malo_rx_th.wr_flags = 0; 2187 sc->malo_rx_th.wr_rate = ds->rate; 2188 sc->malo_rx_th.wr_antsignal = rssi; 2189 sc->malo_rx_th.wr_antnoise = ds->nf; 2190 2191 bpf_mtap2(ifp->if_bpf, &sc->malo_rx_th, 2192 sc->malo_rx_th_len, m); 2193 } 2194#ifdef MALO_DEBUG 2195 if (IFF_DUMPPKTS_RECV(sc, wh)) { 2196 ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2197 len, ds->rate, rssi); 2198 } 2199#endif 2200 ifp->if_ipackets++; 2201 2202 /* dispatch */ 2203 ni = ieee80211_find_rxnode(ic, 2204 (struct ieee80211_frame_min *)wh); 2205 if (ni != NULL) { 2206 (void) ieee80211_input(ni, m, rssi, ds->nf, 0); 2207 ieee80211_free_node(ni); 2208 } else 2209 (void) ieee80211_input_all(ic, m, rssi, ds->nf, 0); 2210rx_next: 2211 /* NB: ignore ENOMEM so we process more descriptors */ 2212 (void) malo_rxbuf_init(sc, bf); 2213 bf = STAILQ_NEXT(bf, bf_list); 2214 } 2215 2216 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2217 sc->malo_rxnext = bf; 2218 2219 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2220 !IFQ_IS_EMPTY(&ifp->if_snd)) 2221 malo_start(ifp); 2222#undef IEEE80211_DIR_DSTODS 2223} 2224 2225static void 2226malo_stop(struct ifnet *ifp, int disable) 2227{ 2228 struct malo_softc *sc = ifp->if_softc; 2229 2230 MALO_LOCK(sc); 2231 malo_stop_locked(ifp, disable); 2232 MALO_UNLOCK(sc); 2233} 2234 2235/* 2236 * Reclaim all tx queue resources. 2237 */ 2238static void 2239malo_tx_cleanup(struct malo_softc *sc) 2240{ 2241 int i; 2242 2243 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2244 malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2245} 2246 2247int 2248malo_detach(struct malo_softc *sc) 2249{ 2250 struct ifnet *ifp = sc->malo_ifp; 2251 struct ieee80211com *ic = ifp->if_l2com; 2252 2253 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2254 __func__, ifp->if_flags); 2255 2256 malo_stop(ifp, 1); 2257 2258 if (sc->malo_tq != NULL) { 2259 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2260 taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2261 taskqueue_free(sc->malo_tq); 2262 sc->malo_tq = NULL; 2263 } 2264 2265 bpfdetach(ifp); 2266 2267 /* 2268 * NB: the order of these is important: 2269 * o call the 802.11 layer before detaching the hal to 2270 * insure callbacks into the driver to delete global 2271 * key cache entries can be handled 2272 * o reclaim the tx queue data structures after calling 2273 * the 802.11 layer as we'll get called back to reclaim 2274 * node state and potentially want to use them 2275 * o to cleanup the tx queues the hal is called, so detach 2276 * it last 2277 * Other than that, it's straightforward... 2278 */ 2279 ieee80211_ifdetach(ic); 2280 malo_dma_cleanup(sc); 2281 malo_tx_cleanup(sc); 2282 malo_hal_detach(sc->malo_mh); 2283 if_free(ifp); 2284 2285 MALO_LOCK_DESTROY(sc); 2286 2287 return 0; 2288} 2289 2290void 2291malo_shutdown(struct malo_softc *sc) 2292{ 2293 malo_stop(sc->malo_ifp, 1); 2294} 2295 2296void 2297malo_suspend(struct malo_softc *sc) 2298{ 2299 struct ifnet *ifp = sc->malo_ifp; 2300 2301 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2302 __func__, ifp->if_flags); 2303 2304 malo_stop(ifp, 1); 2305} 2306 2307void 2308malo_resume(struct malo_softc *sc) 2309{ 2310 struct ifnet *ifp = sc->malo_ifp; 2311 2312 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2313 __func__, ifp->if_flags); 2314 2315 if (ifp->if_flags & IFF_UP) 2316 malo_init(sc); 2317} 2318