1270631Sjfv/****************************************************************************** 2270631Sjfv 3270631Sjfv Copyright (c) 2013-2014, Intel Corporation 4270631Sjfv All rights reserved. 5270631Sjfv 6270631Sjfv Redistribution and use in source and binary forms, with or without 7270631Sjfv modification, are permitted provided that the following conditions are met: 8270631Sjfv 9270631Sjfv 1. Redistributions of source code must retain the above copyright notice, 10270631Sjfv this list of conditions and the following disclaimer. 11270631Sjfv 12270631Sjfv 2. Redistributions in binary form must reproduce the above copyright 13270631Sjfv notice, this list of conditions and the following disclaimer in the 14270631Sjfv documentation and/or other materials provided with the distribution. 15270631Sjfv 16270631Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17270631Sjfv contributors may be used to endorse or promote products derived from 18270631Sjfv this software without specific prior written permission. 19270631Sjfv 20270631Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21270631Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22270631Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23270631Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24270631Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25270631Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26270631Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27270631Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28270631Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29270631Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30270631Sjfv POSSIBILITY OF SUCH DAMAGE. 31270631Sjfv 32270631Sjfv******************************************************************************/ 33270631Sjfv/*$FreeBSD: releng/10.2/sys/dev/ixl/i40e_lan_hmc.h 270631 2014-08-25 22:04:29Z jfv $*/ 34270631Sjfv 35270631Sjfv#ifndef _I40E_LAN_HMC_H_ 36270631Sjfv#define _I40E_LAN_HMC_H_ 37270631Sjfv 38270631Sjfv/* forward-declare the HW struct for the compiler */ 39270631Sjfvstruct i40e_hw; 40270631Sjfv 41270631Sjfv/* HMC element context information */ 42270631Sjfv 43270631Sjfv/* Rx queue context data 44270631Sjfv * 45270631Sjfv * The sizes of the variables may be larger than needed due to crossing byte 46270631Sjfv * boundaries. If we do not have the width of the variable set to the correct 47270631Sjfv * size then we could end up shifting bits off the top of the variable when the 48270631Sjfv * variable is at the top of a byte and crosses over into the next byte. 49270631Sjfv */ 50270631Sjfvstruct i40e_hmc_obj_rxq { 51270631Sjfv u16 head; 52270631Sjfv u16 cpuid; /* bigger than needed, see above for reason */ 53270631Sjfv u64 base; 54270631Sjfv u16 qlen; 55270631Sjfv#define I40E_RXQ_CTX_DBUFF_SHIFT 7 56270631Sjfv u16 dbuff; /* bigger than needed, see above for reason */ 57270631Sjfv#define I40E_RXQ_CTX_HBUFF_SHIFT 6 58270631Sjfv u16 hbuff; /* bigger than needed, see above for reason */ 59270631Sjfv u8 dtype; 60270631Sjfv u8 dsize; 61270631Sjfv u8 crcstrip; 62270631Sjfv u8 fc_ena; 63270631Sjfv u8 l2tsel; 64270631Sjfv u8 hsplit_0; 65270631Sjfv u8 hsplit_1; 66270631Sjfv u8 showiv; 67270631Sjfv u32 rxmax; /* bigger than needed, see above for reason */ 68270631Sjfv u8 tphrdesc_ena; 69270631Sjfv u8 tphwdesc_ena; 70270631Sjfv u8 tphdata_ena; 71270631Sjfv u8 tphhead_ena; 72270631Sjfv u16 lrxqthresh; /* bigger than needed, see above for reason */ 73270631Sjfv u8 prefena; /* NOTE: normally must be set to 1 at init */ 74270631Sjfv}; 75270631Sjfv 76270631Sjfv/* Tx queue context data 77270631Sjfv* 78270631Sjfv* The sizes of the variables may be larger than needed due to crossing byte 79270631Sjfv* boundaries. If we do not have the width of the variable set to the correct 80270631Sjfv* size then we could end up shifting bits off the top of the variable when the 81270631Sjfv* variable is at the top of a byte and crosses over into the next byte. 82270631Sjfv*/ 83270631Sjfvstruct i40e_hmc_obj_txq { 84270631Sjfv u16 head; 85270631Sjfv u8 new_context; 86270631Sjfv u64 base; 87270631Sjfv u8 fc_ena; 88270631Sjfv u8 timesync_ena; 89270631Sjfv u8 fd_ena; 90270631Sjfv u8 alt_vlan_ena; 91270631Sjfv u16 thead_wb; 92270631Sjfv u8 cpuid; 93270631Sjfv u8 head_wb_ena; 94270631Sjfv u16 qlen; 95270631Sjfv u8 tphrdesc_ena; 96270631Sjfv u8 tphrpacket_ena; 97270631Sjfv u8 tphwdesc_ena; 98270631Sjfv u64 head_wb_addr; 99270631Sjfv u32 crc; 100270631Sjfv u16 rdylist; 101270631Sjfv u8 rdylist_act; 102270631Sjfv}; 103270631Sjfv 104270631Sjfv/* for hsplit_0 field of Rx HMC context */ 105270631Sjfvenum i40e_hmc_obj_rx_hsplit_0 { 106270631Sjfv I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT = 0, 107270631Sjfv I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 = 1, 108270631Sjfv I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP = 2, 109270631Sjfv I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4, 110270631Sjfv I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP = 8, 111270631Sjfv}; 112270631Sjfv 113270631Sjfv/* fcoe_cntx and fcoe_filt are for debugging purpose only */ 114270631Sjfvstruct i40e_hmc_obj_fcoe_cntx { 115270631Sjfv u32 rsv[32]; 116270631Sjfv}; 117270631Sjfv 118270631Sjfvstruct i40e_hmc_obj_fcoe_filt { 119270631Sjfv u32 rsv[8]; 120270631Sjfv}; 121270631Sjfv 122270631Sjfv/* Context sizes for LAN objects */ 123270631Sjfvenum i40e_hmc_lan_object_size { 124270631Sjfv I40E_HMC_LAN_OBJ_SZ_8 = 0x3, 125270631Sjfv I40E_HMC_LAN_OBJ_SZ_16 = 0x4, 126270631Sjfv I40E_HMC_LAN_OBJ_SZ_32 = 0x5, 127270631Sjfv I40E_HMC_LAN_OBJ_SZ_64 = 0x6, 128270631Sjfv I40E_HMC_LAN_OBJ_SZ_128 = 0x7, 129270631Sjfv I40E_HMC_LAN_OBJ_SZ_256 = 0x8, 130270631Sjfv I40E_HMC_LAN_OBJ_SZ_512 = 0x9, 131270631Sjfv}; 132270631Sjfv 133270631Sjfv#define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512 134270631Sjfv#define I40E_HMC_OBJ_SIZE_TXQ 128 135270631Sjfv#define I40E_HMC_OBJ_SIZE_RXQ 32 136270631Sjfv#define I40E_HMC_OBJ_SIZE_FCOE_CNTX 64 137270631Sjfv#define I40E_HMC_OBJ_SIZE_FCOE_FILT 64 138270631Sjfv 139270631Sjfvenum i40e_hmc_lan_rsrc_type { 140270631Sjfv I40E_HMC_LAN_FULL = 0, 141270631Sjfv I40E_HMC_LAN_TX = 1, 142270631Sjfv I40E_HMC_LAN_RX = 2, 143270631Sjfv I40E_HMC_FCOE_CTX = 3, 144270631Sjfv I40E_HMC_FCOE_FILT = 4, 145270631Sjfv I40E_HMC_LAN_MAX = 5 146270631Sjfv}; 147270631Sjfv 148270631Sjfvenum i40e_hmc_model { 149270631Sjfv I40E_HMC_MODEL_DIRECT_PREFERRED = 0, 150270631Sjfv I40E_HMC_MODEL_DIRECT_ONLY = 1, 151270631Sjfv I40E_HMC_MODEL_PAGED_ONLY = 2, 152270631Sjfv I40E_HMC_MODEL_UNKNOWN, 153270631Sjfv}; 154270631Sjfv 155270631Sjfvstruct i40e_hmc_lan_create_obj_info { 156270631Sjfv struct i40e_hmc_info *hmc_info; 157270631Sjfv u32 rsrc_type; 158270631Sjfv u32 start_idx; 159270631Sjfv u32 count; 160270631Sjfv enum i40e_sd_entry_type entry_type; 161270631Sjfv u64 direct_mode_sz; 162270631Sjfv}; 163270631Sjfv 164270631Sjfvstruct i40e_hmc_lan_delete_obj_info { 165270631Sjfv struct i40e_hmc_info *hmc_info; 166270631Sjfv u32 rsrc_type; 167270631Sjfv u32 start_idx; 168270631Sjfv u32 count; 169270631Sjfv}; 170270631Sjfv 171270631Sjfvenum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, 172270631Sjfv u32 rxq_num, u32 fcoe_cntx_num, 173270631Sjfv u32 fcoe_filt_num); 174270631Sjfvenum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw *hw, 175270631Sjfv enum i40e_hmc_model model); 176270631Sjfvenum i40e_status_code i40e_shutdown_lan_hmc(struct i40e_hw *hw); 177270631Sjfv 178270631Sjfvu64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num, 179270631Sjfv u32 fcoe_cntx_num, u32 fcoe_filt_num); 180270631Sjfvenum i40e_status_code i40e_get_lan_tx_queue_context(struct i40e_hw *hw, 181270631Sjfv u16 queue, 182270631Sjfv struct i40e_hmc_obj_txq *s); 183270631Sjfvenum i40e_status_code i40e_clear_lan_tx_queue_context(struct i40e_hw *hw, 184270631Sjfv u16 queue); 185270631Sjfvenum i40e_status_code i40e_set_lan_tx_queue_context(struct i40e_hw *hw, 186270631Sjfv u16 queue, 187270631Sjfv struct i40e_hmc_obj_txq *s); 188270631Sjfvenum i40e_status_code i40e_get_lan_rx_queue_context(struct i40e_hw *hw, 189270631Sjfv u16 queue, 190270631Sjfv struct i40e_hmc_obj_rxq *s); 191270631Sjfvenum i40e_status_code i40e_clear_lan_rx_queue_context(struct i40e_hw *hw, 192270631Sjfv u16 queue); 193270631Sjfvenum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw, 194270631Sjfv u16 queue, 195270631Sjfv struct i40e_hmc_obj_rxq *s); 196270631Sjfvenum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw, 197270631Sjfv struct i40e_hmc_lan_create_obj_info *info); 198270631Sjfvenum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw, 199270631Sjfv struct i40e_hmc_lan_delete_obj_info *info); 200270631Sjfv 201270631Sjfv#endif /* _I40E_LAN_HMC_H_ */ 202