ixgbe.h revision 243716
1/****************************************************************************** 2 3 Copyright (c) 2001-2012, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 243716 2012-11-30 22:33:21Z jfv $*/ 34 35 36#ifndef _IXGBE_H_ 37#define _IXGBE_H_ 38 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#if __FreeBSD_version >= 800000 43#include <sys/buf_ring.h> 44#endif 45#include <sys/mbuf.h> 46#include <sys/protosw.h> 47#include <sys/socket.h> 48#include <sys/malloc.h> 49#include <sys/kernel.h> 50#include <sys/module.h> 51#include <sys/sockio.h> 52 53#include <net/if.h> 54#include <net/if_arp.h> 55#include <net/bpf.h> 56#include <net/ethernet.h> 57#include <net/if_dl.h> 58#include <net/if_media.h> 59 60#include <net/bpf.h> 61#include <net/if_types.h> 62#include <net/if_vlan_var.h> 63 64#include <netinet/in_systm.h> 65#include <netinet/in.h> 66#include <netinet/if_ether.h> 67#include <netinet/ip.h> 68#include <netinet/ip6.h> 69#include <netinet/tcp.h> 70#include <netinet/tcp_lro.h> 71#include <netinet/udp.h> 72 73#include <machine/in_cksum.h> 74 75#include <sys/bus.h> 76#include <machine/bus.h> 77#include <sys/rman.h> 78#include <machine/resource.h> 79#include <vm/vm.h> 80#include <vm/pmap.h> 81#include <machine/clock.h> 82#include <dev/pci/pcivar.h> 83#include <dev/pci/pcireg.h> 84#include <sys/proc.h> 85#include <sys/sysctl.h> 86#include <sys/endian.h> 87#include <sys/taskqueue.h> 88#include <sys/pcpu.h> 89#include <sys/smp.h> 90#include <machine/smp.h> 91 92#ifdef IXGBE_IEEE1588 93#include <sys/ieee1588.h> 94#endif 95 96#include "ixgbe_api.h" 97 98/* Tunables */ 99 100/* 101 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 102 * number of transmit descriptors allocated by the driver. Increasing this 103 * value allows the driver to queue more transmits. Each descriptor is 16 104 * bytes. Performance tests have show the 2K value to be optimal for top 105 * performance. 106 */ 107#define DEFAULT_TXD 1024 108#define PERFORM_TXD 2048 109#define MAX_TXD 4096 110#define MIN_TXD 64 111 112/* 113 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 114 * number of receive descriptors allocated for each RX queue. Increasing this 115 * value allows the driver to buffer more incoming packets. Each descriptor 116 * is 16 bytes. A receive buffer is also allocated for each descriptor. 117 * 118 * Note: with 8 rings and a dual port card, it is possible to bump up 119 * against the system mbuf pool limit, you can tune nmbclusters 120 * to adjust for this. 121 */ 122#define DEFAULT_RXD 1024 123#define PERFORM_RXD 2048 124#define MAX_RXD 4096 125#define MIN_RXD 64 126 127/* Alignment for rings */ 128#define DBA_ALIGN 128 129 130/* 131 * This parameter controls the maximum no of times the driver will loop in 132 * the isr. Minimum Value = 1 133 */ 134#define MAX_LOOP 10 135 136/* 137 * This is the max watchdog interval, ie. the time that can 138 * pass between any two TX clean operations, such only happening 139 * when the TX hardware is functioning. 140 */ 141#define IXGBE_WATCHDOG (10 * hz) 142 143/* 144 * This parameters control when the driver calls the routine to reclaim 145 * transmit descriptors. 146 */ 147#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 148#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 149 150#define IXGBE_MAX_FRAME_SIZE 0x3F00 151 152/* Flow control constants */ 153#define IXGBE_FC_PAUSE 0xFFFF 154#define IXGBE_FC_HI 0x20000 155#define IXGBE_FC_LO 0x10000 156 157/* 158 * Used for optimizing small rx mbufs. Effort is made to keep the copy 159 * small and aligned for the CPU L1 cache. 160 * 161 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 162 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 163 * wasted. Getting 64 byte alignment, which _should_ be ideal for 164 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 165 * in observed efficiency of the optimization, 97.9% -> 81.8%. 166 */ 167#define IXGBE_RX_COPY_LEN 160 168#define IXGBE_RX_COPY_ALIGN (MHLEN - IXGBE_RX_COPY_LEN) 169 170/* Keep older OS drivers building... */ 171#if !defined(SYSCTL_ADD_UQUAD) 172#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 173#endif 174 175/* Defines for printing debug information */ 176#define DEBUG_INIT 0 177#define DEBUG_IOCTL 0 178#define DEBUG_HW 0 179 180#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 181#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 182#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 183#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 184#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 185#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 186#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 187#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 188#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 189 190#define MAX_NUM_MULTICAST_ADDRESSES 128 191#define IXGBE_82598_SCATTER 100 192#define IXGBE_82599_SCATTER 32 193#define MSIX_82598_BAR 3 194#define MSIX_82599_BAR 4 195#define IXGBE_TSO_SIZE 262140 196#define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 197#define IXGBE_RX_HDR 128 198#define IXGBE_VFTA_SIZE 128 199#define IXGBE_BR_SIZE 4096 200#define IXGBE_QUEUE_MIN_FREE 32 201 202/* Offload bits in mbuf flag */ 203#if __FreeBSD_version >= 800000 204#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 205#else 206#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 207#endif 208 209/* For 6.X code compatibility */ 210#if !defined(ETHER_BPF_MTAP) 211#define ETHER_BPF_MTAP BPF_MTAP 212#endif 213 214#if __FreeBSD_version < 700000 215#define CSUM_TSO 0 216#define IFCAP_TSO4 0 217#endif 218 219/* 220 * Interrupt Moderation parameters 221 */ 222#define IXGBE_LOW_LATENCY 128 223#define IXGBE_AVE_LATENCY 400 224#define IXGBE_BULK_LATENCY 1200 225#define IXGBE_LINK_ITR 2000 226 227/* 228 ***************************************************************************** 229 * vendor_info_array 230 * 231 * This array contains the list of Subvendor/Subdevice IDs on which the driver 232 * should load. 233 * 234 ***************************************************************************** 235 */ 236typedef struct _ixgbe_vendor_info_t { 237 unsigned int vendor_id; 238 unsigned int device_id; 239 unsigned int subvendor_id; 240 unsigned int subdevice_id; 241 unsigned int index; 242} ixgbe_vendor_info_t; 243 244 245struct ixgbe_tx_buf { 246 u32 eop_index; 247 struct mbuf *m_head; 248 bus_dmamap_t map; 249}; 250 251struct ixgbe_rx_buf { 252 struct mbuf *buf; 253 struct mbuf *fmp; 254 bus_dmamap_t map; 255 u_int flags; 256#define IXGBE_RX_COPY 0x01 257 uint64_t addr; 258}; 259 260/* 261 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 262 */ 263struct ixgbe_dma_alloc { 264 bus_addr_t dma_paddr; 265 caddr_t dma_vaddr; 266 bus_dma_tag_t dma_tag; 267 bus_dmamap_t dma_map; 268 bus_dma_segment_t dma_seg; 269 bus_size_t dma_size; 270 int dma_nseg; 271}; 272 273/* 274** Driver queue struct: this is the interrupt container 275** for the associated tx and rx ring. 276*/ 277struct ix_queue { 278 struct adapter *adapter; 279 u32 msix; /* This queue's MSIX vector */ 280 u32 eims; /* This queue's EIMS bit */ 281 u32 eitr_setting; 282 struct resource *res; 283 void *tag; 284 struct tx_ring *txr; 285 struct rx_ring *rxr; 286 struct task que_task; 287 struct taskqueue *tq; 288 u64 irqs; 289}; 290 291/* 292 * The transmit ring, one per queue 293 */ 294struct tx_ring { 295 struct adapter *adapter; 296 struct mtx tx_mtx; 297 u32 me; 298 enum { 299 IXGBE_QUEUE_IDLE, 300 IXGBE_QUEUE_WORKING, 301 IXGBE_QUEUE_HUNG, 302 } queue_status; 303 int watchdog_time; 304 union ixgbe_adv_tx_desc *tx_base; 305 struct ixgbe_dma_alloc txdma; 306 u32 next_avail_desc; 307 u32 next_to_clean; 308 struct ixgbe_tx_buf *tx_buffers; 309 volatile u16 tx_avail; 310 u32 txd_cmd; 311 bus_dma_tag_t txtag; 312 char mtx_name[16]; 313#if __FreeBSD_version >= 800000 314 struct buf_ring *br; 315 struct task txq_task; 316#endif 317#ifdef IXGBE_FDIR 318 u16 atr_sample; 319 u16 atr_count; 320#endif 321 u32 bytes; /* used for AIM */ 322 u32 packets; 323 /* Soft Stats */ 324 u64 no_desc_avail; 325 u64 total_packets; 326}; 327 328 329/* 330 * The Receive ring, one per rx queue 331 */ 332struct rx_ring { 333 struct adapter *adapter; 334 struct mtx rx_mtx; 335 u32 me; 336 union ixgbe_adv_rx_desc *rx_base; 337 struct ixgbe_dma_alloc rxdma; 338 struct lro_ctrl lro; 339 bool lro_enabled; 340 bool hw_rsc; 341 bool discard; 342 bool vtag_strip; 343 u32 next_to_refresh; 344 u32 next_to_check; 345 char mtx_name[16]; 346 struct ixgbe_rx_buf *rx_buffers; 347 bus_dma_tag_t tag; 348 349 u32 bytes; /* Used for AIM calc */ 350 u32 packets; 351 352 /* Soft stats */ 353 u64 rx_irq; 354 u64 rx_copies; 355 u64 rx_packets; 356 u64 rx_bytes; 357 u64 rx_discarded; 358 u64 rsc_num; 359#ifdef IXGBE_FDIR 360 u64 flm; 361#endif 362}; 363 364/* Our adapter structure */ 365struct adapter { 366 struct ifnet *ifp; 367 struct ixgbe_hw hw; 368 369 struct ixgbe_osdep osdep; 370 struct device *dev; 371 372 struct resource *pci_mem; 373 struct resource *msix_mem; 374 375 /* 376 * Interrupt resources: this set is 377 * either used for legacy, or for Link 378 * when doing MSIX 379 */ 380 void *tag; 381 struct resource *res; 382 383 struct ifmedia media; 384 struct callout timer; 385 int msix; 386 int if_flags; 387 388 struct mtx core_mtx; 389 390 eventhandler_tag vlan_attach; 391 eventhandler_tag vlan_detach; 392 393 u16 num_vlans; 394 u16 num_queues; 395 396 /* 397 ** Shadow VFTA table, this is needed because 398 ** the real vlan filter table gets cleared during 399 ** a soft reset and the driver needs to be able 400 ** to repopulate it. 401 */ 402 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 403 404 /* Info about the interface */ 405 u32 optics; 406 u32 fc; /* local flow ctrl setting */ 407 int advertise; /* link speeds */ 408 bool link_active; 409 u16 max_frame_size; 410 u16 num_segs; 411 u32 link_speed; 412 bool link_up; 413 u32 linkvec; 414 415 /* Mbuf cluster size */ 416 u32 rx_mbuf_sz; 417 418 /* Support for pluggable optics */ 419 bool sfp_probe; 420 struct task link_task; /* Link tasklet */ 421 struct task mod_task; /* SFP tasklet */ 422 struct task msf_task; /* Multispeed Fiber */ 423#ifdef IXGBE_FDIR 424 int fdir_reinit; 425 struct task fdir_task; 426#endif 427 struct taskqueue *tq; 428 429 /* 430 ** Queues: 431 ** This is the irq holder, it has 432 ** and RX/TX pair or rings associated 433 ** with it. 434 */ 435 struct ix_queue *queues; 436 437 /* 438 * Transmit rings: 439 * Allocated at run time, an array of rings. 440 */ 441 struct tx_ring *tx_rings; 442 int num_tx_desc; 443 444 /* 445 * Receive rings: 446 * Allocated at run time, an array of rings. 447 */ 448 struct rx_ring *rx_rings; 449 int num_rx_desc; 450 u64 que_mask; 451 u32 rx_process_limit; 452 453 /* Multicast array memory */ 454 u8 *mta; 455 456 /* Misc stats maintained by the driver */ 457 unsigned long dropped_pkts; 458 unsigned long mbuf_defrag_failed; 459 unsigned long mbuf_header_failed; 460 unsigned long mbuf_packet_failed; 461 unsigned long no_tx_map_avail; 462 unsigned long no_tx_dma_setup; 463 unsigned long watchdog_events; 464 unsigned long tso_tx; 465 unsigned long link_irq; 466 467 struct ixgbe_hw_stats stats; 468}; 469 470/* Precision Time Sync (IEEE 1588) defines */ 471#define ETHERTYPE_IEEE1588 0x88F7 472#define PICOSECS_PER_TICK 20833 473#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 474#define IXGBE_ADVTXD_TSTAMP 0x00080000 475 476 477#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 478 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 479#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 480#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 481#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 482#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 483#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 484#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 485#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 486#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 487#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 488#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 489#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 490#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 491 492 493static inline bool 494ixgbe_is_sfp(struct ixgbe_hw *hw) 495{ 496 switch (hw->phy.type) { 497 case ixgbe_phy_sfp_avago: 498 case ixgbe_phy_sfp_ftl: 499 case ixgbe_phy_sfp_intel: 500 case ixgbe_phy_sfp_unknown: 501 case ixgbe_phy_sfp_passive_tyco: 502 case ixgbe_phy_sfp_passive_unknown: 503 return TRUE; 504 default: 505 return FALSE; 506 } 507} 508 509/* Workaround to make 8.0 buildable */ 510#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 511static __inline int 512drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 513{ 514#ifdef ALTQ 515 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 516 return (1); 517#endif 518 return (!buf_ring_empty(br)); 519} 520#endif 521 522/* 523** Find the number of unrefreshed RX descriptors 524*/ 525static inline u16 526ixgbe_rx_unrefreshed(struct rx_ring *rxr) 527{ 528 struct adapter *adapter = rxr->adapter; 529 530 if (rxr->next_to_check > rxr->next_to_refresh) 531 return (rxr->next_to_check - rxr->next_to_refresh - 1); 532 else 533 return ((adapter->num_rx_desc + rxr->next_to_check) - 534 rxr->next_to_refresh - 1); 535} 536 537#endif /* _IXGBE_H_ */ 538