ixgbe.h revision 217593
1157019Sdes/******************************************************************************
292559Sdes
365668Skris  Copyright (c) 2001-2010, Intel Corporation
465668Skris  All rights reserved.
565668Skris
665668Skris  Redistribution and use in source and binary forms, with or without
765668Skris  modification, are permitted provided that the following conditions are met:
865668Skris
965668Skris   1. Redistributions of source code must retain the above copyright notice,
1065668Skris      this list of conditions and the following disclaimer.
1165668Skris
1265668Skris   2. Redistributions in binary form must reproduce the above copyright
1365668Skris      notice, this list of conditions and the following disclaimer in the
1465668Skris      documentation and/or other materials provided with the distribution.
1592559Sdes
1665668Skris   3. Neither the name of the Intel Corporation nor the names of its
1765668Skris      contributors may be used to endorse or promote products derived from
1865668Skris      this software without specific prior written permission.
1965668Skris
2065668Skris  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2165668Skris  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2265668Skris  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2365668Skris  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
2465668Skris  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2565668Skris  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2665668Skris  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2765668Skris  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2865668Skris  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2965668Skris  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
3065668Skris  POSSIBILITY OF SUCH DAMAGE.
3165668Skris
3265668Skris******************************************************************************/
3365668Skris/*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 217593 2011-01-19 19:36:27Z jfv $*/
3465668Skris
3565668Skris
3665668Skris#ifndef _IXGBE_H_
3757429Smarkm#define _IXGBE_H_
3892559Sdes
3992559Sdes
4057429Smarkm#include <sys/param.h>
4176262Sgreen#include <sys/systm.h>
4276262Sgreen#if __FreeBSD_version >= 800000
4357429Smarkm#include <sys/buf_ring.h>
4457429Smarkm#endif
4557429Smarkm#include <sys/mbuf.h>
4657429Smarkm#include <sys/protosw.h>
4757429Smarkm#include <sys/socket.h>
4857429Smarkm#include <sys/malloc.h>
4960573Skris#include <sys/kernel.h>
5060573Skris#include <sys/module.h>
5160573Skris#include <sys/sockio.h>
5260573Skris
5360573Skris#include <net/if.h>
5476262Sgreen#include <net/if_arp.h>
5576262Sgreen#include <net/bpf.h>
5676262Sgreen#include <net/ethernet.h>
5792559Sdes#include <net/if_dl.h>
5892559Sdes#include <net/if_media.h>
5957429Smarkm
6092559Sdes#include <net/bpf.h>
6192559Sdes#include <net/if_types.h>
6265668Skris#include <net/if_vlan_var.h>
6365668Skris
6465668Skris#include <netinet/in_systm.h>
6592559Sdes#include <netinet/in.h>
66157019Sdes#include <netinet/if_ether.h>
67157019Sdes#include <netinet/ip.h>
6857429Smarkm#include <netinet/ip6.h>
6965668Skris#include <netinet/tcp.h>
7057429Smarkm#include <netinet/tcp_lro.h>
7157429Smarkm#include <netinet/udp.h>
7257429Smarkm
7392559Sdes#include <machine/in_cksum.h>
7492559Sdes
7560573Skris#include <sys/bus.h>
7660573Skris#include <machine/bus.h>
7760573Skris#include <sys/rman.h>
7860573Skris#include <machine/resource.h>
7960573Skris#include <vm/vm.h>
80137019Sdes#include <vm/pmap.h>
8174500Sgreen#include <machine/clock.h>
82106130Sdes#include <dev/pci/pcivar.h>
83147005Sdes#include <dev/pci/pcireg.h>
8492559Sdes#include <sys/proc.h>
8592559Sdes#include <sys/sysctl.h>
8657429Smarkm#include <sys/endian.h>
8757429Smarkm#include <sys/taskqueue.h>
8857429Smarkm#include <sys/pcpu.h>
8957429Smarkm#include <sys/smp.h>
9060573Skris#include <machine/smp.h>
9192559Sdes
9292559Sdes#ifdef IXGBE_IEEE1588
9357429Smarkm#include <sys/ieee1588.h>
9457429Smarkm#endif
9557429Smarkm
9660573Skris#include "ixgbe_api.h"
9799063Sdes
9899063Sdes/* Tunables */
9999063Sdes
10099063Sdes/*
10199063Sdes * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
10299063Sdes * number of transmit descriptors allocated by the driver. Increasing this
10360573Skris * value allows the driver to queue more transmits. Each descriptor is 16
10492559Sdes * bytes. Performance tests have show the 2K value to be optimal for top
10560573Skris * performance.
10660573Skris */
10760573Skris#define DEFAULT_TXD	1024
10860573Skris#define PERFORM_TXD	2048
10992559Sdes#define MAX_TXD		4096
110157019Sdes#define MIN_TXD		64
11192559Sdes
112157019Sdes/*
11360573Skris * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
11465668Skris * number of receive descriptors allocated for each RX queue. Increasing this
115157019Sdes * value allows the driver to buffer more incoming packets. Each descriptor
116157019Sdes * is 16 bytes.  A receive buffer is also allocated for each descriptor.
117157019Sdes *
118157019Sdes * Note: with 8 rings and a dual port card, it is possible to bump up
11965668Skris *	against the system mbuf pool limit, you can tune nmbclusters
12065668Skris *	to adjust for this.
12160573Skris */
12260573Skris#define DEFAULT_RXD	1024
12360573Skris#define PERFORM_RXD	2048
12460573Skris#define MAX_RXD		4096
12565668Skris#define MIN_RXD		64
12692559Sdes
12792559Sdes/* Alignment for rings */
12892559Sdes#define DBA_ALIGN	128
12992559Sdes
13092559Sdes/*
13192559Sdes * This parameter controls the maximum no of times the driver will loop in
13265668Skris * the isr. Minimum Value = 1
13392559Sdes */
13492559Sdes#define MAX_LOOP	10
13592559Sdes
13692559Sdes/*
13792559Sdes * This is the max watchdog interval, ie. the time that can
13865668Skris * pass between any two TX clean operations, such only happening
13992559Sdes * when the TX hardware is functioning.
14092559Sdes */
14192559Sdes#define IXGBE_WATCHDOG                   (10 * hz)
14292559Sdes
14392559Sdes/*
14460573Skris * This parameters control when the driver calls the routine to reclaim
14592559Sdes * transmit descriptors.
14692559Sdes */
14798684Sdes#define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
14898684Sdes#define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
14960573Skris
150157019Sdes#define IXGBE_MAX_FRAME_SIZE	0x3F00
151157019Sdes
15298684Sdes/* Flow control constants */
15398684Sdes#define IXGBE_FC_PAUSE		0xFFFF
15498684Sdes#define IXGBE_FC_HI		0x20000
15598684Sdes#define IXGBE_FC_LO		0x10000
15698684Sdes
15798684Sdes/* Defines for printing debug information */
15898684Sdes#define DEBUG_INIT  0
159149753Sdes#define DEBUG_IOCTL 0
16098684Sdes#define DEBUG_HW    0
16198684Sdes
16292559Sdes#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
16360573Skris#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
164157019Sdes#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
16592559Sdes#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
16699063Sdes#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
16792559Sdes#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
16892559Sdes#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
16992559Sdes#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
17092559Sdes#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
17169587Sgreen
17292559Sdes#define MAX_NUM_MULTICAST_ADDRESSES     128
17392559Sdes#define IXGBE_82598_SCATTER		100
174157019Sdes#define IXGBE_82599_SCATTER		32
175137019Sdes#define MSIX_82598_BAR			3
176157019Sdes#define MSIX_82599_BAR			4
17792559Sdes#define IXGBE_TSO_SIZE			65535
17892559Sdes#define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
179137019Sdes#define IXGBE_RX_HDR			128
18060573Skris#define IXGBE_VFTA_SIZE			128
18192559Sdes#define IXGBE_BR_SIZE			4096
18260573Skris#define IXGBE_QUEUE_IDLE		0
18392559Sdes#define IXGBE_QUEUE_WORKING		1
18492559Sdes#define IXGBE_QUEUE_HUNG		2
18592559Sdes
18692559Sdes/* Offload bits in mbuf flag */
18792559Sdes#if __FreeBSD_version >= 800000
18892559Sdes#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
18992559Sdes#else
19092559Sdes#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP)
19192559Sdes#endif
19292559Sdes
19360573Skris/* For 6.X code compatibility */
19492559Sdes#if !defined(ETHER_BPF_MTAP)
19560573Skris#define ETHER_BPF_MTAP		BPF_MTAP
196137019Sdes#endif
19792559Sdes
19892559Sdes#if __FreeBSD_version < 700000
19960573Skris#define CSUM_TSO		0
20092559Sdes#define IFCAP_TSO4		0
20192559Sdes#endif
20292559Sdes
20392559Sdes/*
20492559Sdes * Interrupt Moderation parameters
20560573Skris */
20692559Sdes#define IXGBE_LOW_LATENCY	128
20792559Sdes#define IXGBE_AVE_LATENCY	400
20892559Sdes#define IXGBE_BULK_LATENCY	1200
20992559Sdes#define IXGBE_LINK_ITR		2000
21092559Sdes
21192559Sdes/*
21292559Sdes *****************************************************************************
21392559Sdes * vendor_info_array
214147005Sdes *
215147005Sdes * This array contains the list of Subvendor/Subdevice IDs on which the driver
216147005Sdes * should load.
217147005Sdes *
218147005Sdes *****************************************************************************
21992559Sdes */
220137019Sdestypedef struct _ixgbe_vendor_info_t {
22160573Skris	unsigned int    vendor_id;
22292559Sdes	unsigned int    device_id;
22360573Skris	unsigned int    subvendor_id;
22492559Sdes	unsigned int    subdevice_id;
225149753Sdes	unsigned int    index;
22692559Sdes} ixgbe_vendor_info_t;
227149753Sdes
228149753Sdes
22992559Sdesstruct ixgbe_tx_buf {
23060573Skris	u32		eop_index;
23192559Sdes	struct mbuf	*m_head;
23260573Skris	bus_dmamap_t	map;
23392559Sdes};
23460573Skris
23592559Sdesstruct ixgbe_rx_buf {
23660573Skris	struct mbuf	*m_head;
23792559Sdes	struct mbuf	*m_pack;
23892559Sdes	struct mbuf	*fmp;
23960573Skris	bus_dmamap_t	hmap;
24092559Sdes	bus_dmamap_t	pmap;
24160573Skris};
24292559Sdes
24392559Sdes/*
24492559Sdes * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
24576262Sgreen */
24692559Sdesstruct ixgbe_dma_alloc {
24792559Sdes	bus_addr_t		dma_paddr;
24892559Sdes	caddr_t			dma_vaddr;
24976262Sgreen	bus_dma_tag_t		dma_tag;
25057429Smarkm	bus_dmamap_t		dma_map;
251	bus_dma_segment_t	dma_seg;
252	bus_size_t		dma_size;
253	int			dma_nseg;
254};
255
256/*
257** Driver queue struct: this is the interrupt container
258**  for the associated tx and rx ring.
259*/
260struct ix_queue {
261	struct adapter		*adapter;
262	u32			msix;           /* This queue's MSIX vector */
263	u32			eims;           /* This queue's EIMS bit */
264	u32			eitr_setting;
265	struct resource		*res;
266	void			*tag;
267	struct tx_ring		*txr;
268	struct rx_ring		*rxr;
269	struct task		que_task;
270	struct taskqueue	*tq;
271	u64			irqs;
272};
273
274/*
275 * The transmit ring, one per queue
276 */
277struct tx_ring {
278        struct adapter		*adapter;
279	struct mtx		tx_mtx;
280	u32			me;
281	int			queue_status;
282	int			watchdog_time;
283	union ixgbe_adv_tx_desc	*tx_base;
284	struct ixgbe_dma_alloc	txdma;
285	u32			next_avail_desc;
286	u32			next_to_clean;
287	struct ixgbe_tx_buf	*tx_buffers;
288	volatile u16		tx_avail;
289	u32			txd_cmd;
290	bus_dma_tag_t		txtag;
291	char			mtx_name[16];
292#if __FreeBSD_version >= 800000
293	struct buf_ring		*br;
294#endif
295#ifdef IXGBE_FDIR
296	u16			atr_sample;
297	u16			atr_count;
298#endif
299	u32			bytes;  /* used for AIM */
300	u32			packets;
301	/* Soft Stats */
302	u64			no_desc_avail;
303	u64			total_packets;
304};
305
306
307/*
308 * The Receive ring, one per rx queue
309 */
310struct rx_ring {
311        struct adapter		*adapter;
312	struct mtx		rx_mtx;
313	u32			me;
314	union ixgbe_adv_rx_desc	*rx_base;
315	struct ixgbe_dma_alloc	rxdma;
316	struct lro_ctrl		lro;
317	bool			lro_enabled;
318	bool			hdr_split;
319	bool			hw_rsc;
320	bool			discard;
321        u32			next_to_refresh;
322        u32 			next_to_check;
323	char			mtx_name[16];
324	struct ixgbe_rx_buf	*rx_buffers;
325	bus_dma_tag_t		htag;
326	bus_dma_tag_t		ptag;
327
328	u32			bytes; /* Used for AIM calc */
329	u32			packets;
330
331	/* Soft stats */
332	u64			rx_irq;
333	u64			rx_split_packets;
334	u64			rx_packets;
335	u64 			rx_bytes;
336	u64 			rx_discarded;
337	u64 			rsc_num;
338#ifdef IXGBE_FDIR
339	u64			flm;
340#endif
341};
342
343/* Our adapter structure */
344struct adapter {
345	struct ifnet		*ifp;
346	struct ixgbe_hw		hw;
347
348	struct ixgbe_osdep	osdep;
349	struct device		*dev;
350
351	struct resource		*pci_mem;
352	struct resource		*msix_mem;
353
354	/*
355	 * Interrupt resources: this set is
356	 * either used for legacy, or for Link
357	 * when doing MSIX
358	 */
359	void			*tag;
360	struct resource 	*res;
361
362	struct ifmedia		media;
363	struct callout		timer;
364	int			msix;
365	int			if_flags;
366
367	struct mtx		core_mtx;
368
369	eventhandler_tag 	vlan_attach;
370	eventhandler_tag 	vlan_detach;
371
372	u16			num_vlans;
373	u16			num_queues;
374
375	/*
376	** Shadow VFTA table, this is needed because
377	** the real vlan filter table gets cleared during
378	** a soft reset and the driver needs to be able
379	** to repopulate it.
380	*/
381	u32			shadow_vfta[IXGBE_VFTA_SIZE];
382
383	/* Info about the interface */
384	u32			optics;
385	int			advertise;  /* link speeds */
386	bool			link_active;
387	u16			max_frame_size;
388	u16			num_segs;
389	u32			link_speed;
390	bool			link_up;
391	u32 			linkvec;
392
393	/* Mbuf cluster size */
394	u32			rx_mbuf_sz;
395
396	/* Support for pluggable optics */
397	bool			sfp_probe;
398	struct task     	link_task;  /* Link tasklet */
399	struct task     	mod_task;   /* SFP tasklet */
400	struct task     	msf_task;   /* Multispeed Fiber */
401#ifdef IXGBE_FDIR
402	int			fdir_reinit;
403	struct task     	fdir_task;
404#endif
405	struct taskqueue	*tq;
406
407	/*
408	** Queues:
409	**   This is the irq holder, it has
410	**   and RX/TX pair or rings associated
411	**   with it.
412	*/
413	struct ix_queue		*queues;
414
415	/*
416	 * Transmit rings:
417	 *	Allocated at run time, an array of rings.
418	 */
419	struct tx_ring		*tx_rings;
420	int			num_tx_desc;
421
422	/*
423	 * Receive rings:
424	 *	Allocated at run time, an array of rings.
425	 */
426	struct rx_ring		*rx_rings;
427	int			num_rx_desc;
428	u64			que_mask;
429	u32			rx_process_limit;
430
431	/* Multicast array memory */
432	u8			*mta;
433
434	/* Misc stats maintained by the driver */
435	unsigned long   	dropped_pkts;
436	unsigned long   	mbuf_defrag_failed;
437	unsigned long   	mbuf_header_failed;
438	unsigned long   	mbuf_packet_failed;
439	unsigned long   	no_tx_map_avail;
440	unsigned long   	no_tx_dma_setup;
441	unsigned long   	watchdog_events;
442	unsigned long   	tso_tx;
443	unsigned long		link_irq;
444
445	struct ixgbe_hw_stats 	stats;
446};
447
448/* Precision Time Sync (IEEE 1588) defines */
449#define ETHERTYPE_IEEE1588      0x88F7
450#define PICOSECS_PER_TICK       20833
451#define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
452#define IXGBE_ADVTXD_TSTAMP	0x00080000
453
454
455#define IXGBE_CORE_LOCK_INIT(_sc, _name) \
456        mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
457#define IXGBE_CORE_LOCK_DESTROY(_sc)      mtx_destroy(&(_sc)->core_mtx)
458#define IXGBE_TX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->tx_mtx)
459#define IXGBE_RX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->rx_mtx)
460#define IXGBE_CORE_LOCK(_sc)              mtx_lock(&(_sc)->core_mtx)
461#define IXGBE_TX_LOCK(_sc)                mtx_lock(&(_sc)->tx_mtx)
462#define IXGBE_TX_TRYLOCK(_sc)             mtx_trylock(&(_sc)->tx_mtx)
463#define IXGBE_RX_LOCK(_sc)                mtx_lock(&(_sc)->rx_mtx)
464#define IXGBE_CORE_UNLOCK(_sc)            mtx_unlock(&(_sc)->core_mtx)
465#define IXGBE_TX_UNLOCK(_sc)              mtx_unlock(&(_sc)->tx_mtx)
466#define IXGBE_RX_UNLOCK(_sc)              mtx_unlock(&(_sc)->rx_mtx)
467#define IXGBE_CORE_LOCK_ASSERT(_sc)       mtx_assert(&(_sc)->core_mtx, MA_OWNED)
468#define IXGBE_TX_LOCK_ASSERT(_sc)         mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
469
470
471static inline bool
472ixgbe_is_sfp(struct ixgbe_hw *hw)
473{
474	switch (hw->phy.type) {
475	case ixgbe_phy_sfp_avago:
476	case ixgbe_phy_sfp_ftl:
477	case ixgbe_phy_sfp_intel:
478	case ixgbe_phy_sfp_unknown:
479	case ixgbe_phy_sfp_passive_tyco:
480	case ixgbe_phy_sfp_passive_unknown:
481		return TRUE;
482	default:
483		return FALSE;
484	}
485}
486
487/* Workaround to make 8.0 buildable */
488#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
489static __inline int
490drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
491{
492#ifdef ALTQ
493        if (ALTQ_IS_ENABLED(&ifp->if_snd))
494                return (1);
495#endif
496        return (!buf_ring_empty(br));
497}
498#endif
499
500#endif /* _IXGBE_H_ */
501