ixgbe.h revision 194875
1/****************************************************************************** 2 3 Copyright (c) 2001-2009, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 194875 2009-06-24 18:27:07Z jfv $*/ 34 35 36#ifndef _IXGBE_H_ 37#define _IXGBE_H_ 38 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#if __FreeBSD_version >= 800000 43#include <sys/buf_ring.h> 44#endif 45#include <sys/mbuf.h> 46#include <sys/protosw.h> 47#include <sys/socket.h> 48#include <sys/malloc.h> 49#include <sys/kernel.h> 50#include <sys/module.h> 51#include <sys/sockio.h> 52 53#include <net/if.h> 54#include <net/if_arp.h> 55#include <net/bpf.h> 56#include <net/ethernet.h> 57#include <net/if_dl.h> 58#include <net/if_media.h> 59 60#include <net/bpf.h> 61#include <net/if_types.h> 62#include <net/if_vlan_var.h> 63 64#include <netinet/in_systm.h> 65#include <netinet/in.h> 66#include <netinet/if_ether.h> 67#include <netinet/ip.h> 68#include <netinet/ip6.h> 69#include <netinet/tcp.h> 70#include <netinet/tcp_lro.h> 71#include <netinet/udp.h> 72 73#include <machine/in_cksum.h> 74 75#include <sys/bus.h> 76#include <machine/bus.h> 77#include <sys/rman.h> 78#include <machine/resource.h> 79#include <vm/vm.h> 80#include <vm/pmap.h> 81#include <machine/clock.h> 82#include <dev/pci/pcivar.h> 83#include <dev/pci/pcireg.h> 84#include <sys/proc.h> 85#include <sys/sysctl.h> 86#include <sys/endian.h> 87#include <sys/taskqueue.h> 88#include <sys/pcpu.h> 89#include <sys/smp.h> 90#include <machine/smp.h> 91 92#ifdef IXGBE_IEEE1588 93#include <sys/ieee1588.h> 94#endif 95 96#include "ixgbe_api.h" 97 98/* Tunables */ 99 100/* 101 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 102 * number of transmit descriptors allocated by the driver. Increasing this 103 * value allows the driver to queue more transmits. Each descriptor is 16 104 * bytes. Performance tests have show the 2K value to be optimal for top 105 * performance. 106 */ 107#define DEFAULT_TXD 1024 108#define PERFORM_TXD 2048 109#define MAX_TXD 4096 110#define MIN_TXD 64 111 112/* 113 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 114 * number of receive descriptors allocated for each RX queue. Increasing this 115 * value allows the driver to buffer more incoming packets. Each descriptor 116 * is 16 bytes. A receive buffer is also allocated for each descriptor. 117 * 118 * Note: with 8 rings and a dual port card, it is possible to bump up 119 * against the system mbuf pool limit, you can tune nmbclusters 120 * to adjust for this. 121 */ 122#define DEFAULT_RXD 1024 123#define PERFORM_RXD 2048 124#define MAX_RXD 4096 125#define MIN_RXD 64 126 127/* Alignment for rings */ 128#define DBA_ALIGN 128 129 130/* 131 * This parameter controls the maximum no of times the driver will loop in 132 * the isr. Minimum Value = 1 133 */ 134#define MAX_LOOP 10 135 136/* 137 * This parameter controls the duration of transmit watchdog timer. 138 */ 139#define IXGBE_TX_TIMEOUT 5 /* set to 5 seconds */ 140 141/* 142 * This parameters control when the driver calls the routine to reclaim 143 * transmit descriptors. 144 */ 145#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 146#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 147 148#define IXGBE_MAX_FRAME_SIZE 0x3F00 149 150/* Flow control constants */ 151#define IXGBE_FC_PAUSE 0x680 152#define IXGBE_FC_HI 0x20000 153#define IXGBE_FC_LO 0x10000 154 155/* Defines for printing debug information */ 156#define DEBUG_INIT 0 157#define DEBUG_IOCTL 0 158#define DEBUG_HW 0 159 160#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 161#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 162#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 163#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 164#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 165#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 166#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 167#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 168#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 169 170#define MAX_NUM_MULTICAST_ADDRESSES 128 171#define IXGBE_82598_SCATTER 100 172#define IXGBE_82599_SCATTER 32 173#define MSIX_82598_BAR 3 174#define MSIX_82599_BAR 4 175#define IXGBE_TSO_SIZE 65535 176#define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 177#define IXGBE_RX_HDR 128 178#define IXGBE_VFTA_SIZE 128 179#define IXGBE_BR_SIZE 4096 180#define CSUM_OFFLOAD 7 /* Bits in csum flags */ 181 182/* For 6.X code compatibility */ 183#if !defined(ETHER_BPF_MTAP) 184#define ETHER_BPF_MTAP BPF_MTAP 185#endif 186 187#if __FreeBSD_version < 700000 188#define CSUM_TSO 0 189#define IFCAP_TSO4 0 190#endif 191 192/* 193 * Interrupt Moderation parameters 194 */ 195#define IXGBE_LOW_LATENCY 128 196#define IXGBE_AVE_LATENCY 400 197#define IXGBE_BULK_LATENCY 1200 198#define IXGBE_LINK_ITR 2000 199 200/* Header split args for get_bug */ 201#define IXGBE_CLEAN_HDR 1 202#define IXGBE_CLEAN_PKT 2 203#define IXGBE_CLEAN_ALL 3 204 205/* 206 ***************************************************************************** 207 * vendor_info_array 208 * 209 * This array contains the list of Subvendor/Subdevice IDs on which the driver 210 * should load. 211 * 212 ***************************************************************************** 213 */ 214typedef struct _ixgbe_vendor_info_t { 215 unsigned int vendor_id; 216 unsigned int device_id; 217 unsigned int subvendor_id; 218 unsigned int subdevice_id; 219 unsigned int index; 220} ixgbe_vendor_info_t; 221 222 223struct ixgbe_tx_buf { 224 u32 eop_index; 225 struct mbuf *m_head; 226 bus_dmamap_t map; 227}; 228 229struct ixgbe_rx_buf { 230 struct mbuf *m_head; 231 struct mbuf *m_pack; 232 bus_dmamap_t map; 233}; 234 235/* 236 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 237 */ 238struct ixgbe_dma_alloc { 239 bus_addr_t dma_paddr; 240 caddr_t dma_vaddr; 241 bus_dma_tag_t dma_tag; 242 bus_dmamap_t dma_map; 243 bus_dma_segment_t dma_seg; 244 bus_size_t dma_size; 245 int dma_nseg; 246}; 247 248/* 249 * The transmit ring, one per tx queue 250 */ 251struct tx_ring { 252 struct adapter *adapter; 253 struct mtx tx_mtx; 254 u32 me; 255 u32 msix; 256 u32 watchdog_timer; 257 union ixgbe_adv_tx_desc *tx_base; 258 volatile u32 tx_hwb; 259 struct ixgbe_dma_alloc txdma; 260 struct task tx_task; 261 struct taskqueue *tq; 262 u32 next_avail_tx_desc; 263 u32 next_tx_to_clean; 264 struct ixgbe_tx_buf *tx_buffers; 265 volatile u16 tx_avail; 266 u32 txd_cmd; 267 bus_dma_tag_t txtag; 268 char mtx_name[16]; 269#if __FreeBSD_version >= 800000 270 struct buf_ring *br; 271#endif 272 /* Interrupt resources */ 273 void *tag; 274 struct resource *res; 275 276 /* Soft Stats */ 277 u32 no_tx_desc_avail; 278 u32 no_tx_desc_late; 279 u64 tx_irq; 280 u64 total_packets; 281}; 282 283 284/* 285 * The Receive ring, one per rx queue 286 */ 287struct rx_ring { 288 struct adapter *adapter; 289 struct mtx rx_mtx; 290 u32 me; 291 u32 msix; 292 u32 payload; 293 struct task rx_task; 294 struct taskqueue *tq; 295 union ixgbe_adv_rx_desc *rx_base; 296 struct ixgbe_dma_alloc rxdma; 297 struct lro_ctrl lro; 298 bool lro_enabled; 299 bool hdr_split; 300 unsigned int last_cleaned; 301 unsigned int next_to_check; 302 struct ixgbe_rx_buf *rx_buffers; 303 bus_dma_tag_t rxtag; 304 bus_dmamap_t spare_map; 305 struct mbuf *fmp; 306 struct mbuf *lmp; 307 char mtx_name[16]; 308 309 u32 bytes; /* Used for AIM calc */ 310 u32 eitr_setting; 311 312 /* Interrupt resources */ 313 void *tag; 314 struct resource *res; 315 316 /* Soft stats */ 317 u64 rx_irq; 318 u64 rx_split_packets; 319 u64 rx_packets; 320 u64 rx_bytes; 321}; 322 323/* Our adapter structure */ 324struct adapter { 325 struct ifnet *ifp; 326 struct ixgbe_hw hw; 327 328 struct ixgbe_osdep osdep; 329 struct device *dev; 330 331 struct resource *pci_mem; 332 struct resource *msix_mem; 333 334 /* 335 * Interrupt resources: this set is 336 * either used for legacy, or for Link 337 * when doing MSIX 338 */ 339 void *tag; 340 struct resource *res; 341 342 struct ifmedia media; 343 struct callout timer; 344 int msix; 345 int if_flags; 346 347 struct mtx core_mtx; 348 349 eventhandler_tag vlan_attach; 350 eventhandler_tag vlan_detach; 351 352 u32 num_vlans; 353 u16 num_queues; 354 355 /* Info about the board itself */ 356 u32 part_num; 357 u32 optics; 358 bool link_active; 359 u16 max_frame_size; 360 u32 link_speed; 361 bool link_up; 362 u32 linkvec; 363 u32 tx_int_delay; 364 u32 tx_abs_int_delay; 365 u32 rx_int_delay; 366 u32 rx_abs_int_delay; 367 368 /* Mbuf cluster size */ 369 u32 rx_mbuf_sz; 370 371 /* Support for pluggable optics */ 372 bool sfp_probe; 373 struct task link_task; /* Link tasklet */ 374 struct task mod_task; /* SFP tasklet */ 375 struct task msf_task; /* Multispeed Fiber tasklet */ 376 struct taskqueue *tq; 377 378 /* 379 * Transmit rings: 380 * Allocated at run time, an array of rings. 381 */ 382 struct tx_ring *tx_rings; 383 int num_tx_desc; 384 385 /* 386 * Receive rings: 387 * Allocated at run time, an array of rings. 388 */ 389 struct rx_ring *rx_rings; 390 int num_rx_desc; 391 u64 rx_mask; 392 u32 rx_process_limit; 393 394#ifdef IXGBE_IEEE1588 395 /* IEEE 1588 precision time support */ 396 struct cyclecounter cycles; 397 struct nettimer clock; 398 struct nettime_compare compare; 399 struct hwtstamp_ctrl hwtstamp; 400#endif 401 402 /* Misc stats maintained by the driver */ 403 unsigned long dropped_pkts; 404 unsigned long mbuf_defrag_failed; 405 unsigned long mbuf_header_failed; 406 unsigned long mbuf_packet_failed; 407 unsigned long no_tx_map_avail; 408 unsigned long no_tx_dma_setup; 409 unsigned long watchdog_events; 410 unsigned long tso_tx; 411 unsigned long link_irq; 412 413 struct ixgbe_hw_stats stats; 414}; 415 416/* Precision Time Sync (IEEE 1588) defines */ 417#define ETHERTYPE_IEEE1588 0x88F7 418#define PICOSECS_PER_TICK 20833 419#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 420#define IXGBE_ADVTXD_TSTAMP 0x00080000 421 422 423#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 424 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 425#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 426#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 427#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 428#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 429#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 430#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 431#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 432#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 433#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 434#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 435#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 436#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 437 438 439static inline bool 440ixgbe_is_sfp(struct ixgbe_hw *hw) 441{ 442 switch (hw->phy.type) { 443 case ixgbe_phy_sfp_avago: 444 case ixgbe_phy_sfp_ftl: 445 case ixgbe_phy_sfp_intel: 446 case ixgbe_phy_sfp_unknown: 447 case ixgbe_phy_tw_tyco: 448 case ixgbe_phy_tw_unknown: 449 return TRUE; 450 default: 451 return FALSE; 452 } 453} 454 455#endif /* _IXGBE_H_ */ 456