ixgbe.h revision 281954
1285809Sscottl/****************************************************************************** 2285809Sscottl 3285809Sscottl Copyright (c) 2001-2013, Intel Corporation 4285809Sscottl All rights reserved. 5285809Sscottl 6285809Sscottl Redistribution and use in source and binary forms, with or without 7285809Sscottl modification, are permitted provided that the following conditions are met: 8285809Sscottl 9285809Sscottl 1. Redistributions of source code must retain the above copyright notice, 10285809Sscottl this list of conditions and the following disclaimer. 11285809Sscottl 12285809Sscottl 2. Redistributions in binary form must reproduce the above copyright 13285809Sscottl notice, this list of conditions and the following disclaimer in the 14285809Sscottl documentation and/or other materials provided with the distribution. 15285809Sscottl 16285809Sscottl 3. Neither the name of the Intel Corporation nor the names of its 17285809Sscottl contributors may be used to endorse or promote products derived from 18285809Sscottl this software without specific prior written permission. 19285809Sscottl 20285809Sscottl THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21285809Sscottl AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22285809Sscottl IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23285809Sscottl ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24285809Sscottl LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25285809Sscottl CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26285809Sscottl SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27285809Sscottl INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28285809Sscottl CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29285809Sscottl ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30285809Sscottl POSSIBILITY OF SUCH DAMAGE. 31285809Sscottl 32285809Sscottl******************************************************************************/ 33285809Sscottl/*$FreeBSD: stable/10/sys/dev/ixgbe/ixgbe.h 281954 2015-04-24 22:18:50Z ngie $*/ 34285809Sscottl 35285809Sscottl 36285809Sscottl#ifndef _IXGBE_H_ 37285809Sscottl#define _IXGBE_H_ 38285809Sscottl 39285809Sscottl 40285809Sscottl#include <sys/param.h> 41285809Sscottl#include <sys/systm.h> 42285809Sscottl#ifndef IXGBE_LEGACY_TX 43285809Sscottl#include <sys/buf_ring.h> 44285809Sscottl#endif 45285809Sscottl#include <sys/mbuf.h> 46285809Sscottl#include <sys/protosw.h> 47285809Sscottl#include <sys/socket.h> 48285809Sscottl#include <sys/malloc.h> 49285809Sscottl#include <sys/kernel.h> 50285809Sscottl#include <sys/module.h> 51285809Sscottl#include <sys/sockio.h> 52285809Sscottl 53285809Sscottl#include <net/if.h> 54285809Sscottl#include <net/if_arp.h> 55285809Sscottl#include <net/bpf.h> 56285809Sscottl#include <net/ethernet.h> 57285809Sscottl#include <net/if_dl.h> 58285809Sscottl#include <net/if_media.h> 59285809Sscottl 60285809Sscottl#include <net/bpf.h> 61285809Sscottl#include <net/if_types.h> 62285809Sscottl#include <net/if_vlan_var.h> 63285809Sscottl 64285809Sscottl#include <netinet/in_systm.h> 65285809Sscottl#include <netinet/in.h> 66285809Sscottl#include <netinet/if_ether.h> 67285809Sscottl#include <netinet/ip.h> 68285809Sscottl#include <netinet/ip6.h> 69285809Sscottl#include <netinet/tcp.h> 70285809Sscottl#include <netinet/tcp_lro.h> 71285809Sscottl#include <netinet/udp.h> 72285809Sscottl 73285809Sscottl#include <machine/in_cksum.h> 74285809Sscottl 75285809Sscottl#include <sys/bus.h> 76285809Sscottl#include <machine/bus.h> 77285809Sscottl#include <sys/rman.h> 78285809Sscottl#include <machine/resource.h> 79285809Sscottl#include <vm/vm.h> 80285809Sscottl#include <vm/pmap.h> 81285809Sscottl#include <machine/clock.h> 82285809Sscottl#include <dev/pci/pcivar.h> 83285809Sscottl#include <dev/pci/pcireg.h> 84285809Sscottl#include <sys/proc.h> 85285809Sscottl#include <sys/sysctl.h> 86285809Sscottl#include <sys/endian.h> 87285809Sscottl#include <sys/taskqueue.h> 88285809Sscottl#include <sys/pcpu.h> 89285809Sscottl#include <sys/smp.h> 90285809Sscottl#include <machine/smp.h> 91285809Sscottl 92285809Sscottl#include "ixgbe_api.h" 93285809Sscottl 94285809Sscottl/* Tunables */ 95285809Sscottl 96285809Sscottl/* 97285809Sscottl * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 98285809Sscottl * number of transmit descriptors allocated by the driver. Increasing this 99285809Sscottl * value allows the driver to queue more transmits. Each descriptor is 16 100285809Sscottl * bytes. Performance tests have show the 2K value to be optimal for top 101285809Sscottl * performance. 102285809Sscottl */ 103285809Sscottl#define DEFAULT_TXD 1024 104285809Sscottl#define PERFORM_TXD 2048 105285809Sscottl#define MAX_TXD 4096 106285809Sscottl#define MIN_TXD 64 107285809Sscottl 108285809Sscottl/* 109285809Sscottl * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 110285809Sscottl * number of receive descriptors allocated for each RX queue. Increasing this 111285809Sscottl * value allows the driver to buffer more incoming packets. Each descriptor 112285809Sscottl * is 16 bytes. A receive buffer is also allocated for each descriptor. 113285809Sscottl * 114285809Sscottl * Note: with 8 rings and a dual port card, it is possible to bump up 115285809Sscottl * against the system mbuf pool limit, you can tune nmbclusters 116285809Sscottl * to adjust for this. 117285809Sscottl */ 118285809Sscottl#define DEFAULT_RXD 1024 119285809Sscottl#define PERFORM_RXD 2048 120285809Sscottl#define MAX_RXD 4096 121285809Sscottl#define MIN_RXD 64 122285809Sscottl 123285809Sscottl/* Alignment for rings */ 124285809Sscottl#define DBA_ALIGN 128 125285809Sscottl 126285809Sscottl/* 127285809Sscottl * This parameter controls the maximum no of times the driver will loop in 128285809Sscottl * the isr. Minimum Value = 1 129285809Sscottl */ 130285809Sscottl#define MAX_LOOP 10 131285809Sscottl 132285809Sscottl/* 133285809Sscottl * This is the max watchdog interval, ie. the time that can 134285809Sscottl * pass between any two TX clean operations, such only happening 135285809Sscottl * when the TX hardware is functioning. 136285809Sscottl */ 137285809Sscottl#define IXGBE_WATCHDOG (10 * hz) 138285809Sscottl 139285809Sscottl/* 140285809Sscottl * This parameters control when the driver calls the routine to reclaim 141285809Sscottl * transmit descriptors. 142285809Sscottl */ 143285809Sscottl#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 144285809Sscottl#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 145285809Sscottl 146285809Sscottl#define IXGBE_MAX_FRAME_SIZE 0x3F00 147285809Sscottl 148285809Sscottl/* Flow control constants */ 149285809Sscottl#define IXGBE_FC_PAUSE 0xFFFF 150285809Sscottl#define IXGBE_FC_HI 0x20000 151285809Sscottl#define IXGBE_FC_LO 0x10000 152285809Sscottl 153285809Sscottl/* 154285809Sscottl * Used for optimizing small rx mbufs. Effort is made to keep the copy 155285809Sscottl * small and aligned for the CPU L1 cache. 156285809Sscottl * 157285809Sscottl * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 158285809Sscottl * 32 byte alignment needed for the fast bcopy results in 8 bytes being 159285809Sscottl * wasted. Getting 64 byte alignment, which _should_ be ideal for 160285809Sscottl * modern Intel CPUs, results in 40 bytes wasted and a significant drop 161285809Sscottl * in observed efficiency of the optimization, 97.9% -> 81.8%. 162285809Sscottl */ 163285809Sscottl#define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) 164285809Sscottl#define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 165285809Sscottl#define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) 166285809Sscottl 167285809Sscottl/* Keep older OS drivers building... */ 168285809Sscottl#if !defined(SYSCTL_ADD_UQUAD) 169285809Sscottl#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 170285809Sscottl#endif 171285809Sscottl 172285809Sscottl/* Defines for printing debug information */ 173285809Sscottl#define DEBUG_INIT 0 174285809Sscottl#define DEBUG_IOCTL 0 175285809Sscottl#define DEBUG_HW 0 176285809Sscottl 177285809Sscottl#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 178285809Sscottl#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 179285809Sscottl#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 180285809Sscottl#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 181285809Sscottl#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 182285809Sscottl#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 183285809Sscottl#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 184285809Sscottl#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 185285809Sscottl#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 186285809Sscottl 187285809Sscottl#define MAX_NUM_MULTICAST_ADDRESSES 128 188285809Sscottl#define IXGBE_82598_SCATTER 100 189285809Sscottl#define IXGBE_82599_SCATTER 32 190285809Sscottl#define MSIX_82598_BAR 3 191285809Sscottl#define MSIX_82599_BAR 4 192285809Sscottl#define IXGBE_TSO_SIZE 262140 193285809Sscottl#define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 194285809Sscottl#define IXGBE_RX_HDR 128 195285809Sscottl#define IXGBE_VFTA_SIZE 128 196285809Sscottl#define IXGBE_BR_SIZE 4096 197285809Sscottl#define IXGBE_QUEUE_MIN_FREE 32 198285809Sscottl 199285809Sscottl/* IOCTL define to gather SFP+ Diagnostic data */ 200285809Sscottl#define SIOCGI2C SIOCGIFGENERIC 201285809Sscottl 202285809Sscottl/* Offload bits in mbuf flag */ 203285809Sscottl#if __FreeBSD_version >= 800000 204285809Sscottl#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 205285809Sscottl#else 206285809Sscottl#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 207285809Sscottl#endif 208285809Sscottl 209285809Sscottl/* 210285809Sscottl * Interrupt Moderation parameters 211285809Sscottl */ 212285809Sscottl#define IXGBE_LOW_LATENCY 128 213285809Sscottl#define IXGBE_AVE_LATENCY 400 214285809Sscottl#define IXGBE_BULK_LATENCY 1200 215285809Sscottl#define IXGBE_LINK_ITR 2000 216285809Sscottl 217285809Sscottl 218285809Sscottl/* 219285809Sscottl ***************************************************************************** 220285809Sscottl * vendor_info_array 221285809Sscottl * 222285809Sscottl * This array contains the list of Subvendor/Subdevice IDs on which the driver 223285809Sscottl * should load. 224285809Sscottl * 225285809Sscottl ***************************************************************************** 226285809Sscottl */ 227285809Sscottltypedef struct _ixgbe_vendor_info_t { 228285809Sscottl unsigned int vendor_id; 229285809Sscottl unsigned int device_id; 230285809Sscottl unsigned int subvendor_id; 231285809Sscottl unsigned int subdevice_id; 232285809Sscottl unsigned int index; 233285809Sscottl} ixgbe_vendor_info_t; 234285809Sscottl 235285809Sscottl 236285809Sscottl/* This is used to get SFP+ module data */ 237285809Sscottlstruct ixgbe_i2c_req { 238285809Sscottl u8 dev_addr; 239285809Sscottl u8 offset; 240285809Sscottl u8 len; 241285809Sscottl u8 data[8]; 242285809Sscottl}; 243285809Sscottl 244285809Sscottlstruct ixgbe_tx_buf { 245285809Sscottl union ixgbe_adv_tx_desc *eop; 246285809Sscottl struct mbuf *m_head; 247285809Sscottl bus_dmamap_t map; 248285809Sscottl}; 249285809Sscottl 250285809Sscottlstruct ixgbe_rx_buf { 251285809Sscottl struct mbuf *buf; 252285809Sscottl struct mbuf *fmp; 253285809Sscottl bus_dmamap_t pmap; 254285809Sscottl u_int flags; 255285809Sscottl#define IXGBE_RX_COPY 0x01 256285809Sscottl uint64_t addr; 257285809Sscottl}; 258285809Sscottl 259285809Sscottl/* 260285809Sscottl * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 261285809Sscottl */ 262285809Sscottlstruct ixgbe_dma_alloc { 263285809Sscottl bus_addr_t dma_paddr; 264285809Sscottl caddr_t dma_vaddr; 265285809Sscottl bus_dma_tag_t dma_tag; 266285809Sscottl bus_dmamap_t dma_map; 267285809Sscottl bus_dma_segment_t dma_seg; 268285809Sscottl bus_size_t dma_size; 269285809Sscottl int dma_nseg; 270285809Sscottl}; 271285809Sscottl 272285809Sscottl/* 273285809Sscottl** Driver queue struct: this is the interrupt container 274285809Sscottl** for the associated tx and rx ring. 275285809Sscottl*/ 276285809Sscottlstruct ix_queue { 277285809Sscottl struct adapter *adapter; 278285809Sscottl u32 msix; /* This queue's MSIX vector */ 279285809Sscottl u32 eims; /* This queue's EIMS bit */ 280285809Sscottl u32 eitr_setting; 281285809Sscottl struct resource *res; 282285809Sscottl void *tag; 283285809Sscottl struct tx_ring *txr; 284285809Sscottl struct rx_ring *rxr; 285285809Sscottl struct task que_task; 286285809Sscottl struct taskqueue *tq; 287285809Sscottl u64 irqs; 288285809Sscottl}; 289285809Sscottl 290285809Sscottl/* 291285809Sscottl * The transmit ring, one per queue 292285809Sscottl */ 293285809Sscottlstruct tx_ring { 294285809Sscottl struct adapter *adapter; 295285809Sscottl struct mtx tx_mtx; 296285809Sscottl u32 me; 297285809Sscottl int watchdog_time; 298285809Sscottl union ixgbe_adv_tx_desc *tx_base; 299285809Sscottl struct ixgbe_tx_buf *tx_buffers; 300285809Sscottl struct ixgbe_dma_alloc txdma; 301285809Sscottl volatile u16 tx_avail; 302285809Sscottl u16 next_avail_desc; 303285809Sscottl u16 next_to_clean; 304285809Sscottl u16 process_limit; 305285809Sscottl u16 num_desc; 306285809Sscottl enum { 307285809Sscottl IXGBE_QUEUE_IDLE, 308285809Sscottl IXGBE_QUEUE_WORKING, 309285809Sscottl IXGBE_QUEUE_HUNG, 310285809Sscottl } queue_status; 311285809Sscottl u32 txd_cmd; 312285809Sscottl bus_dma_tag_t txtag; 313285809Sscottl char mtx_name[16]; 314285809Sscottl#ifndef IXGBE_LEGACY_TX 315285809Sscottl struct buf_ring *br; 316285809Sscottl struct task txq_task; 317285809Sscottl#endif 318285809Sscottl#ifdef IXGBE_FDIR 319285809Sscottl u16 atr_sample; 320285809Sscottl u16 atr_count; 321285809Sscottl#endif 322285809Sscottl u32 bytes; /* used for AIM */ 323285809Sscottl u32 packets; 324285809Sscottl /* Soft Stats */ 325285809Sscottl unsigned long tso_tx; 326285809Sscottl unsigned long no_tx_map_avail; 327285809Sscottl unsigned long no_tx_dma_setup; 328285809Sscottl u64 no_desc_avail; 329285809Sscottl u64 total_packets; 330285809Sscottl}; 331285809Sscottl 332285809Sscottl 333285809Sscottl/* 334285809Sscottl * The Receive ring, one per rx queue 335285809Sscottl */ 336285809Sscottlstruct rx_ring { 337285809Sscottl struct adapter *adapter; 338285809Sscottl struct mtx rx_mtx; 339285809Sscottl u32 me; 340285809Sscottl union ixgbe_adv_rx_desc *rx_base; 341285809Sscottl struct ixgbe_dma_alloc rxdma; 342285809Sscottl struct lro_ctrl lro; 343285809Sscottl bool lro_enabled; 344285809Sscottl bool hw_rsc; 345285809Sscottl bool vtag_strip; 346285809Sscottl u16 next_to_refresh; 347285809Sscottl u16 next_to_check; 348285809Sscottl u16 num_desc; 349285809Sscottl u16 mbuf_sz; 350285809Sscottl u16 process_limit; 351285809Sscottl char mtx_name[16]; 352285809Sscottl struct ixgbe_rx_buf *rx_buffers; 353285809Sscottl bus_dma_tag_t ptag; 354285809Sscottl 355285809Sscottl u32 bytes; /* Used for AIM calc */ 356285809Sscottl u32 packets; 357285809Sscottl 358285809Sscottl /* Soft stats */ 359285809Sscottl u64 rx_irq; 360285809Sscottl u64 rx_copies; 361285809Sscottl u64 rx_packets; 362285809Sscottl u64 rx_bytes; 363285809Sscottl u64 rx_discarded; 364285809Sscottl u64 rsc_num; 365285809Sscottl#ifdef IXGBE_FDIR 366285809Sscottl u64 flm; 367285809Sscottl#endif 368285809Sscottl}; 369285809Sscottl 370285809Sscottl/* Our adapter structure */ 371285809Sscottlstruct adapter { 372285809Sscottl struct ifnet *ifp; 373285809Sscottl struct ixgbe_hw hw; 374285809Sscottl 375285809Sscottl struct ixgbe_osdep osdep; 376285809Sscottl struct device *dev; 377285809Sscottl 378285809Sscottl struct resource *pci_mem; 379285809Sscottl struct resource *msix_mem; 380285809Sscottl 381285809Sscottl /* 382285809Sscottl * Interrupt resources: this set is 383285809Sscottl * either used for legacy, or for Link 384285809Sscottl * when doing MSIX 385285809Sscottl */ 386285809Sscottl void *tag; 387285809Sscottl struct resource *res; 388285809Sscottl 389285809Sscottl struct ifmedia media; 390285809Sscottl struct callout timer; 391285809Sscottl int msix; 392285809Sscottl int if_flags; 393285809Sscottl 394285809Sscottl struct mtx core_mtx; 395285809Sscottl 396285809Sscottl eventhandler_tag vlan_attach; 397285809Sscottl eventhandler_tag vlan_detach; 398285809Sscottl 399285809Sscottl u16 num_vlans; 400285809Sscottl u16 num_queues; 401285809Sscottl 402285809Sscottl /* 403285809Sscottl ** Shadow VFTA table, this is needed because 404285809Sscottl ** the real vlan filter table gets cleared during 405285809Sscottl ** a soft reset and the driver needs to be able 406285809Sscottl ** to repopulate it. 407285809Sscottl */ 408285809Sscottl u32 shadow_vfta[IXGBE_VFTA_SIZE]; 409285809Sscottl 410285809Sscottl /* Info about the interface */ 411285809Sscottl u32 optics; 412285809Sscottl u32 fc; /* local flow ctrl setting */ 413285809Sscottl int advertise; /* link speeds */ 414285809Sscottl bool link_active; 415285809Sscottl u16 max_frame_size; 416285809Sscottl u16 num_segs; 417285809Sscottl u32 link_speed; 418285809Sscottl bool link_up; 419285809Sscottl u32 linkvec; 420285809Sscottl 421285809Sscottl /* Mbuf cluster size */ 422285809Sscottl u32 rx_mbuf_sz; 423285809Sscottl 424285809Sscottl /* Support for pluggable optics */ 425285809Sscottl bool sfp_probe; 426285809Sscottl struct task link_task; /* Link tasklet */ 427285809Sscottl struct task mod_task; /* SFP tasklet */ 428285809Sscottl struct task msf_task; /* Multispeed Fiber */ 429285809Sscottl#ifdef IXGBE_FDIR 430285809Sscottl int fdir_reinit; 431285809Sscottl struct task fdir_task; 432285809Sscottl#endif 433285809Sscottl struct taskqueue *tq; 434285809Sscottl 435285809Sscottl /* 436285809Sscottl ** Queues: 437285809Sscottl ** This is the irq holder, it has 438285809Sscottl ** and RX/TX pair or rings associated 439285809Sscottl ** with it. 440285809Sscottl */ 441285809Sscottl struct ix_queue *queues; 442285809Sscottl 443285809Sscottl /* 444285809Sscottl * Transmit rings: 445285809Sscottl * Allocated at run time, an array of rings. 446285809Sscottl */ 447285809Sscottl struct tx_ring *tx_rings; 448285809Sscottl u32 num_tx_desc; 449285809Sscottl 450285809Sscottl /* 451285809Sscottl * Receive rings: 452285809Sscottl * Allocated at run time, an array of rings. 453285809Sscottl */ 454285809Sscottl struct rx_ring *rx_rings; 455285809Sscottl u64 que_mask; 456285809Sscottl u32 num_rx_desc; 457285809Sscottl 458285809Sscottl /* Multicast array memory */ 459285809Sscottl u8 *mta; 460285809Sscottl 461285809Sscottl 462285809Sscottl /* Misc stats maintained by the driver */ 463285809Sscottl unsigned long dropped_pkts; 464285809Sscottl unsigned long mbuf_defrag_failed; 465285809Sscottl unsigned long mbuf_header_failed; 466285809Sscottl unsigned long mbuf_packet_failed; 467285809Sscottl unsigned long watchdog_events; 468285809Sscottl unsigned long link_irq; 469285809Sscottl 470285809Sscottl struct ixgbe_hw_stats stats; 471285809Sscottl}; 472285809Sscottl 473285809Sscottl 474285809Sscottl/* Precision Time Sync (IEEE 1588) defines */ 475285809Sscottl#define ETHERTYPE_IEEE1588 0x88F7 476285809Sscottl#define PICOSECS_PER_TICK 20833 477285809Sscottl#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 478285809Sscottl#define IXGBE_ADVTXD_TSTAMP 0x00080000 479285809Sscottl 480285809Sscottl 481285809Sscottl#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 482285809Sscottl mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 483285809Sscottl#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 484285809Sscottl#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 485285809Sscottl#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 486285809Sscottl#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 487285809Sscottl#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 488285809Sscottl#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 489285809Sscottl#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 490285809Sscottl#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 491285809Sscottl#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 492285809Sscottl#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 493285809Sscottl#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 494285809Sscottl#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 495285809Sscottl 496285809Sscottl/* For backward compatibility */ 497285809Sscottl#if !defined(PCIER_LINK_STA) 498285809Sscottl#define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA 499285809Sscottl#endif 500285809Sscottl 501285809Sscottlstatic inline bool 502285809Sscottlixgbe_is_sfp(struct ixgbe_hw *hw) 503285809Sscottl{ 504285809Sscottl switch (hw->phy.type) { 505285809Sscottl case ixgbe_phy_sfp_avago: 506285809Sscottl case ixgbe_phy_sfp_ftl: 507285809Sscottl case ixgbe_phy_sfp_intel: 508285809Sscottl case ixgbe_phy_sfp_unknown: 509285809Sscottl case ixgbe_phy_sfp_passive_tyco: 510285809Sscottl case ixgbe_phy_sfp_passive_unknown: 511285809Sscottl return TRUE; 512285809Sscottl default: 513285809Sscottl return FALSE; 514285809Sscottl } 515285809Sscottl} 516285809Sscottl 517285809Sscottl/* Workaround to make 8.0 buildable */ 518285809Sscottl#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 519285809Sscottlstatic __inline int 520285809Sscottldrbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 521285809Sscottl{ 522285809Sscottl#ifdef ALTQ 523285809Sscottl if (ALTQ_IS_ENABLED(&ifp->if_snd)) 524285809Sscottl return (1); 525285809Sscottl#endif 526285809Sscottl return (!buf_ring_empty(br)); 527285809Sscottl} 528285809Sscottl#endif 529285809Sscottl 530285809Sscottl/* 531285809Sscottl** Find the number of unrefreshed RX descriptors 532285809Sscottl*/ 533285809Sscottlstatic inline u16 534285809Sscottlixgbe_rx_unrefreshed(struct rx_ring *rxr) 535285809Sscottl{ 536285809Sscottl if (rxr->next_to_check > rxr->next_to_refresh) 537285809Sscottl return (rxr->next_to_check - rxr->next_to_refresh - 1); 538285809Sscottl else 539285809Sscottl return ((rxr->num_desc + rxr->next_to_check) - 540285809Sscottl rxr->next_to_refresh - 1); 541285809Sscottl} 542285809Sscottl 543285809Sscottl#endif /* _IXGBE_H_ */ 544285809Sscottl