ixgbe.h revision 243725
1179055Sjfv/****************************************************************************** 2171384Sjfv 3230775Sjfv Copyright (c) 2001-2012, Intel Corporation 4179055Sjfv All rights reserved. 5179055Sjfv 6179055Sjfv Redistribution and use in source and binary forms, with or without 7179055Sjfv modification, are permitted provided that the following conditions are met: 8179055Sjfv 9179055Sjfv 1. Redistributions of source code must retain the above copyright notice, 10179055Sjfv this list of conditions and the following disclaimer. 11179055Sjfv 12179055Sjfv 2. Redistributions in binary form must reproduce the above copyright 13179055Sjfv notice, this list of conditions and the following disclaimer in the 14179055Sjfv documentation and/or other materials provided with the distribution. 15179055Sjfv 16179055Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17179055Sjfv contributors may be used to endorse or promote products derived from 18179055Sjfv this software without specific prior written permission. 19179055Sjfv 20179055Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21179055Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22179055Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23179055Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24179055Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25179055Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26179055Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27179055Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28179055Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29179055Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30179055Sjfv POSSIBILITY OF SUCH DAMAGE. 31171384Sjfv 32179055Sjfv******************************************************************************/ 33179055Sjfv/*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 243725 2012-11-30 23:13:56Z jfv $*/ 34171384Sjfv 35185352Sjfv 36171384Sjfv#ifndef _IXGBE_H_ 37171384Sjfv#define _IXGBE_H_ 38171384Sjfv 39171384Sjfv 40171384Sjfv#include <sys/param.h> 41171384Sjfv#include <sys/systm.h> 42243725Sjfv#ifndef IXGBE_LEGACY_TX 43194875Sjfv#include <sys/buf_ring.h> 44194875Sjfv#endif 45171384Sjfv#include <sys/mbuf.h> 46171384Sjfv#include <sys/protosw.h> 47171384Sjfv#include <sys/socket.h> 48171384Sjfv#include <sys/malloc.h> 49171384Sjfv#include <sys/kernel.h> 50171384Sjfv#include <sys/module.h> 51171384Sjfv#include <sys/sockio.h> 52171384Sjfv 53171384Sjfv#include <net/if.h> 54171384Sjfv#include <net/if_arp.h> 55171384Sjfv#include <net/bpf.h> 56171384Sjfv#include <net/ethernet.h> 57171384Sjfv#include <net/if_dl.h> 58171384Sjfv#include <net/if_media.h> 59171384Sjfv 60171384Sjfv#include <net/bpf.h> 61171384Sjfv#include <net/if_types.h> 62171384Sjfv#include <net/if_vlan_var.h> 63171384Sjfv 64171384Sjfv#include <netinet/in_systm.h> 65171384Sjfv#include <netinet/in.h> 66171384Sjfv#include <netinet/if_ether.h> 67171384Sjfv#include <netinet/ip.h> 68171384Sjfv#include <netinet/ip6.h> 69171384Sjfv#include <netinet/tcp.h> 70190873Sjfv#include <netinet/tcp_lro.h> 71171384Sjfv#include <netinet/udp.h> 72171384Sjfv 73171384Sjfv#include <machine/in_cksum.h> 74171384Sjfv 75171384Sjfv#include <sys/bus.h> 76171384Sjfv#include <machine/bus.h> 77171384Sjfv#include <sys/rman.h> 78171384Sjfv#include <machine/resource.h> 79171384Sjfv#include <vm/vm.h> 80171384Sjfv#include <vm/pmap.h> 81171384Sjfv#include <machine/clock.h> 82171384Sjfv#include <dev/pci/pcivar.h> 83171384Sjfv#include <dev/pci/pcireg.h> 84171384Sjfv#include <sys/proc.h> 85171384Sjfv#include <sys/sysctl.h> 86171384Sjfv#include <sys/endian.h> 87171384Sjfv#include <sys/taskqueue.h> 88179055Sjfv#include <sys/pcpu.h> 89194875Sjfv#include <sys/smp.h> 90194875Sjfv#include <machine/smp.h> 91171384Sjfv 92171384Sjfv#include "ixgbe_api.h" 93171384Sjfv 94171384Sjfv/* Tunables */ 95171384Sjfv 96171384Sjfv/* 97172043Sjfv * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 98171384Sjfv * number of transmit descriptors allocated by the driver. Increasing this 99171384Sjfv * value allows the driver to queue more transmits. Each descriptor is 16 100172043Sjfv * bytes. Performance tests have show the 2K value to be optimal for top 101172043Sjfv * performance. 102171384Sjfv */ 103190873Sjfv#define DEFAULT_TXD 1024 104172043Sjfv#define PERFORM_TXD 2048 105171384Sjfv#define MAX_TXD 4096 106171384Sjfv#define MIN_TXD 64 107171384Sjfv 108171384Sjfv/* 109172043Sjfv * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 110172043Sjfv * number of receive descriptors allocated for each RX queue. Increasing this 111171384Sjfv * value allows the driver to buffer more incoming packets. Each descriptor 112172043Sjfv * is 16 bytes. A receive buffer is also allocated for each descriptor. 113171384Sjfv * 114172043Sjfv * Note: with 8 rings and a dual port card, it is possible to bump up 115172043Sjfv * against the system mbuf pool limit, you can tune nmbclusters 116172043Sjfv * to adjust for this. 117171384Sjfv */ 118190873Sjfv#define DEFAULT_RXD 1024 119172043Sjfv#define PERFORM_RXD 2048 120171384Sjfv#define MAX_RXD 4096 121171384Sjfv#define MIN_RXD 64 122171384Sjfv 123172043Sjfv/* Alignment for rings */ 124172043Sjfv#define DBA_ALIGN 128 125172043Sjfv 126171384Sjfv/* 127171384Sjfv * This parameter controls the maximum no of times the driver will loop in 128171384Sjfv * the isr. Minimum Value = 1 129171384Sjfv */ 130185352Sjfv#define MAX_LOOP 10 131171384Sjfv 132171384Sjfv/* 133200239Sjfv * This is the max watchdog interval, ie. the time that can 134200239Sjfv * pass between any two TX clean operations, such only happening 135200239Sjfv * when the TX hardware is functioning. 136171384Sjfv */ 137200239Sjfv#define IXGBE_WATCHDOG (10 * hz) 138171384Sjfv 139171384Sjfv/* 140171384Sjfv * This parameters control when the driver calls the routine to reclaim 141171384Sjfv * transmit descriptors. 142171384Sjfv */ 143171384Sjfv#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 144171384Sjfv#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 145171384Sjfv 146171384Sjfv#define IXGBE_MAX_FRAME_SIZE 0x3F00 147171384Sjfv 148172043Sjfv/* Flow control constants */ 149200239Sjfv#define IXGBE_FC_PAUSE 0xFFFF 150172043Sjfv#define IXGBE_FC_HI 0x20000 151172043Sjfv#define IXGBE_FC_LO 0x10000 152171384Sjfv 153239940Sscottl/* 154239940Sscottl * Used for optimizing small rx mbufs. Effort is made to keep the copy 155239940Sscottl * small and aligned for the CPU L1 cache. 156239940Sscottl * 157239940Sscottl * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 158239940Sscottl * 32 byte alignment needed for the fast bcopy results in 8 bytes being 159239940Sscottl * wasted. Getting 64 byte alignment, which _should_ be ideal for 160239940Sscottl * modern Intel CPUs, results in 40 bytes wasted and a significant drop 161239940Sscottl * in observed efficiency of the optimization, 97.9% -> 81.8%. 162239940Sscottl */ 163239940Sscottl#define IXGBE_RX_COPY_LEN 160 164239940Sscottl#define IXGBE_RX_COPY_ALIGN (MHLEN - IXGBE_RX_COPY_LEN) 165239940Sscottl 166221189Sjfv/* Keep older OS drivers building... */ 167221189Sjfv#if !defined(SYSCTL_ADD_UQUAD) 168221189Sjfv#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 169221189Sjfv#endif 170221189Sjfv 171171384Sjfv/* Defines for printing debug information */ 172171384Sjfv#define DEBUG_INIT 0 173171384Sjfv#define DEBUG_IOCTL 0 174171384Sjfv#define DEBUG_HW 0 175171384Sjfv 176171384Sjfv#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 177171384Sjfv#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 178171384Sjfv#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 179171384Sjfv#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 180171384Sjfv#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 181171384Sjfv#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 182171384Sjfv#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 183171384Sjfv#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 184171384Sjfv#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 185171384Sjfv 186171384Sjfv#define MAX_NUM_MULTICAST_ADDRESSES 128 187190873Sjfv#define IXGBE_82598_SCATTER 100 188190873Sjfv#define IXGBE_82599_SCATTER 32 189185352Sjfv#define MSIX_82598_BAR 3 190185352Sjfv#define MSIX_82599_BAR 4 191234620Sbz#define IXGBE_TSO_SIZE 262140 192171384Sjfv#define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 193205720Sjfv#define IXGBE_RX_HDR 128 194194875Sjfv#define IXGBE_VFTA_SIZE 128 195194875Sjfv#define IXGBE_BR_SIZE 4096 196230775Sjfv#define IXGBE_QUEUE_MIN_FREE 32 197171384Sjfv 198243718Sjfv/* IOCTL define to gather SFP+ Diagnostic data */ 199243718Sjfv#define SIOCGI2C SIOCGIFGENERIC 200243718Sjfv 201205904Sjfv/* Offload bits in mbuf flag */ 202205904Sjfv#if __FreeBSD_version >= 800000 203205904Sjfv#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 204205904Sjfv#else 205205904Sjfv#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 206205904Sjfv#endif 207205904Sjfv 208171384Sjfv/* 209171384Sjfv * Interrupt Moderation parameters 210171384Sjfv */ 211185352Sjfv#define IXGBE_LOW_LATENCY 128 212185352Sjfv#define IXGBE_AVE_LATENCY 400 213185352Sjfv#define IXGBE_BULK_LATENCY 1200 214185352Sjfv#define IXGBE_LINK_ITR 2000 215171384Sjfv 216171384Sjfv/* 217185352Sjfv ***************************************************************************** 218171384Sjfv * vendor_info_array 219171384Sjfv * 220171384Sjfv * This array contains the list of Subvendor/Subdevice IDs on which the driver 221171384Sjfv * should load. 222171384Sjfv * 223185352Sjfv ***************************************************************************** 224171384Sjfv */ 225171384Sjfvtypedef struct _ixgbe_vendor_info_t { 226171384Sjfv unsigned int vendor_id; 227171384Sjfv unsigned int device_id; 228171384Sjfv unsigned int subvendor_id; 229171384Sjfv unsigned int subdevice_id; 230171384Sjfv unsigned int index; 231185352Sjfv} ixgbe_vendor_info_t; 232171384Sjfv 233243718Sjfv/* This is used to get SFP+ module data */ 234243718Sjfvstruct ixgbe_i2c_req { 235243718Sjfv u8 dev_addr; 236243718Sjfv u8 offset; 237243718Sjfv u8 len; 238243718Sjfv u8 data[8]; 239243718Sjfv}; 240171384Sjfv 241171384Sjfvstruct ixgbe_tx_buf { 242190873Sjfv u32 eop_index; 243171384Sjfv struct mbuf *m_head; 244171384Sjfv bus_dmamap_t map; 245171384Sjfv}; 246171384Sjfv 247171384Sjfvstruct ixgbe_rx_buf { 248243714Sjfv struct mbuf *buf; 249205720Sjfv struct mbuf *fmp; 250243714Sjfv bus_dmamap_t map; 251239940Sscottl u_int flags; 252239940Sscottl#define IXGBE_RX_COPY 0x01 253243714Sjfv uint64_t addr; 254171384Sjfv}; 255171384Sjfv 256171384Sjfv/* 257171384Sjfv * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 258171384Sjfv */ 259171384Sjfvstruct ixgbe_dma_alloc { 260171384Sjfv bus_addr_t dma_paddr; 261171384Sjfv caddr_t dma_vaddr; 262171384Sjfv bus_dma_tag_t dma_tag; 263171384Sjfv bus_dmamap_t dma_map; 264171384Sjfv bus_dma_segment_t dma_seg; 265171384Sjfv bus_size_t dma_size; 266171384Sjfv int dma_nseg; 267171384Sjfv}; 268171384Sjfv 269171384Sjfv/* 270205720Sjfv** Driver queue struct: this is the interrupt container 271205720Sjfv** for the associated tx and rx ring. 272205720Sjfv*/ 273205720Sjfvstruct ix_queue { 274205720Sjfv struct adapter *adapter; 275205720Sjfv u32 msix; /* This queue's MSIX vector */ 276205720Sjfv u32 eims; /* This queue's EIMS bit */ 277205720Sjfv u32 eitr_setting; 278205720Sjfv struct resource *res; 279205720Sjfv void *tag; 280205720Sjfv struct tx_ring *txr; 281205720Sjfv struct rx_ring *rxr; 282205720Sjfv struct task que_task; 283205720Sjfv struct taskqueue *tq; 284205720Sjfv u64 irqs; 285205720Sjfv}; 286205720Sjfv 287205720Sjfv/* 288205720Sjfv * The transmit ring, one per queue 289171384Sjfv */ 290171384Sjfvstruct tx_ring { 291171384Sjfv struct adapter *adapter; 292179055Sjfv struct mtx tx_mtx; 293171384Sjfv u32 me; 294243716Sjfv enum { 295243716Sjfv IXGBE_QUEUE_IDLE, 296243716Sjfv IXGBE_QUEUE_WORKING, 297243716Sjfv IXGBE_QUEUE_HUNG, 298243716Sjfv } queue_status; 299200239Sjfv int watchdog_time; 300171384Sjfv union ixgbe_adv_tx_desc *tx_base; 301171384Sjfv struct ixgbe_dma_alloc txdma; 302200239Sjfv u32 next_avail_desc; 303200239Sjfv u32 next_to_clean; 304171384Sjfv struct ixgbe_tx_buf *tx_buffers; 305179055Sjfv volatile u16 tx_avail; 306179055Sjfv u32 txd_cmd; 307171384Sjfv bus_dma_tag_t txtag; 308185352Sjfv char mtx_name[16]; 309243725Sjfv#ifndef IXGBE_LEGACY_TX 310194875Sjfv struct buf_ring *br; 311240968Sjhb struct task txq_task; 312194875Sjfv#endif 313200239Sjfv#ifdef IXGBE_FDIR 314200239Sjfv u16 atr_sample; 315200239Sjfv u16 atr_count; 316200239Sjfv#endif 317205720Sjfv u32 bytes; /* used for AIM */ 318205720Sjfv u32 packets; 319179055Sjfv /* Soft Stats */ 320205720Sjfv u64 no_desc_avail; 321185352Sjfv u64 total_packets; 322171384Sjfv}; 323171384Sjfv 324171384Sjfv 325171384Sjfv/* 326171384Sjfv * The Receive ring, one per rx queue 327171384Sjfv */ 328171384Sjfvstruct rx_ring { 329179055Sjfv struct adapter *adapter; 330179055Sjfv struct mtx rx_mtx; 331179055Sjfv u32 me; 332179055Sjfv union ixgbe_adv_rx_desc *rx_base; 333179055Sjfv struct ixgbe_dma_alloc rxdma; 334179055Sjfv struct lro_ctrl lro; 335194875Sjfv bool lro_enabled; 336200239Sjfv bool hw_rsc; 337205720Sjfv bool discard; 338230775Sjfv bool vtag_strip; 339205720Sjfv u32 next_to_refresh; 340205720Sjfv u32 next_to_check; 341205720Sjfv char mtx_name[16]; 342179055Sjfv struct ixgbe_rx_buf *rx_buffers; 343243714Sjfv bus_dma_tag_t tag; 344185352Sjfv 345185352Sjfv u32 bytes; /* Used for AIM calc */ 346205720Sjfv u32 packets; 347185352Sjfv 348171384Sjfv /* Soft stats */ 349179055Sjfv u64 rx_irq; 350239940Sscottl u64 rx_copies; 351185352Sjfv u64 rx_packets; 352185352Sjfv u64 rx_bytes; 353205720Sjfv u64 rx_discarded; 354200239Sjfv u64 rsc_num; 355200239Sjfv#ifdef IXGBE_FDIR 356200239Sjfv u64 flm; 357200239Sjfv#endif 358171384Sjfv}; 359171384Sjfv 360171384Sjfv/* Our adapter structure */ 361171384Sjfvstruct adapter { 362205720Sjfv struct ifnet *ifp; 363205720Sjfv struct ixgbe_hw hw; 364171384Sjfv 365171384Sjfv struct ixgbe_osdep osdep; 366205720Sjfv struct device *dev; 367171384Sjfv 368205720Sjfv struct resource *pci_mem; 369205720Sjfv struct resource *msix_mem; 370179055Sjfv 371171384Sjfv /* 372194875Sjfv * Interrupt resources: this set is 373194875Sjfv * either used for legacy, or for Link 374194875Sjfv * when doing MSIX 375171384Sjfv */ 376205720Sjfv void *tag; 377205720Sjfv struct resource *res; 378171384Sjfv 379205720Sjfv struct ifmedia media; 380205720Sjfv struct callout timer; 381205720Sjfv int msix; 382205720Sjfv int if_flags; 383179055Sjfv 384205720Sjfv struct mtx core_mtx; 385179055Sjfv 386205720Sjfv eventhandler_tag vlan_attach; 387205720Sjfv eventhandler_tag vlan_detach; 388194875Sjfv 389205720Sjfv u16 num_vlans; 390205720Sjfv u16 num_queues; 391194875Sjfv 392215911Sjfv /* 393215911Sjfv ** Shadow VFTA table, this is needed because 394215911Sjfv ** the real vlan filter table gets cleared during 395215911Sjfv ** a soft reset and the driver needs to be able 396215911Sjfv ** to repopulate it. 397215911Sjfv */ 398215911Sjfv u32 shadow_vfta[IXGBE_VFTA_SIZE]; 399215911Sjfv 400215911Sjfv /* Info about the interface */ 401205720Sjfv u32 optics; 402230775Sjfv u32 fc; /* local flow ctrl setting */ 403209609Sjfv int advertise; /* link speeds */ 404205720Sjfv bool link_active; 405205720Sjfv u16 max_frame_size; 406217593Sjfv u16 num_segs; 407205720Sjfv u32 link_speed; 408205720Sjfv bool link_up; 409205720Sjfv u32 linkvec; 410171384Sjfv 411185352Sjfv /* Mbuf cluster size */ 412205720Sjfv u32 rx_mbuf_sz; 413171384Sjfv 414190873Sjfv /* Support for pluggable optics */ 415205720Sjfv bool sfp_probe; 416205720Sjfv struct task link_task; /* Link tasklet */ 417205720Sjfv struct task mod_task; /* SFP tasklet */ 418205720Sjfv struct task msf_task; /* Multispeed Fiber */ 419200239Sjfv#ifdef IXGBE_FDIR 420200239Sjfv int fdir_reinit; 421200239Sjfv struct task fdir_task; 422200239Sjfv#endif 423190873Sjfv struct taskqueue *tq; 424185352Sjfv 425171384Sjfv /* 426205720Sjfv ** Queues: 427205720Sjfv ** This is the irq holder, it has 428205720Sjfv ** and RX/TX pair or rings associated 429205720Sjfv ** with it. 430205720Sjfv */ 431205720Sjfv struct ix_queue *queues; 432205720Sjfv 433205720Sjfv /* 434171384Sjfv * Transmit rings: 435171384Sjfv * Allocated at run time, an array of rings. 436171384Sjfv */ 437205720Sjfv struct tx_ring *tx_rings; 438205720Sjfv int num_tx_desc; 439171384Sjfv 440171384Sjfv /* 441171384Sjfv * Receive rings: 442171384Sjfv * Allocated at run time, an array of rings. 443171384Sjfv */ 444205720Sjfv struct rx_ring *rx_rings; 445205720Sjfv int num_rx_desc; 446205720Sjfv u64 que_mask; 447205720Sjfv u32 rx_process_limit; 448171384Sjfv 449215914Sjfv /* Multicast array memory */ 450215914Sjfv u8 *mta; 451215914Sjfv 452171384Sjfv /* Misc stats maintained by the driver */ 453205720Sjfv unsigned long dropped_pkts; 454205720Sjfv unsigned long mbuf_defrag_failed; 455205720Sjfv unsigned long mbuf_header_failed; 456205720Sjfv unsigned long mbuf_packet_failed; 457205720Sjfv unsigned long no_tx_map_avail; 458205720Sjfv unsigned long no_tx_dma_setup; 459205720Sjfv unsigned long watchdog_events; 460205720Sjfv unsigned long tso_tx; 461205720Sjfv unsigned long link_irq; 462171384Sjfv 463205720Sjfv struct ixgbe_hw_stats stats; 464171384Sjfv}; 465171384Sjfv 466190873Sjfv/* Precision Time Sync (IEEE 1588) defines */ 467190873Sjfv#define ETHERTYPE_IEEE1588 0x88F7 468190873Sjfv#define PICOSECS_PER_TICK 20833 469190873Sjfv#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 470190873Sjfv#define IXGBE_ADVTXD_TSTAMP 0x00080000 471190873Sjfv 472190873Sjfv 473179055Sjfv#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 474179055Sjfv mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 475179055Sjfv#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 476200239Sjfv#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 477200239Sjfv#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 478179055Sjfv#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 479200239Sjfv#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 480200239Sjfv#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 481200239Sjfv#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 482179055Sjfv#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 483179055Sjfv#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 484179055Sjfv#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 485179055Sjfv#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 486179055Sjfv#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 487179055Sjfv 488179055Sjfv 489190873Sjfvstatic inline bool 490190873Sjfvixgbe_is_sfp(struct ixgbe_hw *hw) 491190873Sjfv{ 492190873Sjfv switch (hw->phy.type) { 493190873Sjfv case ixgbe_phy_sfp_avago: 494190873Sjfv case ixgbe_phy_sfp_ftl: 495190873Sjfv case ixgbe_phy_sfp_intel: 496190873Sjfv case ixgbe_phy_sfp_unknown: 497205720Sjfv case ixgbe_phy_sfp_passive_tyco: 498205720Sjfv case ixgbe_phy_sfp_passive_unknown: 499190873Sjfv return TRUE; 500190873Sjfv default: 501190873Sjfv return FALSE; 502190873Sjfv } 503190873Sjfv} 504190873Sjfv 505208762Sjfv/* Workaround to make 8.0 buildable */ 506217129Sjfv#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 507208762Sjfvstatic __inline int 508208762Sjfvdrbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 509208762Sjfv{ 510208762Sjfv#ifdef ALTQ 511208762Sjfv if (ALTQ_IS_ENABLED(&ifp->if_snd)) 512208762Sjfv return (1); 513208762Sjfv#endif 514208762Sjfv return (!buf_ring_empty(br)); 515208762Sjfv} 516208762Sjfv#endif 517208762Sjfv 518221041Sjfv/* 519221041Sjfv** Find the number of unrefreshed RX descriptors 520221041Sjfv*/ 521221041Sjfvstatic inline u16 522221041Sjfvixgbe_rx_unrefreshed(struct rx_ring *rxr) 523221041Sjfv{ 524221041Sjfv struct adapter *adapter = rxr->adapter; 525221041Sjfv 526221041Sjfv if (rxr->next_to_check > rxr->next_to_refresh) 527221041Sjfv return (rxr->next_to_check - rxr->next_to_refresh - 1); 528221041Sjfv else 529221041Sjfv return ((adapter->num_rx_desc + rxr->next_to_check) - 530221041Sjfv rxr->next_to_refresh - 1); 531221041Sjfv} 532221041Sjfv 533171384Sjfv#endif /* _IXGBE_H_ */ 534