iicbus_if.m revision 139749
1139749Simp#- 238774Snsouch# Copyright (c) 1998 Nicolas Souchu 338774Snsouch# All rights reserved. 438774Snsouch# 538774Snsouch# Redistribution and use in source and binary forms, with or without 638774Snsouch# modification, are permitted provided that the following conditions 738774Snsouch# are met: 838774Snsouch# 1. Redistributions of source code must retain the above copyright 938774Snsouch# notice, this list of conditions and the following disclaimer. 1038774Snsouch# 2. Redistributions in binary form must reproduce the above copyright 1138774Snsouch# notice, this list of conditions and the following disclaimer in the 1238774Snsouch# documentation and/or other materials provided with the distribution. 1338774Snsouch# 1438774Snsouch# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1538774Snsouch# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1638774Snsouch# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1738774Snsouch# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1838774Snsouch# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1938774Snsouch# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2038774Snsouch# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2138774Snsouch# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2238774Snsouch# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2338774Snsouch# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2438774Snsouch# SUCH DAMAGE. 2538774Snsouch# 2650477Speter# $FreeBSD: head/sys/dev/iicbus/iicbus_if.m 139749 2005-01-06 01:43:34Z imp $ 2738774Snsouch# 2838774Snsouch 2959093Sdfr#include <sys/bus.h> 3059093Sdfr 3141012SnsouchINTERFACE iicbus; 3238774Snsouch 3338774Snsouch# 3440782Snsouch# Interpret interrupt 3538774Snsouch# 3638774SnsouchMETHOD int intr { 3738774Snsouch device_t dev; 3838774Snsouch int event; 3938774Snsouch char *buf; 4038774Snsouch}; 4138774Snsouch 4238774Snsouch# 4340782Snsouch# iicbus callback 4440782Snsouch# 4540782SnsouchMETHOD int callback { 4640782Snsouch device_t dev; 4740782Snsouch int index; 4840782Snsouch caddr_t data; 4940782Snsouch}; 5040782Snsouch 5140782Snsouch# 5238774Snsouch# Send REPEATED_START condition 5338774Snsouch# 5438774SnsouchMETHOD int repeated_start { 5538774Snsouch device_t dev; 5638774Snsouch u_char slave; 5740782Snsouch int timeout; 5838774Snsouch}; 5938774Snsouch 6038774Snsouch# 6138774Snsouch# Send START condition 6238774Snsouch# 6338774SnsouchMETHOD int start { 6438774Snsouch device_t dev; 6538774Snsouch u_char slave; 6640782Snsouch int timeout; 6738774Snsouch}; 6838774Snsouch 6938774Snsouch# 7038774Snsouch# Send STOP condition 7138774Snsouch# 7238774SnsouchMETHOD int stop { 7338774Snsouch device_t dev; 7438774Snsouch}; 7538774Snsouch 7638774Snsouch# 7738774Snsouch# Read from I2C bus 7838774Snsouch# 7938774SnsouchMETHOD int read { 8038774Snsouch device_t dev; 8138774Snsouch char *buf; 8238774Snsouch int len; 8338774Snsouch int *bytes; 8440782Snsouch int last; 8540782Snsouch int delay; 8638774Snsouch}; 8738774Snsouch 8838774Snsouch# 8938774Snsouch# Write to the I2C bus 9038774Snsouch# 9138774SnsouchMETHOD int write { 9238774Snsouch device_t dev; 9338774Snsouch char *buf; 9438774Snsouch int len; 9538774Snsouch int *bytes; 9640782Snsouch int timeout; 9738774Snsouch}; 9838774Snsouch 9938774Snsouch# 10038774Snsouch# Reset I2C bus 10138774Snsouch# 10238774SnsouchMETHOD int reset { 10338774Snsouch device_t dev; 10438774Snsouch u_char speed; 10540782Snsouch u_char addr; 10640782Snsouch u_char *oldaddr; 10738774Snsouch}; 108