ichwd.c revision 155785
1/*- 2 * Copyright (c) 2004 Texas A&M University 3 * All rights reserved. 4 * 5 * Developer: Wm. Daryl Hawkins 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29/* 30 * Intel ICH Watchdog Timer (WDT) driver 31 * 32 * Originally developed by Wm. Daryl Hawkins of Texas A&M 33 * Heavily modified by <des@FreeBSD.org> 34 * 35 * This is a tricky one. The ICH WDT can't be treated as a regular PCI 36 * device as it's actually an integrated function of the ICH LPC interface 37 * bridge. Detection is also awkward, because we can only infer the 38 * presence of the watchdog timer from the fact that the machine has an 39 * ICH chipset, or, on ACPI 2.x systems, by the presence of the 'WDDT' 40 * ACPI table (although this driver does not support the ACPI detection 41 * method). 42 * 43 * There is one slight problem on non-ACPI or ACPI 1.x systems: we have no 44 * way of knowing if the WDT is permanently disabled (either by the BIOS 45 * or in hardware). 46 * 47 * The WDT is programmed through I/O registers in the ACPI I/O space. 48 * Intel swears it's always at offset 0x60, so we use that. 49 * 50 * For details about the ICH WDT, see Intel Application Note AP-725 51 * (document no. 292273-001). The WDT is also described in the individual 52 * chipset datasheets, e.g. Intel82801EB ICH5 / 82801ER ICH5R Datasheet 53 * (document no. 252516-001) sections 9.10 and 9.11. 54 */ 55 56#include <sys/cdefs.h> 57__FBSDID("$FreeBSD: head/sys/dev/ichwd/ichwd.c 155785 2006-02-17 18:46:18Z ambrisko $"); 58 59#include <sys/param.h> 60#include <sys/kernel.h> 61#include <sys/module.h> 62#include <sys/systm.h> 63#include <sys/bus.h> 64#include <machine/bus.h> 65#include <sys/rman.h> 66#include <machine/resource.h> 67#include <sys/watchdog.h> 68 69#include <dev/pci/pcivar.h> 70 71#include <dev/ichwd/ichwd.h> 72 73static struct ichwd_device ichwd_devices[] = { 74 { VENDORID_INTEL, DEVICEID_82801AA, "Intel 82801AA watchdog timer" }, 75 { VENDORID_INTEL, DEVICEID_82801AB, "Intel 82801AB watchdog timer" }, 76 { VENDORID_INTEL, DEVICEID_82801BA, "Intel 82801BA watchdog timer" }, 77 { VENDORID_INTEL, DEVICEID_82801BAM, "Intel 82801BAM watchdog timer" }, 78 { VENDORID_INTEL, DEVICEID_82801CA, "Intel 82801CA watchdog timer" }, 79 { VENDORID_INTEL, DEVICEID_82801CAM, "Intel 82801CAM watchdog timer" }, 80 { VENDORID_INTEL, DEVICEID_82801DB, "Intel 82801DB watchdog timer" }, 81 { VENDORID_INTEL, DEVICEID_82801DBM, "Intel 82801DBM watchdog timer" }, 82 { VENDORID_INTEL, DEVICEID_82801E, "Intel 82801E watchdog timer" }, 83 { VENDORID_INTEL, DEVICEID_82801EBR, "Intel 82801EB/ER watchdog timer" }, 84 { VENDORID_INTEL, DEVICEID_82801FBR, "Intel 82801FB/FR watchdog timer" }, 85 { VENDORID_INTEL, DEVICEID_ICH5, "Intel ICH5 watchdog timer"}, 86 { VENDORID_INTEL, DEVICEID_6300ESB, "Intel 6300ESB watchdog timer"}, 87 { 0, 0, NULL }, 88}; 89 90static devclass_t ichwd_devclass; 91 92#define ichwd_read_tco_1(sc, off) \ 93 bus_space_read_1((sc)->tco_bst, (sc)->tco_bsh, (off)) 94#define ichwd_read_tco_2(sc, off) \ 95 bus_space_read_2((sc)->tco_bst, (sc)->tco_bsh, (off)) 96#define ichwd_read_tco_4(sc, off) \ 97 bus_space_read_4((sc)->tco_bst, (sc)->tco_bsh, (off)) 98 99#define ichwd_write_tco_1(sc, off, val) \ 100 bus_space_write_1((sc)->tco_bst, (sc)->tco_bsh, (off), (val)) 101#define ichwd_write_tco_2(sc, off, val) \ 102 bus_space_write_2((sc)->tco_bst, (sc)->tco_bsh, (off), (val)) 103#define ichwd_write_tco_4(sc, off, val) \ 104 bus_space_write_4((sc)->tco_bst, (sc)->tco_bsh, (off), (val)) 105 106#define ichwd_read_smi_4(sc, off) \ 107 bus_space_read_4((sc)->smi_bst, (sc)->smi_bsh, (off)) 108#define ichwd_write_smi_4(sc, off, val) \ 109 bus_space_write_4((sc)->smi_bst, (sc)->smi_bsh, (off), (val)) 110 111static __inline void 112ichwd_intr_enable(struct ichwd_softc *sc) 113{ 114 ichwd_write_smi_4(sc, SMI_EN, ichwd_read_smi_4(sc, SMI_EN) & ~SMI_TCO_EN); 115} 116 117static __inline void 118ichwd_intr_disable(struct ichwd_softc *sc) 119{ 120 ichwd_write_smi_4(sc, SMI_EN, ichwd_read_smi_4(sc, SMI_EN) | SMI_TCO_EN); 121} 122 123static __inline void 124ichwd_sts_reset(struct ichwd_softc *sc) 125{ 126 ichwd_write_tco_2(sc, TCO1_STS, TCO_TIMEOUT); 127 ichwd_write_tco_2(sc, TCO2_STS, TCO_BOOT_STS); 128 ichwd_write_tco_2(sc, TCO2_STS, TCO_SECOND_TO_STS); 129} 130 131static __inline void 132ichwd_tmr_enable(struct ichwd_softc *sc) 133{ 134 uint16_t cnt; 135 136 cnt = ichwd_read_tco_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE; 137 ichwd_write_tco_2(sc, TCO1_CNT, cnt & ~TCO_TMR_HALT); 138 sc->active = 1; 139 if (bootverbose) 140 device_printf(sc->device, "timer enabled\n"); 141} 142 143static __inline void 144ichwd_tmr_disable(struct ichwd_softc *sc) 145{ 146 uint16_t cnt; 147 148 cnt = ichwd_read_tco_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE; 149 ichwd_write_tco_2(sc, TCO1_CNT, cnt | TCO_TMR_HALT); 150 sc->active = 0; 151 if (bootverbose) 152 device_printf(sc->device, "timer disabled\n"); 153} 154 155static __inline void 156ichwd_tmr_reload(struct ichwd_softc *sc) 157{ 158 ichwd_write_tco_1(sc, TCO_RLD, 1); 159 if (bootverbose) 160 device_printf(sc->device, "timer reloaded\n"); 161} 162 163static __inline void 164ichwd_tmr_set(struct ichwd_softc *sc, uint8_t timeout) 165{ 166 ichwd_write_tco_1(sc, TCO_TMR, timeout); 167 sc->timeout = timeout; 168 if (bootverbose) 169 device_printf(sc->device, "timeout set to %u ticks\n", timeout); 170} 171 172/* 173 * Watchdog event handler. 174 */ 175static void 176ichwd_event(void *arg, unsigned int cmd, int *error) 177{ 178 struct ichwd_softc *sc = arg; 179 unsigned int timeout; 180 181 182 /* disable / enable */ 183 if (!(cmd & WD_ACTIVE)) { 184 if (sc->active) 185 ichwd_tmr_disable(sc); 186 *error = 0; 187 return; 188 } 189 if (!sc->active) 190 ichwd_tmr_enable(sc); 191 192 cmd &= WD_INTERVAL; 193 /* convert from power-of-to-ns to WDT ticks */ 194 if (cmd >= 64) { 195 *error = EINVAL; 196 return; 197 } 198 timeout = ((uint64_t)1 << cmd) / ICHWD_TICK; 199 if (timeout < ICHWD_MIN_TIMEOUT || timeout > ICHWD_MAX_TIMEOUT) { 200 *error = EINVAL; 201 return; 202 } 203 204 /* set new initial value */ 205 if (timeout != sc->timeout) 206 ichwd_tmr_set(sc, timeout); 207 208 /* reload */ 209 ichwd_tmr_reload(sc); 210 211 *error = 0; 212 return; 213} 214 215static unsigned int pmbase = 0; 216 217/* 218 * Look for an ICH LPC interface bridge. If one is found, register an 219 * ichwd device. There can be only one. 220 */ 221static void 222ichwd_identify(driver_t *driver, device_t parent) 223{ 224 struct ichwd_device *id; 225 device_t ich = NULL; 226 device_t dev; 227 228 /* look for an ICH LPC interface bridge */ 229 for (id = ichwd_devices; id->desc != NULL; ++id) 230 if ((ich = pci_find_device(id->vendor, id->device)) != NULL) 231 break; 232 if (ich == NULL) 233 return; 234 235 if (bootverbose) 236 printf("%s(): found ICH chipset: %s\n", __func__, id->desc); 237 238 /* get for ACPI base address */ 239 pmbase = pci_read_config(ich, ICH_PMBASE, 2) & ICH_PMBASE_MASK; 240 if (pmbase == 0) { 241 if (bootverbose) 242 printf("%s(): ICH PMBASE register is empty\n", 243 __func__); 244 return; 245 } 246 247 /* try to clear the NO_REBOOT bit */ 248 pci_write_config(ich, ICH_GEN_STA, 0x00, 1); 249 if (pci_read_config(ich, ICH_GEN_STA, 1) & ICH_GEN_STA_NO_REBOOT) { 250 if (bootverbose) 251 printf("%s(): ICH WDT present but disabled\n", 252 __func__); 253 return; 254 } 255 256 /* good, add child to bus */ 257 if ((dev = device_find_child(parent, driver->name, 0)) == NULL) 258 dev = BUS_ADD_CHILD(parent, 0, driver->name, 0); 259 260 if (dev != NULL) 261 device_set_desc_copy(dev, id->desc); 262} 263 264static int 265ichwd_probe(device_t dev) 266{ 267 (void)dev; 268 return (0); 269} 270 271static int 272ichwd_attach(device_t dev) 273{ 274 struct ichwd_softc *sc; 275 276 sc = device_get_softc(dev); 277 sc->device = dev; 278 279 if (pmbase == 0) { 280 printf("Not found\n"); 281 } 282 283 /* allocate I/O register space */ 284 sc->smi_rid = 0; 285 sc->smi_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->smi_rid, 286 pmbase + SMI_BASE, ~0ul, SMI_LEN, 287 RF_ACTIVE | RF_SHAREABLE); 288 if (sc->smi_res == NULL) { 289 device_printf(dev, "unable to reserve SMI registers\n"); 290 goto fail; 291 } 292 sc->smi_bst = rman_get_bustag(sc->smi_res); 293 sc->smi_bsh = rman_get_bushandle(sc->smi_res); 294 295 sc->tco_rid = 1; 296 sc->tco_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->tco_rid, 297 pmbase + TCO_BASE, ~0ul, TCO_LEN, 298 RF_ACTIVE | RF_SHAREABLE); 299 if (sc->tco_res == NULL) { 300 device_printf(dev, "unable to reserve TCO registers\n"); 301 goto fail; 302 } 303 sc->tco_bst = rman_get_bustag(sc->tco_res); 304 sc->tco_bsh = rman_get_bushandle(sc->tco_res); 305 /* reset the watchdog status registers */ 306 307 ichwd_sts_reset(sc); 308 309 /* make sure the WDT starts out inactive */ 310 ichwd_tmr_disable(sc); 311 312 /* register the watchdog event handler */ 313 sc->ev_tag = EVENTHANDLER_REGISTER(watchdog_list, ichwd_event, sc, 0); 314 315 /* enable watchdog timeout interrupts */ 316 ichwd_intr_enable(sc); 317 318 return (0); 319 fail: 320 sc = device_get_softc(dev); 321 if (sc->tco_res != NULL) 322 bus_release_resource(dev, SYS_RES_IOPORT, 323 sc->tco_rid, sc->tco_res); 324 if (sc->smi_res != NULL) 325 bus_release_resource(dev, SYS_RES_IOPORT, 326 sc->smi_rid, sc->smi_res); 327 return (ENXIO); 328} 329 330static int 331ichwd_detach(device_t dev) 332{ 333 struct ichwd_softc *sc; 334 335 device_printf(dev, "detaching\n"); 336 337 sc = device_get_softc(dev); 338 339 /* halt the watchdog timer */ 340 if (sc->active) 341 ichwd_tmr_disable(sc); 342 343 /* disable watchdog timeout interrupts */ 344 ichwd_intr_disable(sc); 345 346 /* deregister event handler */ 347 if (sc->ev_tag != NULL) 348 EVENTHANDLER_DEREGISTER(watchdog_list, sc->ev_tag); 349 sc->ev_tag = NULL; 350 351 /* reset the watchdog status registers */ 352 ichwd_sts_reset(sc); 353 354 /* deallocate I/O register space */ 355 bus_release_resource(dev, SYS_RES_IOPORT, sc->tco_rid, sc->tco_res); 356 bus_release_resource(dev, SYS_RES_IOPORT, sc->smi_rid, sc->smi_res); 357 358 return (0); 359} 360 361static device_method_t ichwd_methods[] = { 362 DEVMETHOD(device_identify, ichwd_identify), 363 DEVMETHOD(device_probe, ichwd_probe), 364 DEVMETHOD(device_attach, ichwd_attach), 365 DEVMETHOD(device_detach, ichwd_detach), 366 DEVMETHOD(device_shutdown, ichwd_detach), 367 {0,0} 368}; 369 370static driver_t ichwd_driver = { 371 "ichwd", 372 ichwd_methods, 373 sizeof(struct ichwd_softc), 374}; 375 376static int 377ichwd_modevent(module_t mode, int type, void *data) 378{ 379 int error = 0; 380 381 switch (type) { 382 case MOD_LOAD: 383 printf("ichwd module loaded\n"); 384 break; 385 case MOD_UNLOAD: 386 printf("ichwd module unloaded\n"); 387 break; 388 case MOD_SHUTDOWN: 389 printf("ichwd module shutting down\n"); 390 break; 391 } 392 return (error); 393} 394 395DRIVER_MODULE(ichwd, isa, ichwd_driver, ichwd_devclass, ichwd_modevent, NULL); 396