ichwd.c revision 129879 
1/*
2 * Copyright (c) 2004 Texas A&M University
3 * All rights reserved.
4 *
5 * Developer: Wm. Daryl Hawkins
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29/*
30 * Intel ICH Watchdog Timer (WDT) driver
31 *
32 * Originally developed by Wm. Daryl Hawkins of Texas A&M
33 * Heavily modified by <des@FreeBSD.org>
34 *
35 * This is a tricky one.  The ICH WDT can't be treated as a regular PCI
36 * device as it's actually an integrated function of the ICH LPC interface
37 * bridge.  Detection is also awkward, because we can only infer the
38 * presence of the watchdog timer from the fact that the machine has an
39 * ICH chipset, or, on ACPI 2.x systems, by the presence of the 'WDDT'
40 * ACPI table (although this driver does not support the ACPI detection
41 * method).
42 *
43 * There is one slight problem on non-ACPI or ACPI 1.x systems: we have no
44 * way of knowing if the WDT is permanently disabled (either by the BIOS
45 * or in hardware).
46 *
47 * The WDT is programmed through I/O registers in the ACPI I/O space.
48 * Intel swears it's always at offset 0x60, so we use that.
49 *
50 * For details about the ICH WDT, see Intel Application Note AP-725
51 * (document no. 292273-001).  The WDT is also described in the individual
52 * chipset datasheets, e.g. Intel82801EB ICH5 / 82801ER ICH5R Datasheet
53 * (document no. 252516-001) sections 9.10 and 9.11.
54 */
55
56#include <sys/cdefs.h>
57__FBSDID("$FreeBSD: head/sys/dev/ichwd/ichwd.c 129879 2004-05-30 20:08:47Z phk $");
58
59#include <sys/param.h>
60#include <sys/kernel.h>
61#include <sys/module.h>
62#include <sys/systm.h>
63#include <sys/bus.h>
64#include <machine/bus.h>
65#include <sys/rman.h>
66#include <machine/resource.h>
67#include <sys/watchdog.h>
68
69#include <dev/pci/pcivar.h>
70
71#include <dev/ichwd/ichwd.h>
72
73static struct ichwd_device ichwd_devices[] = {
74	{ VENDORID_INTEL, DEVICEID_82801AA, "Intel 82801AA watchdog timer" },
75	{ VENDORID_INTEL, DEVICEID_82801AB, "Intel 82801AB watchdog timer" },
76	{ VENDORID_INTEL, DEVICEID_82801BA, "Intel 82801BA watchdog timer" },
77	{ VENDORID_INTEL, DEVICEID_82801BAM, "Intel 82801BAM watchdog timer" },
78	{ VENDORID_INTEL, DEVICEID_82801CA, "Intel 82801CA watchdog timer" },
79	{ VENDORID_INTEL, DEVICEID_82801CAM, "Intel 82801CAM watchdog timer" },
80	{ VENDORID_INTEL, DEVICEID_82801DB, "Intel 82801DB watchdog timer" },
81	{ VENDORID_INTEL, DEVICEID_82801DBM, "Intel 82801DBM watchdog timer" },
82	{ VENDORID_INTEL, DEVICEID_82801E, "Intel 82801E watchdog timer" },
83	{ VENDORID_INTEL, DEVICEID_82801EBR, "Intel 82801EB/ER watchdog timer" },
84	{ 0, 0, NULL },
85};
86
87static devclass_t ichwd_devclass;
88
89#define ichwd_read_1(sc, off) \
90	bus_space_read_1((sc)->smi_bst, (sc)->smi_bsh, (off))
91#define ichwd_read_2(sc, off) \
92	bus_space_read_2((sc)->smi_bst, (sc)->smi_bsh, (off))
93#define ichwd_read_4(sc, off) \
94	bus_space_read_4((sc)->smi_bst, (sc)->smi_bsh, (off))
95
96#define ichwd_write_1(sc, off, val) \
97	bus_space_write_1((sc)->smi_bst, (sc)->smi_bsh, (off), (val))
98#define ichwd_write_2(sc, off, val) \
99	bus_space_write_2((sc)->smi_bst, (sc)->smi_bsh, (off), (val))
100#define ichwd_write_4(sc, off, val) \
101	bus_space_write_4((sc)->smi_bst, (sc)->smi_bsh, (off), (val))
102
103static __inline void
104ichwd_intr_enable(struct ichwd_softc *sc)
105{
106	ichwd_write_4(sc, SMI_EN, ichwd_read_4(sc, SMI_EN) | SMI_TCO_EN);
107}
108
109static __inline void
110ichwd_intr_disable(struct ichwd_softc *sc)
111{
112	ichwd_write_4(sc, SMI_EN, ichwd_read_4(sc, SMI_EN) & ~SMI_TCO_EN);
113}
114
115static __inline void
116ichwd_sts_reset(struct ichwd_softc *sc)
117{
118	ichwd_write_2(sc, TCO1_STS, TCO_TIMEOUT);
119	ichwd_write_2(sc, TCO2_STS, TCO_BOOT_STS);
120	ichwd_write_2(sc, TCO2_STS, TCO_SECOND_TO_STS);
121}
122
123static __inline void
124ichwd_tmr_enable(struct ichwd_softc *sc)
125{
126	uint16_t cnt;
127
128	cnt = ichwd_read_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE;
129	ichwd_write_2(sc, TCO1_CNT, cnt & ~TCO_TMR_HALT);
130	sc->active = 1;
131	if (bootverbose)
132		device_printf(sc->device, "timer enabled\n");
133}
134
135static __inline void
136ichwd_tmr_disable(struct ichwd_softc *sc)
137{
138	uint16_t cnt;
139
140	cnt = ichwd_read_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE;
141	ichwd_write_2(sc, TCO1_CNT, cnt | TCO_TMR_HALT);
142	sc->active = 0;
143	if (bootverbose)
144		device_printf(sc->device, "timer disabled\n");
145}
146
147static __inline void
148ichwd_tmr_reload(struct ichwd_softc *sc)
149{
150	ichwd_write_1(sc, TCO_RLD, 1);
151	if (bootverbose)
152		device_printf(sc->device, "timer reloaded\n");
153}
154
155static __inline void
156ichwd_tmr_set(struct ichwd_softc *sc, uint8_t timeout)
157{
158	ichwd_write_1(sc, TCO_TMR, timeout);
159	sc->timeout = timeout;
160	if (bootverbose)
161		device_printf(sc->device, "timeout set to %u ticks\n", timeout);
162}
163
164/*
165 * Watchdog event handler.
166 */
167static void
168ichwd_event(void *arg, unsigned int cmd, int *error)
169{
170	struct ichwd_softc *sc = arg;
171	unsigned int timeout;
172
173	cmd &= WD_INTERVAL;
174
175	/* disable / enable */
176	if (cmd == 0) {
177		if (sc->active)
178			ichwd_tmr_disable(sc);
179		*error = 0;
180		return;
181	}
182	if (!sc->active)
183		ichwd_tmr_enable(sc);
184
185	/* convert from power-of-to-ns to WDT ticks */
186	if (cmd >= 64) {
187		*error = EINVAL;
188		return;
189	}
190	timeout = ((uint64_t)1 << cmd) / ICHWD_TICK;
191	if (timeout < ICHWD_MIN_TIMEOUT || timeout > ICHWD_MAX_TIMEOUT) {
192		*error = EINVAL;
193		return;
194	}
195
196	/* set new initial value */
197	if (timeout != sc->timeout)
198		ichwd_tmr_set(sc, timeout);
199
200	/* reload */
201	ichwd_tmr_reload(sc);
202
203	*error = 0;
204	return;
205}
206
207static unsigned long pmbase;
208
209/*
210 * Look for an ICH LPC interface bridge.  If one is found, register an
211 * ichwd device.  There can be only one.
212 */
213static void
214ichwd_identify(driver_t *driver, device_t parent)
215{
216	struct ichwd_device *id;
217	device_t ich = NULL;
218	device_t dev;
219
220	/* look for an ICH LPC interface bridge */
221	for (id = ichwd_devices; id->desc != NULL; ++id)
222		if ((ich = pci_find_device(id->vendor, id->device)) != NULL)
223			break;
224	if (ich == NULL)
225		return;
226
227	if (bootverbose)
228		printf("%s(): found ICH chipset: %s\n", __func__, id->desc);
229
230	/* get for ACPI base address */
231	pmbase = pci_read_config(ich, ICH_PMBASE, 2) & ICH_PMBASE_MASK;
232	if (pmbase == 0) {
233		if (bootverbose)
234			printf("%s(): ICH PMBASE register is empty\n",
235			    __func__);
236		return;
237	}
238
239	/* try to clear the NO_REBOOT bit */
240	pci_write_config(ich, ICH_GEN_STA, 0x00, 1);
241	if (pci_read_config(ich, ICH_GEN_STA, 1) & ICH_GEN_STA_NO_REBOOT) {
242		if (bootverbose)
243			printf("%s(): ICH WDT present but disabled\n",
244			    __func__);
245		return;
246	}
247
248	/* good, add child to bus */
249	if ((dev = device_find_child(parent, driver->name, 0)) == NULL)
250		dev = BUS_ADD_CHILD(parent, 0, driver->name, -1);
251	device_set_desc_copy(dev, id->desc);
252}
253
254static int
255ichwd_probe(device_t dev)
256{
257	(void)dev;
258	return (0);
259}
260
261static int
262ichwd_attach(device_t dev)
263{
264	struct ichwd_softc *sc;
265
266	sc = device_get_softc(dev);
267	sc->device = dev;
268
269	/* allocate I/O register space */
270	sc->smi_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->smi_rid,
271	    pmbase + SMI_BASE, pmbase + SMI_BASE + SMI_LEN - 1, SMI_LEN,
272	    RF_ACTIVE|RF_SHAREABLE);
273	if (sc->smi_res == NULL) {
274		device_printf(dev, "unable to reserve SMI registers\n");
275		goto fail;
276	}
277	sc->smi_bst = rman_get_bustag(sc->smi_res);
278	sc->smi_bsh = rman_get_bushandle(sc->smi_res);
279	sc->tco_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->tco_rid,
280	    pmbase + TCO_BASE, pmbase + TCO_BASE + TCO_LEN - 1, TCO_LEN,
281	    RF_ACTIVE|RF_SHAREABLE);
282	if (sc->tco_res == NULL) {
283		device_printf(dev, "unable to reserve TCO registers\n");
284		goto fail;
285	}
286	sc->tco_bst = rman_get_bustag(sc->tco_res);
287	sc->tco_bsh = rman_get_bushandle(sc->tco_res);
288
289	/* reset the watchdog status registers */
290	ichwd_sts_reset(sc);
291
292	/* make sure the WDT starts out inactive */
293	ichwd_tmr_disable(sc);
294
295	/* register the watchdog event handler */
296	sc->ev_tag = EVENTHANDLER_REGISTER(watchdog_list, ichwd_event, sc, 0);
297
298	/* enable watchdog timeout interrupts */
299	ichwd_intr_enable(sc);
300
301	return (0);
302 fail:
303	sc = device_get_softc(dev);
304	if (sc->tco_res != NULL)
305		bus_release_resource(dev, SYS_RES_IOPORT,
306		    sc->tco_rid, sc->tco_res);
307	if (sc->smi_res != NULL)
308		bus_release_resource(dev, SYS_RES_IOPORT,
309		    sc->smi_rid, sc->smi_res);
310	return (ENXIO);
311}
312
313static int
314ichwd_detach(device_t dev)
315{
316	struct ichwd_softc *sc;
317
318	device_printf(dev, "detaching\n");
319
320	sc = device_get_softc(dev);
321
322	/* halt the watchdog timer */
323	if (sc->active)
324		ichwd_tmr_disable(sc);
325
326	/* disable watchdog timeout interrupts */
327	ichwd_intr_disable(sc);
328
329	/* deregister event handler */
330	if (sc->ev_tag != NULL)
331		EVENTHANDLER_DEREGISTER(watchdog_list, sc->ev_tag);
332	sc->ev_tag = NULL;
333
334	/* reset the watchdog status registers */
335	ichwd_sts_reset(sc);
336
337	/* deallocate I/O register space */
338	bus_release_resource(dev, SYS_RES_IOPORT, sc->tco_rid, sc->tco_res);
339	bus_release_resource(dev, SYS_RES_IOPORT, sc->smi_rid, sc->smi_res);
340
341	return (0);
342}
343
344static device_method_t ichwd_methods[] = {
345	DEVMETHOD(device_identify, ichwd_identify),
346	DEVMETHOD(device_probe,	ichwd_probe),
347	DEVMETHOD(device_attach, ichwd_attach),
348	DEVMETHOD(device_detach, ichwd_detach),
349	{0,0}
350};
351
352static driver_t ichwd_driver = {
353	"ichwd",
354	ichwd_methods,
355	sizeof(struct ichwd_softc),
356};
357
358static int
359ichwd_modevent(module_t mode, int type, void *data)
360{
361	int error = 0;
362
363	switch (type) {
364	case MOD_LOAD:
365		printf("ichwd module loaded\n");
366		break;
367	case MOD_UNLOAD:
368		printf("ichwd module unloaded\n");
369		break;
370	case MOD_SHUTDOWN:
371		printf("ichwd module shutting down\n");
372		break;
373	}
374	return (error);
375}
376
377DRIVER_MODULE(ichwd, nexus, ichwd_driver, ichwd_devclass, ichwd_modevent, NULL);
378/*
379 * this doesn't seem to work, though I can't figure out why.
380 * currently not a big issue since watchdog is standard.
381MODULE_DEPEND(ichwd, watchdog, 1, 1, 1);
382 */
383