ns16550.h revision 120119
14Srgrimes/*- 24Srgrimes * Copyright (c) 1991 The Regents of the University of California. 34Srgrimes * All rights reserved. 44Srgrimes * 54Srgrimes * Redistribution and use in source and binary forms, with or without 64Srgrimes * modification, are permitted provided that the following conditions 74Srgrimes * are met: 84Srgrimes * 1. Redistributions of source code must retain the above copyright 94Srgrimes * notice, this list of conditions and the following disclaimer. 104Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 114Srgrimes * notice, this list of conditions and the following disclaimer in the 124Srgrimes * documentation and/or other materials provided with the distribution. 134Srgrimes * 3. All advertising materials mentioning features or use of this software 144Srgrimes * must display the following acknowledgement: 154Srgrimes * This product includes software developed by the University of 164Srgrimes * California, Berkeley and its contributors. 174Srgrimes * 4. Neither the name of the University nor the names of its contributors 184Srgrimes * may be used to endorse or promote products derived from this software 194Srgrimes * without specific prior written permission. 204Srgrimes * 214Srgrimes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 224Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 234Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 244Srgrimes * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 254Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 264Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 274Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 284Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 294Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 304Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 314Srgrimes * SUCH DAMAGE. 324Srgrimes * 33619Srgrimes * from: @(#)ns16550.h 7.1 (Berkeley) 5/9/91 3450477Speter * $FreeBSD: head/sys/dev/ic/ns16550.h 120119 2003-09-16 11:54:29Z bde $ 354Srgrimes */ 364Srgrimes 374Srgrimes/* 38120119Sbde * NS8250... UART registers. 394Srgrimes */ 40120119Sbde 41120119Sbde/* 8250 registers #[0-6]. */ 42120119Sbde 434Srgrimes#define com_data 0 /* data register (R/W) */ 44120116Sbde 45120119Sbde#define com_ier 1 /* interrupt enable register (W) */ 46120116Sbde#define IER_ERXRDY 0x1 47120116Sbde#define IER_ETXRDY 0x2 48120116Sbde#define IER_ERLS 0x4 49120116Sbde#define IER_EMSC 0x8 50120116Sbde 51120119Sbde#define com_iir 2 /* interrupt identification register (R) */ 52120116Sbde#define IIR_IMASK 0xf 53120116Sbde#define IIR_RXTOUT 0xc 54120116Sbde#define IIR_RLS 0x6 55120116Sbde#define IIR_RXRDY 0x4 56120116Sbde#define IIR_TXRDY 0x2 57120116Sbde#define IIR_NOPEND 0x1 58120116Sbde#define IIR_MLSC 0x0 59120116Sbde#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */ 60120116Sbde 61120119Sbde#define com_lctl 3 /* line control register (R/W) */ 62120119Sbde#define com_cfcr 3 /* character format control register (R/W) */ 63120116Sbde#define CFCR_DLAB 0x80 64120116Sbde#define CFCR_SBREAK 0x40 65120116Sbde#define CFCR_PZERO 0x30 66120116Sbde#define CFCR_PONE 0x20 67120116Sbde#define CFCR_PEVEN 0x10 68120116Sbde#define CFCR_PODD 0x00 69120116Sbde#define CFCR_PENAB 0x08 70120116Sbde#define CFCR_STOPB 0x04 71120116Sbde#define CFCR_8BITS 0x03 72120116Sbde#define CFCR_7BITS 0x02 73120116Sbde#define CFCR_6BITS 0x01 74120116Sbde#define CFCR_5BITS 0x00 75120119Sbde#define CFCR_EFR_ENABLE 0xbf /* magic to enable EFR on 16650 up */ 76120116Sbde 77120119Sbde#define com_mcr 4 /* modem control register (R/W) */ 78120119Sbde#define MCR_PRESCALE 0x80 /* only available on 16650 up */ 79120116Sbde#define MCR_LOOPBACK 0x10 80120116Sbde#define MCR_IENABLE 0x08 81120116Sbde#define MCR_DRS 0x04 82120116Sbde#define MCR_RTS 0x02 83120116Sbde#define MCR_DTR 0x01 84120116Sbde 85120119Sbde#define com_lsr 5 /* line status register (R/W) */ 86120116Sbde#define LSR_RCV_FIFO 0x80 87120116Sbde#define LSR_TSRE 0x40 88120116Sbde#define LSR_TXRDY 0x20 89120116Sbde#define LSR_BI 0x10 90120116Sbde#define LSR_FE 0x08 91120116Sbde#define LSR_PE 0x04 92120116Sbde#define LSR_OE 0x02 93120116Sbde#define LSR_RXRDY 0x01 94120116Sbde#define LSR_RCV_MASK 0x1f 95120116Sbde 96120119Sbde#define com_msr 6 /* modem status register (R/W) */ 97120116Sbde#define MSR_DCD 0x80 98120116Sbde#define MSR_RI 0x40 99120116Sbde#define MSR_DSR 0x20 100120116Sbde#define MSR_CTS 0x10 101120116Sbde#define MSR_DDCD 0x08 102120116Sbde#define MSR_TERI 0x04 103120116Sbde#define MSR_DDSR 0x02 104120116Sbde#define MSR_DCTS 0x01 105120116Sbde 106120119Sbde/* 8250 multiplexed registers #[0-1]. Access enabled by LCR[7]. */ 107120119Sbde#define com_dlbl 0 /* divisor latch low (W) */ 108120119Sbde#define com_dlbh 1 /* divisor latch high (W) */ 109120116Sbde 110120119Sbde/* 16450 register #7. Not multiplexed. */ 111120119Sbde#define com_scr 7 /* scratch register (R/W) */ 112120119Sbde 113120119Sbde/* 16550 register #2. Not multiplexed. */ 114120119Sbde#define com_fifo 2 /* FIFO control register (W) */ 115120119Sbde#define FIFO_ENABLE 0x01 116120119Sbde#define FIFO_RCV_RST 0x02 117120119Sbde#define FIFO_XMT_RST 0x04 118120119Sbde#define FIFO_DMA_MODE 0x08 119120119Sbde#define FIFO_RX_LOW 0x00 120120119Sbde#define FIFO_RX_MEDL 0x40 121120119Sbde#define FIFO_RX_MEDH 0x80 122120119Sbde#define FIFO_RX_HIGH 0xc0 123120119Sbde 124120119Sbde/* 16650 registers #2,[4-7]. Access enabled by LCR_EFR_ENABLE. */ 125120119Sbde 126120119Sbde#define com_efr com_fifo /* enhanced feature register (R/W) */ 127120119Sbde#define EFR_EFE 0x10 /* enhanced functions enable */ 128120119Sbde 129120116Sbde#ifdef PC98 130120116Sbde/* Hardware extension mode register for RSB-2000/3000. */ 131120116Sbde#define com_emr com_msr 132120116Sbde#define EMR_EXBUFF 0x04 133120116Sbde#define EMR_CTSFLW 0x08 134120116Sbde#define EMR_DSRFLW 0x10 135120116Sbde#define EMR_RTSFLW 0x20 136120116Sbde#define EMR_DTRFLW 0x40 137120116Sbde#define EMR_EFMODE 0x80 138120116Sbde#endif 139