1147191Sjkoshy/*- 2147191Sjkoshy * Copyright (c) 2005, Joseph Koshy 3147191Sjkoshy * All rights reserved. 4147191Sjkoshy * 5147191Sjkoshy * Redistribution and use in source and binary forms, with or without 6147191Sjkoshy * modification, are permitted provided that the following conditions 7147191Sjkoshy * are met: 8147191Sjkoshy * 1. Redistributions of source code must retain the above copyright 9147191Sjkoshy * notice, this list of conditions and the following disclaimer. 10147191Sjkoshy * 2. Redistributions in binary form must reproduce the above copyright 11147191Sjkoshy * notice, this list of conditions and the following disclaimer in the 12147191Sjkoshy * documentation and/or other materials provided with the distribution. 13147191Sjkoshy * 14147191Sjkoshy * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15147191Sjkoshy * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16147191Sjkoshy * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17147191Sjkoshy * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18147191Sjkoshy * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19147191Sjkoshy * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20147191Sjkoshy * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21147191Sjkoshy * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22147191Sjkoshy * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23147191Sjkoshy * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24147191Sjkoshy * SUCH DAMAGE. 25147191Sjkoshy * 26147191Sjkoshy * $FreeBSD: releng/10.2/sys/dev/hwpmc/hwpmc_amd.h 184802 2008-11-09 17:37:54Z jkoshy $ 27147191Sjkoshy */ 28147191Sjkoshy 29147191Sjkoshy/* Machine dependent interfaces */ 30147191Sjkoshy 31147191Sjkoshy#ifndef _DEV_HWPMC_AMD_H_ 32147191Sjkoshy#define _DEV_HWPMC_AMD_H_ 1 33147191Sjkoshy 34147191Sjkoshy/* AMD K7 and K8 PMCs */ 35147191Sjkoshy 36147191Sjkoshy#define AMD_PMC_EVSEL_0 0xC0010000 37147191Sjkoshy#define AMD_PMC_EVSEL_1 0xC0010001 38147191Sjkoshy#define AMD_PMC_EVSEL_2 0xC0010002 39147191Sjkoshy#define AMD_PMC_EVSEL_3 0xC0010003 40147191Sjkoshy 41147191Sjkoshy#define AMD_PMC_PERFCTR_0 0xC0010004 42147191Sjkoshy#define AMD_PMC_PERFCTR_1 0xC0010005 43147191Sjkoshy#define AMD_PMC_PERFCTR_2 0xC0010006 44147191Sjkoshy#define AMD_PMC_PERFCTR_3 0xC0010007 45147191Sjkoshy 46147191Sjkoshy 47184802Sjkoshy#define AMD_NPMCS 4 48147191Sjkoshy 49147191Sjkoshy#define AMD_PMC_COUNTERMASK 0xFF000000 50147191Sjkoshy#define AMD_PMC_TO_COUNTER(x) (((x) << 24) & AMD_PMC_COUNTERMASK) 51147191Sjkoshy#define AMD_PMC_INVERT (1 << 23) 52147191Sjkoshy#define AMD_PMC_ENABLE (1 << 22) 53147191Sjkoshy#define AMD_PMC_INT (1 << 20) 54147191Sjkoshy#define AMD_PMC_PC (1 << 19) 55147191Sjkoshy#define AMD_PMC_EDGE (1 << 18) 56147191Sjkoshy#define AMD_PMC_OS (1 << 17) 57147191Sjkoshy#define AMD_PMC_USR (1 << 16) 58147191Sjkoshy 59147191Sjkoshy#define AMD_PMC_UNITMASK_M 0x10 60147191Sjkoshy#define AMD_PMC_UNITMASK_O 0x08 61147191Sjkoshy#define AMD_PMC_UNITMASK_E 0x04 62147191Sjkoshy#define AMD_PMC_UNITMASK_S 0x02 63147191Sjkoshy#define AMD_PMC_UNITMASK_I 0x01 64147191Sjkoshy#define AMD_PMC_UNITMASK_MOESI 0x1F 65147191Sjkoshy 66147191Sjkoshy#define AMD_PMC_UNITMASK 0xFF00 67147191Sjkoshy#define AMD_PMC_EVENTMASK 0x00FF 68147191Sjkoshy 69147191Sjkoshy#define AMD_PMC_TO_UNITMASK(x) (((x) << 8) & AMD_PMC_UNITMASK) 70147191Sjkoshy#define AMD_PMC_TO_EVENTMASK(x) ((x) & 0xFF) 71147191Sjkoshy#define AMD_VALID_BITS (AMD_PMC_COUNTERMASK | AMD_PMC_INVERT | \ 72147191Sjkoshy AMD_PMC_ENABLE | AMD_PMC_INT | AMD_PMC_PC | AMD_PMC_EDGE | \ 73147191Sjkoshy AMD_PMC_OS | AMD_PMC_USR | AMD_PMC_UNITMASK | AMD_PMC_EVENTMASK) 74147191Sjkoshy 75147191Sjkoshy#define AMD_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | \ 76147191Sjkoshy PMC_CAP_SYSTEM | PMC_CAP_EDGE | PMC_CAP_THRESHOLD | \ 77147191Sjkoshy PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INVERT | PMC_CAP_QUALIFIER) 78147191Sjkoshy 79147191Sjkoshy#define AMD_PMC_IS_STOPPED(evsel) ((rdmsr((evsel)) & AMD_PMC_ENABLE) == 0) 80147191Sjkoshy#define AMD_PMC_HAS_OVERFLOWED(pmc) ((rdpmc(pmc) & (1ULL << 47)) == 0) 81147191Sjkoshy 82147191Sjkoshy#define AMD_RELOAD_COUNT_TO_PERFCTR_VALUE(V) (-(V)) 83147191Sjkoshy#define AMD_PERFCTR_VALUE_TO_RELOAD_COUNT(P) (-(P)) 84147191Sjkoshy 85147191Sjkoshystruct pmc_md_amd_op_pmcallocate { 86147191Sjkoshy uint32_t pm_amd_config; 87147191Sjkoshy}; 88147191Sjkoshy 89147191Sjkoshy#ifdef _KERNEL 90147191Sjkoshy 91147191Sjkoshy/* MD extension for 'struct pmc' */ 92147191Sjkoshystruct pmc_md_amd_pmc { 93147191Sjkoshy uint32_t pm_amd_evsel; 94147191Sjkoshy}; 95147191Sjkoshy 96147191Sjkoshy#endif /* _KERNEL */ 97147191Sjkoshy#endif /* _DEV_HWPMC_AMD_H_ */ 98