fdt_powerpc.c revision 209906
1/*- 2 * Copyright (c) 2009-2010 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * This software was developed by Semihalf under sponsorship from 6 * the FreeBSD Foundation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD: head/sys/dev/fdt/fdt_powerpc.c 209906 2010-07-11 20:49:36Z raj $"); 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/kernel.h> 36#include <sys/module.h> 37#include <sys/bus.h> 38 39#include <machine/intr_machdep.h> 40 41#include <dev/ofw/ofw_bus.h> 42#include <dev/ofw/ofw_bus_subr.h> 43#include <dev/ofw/openfirm.h> 44 45#include "ofw_bus_if.h" 46#include "fdt_common.h" 47 48static void 49fdt_fixup_busfreq(phandle_t root) 50{ 51 phandle_t sb, cpus, child; 52 pcell_t freq; 53 54 /* 55 * Do a strict check so as to skip non-SOC nodes, which also claim 56 * simple-bus compatibility such as eLBC etc. 57 */ 58 if ((sb = fdt_find_compatible(root, "simple-bus", 1)) == 0) 59 return; 60 61 /* 62 * This fixup uses /cpus/ bus-frequency prop value to set simple-bus 63 * bus-frequency property. 64 */ 65 if ((cpus = OF_finddevice("/cpus")) == 0) 66 return; 67 68 if ((child = OF_child(cpus)) == 0) 69 return; 70 71 if (OF_getprop(child, "bus-frequency", (void *)&freq, 72 sizeof(freq)) <= 0) 73 return; 74 75 OF_setprop(sb, "bus-frequency", (void *)&freq, sizeof(freq)); 76} 77 78struct fdt_fixup_entry fdt_fixup_table[] = { 79 { "fsl,MPC8572DS", &fdt_fixup_busfreq }, 80 { "MPC8555CDS", &fdt_fixup_busfreq }, 81 { NULL, NULL } 82}; 83 84static int 85fdt_pic_decode_iic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, 86 int *pol) 87{ 88 if (!fdt_is_compatible(node, "chrp,iic")) 89 return (ENXIO); 90 91 *interrupt = intr[0]; 92 93 switch (intr[1]) { 94 case 0: 95 /* Active L level */ 96 *trig = INTR_TRIGGER_LEVEL; 97 *pol = INTR_POLARITY_LOW; 98 break; 99 case 1: 100 /* Active H level */ 101 *trig = INTR_TRIGGER_LEVEL; 102 *pol = INTR_POLARITY_HIGH; 103 break; 104 case 2: 105 /* H to L edge */ 106 *trig = INTR_TRIGGER_EDGE; 107 *pol = INTR_POLARITY_LOW; 108 break; 109 case 3: 110 /* L to H edge */ 111 *trig = INTR_TRIGGER_EDGE; 112 *pol = INTR_POLARITY_HIGH; 113 break; 114 default: 115 *trig = INTR_TRIGGER_CONFORM; 116 *pol = INTR_POLARITY_CONFORM; 117 } 118 return (0); 119} 120 121static int 122fdt_pic_decode_openpic(phandle_t node, pcell_t *intr, int *interrupt, 123 int *trig, int *pol) 124{ 125 126 if (!fdt_is_compatible(node, "chrp,open-pic")) 127 return (ENXIO); 128 129 /* 130 * XXX The interrupt number read out from the MPC85XX device tree is 131 * already offset by 16 to reflect the 'internal' IRQ range shift on 132 * the OpenPIC. 133 */ 134 *interrupt = intr[0]; 135 136 switch (intr[1]) { 137 case 0: 138 /* L to H edge */ 139 *trig = INTR_TRIGGER_EDGE; 140 *pol = INTR_POLARITY_HIGH; 141 break; 142 case 1: 143 /* Active L level */ 144 *trig = INTR_TRIGGER_LEVEL; 145 *pol = INTR_POLARITY_LOW; 146 break; 147 case 2: 148 /* Active H level */ 149 *trig = INTR_TRIGGER_LEVEL; 150 *pol = INTR_POLARITY_HIGH; 151 break; 152 case 3: 153 /* H to L edge */ 154 *trig = INTR_TRIGGER_EDGE; 155 *pol = INTR_POLARITY_LOW; 156 break; 157 default: 158 *trig = INTR_TRIGGER_CONFORM; 159 *pol = INTR_POLARITY_CONFORM; 160 } 161 return (0); 162} 163 164fdt_pic_decode_t fdt_pic_table[] = { 165 &fdt_pic_decode_iic, 166 &fdt_pic_decode_openpic, 167 NULL 168}; 169