if_ed_pccard.c revision 190805
1/*- 2 * Copyright (c) 2005, M. Warner Losh 3 * Copyright (c) 1995, David Greenman 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 190805 2009-04-07 15:44:50Z imp $ 29 */ 30 31/* 32 * Notes for adding media support. Each chipset is somewhat different 33 * from the others. Linux has a table of OIDs that it uses to see what 34 * supports the misc register of the NS83903. But a sampling of datasheets 35 * I could dig up on cards I own paints a different picture. 36 * 37 * Chipset specific details: 38 * NS 83903/902A paired 39 * ccr base 0x1020 40 * id register at 0x1000: 7-3 = 0, 2-0 = 1. 41 * (maybe this test is too week) 42 * misc register at 0x018: 43 * 6 WAIT_TOUTENABLE enable watchdog timeout 44 * 3 AUI/TPI 1 AUX, 0 TPI 45 * 2 loopback 46 * 1 gdlink (tpi mode only) 1 tp good, 0 tp bad 47 * 0 0-no mam, 1 mam connected 48 * 49 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II 50 * and the NEC PC9801N-J12 ccr base 0x2000! 51 * 52 * winbond 289c926 53 * ccr base 0xfd0 54 * cfb (am 0xff2): 55 * 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ) 56 * 2 LNKEN 0 - enable link and auto switch, 1 disable 57 * 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0 58 * sr (am 0xff4) 59 * 88 00 88 00 88 00, etc 60 * 61 * TMI tc3299a (cr PHY01 == 0) 62 * ccr base 0x3f8 63 * cra (io 0xa) 64 * crb (io 0xb) 65 * 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI 66 * 2 GDLINK 1 disable checking of link 67 * 6 LINK 0 bad link, 1 good link 68 * 69 * EN5017A, EN5020 no data, but very popular 70 * Other chips? 71 * NetBSD supports RTL8019, but none have surfaced that I can see 72 */ 73 74#include <sys/param.h> 75#include <sys/systm.h> 76#include <sys/socket.h> 77#include <sys/kernel.h> 78#include <sys/conf.h> 79#include <sys/uio.h> 80 81#include <sys/module.h> 82#include <sys/bus.h> 83#include <machine/bus.h> 84#include <sys/rman.h> 85#include <machine/resource.h> 86 87#include <net/ethernet.h> 88#include <net/if.h> 89#include <net/if_arp.h> 90#include <net/if_mib.h> 91#include <net/if_media.h> 92 93#include <dev/ed/if_edreg.h> 94#include <dev/ed/if_edvar.h> 95#include <dev/ed/ax88x90reg.h> 96#include <dev/ed/dl100xxreg.h> 97#include <dev/ed/tc5299jreg.h> 98#include <dev/pccard/pccardvar.h> 99#include <dev/pccard/pccardreg.h> 100#include <dev/pccard/pccard_cis.h> 101#include <dev/mii/mii.h> 102#include <dev/mii/miivar.h> 103 104#include "card_if.h" 105/* "device miibus" required. See GENERIC if you get errors here. */ 106#include "miibus_if.h" 107#include "pccarddevs.h" 108 109/* 110 * NE-2000 based PC Cards have a number of ways to get the MAC address. 111 * Some cards encode this as a FUNCE. Others have this in the ROMs the 112 * same way that ISA cards do. Some have it encoded in the attribute 113 * memory somewhere that isn't in the CIS. Some new chipsets have it 114 * in special registers in the ASIC part of the chip. 115 * 116 * For those cards that have the MAC adress stored in attribute memory 117 * outside of a FUNCE entry in the CIS, nearly all of them have it at 118 * a fixed offset (0xff0). We use that offset as a source of last 119 * resource if other offsets have failed. This is the address of the 120 * National Semiconductor DP83903A, which is the only chip's datasheet 121 * I've found. 122 */ 123#define ED_DEFAULT_MAC_OFFSET 0xff0 124 125static const struct ed_product { 126 struct pccard_product prod; 127 int flags; 128#define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */ 129#define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */ 130#define NE2000DVF_TC5299J 0x0004 /* chip is Tamarack TC5299J */ 131#define NE2000DVF_TOSHIBA 0x0008 /* Toshiba DP83902A */ 132#define NE2000DVF_ENADDR 0x0100 /* Get MAC from attr mem */ 133#define NE2000DVF_ANYFUNC 0x0200 /* Allow any function type */ 134#define NE2000DVF_MODEM 0x0400 /* Has a modem/serial */ 135 int enoff; 136} ed_pccard_products[] = { 137 { PCMCIA_CARD(ACCTON, EN2212), 0}, 138 { PCMCIA_CARD(ACCTON, EN2216), 0}, 139 { PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0}, 140 { PCMCIA_CARD(AMBICOM, AMB8002T), 0}, 141 { PCMCIA_CARD(BILLIONTON, CFLT10N), 0}, 142 { PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90}, 143 { PCMCIA_CARD(BILLIONTON, LNT10TN), 0}, 144 { PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90}, 145 { PCMCIA_CARD(BROMAX, IPORT), 0}, 146 { PCMCIA_CARD(BROMAX, IPORT2), 0}, 147 { PCMCIA_CARD(BUFFALO, LPC2_CLT), 0}, 148 { PCMCIA_CARD(BUFFALO, LPC3_CLT), 0}, 149 { PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90}, 150 { PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90}, 151 { PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90}, 152 { PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0}, 153 { PCMCIA_CARD(CNET, NE2000), 0}, 154 { PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90}, 155 { PCMCIA_CARD(COMPEX, LANMODEM), 0}, 156 { PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0}, 157 { PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0}, 158 { PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0}, 159 { PCMCIA_CARD(COREGA, ETHER_PCC_T), 0}, 160 { PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0}, 161 { PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX}, 162 { PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90}, 163 { PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX}, 164 { PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90}, 165 { PCMCIA_CARD(COREGA, LAPCCTXD), 0}, 166 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0}, 167 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0}, 168 { PCMCIA_CARD(DLINK, DE650), 0 }, 169 { PCMCIA_CARD(DLINK, DE660), 0 }, 170 { PCMCIA_CARD(DLINK, DE660PLUS), 0}, 171 { PCMCIA_CARD(DYNALINK, L10C), 0}, 172 { PCMCIA_CARD(EDIMAX, EP4000A), 0}, 173 { PCMCIA_CARD(EPSON, EEN10B), NE2000DVF_ENADDR, 0xff0}, 174 { PCMCIA_CARD(EXP, THINLANCOMBO), 0}, 175 { PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0}, 176 { PCMCIA_CARD(GREY_CELL, TDK3000), 0}, 177 { PCMCIA_CARD(GREY_CELL, DMF650TX), 178 NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM}, 179 { PCMCIA_CARD(IBM, HOME_AND_AWAY), 0}, 180 { PCMCIA_CARD(IBM, INFOMOVER), NE2000DVF_ENADDR, 0xff0}, 181 { PCMCIA_CARD(IODATA3, PCLAT), 0}, 182 { PCMCIA_CARD(KINGSTON, CIO10T), 0}, 183 { PCMCIA_CARD(KINGSTON, KNE2), 0}, 184 { PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90}, 185 { PCMCIA_CARD(LINKSYS, COMBO_ECARD), 186 NE2000DVF_DL100XX | NE2000DVF_AX88X90}, 187 { PCMCIA_CARD(LINKSYS, ECARD_1), 0}, 188 { PCMCIA_CARD(LINKSYS, ECARD_2), 0}, 189 { PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX}, 190 { PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0}, 191 { PCMCIA_CARD(MACNICA, ME1_JEIDA), 0}, 192 { PCMCIA_CARD(MAGICRAM, ETHER), 0}, 193 { PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90}, 194 { PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90}, 195 { PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */ 196 { PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0}, 197 { PCMCIA_CARD(NDC, ND5100_E), 0}, 198 { PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX}, 199 /* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */ 200 { PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX}, 201 { PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0}, 202 { PCMCIA_CARD(NEWMEDIA, LANSURFER), 0}, 203 { PCMCIA_CARD(OEM2, ETHERNET), 0}, 204 { PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90 }, 205 { PCMCIA_CARD(OEM2, NE2000), 0}, 206 { PCMCIA_CARD(PLANET, SMARTCOM2000), 0 }, 207 { PCMCIA_CARD(PREMAX, PE200), 0}, 208 { PCMCIA_CARD(PSION, LANGLOBAL), 209 NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM}, 210 { PCMCIA_CARD(RACORE, ETHERNET), 0}, 211 { PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90}, 212 { PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J}, 213 { PCMCIA_CARD(RELIA, COMBO), 0}, 214 { PCMCIA_CARD(RIOS, PCCARD3), 0}, 215 { PCMCIA_CARD(RPTI, EP400), 0}, 216 { PCMCIA_CARD(RPTI, EP401), 0}, 217 { PCMCIA_CARD(SMC, EZCARD), 0}, 218 { PCMCIA_CARD(SOCKET, EA_ETHER), 0}, 219 { PCMCIA_CARD(SOCKET, ES_1000), 0}, 220 { PCMCIA_CARD(SOCKET, LP_ETHER), 0}, 221 { PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0}, 222 { PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX}, 223 { PCMCIA_CARD(SVEC, COMBOCARD), 0}, 224 { PCMCIA_CARD(SVEC, LANCARD), 0}, 225 { PCMCIA_CARD(TAMARACK, ETHERNET), 0}, 226 { PCMCIA_CARD(TDK, CFE_10), 0}, 227 { PCMCIA_CARD(TDK, LAK_CD031), 0}, 228 { PCMCIA_CARD(TDK, DFL5610WS), 0}, 229 { PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 }, 230 { PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90}, 231 { PCMCIA_CARD(TJ, PTJ_LAN_T), 0 }, 232 { PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA}, 233 { PCMCIA_CARD(ZONET, ZEN), 0}, 234 { { NULL } } 235}; 236 237/* 238 * PC Card (PCMCIA) specific code. 239 */ 240static int ed_pccard_probe(device_t); 241static int ed_pccard_attach(device_t); 242static void ed_pccard_tick(void *); 243 244static int ed_pccard_dl100xx(device_t dev, const struct ed_product *); 245static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc); 246static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits); 247static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, 248 int nbits); 249 250static int ed_pccard_ax88x90(device_t dev, const struct ed_product *); 251static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits); 252static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, 253 int nbits); 254 255static int ed_miibus_readreg(device_t dev, int phy, int reg); 256static int ed_ifmedia_upd(struct ifnet *); 257static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *); 258 259static int ed_pccard_tc5299j(device_t dev, const struct ed_product *); 260static void ed_pccard_tc5299j_mii_reset(struct ed_softc *sc); 261static u_int ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits); 262static void ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, 263 int nbits); 264 265static void 266ed_pccard_print_entry(const struct ed_product *pp) 267{ 268 int i; 269 270 printf("Product entry: "); 271 if (pp->prod.pp_name) 272 printf("name='%s',", pp->prod.pp_name); 273 printf("vendor=%#x,product=%#x", pp->prod.pp_vendor, 274 pp->prod.pp_product); 275 for (i = 0; i < 4; i++) 276 if (pp->prod.pp_cis[i]) 277 printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]); 278 printf("\n"); 279} 280 281static int 282ed_pccard_probe(device_t dev) 283{ 284 const struct ed_product *pp, *pp2; 285 int error, first = 1; 286 uint32_t fcn = PCCARD_FUNCTION_UNSPEC; 287 288 /* Make sure we're a network function */ 289 error = pccard_get_function(dev, &fcn); 290 if (error != 0) 291 return (error); 292 293 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 294 (const struct pccard_product *) ed_pccard_products, 295 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 296 if (pp->prod.pp_name != NULL) 297 device_set_desc(dev, pp->prod.pp_name); 298 /* 299 * Some devices don't ID themselves as network, but 300 * that's OK if the flags say so. 301 */ 302 if (!(pp->flags & NE2000DVF_ANYFUNC) && 303 fcn != PCCARD_FUNCTION_NETWORK) 304 return (ENXIO); 305 /* 306 * Some devices match multiple entries. Report that 307 * as a warning to help cull the table 308 */ 309 pp2 = pp; 310 while ((pp2 = (const struct ed_product *)pccard_product_lookup( 311 dev, (const struct pccard_product *)(pp2 + 1), 312 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 313 if (first) { 314 device_printf(dev, 315 "Warning: card matches multiple entries. Report to imp@freebsd.org\n"); 316 ed_pccard_print_entry(pp); 317 first = 0; 318 } 319 ed_pccard_print_entry(pp2); 320 } 321 322 return (0); 323 } 324 return (ENXIO); 325} 326 327static int 328ed_pccard_rom_mac(device_t dev, uint8_t *enaddr) 329{ 330 struct ed_softc *sc = device_get_softc(dev); 331 uint8_t romdata[32]; 332 int i; 333 334 /* 335 * Read in the rom data at location 0. Since there are no 336 * NE-1000 based PC Card devices, we'll assume we're 16-bit. 337 * 338 * In researching what format this takes, I've found that the 339 * following appears to be true for multiple cards based on 340 * observation as well as datasheet digging. 341 * 342 * Data is stored in some ROM and is copied out 8 bits at a time 343 * into 16-bit wide locations. This means that the odd locations 344 * of the ROM are not used (and can be either 0 or ff). 345 * 346 * The contents appears to be as follows: 347 * PROM RAM 348 * Offset Offset What 349 * 0 0 ENETADDR 0 350 * 1 2 ENETADDR 1 351 * 2 4 ENETADDR 2 352 * 3 6 ENETADDR 3 353 * 4 8 ENETADDR 4 354 * 5 10 ENETADDR 5 355 * 6-13 12-26 Reserved (varies by manufacturer) 356 * 14 28 0x57 357 * 15 30 0x57 358 * 359 * Some manufacturers have another image of enetaddr from 360 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but 361 * this doesn't appear to be universally documented in the 362 * datasheets. Some manufactuers have a card type, card config 363 * checksums, etc encoded into PROM offset 6-13, but deciphering it 364 * requires more knowledge about the exact underlying chipset than 365 * we possess (and maybe can possess). 366 */ 367 ed_pio_readmem(sc, 0, romdata, 32); 368 if (bootverbose) 369 device_printf(dev, "ROM DATA: %32D\n", romdata, " "); 370 if (romdata[28] != 0x57 || romdata[30] != 0x57) 371 return (0); 372 for (i = 0; i < ETHER_ADDR_LEN; i++) 373 enaddr[i] = romdata[i * 2]; 374 return (1); 375} 376 377static int 378ed_pccard_add_modem(device_t dev) 379{ 380 struct ed_softc *sc = device_get_softc(dev); 381 382 device_printf(dev, "Need to write this code: modem rid is %d\n", 383 sc->modem_rid); 384 return 0; 385} 386 387static int 388ed_pccard_kick_phy(struct ed_softc *sc) 389{ 390 struct mii_softc *miisc; 391 struct mii_data *mii; 392 393 /* 394 * Many of the PHYs that wind up on PC Cards are weird in 395 * this way. Generally, we don't need to worry so much about 396 * the Isolation protocol since there's only one PHY in 397 * these designs, so this workaround is reasonable. 398 */ 399 mii = device_get_softc(sc->miibus); 400 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 401 miisc->mii_flags |= MIIF_FORCEANEG; 402 mii_phy_reset(miisc); 403 } 404 return (mii_mediachg(mii)); 405} 406 407static int 408ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command) 409{ 410 struct mii_data *mii; 411 412 if (sc->miibus == NULL) 413 return (EINVAL); 414 mii = device_get_softc(sc->miibus); 415 return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command)); 416} 417 418 419static void 420ed_pccard_mediachg(struct ed_softc *sc) 421{ 422 struct mii_data *mii; 423 424 if (sc->miibus == NULL) 425 return; 426 mii = device_get_softc(sc->miibus); 427 mii_mediachg(mii); 428} 429 430static int 431ed_pccard_attach(device_t dev) 432{ 433 u_char sum; 434 u_char enaddr[ETHER_ADDR_LEN]; 435 const struct ed_product *pp; 436 int error, i, flags; 437 struct ed_softc *sc = device_get_softc(dev); 438 u_long size; 439 static uint16_t *intr_vals[] = {NULL, NULL}; 440 441 sc->dev = dev; 442 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 443 (const struct pccard_product *) ed_pccard_products, 444 sizeof(ed_pccard_products[0]), NULL)) == NULL) 445 return (ENXIO); 446 sc->modem_rid = -1; 447 if (pp->flags & NE2000DVF_MODEM) { 448 sc->port_rid = -1; 449 for (i = 0; i < 4; i++) { 450 size = bus_get_resource_count(dev, SYS_RES_IOPORT, i); 451 if (size == ED_NOVELL_IO_PORTS) 452 sc->port_rid = i; 453 else if (size == 8) 454 sc->modem_rid = i; 455 } 456 if (sc->port_rid == -1) { 457 device_printf(dev, "Cannot locate my ports!\n"); 458 return (ENXIO); 459 } 460 } else { 461 sc->port_rid = 0; 462 } 463 /* Allocate the port resource during setup. */ 464 error = ed_alloc_port(dev, sc->port_rid, ED_NOVELL_IO_PORTS); 465 if (error) 466 return (error); 467 error = ed_alloc_irq(dev, 0, 0); 468 if (error) 469 goto bad; 470 471 /* 472 * Determine which chipset we are. All the PC Card chipsets have the 473 * ASIC and NIC offsets in the same place. 474 */ 475 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 476 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 477 error = ENXIO; 478 flags = device_get_flags(dev); 479 if (error != 0) 480 error = ed_pccard_dl100xx(dev, pp); 481 if (error != 0) 482 error = ed_pccard_ax88x90(dev, pp); 483 if (error != 0) 484 error = ed_pccard_tc5299j(dev, pp); 485 if (error != 0) 486 error = ed_probe_Novell_generic(dev, flags); 487 if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) { 488 flags |= ED_FLAGS_TOSH_ETHER; 489 flags |= ED_FLAGS_PCCARD; 490 sc->asic_offset = ED_WD_ASIC_OFFSET; 491 sc->nic_offset = ED_WD_NIC_OFFSET; 492 error = ed_probe_WD80x3_generic(dev, flags, intr_vals); 493 } 494 if (error) 495 goto bad; 496 497 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 498 NULL, edintr, sc, &sc->irq_handle); 499 if (error) { 500 device_printf(dev, "setup intr failed %d \n", error); 501 goto bad; 502 } 503 504 /* 505 * For the older cards, we have to get the MAC address from 506 * the card in some way. Let's try the standard PCMCIA way 507 * first. If that fails, then check to see if we have valid 508 * data from the standard NE-2000 data roms. If that fails, 509 * check to see if the card has a hint about where to look in 510 * its CIS. If that fails, maybe we should look at some 511 * default value. In all fails, we should fail the attach, 512 * but don't right now. 513 */ 514 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 515 sum |= sc->enaddr[i]; 516 if (sc->chip_type == ED_CHIP_TYPE_DP8390 && sum == 0) { 517 pccard_get_ether(dev, enaddr); 518 if (bootverbose) 519 device_printf(dev, "CIS MAC %6D\n", enaddr, ":"); 520 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 521 sum |= enaddr[i]; 522 if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) { 523 if (bootverbose) 524 device_printf(dev, "ROM mac %6D\n", enaddr, 525 ":"); 526 sum++; 527 } 528 if (sum == 0 && pp->flags & NE2000DVF_ENADDR) { 529 for (i = 0; i < ETHER_ADDR_LEN; i++) { 530 pccard_attr_read_1(dev, pp->enoff + i * 2, 531 enaddr + i); 532 sum |= enaddr[i]; 533 } 534 if (bootverbose) 535 device_printf(dev, "Hint %x MAC %6D\n", 536 pp->enoff, enaddr, ":"); 537 } 538 if (sum == 0) { 539 for (i = 0; i < ETHER_ADDR_LEN; i++) { 540 pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET + 541 i * 2, enaddr + i); 542 sum |= enaddr[i]; 543 } 544 if (bootverbose) 545 device_printf(dev, "Fallback MAC %6D\n", 546 enaddr, ":"); 547 } 548 if (sum == 0) { 549 device_printf(dev, "Cannot extract MAC address.\n"); 550 ed_release_resources(dev); 551 return (ENXIO); 552 } 553 bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN); 554 } 555 556 error = ed_attach(dev); 557 if (error) 558 goto bad; 559 if (sc->chip_type == ED_CHIP_TYPE_DL10019 || 560 sc->chip_type == ED_CHIP_TYPE_DL10022) { 561 /* Probe for an MII bus, but ignore errors. */ 562 ed_pccard_dl100xx_mii_reset(sc); 563 (void)mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 564 ed_ifmedia_sts); 565 } else if (sc->chip_type == ED_CHIP_TYPE_AX88190 || 566 sc->chip_type == ED_CHIP_TYPE_AX88790) { 567 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 568 ed_ifmedia_sts)) != 0) { 569 device_printf(dev, "Missing mii %d!\n", error); 570 goto bad; 571 } 572 573 } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) { 574 ed_pccard_tc5299j_mii_reset(sc); 575 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 576 ed_ifmedia_sts)) != 0) { 577 device_printf(dev, "Missing mii!\n"); 578 goto bad; 579 } 580 581 } 582 if (sc->miibus != NULL) { 583 sc->sc_tick = ed_pccard_tick; 584 sc->sc_mediachg = ed_pccard_mediachg; 585 sc->sc_media_ioctl = ed_pccard_media_ioctl; 586 ed_pccard_kick_phy(sc); 587 } else { 588 printf("Generic ifmedia\n"); 589 ed_gen_ifmedia_init(sc); 590 } 591 if (sc->modem_rid != -1) 592 ed_pccard_add_modem(dev); 593 return (0); 594bad: 595 ed_detach(dev); 596 return (error); 597} 598 599/* 600 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100 601 * and compatible cards (DL10019C Ethernet controller). 602 */ 603static int 604ed_pccard_dl100xx(device_t dev, const struct ed_product *pp) 605{ 606 struct ed_softc *sc = device_get_softc(dev); 607 u_char sum; 608 uint8_t id; 609 u_int memsize; 610 int i, error; 611 612 if (!(pp->flags & NE2000DVF_DL100XX)) 613 return (ENXIO); 614 if (bootverbose) 615 device_printf(dev, "Trying DL100xx probing\n"); 616 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 617 if (bootverbose && error) 618 device_printf(dev, "Novell generic probe failed: %d\n", error); 619 if (error != 0) 620 return (error); 621 622 /* 623 * Linksys registers(offset from ASIC base) 624 * 625 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5) 626 * 0x0A : Card ID Register (CIR) 627 * 0x0B : Check Sum Register (SR) 628 */ 629 for (sum = 0, i = 0x04; i < 0x0c; i++) 630 sum += ed_asic_inb(sc, i); 631 if (sum != 0xff) { 632 if (bootverbose) 633 device_printf(dev, "Bad checksum %#x\n", sum); 634 return (ENXIO); /* invalid DL10019C */ 635 } 636 if (bootverbose) 637 device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa)); 638 for (i = 0; i < ETHER_ADDR_LEN; i++) 639 sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i); 640 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 641 id = ed_asic_inb(sc, 0xf); 642 sc->isa16bit = 1; 643 /* 644 * Hard code values based on the datasheet. We're NE-2000 compatible 645 * NIC with 24kb of packet memory starting at 24k offset. These 646 * cards also work with 16k at 16k, but don't work with 24k at 16k 647 * or 32k at 16k. 648 */ 649 sc->type = ED_TYPE_NE2000; 650 sc->mem_start = 24 * 1024; 651 memsize = sc->mem_size = 24 * 1024; 652 sc->mem_end = sc->mem_start + memsize; 653 sc->tx_page_start = memsize / ED_PAGE_SIZE; 654 sc->txb_cnt = 3; 655 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 656 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 657 658 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 659 660 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE); 661 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE); 662 sc->vendor = ED_VENDOR_NOVELL; 663 sc->chip_type = (id & 0x90) == 0x90 ? 664 ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019; 665 sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019"; 666 sc->mii_readbits = ed_pccard_dl100xx_mii_readbits; 667 sc->mii_writebits = ed_pccard_dl100xx_mii_writebits; 668 return (0); 669} 670 671/* MII bit-twiddling routines for cards using Dlink chipset */ 672#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 673 ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x)) 674#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 675 ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x)) 676 677static void 678ed_pccard_dl100xx_mii_reset(struct ed_softc *sc) 679{ 680 if (sc->chip_type != ED_CHIP_TYPE_DL10022) 681 return; 682 683 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2); 684 DELAY(10); 685 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 686 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1); 687 DELAY(10); 688 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2); 689 DELAY(10); 690 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 691 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1); 692 DELAY(10); 693 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0); 694} 695 696static void 697ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 698{ 699 int i; 700 701 DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT); 702 for (i = nbits - 1; i >= 0; i--) { 703 if ((val >> i) & 1) 704 DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT); 705 else 706 DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT); 707 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 708 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 709 } 710} 711 712static u_int 713ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits) 714{ 715 int i; 716 u_int val = 0; 717 718 DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT); 719 for (i = nbits - 1; i >= 0; i--) { 720 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 721 val <<= 1; 722 if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN) 723 val++; 724 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 725 } 726 return val; 727} 728 729static void 730ed_pccard_ax88x90_reset(struct ed_softc *sc) 731{ 732 int i; 733 734 /* Reset Card */ 735 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0); 736 ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET)); 737 738 /* Wait for the RST bit to assert, but cap it at 10ms */ 739 for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0; 740 i--) 741 continue; 742 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */ 743 if (i == 0) 744 device_printf(sc->dev, "Reset didn't finish\n"); 745} 746 747/* 748 * Probe and vendor-specific initialization routine for ax88x90 boards 749 */ 750static int 751ed_probe_ax88x90_generic(device_t dev, int flags) 752{ 753 struct ed_softc *sc = device_get_softc(dev); 754 u_int memsize; 755 static char test_pattern[32] = "THIS is A memory TEST pattern"; 756 char test_buffer[32]; 757 758 ed_pccard_ax88x90_reset(sc); 759 DELAY(10*1000); 760 761 /* Make sure that we really have an 8390 based board */ 762 if (!ed_probe_generic8390(sc)) 763 return (ENXIO); 764 765 sc->vendor = ED_VENDOR_NOVELL; 766 sc->mem_shared = 0; 767 sc->cr_proto = ED_CR_RD2; 768 769 /* 770 * This prevents packets from being stored in the NIC memory when the 771 * readmem routine turns on the start bit in the CR. We write some 772 * bytes in word mode and verify we can read them back. If we can't 773 * then we don't have an AX88x90 chip here. 774 */ 775 sc->isa16bit = 1; 776 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON); 777 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 778 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); 779 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); 780 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0) 781 return (ENXIO); 782 783 /* 784 * Hard code values based on the datasheet. We're NE-2000 compatible 785 * NIC with 16kb of packet memory starting at 16k offset. 786 */ 787 sc->type = ED_TYPE_NE2000; 788 memsize = sc->mem_size = 16*1024; 789 sc->mem_start = 16 * 1024; 790 if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0) 791 sc->chip_type = ED_CHIP_TYPE_AX88790; 792 else { 793 sc->chip_type = ED_CHIP_TYPE_AX88190; 794 /* 795 * The AX88190 (not A) has external 64k SRAM. Probe for this 796 * here. Most of the cards I have either use the AX88190A 797 * part, or have only 32k SRAM for some reason, so I don't 798 * know if this works or not. 799 */ 800 ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern)); 801 ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern)); 802 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) { 803 sc->mem_start = 2*1024; 804 memsize = sc->mem_size = 62 * 1024; 805 } 806 } 807 sc->mem_end = sc->mem_start + memsize; 808 sc->tx_page_start = memsize / ED_PAGE_SIZE; 809 if (sc->mem_size > 16 * 1024) 810 sc->txb_cnt = 3; 811 else 812 sc->txb_cnt = 2; 813 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 814 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 815 816 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 817 818 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE); 819 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE); 820 821 /* Get the mac before we go -- It's just at 0x400 in "SRAM" */ 822 ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN); 823 824 /* clear any pending interrupts that might have occurred above */ 825 ed_nic_outb(sc, ED_P0_ISR, 0xff); 826 sc->sc_write_mbufs = ed_pio_write_mbufs; 827 return (0); 828} 829 830static int 831ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc) 832{ 833 int i, id; 834 835 /* 836 * All AX88x90 devices have MII and a PHY, so we use this to weed out 837 * chips that would otherwise make it through the tests we have after 838 * this point. 839 */ 840 for (i = 0; i < 32; i++) { 841 id = ed_miibus_readreg(dev, i, MII_BMSR); 842 if (id != 0 && id != 0xffff) 843 break; 844 } 845 /* 846 * Found one, we're good. 847 */ 848 if (i != 32) 849 return (0); 850 /* 851 * Didn't find anything, so try to power up and try again. The PHY 852 * may be not responding because we're in power down mode. 853 */ 854 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 855 return (ENXIO); 856 pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN); 857 for (i = 0; i < 32; i++) { 858 id = ed_miibus_readreg(dev, i, MII_BMSR); 859 if (id != 0 && id != 0xffff) 860 break; 861 } 862 /* 863 * Still no joy? We're AFU, punt. 864 */ 865 if (i == 32) 866 return (ENXIO); 867 return (0); 868 869} 870 871/* 872 * Special setup for AX88[17]90 873 */ 874static int 875ed_pccard_ax88x90(device_t dev, const struct ed_product *pp) 876{ 877 int error; 878 int iobase; 879 struct ed_softc *sc = device_get_softc(dev); 880 881 if (!(pp->flags & NE2000DVF_AX88X90)) 882 return (ENXIO); 883 884 if (bootverbose) 885 device_printf(dev, "Checking AX88x90\n"); 886 887 /* 888 * Set the IOBASE Register. The AX88x90 cards are potentially 889 * multifunction cards, and thus requires a slight workaround. 890 * We write the address the card is at, on the off chance that this 891 * card is not MFC. 892 * XXX I'm not sure that this is still needed... 893 */ 894 iobase = rman_get_start(sc->port_res); 895 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff); 896 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff); 897 898 sc->mii_readbits = ed_pccard_ax88x90_mii_readbits; 899 sc->mii_writebits = ed_pccard_ax88x90_mii_writebits; 900 error = ed_probe_ax88x90_generic(dev, device_get_flags(dev)); 901 if (error) { 902 if (bootverbose) 903 device_printf(dev, "probe ax88x90 failed %d\n", 904 error); 905 goto fail; 906 } 907 error = ed_pccard_ax88x90_check_mii(dev, sc); 908 if (error) 909 goto fail; 910 sc->vendor = ED_VENDOR_NOVELL; 911 sc->type = ED_TYPE_NE2000; 912 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 913 sc->type_str = "AX88190"; 914 else 915 sc->type_str = "AX88790"; 916 return (0); 917fail:; 918 sc->mii_readbits = 0; 919 sc->mii_writebits = 0; 920 return (error); 921} 922 923static void 924ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 925{ 926 int i, data; 927 928 for (i = nbits - 1; i >= 0; i--) { 929 data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0; 930 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data); 931 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK); 932 } 933} 934 935static u_int 936ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits) 937{ 938 int i; 939 u_int val = 0; 940 uint8_t mdio; 941 942 mdio = ED_AX88X90_MII_DIRIN; 943 for (i = nbits - 1; i >= 0; i--) { 944 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio); 945 val <<= 1; 946 if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN) 947 val++; 948 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK); 949 } 950 return val; 951} 952 953/* 954 * Special setup for TC5299J 955 */ 956static int 957ed_pccard_tc5299j(device_t dev, const struct ed_product *pp) 958{ 959 int error, i, id; 960 char *ts; 961 struct ed_softc *sc = device_get_softc(dev); 962 963 if (!(pp->flags & NE2000DVF_TC5299J)) 964 return (ENXIO); 965 966 if (bootverbose) 967 device_printf(dev, "Checking Tc5299j\n"); 968 969 /* 970 * Check to see if we have a MII PHY ID at any of the first 32 971 * locations. All TC5299J devices have MII and a PHY, so we use 972 * this to weed out chips that would otherwise make it through 973 * the tests we have after this point. 974 */ 975 sc->mii_readbits = ed_pccard_tc5299j_mii_readbits; 976 sc->mii_writebits = ed_pccard_tc5299j_mii_writebits; 977 for (i = 0; i < 32; i++) { 978 id = ed_miibus_readreg(dev, i, MII_PHYIDR1); 979 if (id != 0 && id != 0xffff) 980 break; 981 } 982 if (i == 32) { 983 sc->mii_readbits = 0; 984 sc->mii_writebits = 0; 985 return (ENXIO); 986 } 987 988 ts = "TC5299J"; 989 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 990 if (bootverbose) 991 device_printf(dev, "probe novel returns %d\n", error); 992 if (error != 0) { 993 sc->mii_readbits = 0; 994 sc->mii_writebits = 0; 995 return (error); 996 } 997 if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) { 998 sc->mii_readbits = 0; 999 sc->mii_writebits = 0; 1000 return (ENXIO); 1001 } 1002 sc->vendor = ED_VENDOR_NOVELL; 1003 sc->type = ED_TYPE_NE2000; 1004 sc->chip_type = ED_CHIP_TYPE_TC5299J; 1005 sc->type_str = ts; 1006 return (0); 1007} 1008 1009/* MII bit-twiddling routines for cards using TC5299J chipset */ 1010#define TC5299J_MIISET(sc, x) ed_nic_outb(sc, ED_TC5299J_MIIBUS, \ 1011 ed_nic_inb(sc, ED_TC5299J_MIIBUS) | (x)) 1012#define TC5299J_MIICLR(sc, x) ed_nic_outb(sc, ED_TC5299J_MIIBUS, \ 1013 ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ~(x)) 1014 1015static void 1016ed_pccard_tc5299j_mii_reset(struct ed_softc *sc) 1017{ 1018 /* Do nothing! */ 1019} 1020 1021static void 1022ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 1023{ 1024 int i; 1025 uint8_t cr; 1026 1027 cr = ed_nic_inb(sc, ED_P0_CR); 1028 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3); 1029 1030 TC5299J_MIICLR(sc, ED_TC5299J_MII_DIROUT); 1031 for (i = nbits - 1; i >= 0; i--) { 1032 if ((val >> i) & 1) 1033 TC5299J_MIISET(sc, ED_TC5299J_MII_DATAOUT); 1034 else 1035 TC5299J_MIICLR(sc, ED_TC5299J_MII_DATAOUT); 1036 TC5299J_MIISET(sc, ED_TC5299J_MII_CLK); 1037 TC5299J_MIICLR(sc, ED_TC5299J_MII_CLK); 1038 } 1039 ed_nic_outb(sc, ED_P0_CR, cr); 1040} 1041 1042static u_int 1043ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits) 1044{ 1045 int i; 1046 u_int val = 0; 1047 uint8_t cr; 1048 1049 cr = ed_nic_inb(sc, ED_P0_CR); 1050 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3); 1051 1052 TC5299J_MIISET(sc, ED_TC5299J_MII_DIROUT); 1053 for (i = nbits - 1; i >= 0; i--) { 1054 TC5299J_MIISET(sc, ED_TC5299J_MII_CLK); 1055 val <<= 1; 1056 if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN) 1057 val++; 1058 TC5299J_MIICLR(sc, ED_TC5299J_MII_CLK); 1059 } 1060 ed_nic_outb(sc, ED_P0_CR, cr); 1061 return val; 1062} 1063 1064/* 1065 * MII bus support routines. 1066 */ 1067static int 1068ed_miibus_readreg(device_t dev, int phy, int reg) 1069{ 1070 struct ed_softc *sc; 1071 int failed, val; 1072 1073 sc = device_get_softc(dev); 1074 /* 1075 * The AX88790 has an interesting quirk. It has an internal phy that 1076 * needs a special bit set to access, but can also have additional 1077 * external PHYs set for things like HomeNET media. When accessing 1078 * the internal PHY, a bit has to be set, when accessing the external 1079 * PHYs, it must be clear. See Errata 1, page 51, in the AX88790 1080 * datasheet for more details. 1081 * 1082 * Also, PHYs above 16 appear to be phantoms on some cards, but not 1083 * others. Registers read for this are often the same as prior values 1084 * read. Filter all register requests to 17-31. 1085 * 1086 * I can't explain it, since I don't have the DL100xx data sheets, but 1087 * the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90 1088 * chips have 14. The linux pcnet and axnet drivers confirm this. 1089 */ 1090 if (sc->chip_type == ED_CHIP_TYPE_AX88790) { 1091 if (phy > 0x10) 1092 return (0); 1093 if (phy == 0x10) 1094 ed_asic_outb(sc, ED_AX88X90_GPIO, 1095 ED_AX88X90_GPIO_INT_PHY); 1096 else 1097 ed_asic_outb(sc, ED_AX88X90_GPIO, 0); 1098 } 1099 1100 (*sc->mii_writebits)(sc, 0xffffffff, 32); 1101 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 1102 (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS); 1103 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 1104 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 1105 if (sc->chip_type == ED_CHIP_TYPE_AX88790 || 1106 sc->chip_type == ED_CHIP_TYPE_AX88190) 1107 (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 1108 failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 1109 val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS); 1110 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 1111/* printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed); */ 1112 return (failed ? 0 : val); 1113} 1114 1115static int 1116ed_miibus_writereg(device_t dev, int phy, int reg, int data) 1117{ 1118 struct ed_softc *sc; 1119 1120/* printf("Writing phy %d reg %#x data %#x\n", phy, reg, data); */ 1121 sc = device_get_softc(dev); 1122 /* See ed_miibus_readreg for details */ 1123 if (sc->chip_type == ED_CHIP_TYPE_AX88790) { 1124 if (phy > 0x10) 1125 return (0); 1126 if (phy == 0x10) 1127 ed_asic_outb(sc, ED_AX88X90_GPIO, 1128 ED_AX88X90_GPIO_INT_PHY); 1129 else 1130 ed_asic_outb(sc, ED_AX88X90_GPIO, 0); 1131 } 1132 (*sc->mii_writebits)(sc, 0xffffffff, 32); 1133 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 1134 (*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS); 1135 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 1136 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 1137 (*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS); 1138 (*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS); 1139 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 1140 return (0); 1141} 1142 1143static int 1144ed_ifmedia_upd(struct ifnet *ifp) 1145{ 1146 struct ed_softc *sc; 1147 int error; 1148 1149 sc = ifp->if_softc; 1150 if (sc->miibus == NULL) 1151 return (ENXIO); 1152 ED_LOCK(sc); 1153 error = ed_pccard_kick_phy(sc); 1154 ED_UNLOCK(sc); 1155 return (error); 1156} 1157 1158static void 1159ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1160{ 1161 struct ed_softc *sc; 1162 struct mii_data *mii; 1163 1164 sc = ifp->if_softc; 1165 if (sc->miibus == NULL) 1166 return; 1167 1168 mii = device_get_softc(sc->miibus); 1169 mii_pollstat(mii); 1170 ifmr->ifm_active = mii->mii_media_active; 1171 ifmr->ifm_status = mii->mii_media_status; 1172} 1173 1174static void 1175ed_child_detached(device_t dev, device_t child) 1176{ 1177 struct ed_softc *sc; 1178 1179 sc = device_get_softc(dev); 1180 if (child == sc->miibus) 1181 sc->miibus = NULL; 1182} 1183 1184static void 1185ed_pccard_tick(void *arg) 1186{ 1187 struct ed_softc *sc = arg; 1188 struct mii_data *mii; 1189 int media = 0; 1190 1191 ED_ASSERT_LOCKED(sc); 1192 if (sc->miibus != NULL) { 1193 mii = device_get_softc(sc->miibus); 1194 media = mii->mii_media_status; 1195 mii_tick(mii); 1196 if (mii->mii_media_status & IFM_ACTIVE && 1197 media != mii->mii_media_status) { 1198 if (sc->chip_type == ED_CHIP_TYPE_DL10022) { 1199 ed_asic_outb(sc, ED_DL10022_DIAG, 1200 (mii->mii_media_active & IFM_FDX) ? 1201 ED_DL10022_COLLISON_DIS : 0); 1202#ifdef notyet 1203 } else if (sc->chip_type == ED_CHIP_TYPE_DL10019) { 1204 write_asic(sc, ED_DL10019_MAGIC, 1205 (mii->mii_media_active & IFM_FDX) ? 1206 DL19FDUPLX : 0); 1207#endif 1208 } 1209 } 1210 1211 } 1212 callout_reset(&sc->tick_ch, hz, ed_pccard_tick, sc); 1213} 1214 1215static device_method_t ed_pccard_methods[] = { 1216 /* Device interface */ 1217 DEVMETHOD(device_probe, ed_pccard_probe), 1218 DEVMETHOD(device_attach, ed_pccard_attach), 1219 DEVMETHOD(device_detach, ed_detach), 1220 1221 /* Bus interface */ 1222 DEVMETHOD(bus_child_detached, ed_child_detached), 1223 1224 /* MII interface */ 1225 DEVMETHOD(miibus_readreg, ed_miibus_readreg), 1226 DEVMETHOD(miibus_writereg, ed_miibus_writereg), 1227 1228 { 0, 0 } 1229}; 1230 1231static driver_t ed_pccard_driver = { 1232 "ed", 1233 ed_pccard_methods, 1234 sizeof(struct ed_softc) 1235}; 1236 1237DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0); 1238DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0); 1239MODULE_DEPEND(ed, miibus, 1, 1, 1); 1240MODULE_DEPEND(ed, ether, 1, 1, 1); 1241