1177867Sjfv/****************************************************************************** 2169240Sjfv 3269196Sjfv Copyright (c) 2001-2014, Intel Corporation 4169240Sjfv All rights reserved. 5169240Sjfv 6169240Sjfv Redistribution and use in source and binary forms, with or without 7169240Sjfv modification, are permitted provided that the following conditions are met: 8169240Sjfv 9169240Sjfv 1. Redistributions of source code must retain the above copyright notice, 10169240Sjfv this list of conditions and the following disclaimer. 11169240Sjfv 12169240Sjfv 2. Redistributions in binary form must reproduce the above copyright 13169240Sjfv notice, this list of conditions and the following disclaimer in the 14169240Sjfv documentation and/or other materials provided with the distribution. 15169240Sjfv 16169240Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17169240Sjfv contributors may be used to endorse or promote products derived from 18169240Sjfv this software without specific prior written permission. 19169240Sjfv 20169240Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21169240Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22169240Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23169240Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24169240Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25169240Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26169240Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27169240Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28169240Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29169240Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30169240Sjfv POSSIBILITY OF SUCH DAMAGE. 31169240Sjfv 32177867Sjfv******************************************************************************/ 33177867Sjfv/*$FreeBSD: releng/10.2/sys/dev/e1000/e1000_hw.h 269196 2014-07-28 21:11:18Z jfv $*/ 34169240Sjfv 35169240Sjfv#ifndef _E1000_HW_H_ 36169240Sjfv#define _E1000_HW_H_ 37169240Sjfv 38169240Sjfv#include "e1000_osdep.h" 39169240Sjfv#include "e1000_regs.h" 40169240Sjfv#include "e1000_defines.h" 41169240Sjfv 42169240Sjfvstruct e1000_hw; 43169240Sjfv 44228386Sjfv#define E1000_DEV_ID_82542 0x1000 45228386Sjfv#define E1000_DEV_ID_82543GC_FIBER 0x1001 46228386Sjfv#define E1000_DEV_ID_82543GC_COPPER 0x1004 47228386Sjfv#define E1000_DEV_ID_82544EI_COPPER 0x1008 48228386Sjfv#define E1000_DEV_ID_82544EI_FIBER 0x1009 49228386Sjfv#define E1000_DEV_ID_82544GC_COPPER 0x100C 50228386Sjfv#define E1000_DEV_ID_82544GC_LOM 0x100D 51228386Sjfv#define E1000_DEV_ID_82540EM 0x100E 52228386Sjfv#define E1000_DEV_ID_82540EM_LOM 0x1015 53228386Sjfv#define E1000_DEV_ID_82540EP_LOM 0x1016 54228386Sjfv#define E1000_DEV_ID_82540EP 0x1017 55228386Sjfv#define E1000_DEV_ID_82540EP_LP 0x101E 56228386Sjfv#define E1000_DEV_ID_82545EM_COPPER 0x100F 57228386Sjfv#define E1000_DEV_ID_82545EM_FIBER 0x1011 58228386Sjfv#define E1000_DEV_ID_82545GM_COPPER 0x1026 59228386Sjfv#define E1000_DEV_ID_82545GM_FIBER 0x1027 60228386Sjfv#define E1000_DEV_ID_82545GM_SERDES 0x1028 61228386Sjfv#define E1000_DEV_ID_82546EB_COPPER 0x1010 62228386Sjfv#define E1000_DEV_ID_82546EB_FIBER 0x1012 63228386Sjfv#define E1000_DEV_ID_82546EB_QUAD_COPPER 0x101D 64228386Sjfv#define E1000_DEV_ID_82546GB_COPPER 0x1079 65228386Sjfv#define E1000_DEV_ID_82546GB_FIBER 0x107A 66228386Sjfv#define E1000_DEV_ID_82546GB_SERDES 0x107B 67228386Sjfv#define E1000_DEV_ID_82546GB_PCIE 0x108A 68228386Sjfv#define E1000_DEV_ID_82546GB_QUAD_COPPER 0x1099 69228386Sjfv#define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5 70228386Sjfv#define E1000_DEV_ID_82541EI 0x1013 71228386Sjfv#define E1000_DEV_ID_82541EI_MOBILE 0x1018 72228386Sjfv#define E1000_DEV_ID_82541ER_LOM 0x1014 73228386Sjfv#define E1000_DEV_ID_82541ER 0x1078 74228386Sjfv#define E1000_DEV_ID_82541GI 0x1076 75228386Sjfv#define E1000_DEV_ID_82541GI_LF 0x107C 76228386Sjfv#define E1000_DEV_ID_82541GI_MOBILE 0x1077 77228386Sjfv#define E1000_DEV_ID_82547EI 0x1019 78228386Sjfv#define E1000_DEV_ID_82547EI_MOBILE 0x101A 79228386Sjfv#define E1000_DEV_ID_82547GI 0x1075 80228386Sjfv#define E1000_DEV_ID_82571EB_COPPER 0x105E 81228386Sjfv#define E1000_DEV_ID_82571EB_FIBER 0x105F 82228386Sjfv#define E1000_DEV_ID_82571EB_SERDES 0x1060 83228386Sjfv#define E1000_DEV_ID_82571EB_SERDES_DUAL 0x10D9 84228386Sjfv#define E1000_DEV_ID_82571EB_SERDES_QUAD 0x10DA 85228386Sjfv#define E1000_DEV_ID_82571EB_QUAD_COPPER 0x10A4 86228386Sjfv#define E1000_DEV_ID_82571PT_QUAD_COPPER 0x10D5 87228386Sjfv#define E1000_DEV_ID_82571EB_QUAD_FIBER 0x10A5 88228386Sjfv#define E1000_DEV_ID_82571EB_QUAD_COPPER_LP 0x10BC 89228386Sjfv#define E1000_DEV_ID_82572EI_COPPER 0x107D 90228386Sjfv#define E1000_DEV_ID_82572EI_FIBER 0x107E 91228386Sjfv#define E1000_DEV_ID_82572EI_SERDES 0x107F 92228386Sjfv#define E1000_DEV_ID_82572EI 0x10B9 93228386Sjfv#define E1000_DEV_ID_82573E 0x108B 94228386Sjfv#define E1000_DEV_ID_82573E_IAMT 0x108C 95228386Sjfv#define E1000_DEV_ID_82573L 0x109A 96228386Sjfv#define E1000_DEV_ID_82574L 0x10D3 97228386Sjfv#define E1000_DEV_ID_82574LA 0x10F6 98228386Sjfv#define E1000_DEV_ID_82583V 0x150C 99228386Sjfv#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096 100228386Sjfv#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098 101228386Sjfv#define E1000_DEV_ID_80003ES2LAN_COPPER_SPT 0x10BA 102228386Sjfv#define E1000_DEV_ID_80003ES2LAN_SERDES_SPT 0x10BB 103228386Sjfv#define E1000_DEV_ID_ICH8_82567V_3 0x1501 104228386Sjfv#define E1000_DEV_ID_ICH8_IGP_M_AMT 0x1049 105228386Sjfv#define E1000_DEV_ID_ICH8_IGP_AMT 0x104A 106228386Sjfv#define E1000_DEV_ID_ICH8_IGP_C 0x104B 107228386Sjfv#define E1000_DEV_ID_ICH8_IFE 0x104C 108228386Sjfv#define E1000_DEV_ID_ICH8_IFE_GT 0x10C4 109228386Sjfv#define E1000_DEV_ID_ICH8_IFE_G 0x10C5 110228386Sjfv#define E1000_DEV_ID_ICH8_IGP_M 0x104D 111228386Sjfv#define E1000_DEV_ID_ICH9_IGP_M 0x10BF 112228386Sjfv#define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5 113228386Sjfv#define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB 114228386Sjfv#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD 115228386Sjfv#define E1000_DEV_ID_ICH9_BM 0x10E5 116228386Sjfv#define E1000_DEV_ID_ICH9_IGP_C 0x294C 117228386Sjfv#define E1000_DEV_ID_ICH9_IFE 0x10C0 118228386Sjfv#define E1000_DEV_ID_ICH9_IFE_GT 0x10C3 119228386Sjfv#define E1000_DEV_ID_ICH9_IFE_G 0x10C2 120228386Sjfv#define E1000_DEV_ID_ICH10_R_BM_LM 0x10CC 121228386Sjfv#define E1000_DEV_ID_ICH10_R_BM_LF 0x10CD 122228386Sjfv#define E1000_DEV_ID_ICH10_R_BM_V 0x10CE 123228386Sjfv#define E1000_DEV_ID_ICH10_D_BM_LM 0x10DE 124228386Sjfv#define E1000_DEV_ID_ICH10_D_BM_LF 0x10DF 125228386Sjfv#define E1000_DEV_ID_ICH10_D_BM_V 0x1525 126228386Sjfv#define E1000_DEV_ID_PCH_M_HV_LM 0x10EA 127228386Sjfv#define E1000_DEV_ID_PCH_M_HV_LC 0x10EB 128228386Sjfv#define E1000_DEV_ID_PCH_D_HV_DM 0x10EF 129228386Sjfv#define E1000_DEV_ID_PCH_D_HV_DC 0x10F0 130228386Sjfv#define E1000_DEV_ID_PCH2_LV_LM 0x1502 131228386Sjfv#define E1000_DEV_ID_PCH2_LV_V 0x1503 132247064Sjfv#define E1000_DEV_ID_PCH_LPT_I217_LM 0x153A 133247064Sjfv#define E1000_DEV_ID_PCH_LPT_I217_V 0x153B 134247064Sjfv#define E1000_DEV_ID_PCH_LPTLP_I218_LM 0x155A 135247064Sjfv#define E1000_DEV_ID_PCH_LPTLP_I218_V 0x1559 136269196Sjfv#define E1000_DEV_ID_PCH_I218_LM2 0x15A0 137269196Sjfv#define E1000_DEV_ID_PCH_I218_V2 0x15A1 138269196Sjfv#define E1000_DEV_ID_PCH_I218_LM3 0x15A2 /* Wildcat Point PCH */ 139269196Sjfv#define E1000_DEV_ID_PCH_I218_V3 0x15A3 /* Wildcat Point PCH */ 140228386Sjfv#define E1000_DEV_ID_82576 0x10C9 141228386Sjfv#define E1000_DEV_ID_82576_FIBER 0x10E6 142228386Sjfv#define E1000_DEV_ID_82576_SERDES 0x10E7 143228386Sjfv#define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8 144228386Sjfv#define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526 145228386Sjfv#define E1000_DEV_ID_82576_NS 0x150A 146228386Sjfv#define E1000_DEV_ID_82576_NS_SERDES 0x1518 147228386Sjfv#define E1000_DEV_ID_82576_SERDES_QUAD 0x150D 148228386Sjfv#define E1000_DEV_ID_82576_VF 0x10CA 149247064Sjfv#define E1000_DEV_ID_82576_VF_HV 0x152D 150228386Sjfv#define E1000_DEV_ID_I350_VF 0x1520 151247064Sjfv#define E1000_DEV_ID_I350_VF_HV 0x152F 152228386Sjfv#define E1000_DEV_ID_82575EB_COPPER 0x10A7 153228386Sjfv#define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9 154228386Sjfv#define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6 155228386Sjfv#define E1000_DEV_ID_82580_COPPER 0x150E 156228386Sjfv#define E1000_DEV_ID_82580_FIBER 0x150F 157228386Sjfv#define E1000_DEV_ID_82580_SERDES 0x1510 158228386Sjfv#define E1000_DEV_ID_82580_SGMII 0x1511 159228386Sjfv#define E1000_DEV_ID_82580_COPPER_DUAL 0x1516 160228386Sjfv#define E1000_DEV_ID_82580_QUAD_FIBER 0x1527 161228386Sjfv#define E1000_DEV_ID_I350_COPPER 0x1521 162228386Sjfv#define E1000_DEV_ID_I350_FIBER 0x1522 163228386Sjfv#define E1000_DEV_ID_I350_SERDES 0x1523 164228386Sjfv#define E1000_DEV_ID_I350_SGMII 0x1524 165228386Sjfv#define E1000_DEV_ID_I350_DA4 0x1546 166238148Sjfv#define E1000_DEV_ID_I210_COPPER 0x1533 167238148Sjfv#define E1000_DEV_ID_I210_COPPER_OEM1 0x1534 168238148Sjfv#define E1000_DEV_ID_I210_COPPER_IT 0x1535 169238148Sjfv#define E1000_DEV_ID_I210_FIBER 0x1536 170238148Sjfv#define E1000_DEV_ID_I210_SERDES 0x1537 171238148Sjfv#define E1000_DEV_ID_I210_SGMII 0x1538 172256200Sjfv#define E1000_DEV_ID_I210_COPPER_FLASHLESS 0x157B 173256200Sjfv#define E1000_DEV_ID_I210_SERDES_FLASHLESS 0x157C 174238148Sjfv#define E1000_DEV_ID_I211_COPPER 0x1539 175256200Sjfv#define E1000_DEV_ID_I354_BACKPLANE_1GBPS 0x1F40 176256200Sjfv#define E1000_DEV_ID_I354_SGMII 0x1F41 177256200Sjfv#define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS 0x1F45 178228386Sjfv#define E1000_DEV_ID_DH89XXCC_SGMII 0x0438 179228386Sjfv#define E1000_DEV_ID_DH89XXCC_SERDES 0x043A 180228386Sjfv#define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C 181228386Sjfv#define E1000_DEV_ID_DH89XXCC_SFP 0x0440 182247064Sjfv 183228386Sjfv#define E1000_REVISION_0 0 184228386Sjfv#define E1000_REVISION_1 1 185228386Sjfv#define E1000_REVISION_2 2 186228386Sjfv#define E1000_REVISION_3 3 187228386Sjfv#define E1000_REVISION_4 4 188169240Sjfv 189228386Sjfv#define E1000_FUNC_0 0 190228386Sjfv#define E1000_FUNC_1 1 191228386Sjfv#define E1000_FUNC_2 2 192228386Sjfv#define E1000_FUNC_3 3 193169240Sjfv 194228386Sjfv#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0 0 195228386Sjfv#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 3 196228386Sjfv#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2 6 197228386Sjfv#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3 9 198190872Sjfv 199181027Sjfvenum e1000_mac_type { 200169240Sjfv e1000_undefined = 0, 201169240Sjfv e1000_82542, 202169240Sjfv e1000_82543, 203169240Sjfv e1000_82544, 204169240Sjfv e1000_82540, 205169240Sjfv e1000_82545, 206169240Sjfv e1000_82545_rev_3, 207169240Sjfv e1000_82546, 208169240Sjfv e1000_82546_rev_3, 209169240Sjfv e1000_82541, 210169240Sjfv e1000_82541_rev_2, 211169240Sjfv e1000_82547, 212169240Sjfv e1000_82547_rev_2, 213169240Sjfv e1000_82571, 214169240Sjfv e1000_82572, 215169240Sjfv e1000_82573, 216178523Sjfv e1000_82574, 217194865Sjfv e1000_82583, 218169240Sjfv e1000_80003es2lan, 219169240Sjfv e1000_ich8lan, 220169240Sjfv e1000_ich9lan, 221178523Sjfv e1000_ich10lan, 222194865Sjfv e1000_pchlan, 223213234Sjfv e1000_pch2lan, 224247064Sjfv e1000_pch_lpt, 225177867Sjfv e1000_82575, 226181027Sjfv e1000_82576, 227200243Sjfv e1000_82580, 228218530Sjfv e1000_i350, 229256200Sjfv e1000_i354, 230238148Sjfv e1000_i210, 231238148Sjfv e1000_i211, 232209616Sjfv e1000_vfadapt, 233218530Sjfv e1000_vfadapt_i350, 234177867Sjfv e1000_num_macs /* List is 1-based, so subtract 1 for TRUE count. */ 235181027Sjfv}; 236169240Sjfv 237181027Sjfvenum e1000_media_type { 238169240Sjfv e1000_media_type_unknown = 0, 239169240Sjfv e1000_media_type_copper = 1, 240169240Sjfv e1000_media_type_fiber = 2, 241169240Sjfv e1000_media_type_internal_serdes = 3, 242169240Sjfv e1000_num_media_types 243181027Sjfv}; 244169240Sjfv 245181027Sjfvenum e1000_nvm_type { 246169240Sjfv e1000_nvm_unknown = 0, 247169240Sjfv e1000_nvm_none, 248169240Sjfv e1000_nvm_eeprom_spi, 249169240Sjfv e1000_nvm_eeprom_microwire, 250169240Sjfv e1000_nvm_flash_hw, 251256200Sjfv e1000_nvm_invm, 252169240Sjfv e1000_nvm_flash_sw 253181027Sjfv}; 254169240Sjfv 255181027Sjfvenum e1000_nvm_override { 256169240Sjfv e1000_nvm_override_none = 0, 257169240Sjfv e1000_nvm_override_spi_small, 258169240Sjfv e1000_nvm_override_spi_large, 259169240Sjfv e1000_nvm_override_microwire_small, 260169240Sjfv e1000_nvm_override_microwire_large 261181027Sjfv}; 262169240Sjfv 263181027Sjfvenum e1000_phy_type { 264169240Sjfv e1000_phy_unknown = 0, 265169240Sjfv e1000_phy_none, 266169240Sjfv e1000_phy_m88, 267169240Sjfv e1000_phy_igp, 268169240Sjfv e1000_phy_igp_2, 269169240Sjfv e1000_phy_gg82563, 270169240Sjfv e1000_phy_igp_3, 271169240Sjfv e1000_phy_ife, 272176667Sjfv e1000_phy_bm, 273194865Sjfv e1000_phy_82578, 274194865Sjfv e1000_phy_82577, 275213234Sjfv e1000_phy_82579, 276247064Sjfv e1000_phy_i217, 277200243Sjfv e1000_phy_82580, 278181027Sjfv e1000_phy_vf, 279238148Sjfv e1000_phy_i210, 280181027Sjfv}; 281169240Sjfv 282181027Sjfvenum e1000_bus_type { 283169240Sjfv e1000_bus_type_unknown = 0, 284169240Sjfv e1000_bus_type_pci, 285169240Sjfv e1000_bus_type_pcix, 286169240Sjfv e1000_bus_type_pci_express, 287169240Sjfv e1000_bus_type_reserved 288181027Sjfv}; 289169240Sjfv 290181027Sjfvenum e1000_bus_speed { 291169240Sjfv e1000_bus_speed_unknown = 0, 292169240Sjfv e1000_bus_speed_33, 293169240Sjfv e1000_bus_speed_66, 294169240Sjfv e1000_bus_speed_100, 295169240Sjfv e1000_bus_speed_120, 296169240Sjfv e1000_bus_speed_133, 297169240Sjfv e1000_bus_speed_2500, 298173788Sjfv e1000_bus_speed_5000, 299169240Sjfv e1000_bus_speed_reserved 300181027Sjfv}; 301169240Sjfv 302181027Sjfvenum e1000_bus_width { 303169240Sjfv e1000_bus_width_unknown = 0, 304169240Sjfv e1000_bus_width_pcie_x1, 305169240Sjfv e1000_bus_width_pcie_x2, 306169240Sjfv e1000_bus_width_pcie_x4 = 4, 307173788Sjfv e1000_bus_width_pcie_x8 = 8, 308169240Sjfv e1000_bus_width_32, 309169240Sjfv e1000_bus_width_64, 310169240Sjfv e1000_bus_width_reserved 311181027Sjfv}; 312169240Sjfv 313181027Sjfvenum e1000_1000t_rx_status { 314169240Sjfv e1000_1000t_rx_status_not_ok = 0, 315169240Sjfv e1000_1000t_rx_status_ok, 316169240Sjfv e1000_1000t_rx_status_undefined = 0xFF 317181027Sjfv}; 318169240Sjfv 319181027Sjfvenum e1000_rev_polarity { 320169240Sjfv e1000_rev_polarity_normal = 0, 321169240Sjfv e1000_rev_polarity_reversed, 322169240Sjfv e1000_rev_polarity_undefined = 0xFF 323181027Sjfv}; 324169240Sjfv 325185353Sjfvenum e1000_fc_mode { 326169240Sjfv e1000_fc_none = 0, 327169240Sjfv e1000_fc_rx_pause, 328169240Sjfv e1000_fc_tx_pause, 329169240Sjfv e1000_fc_full, 330169240Sjfv e1000_fc_default = 0xFF 331181027Sjfv}; 332169240Sjfv 333181027Sjfvenum e1000_ffe_config { 334169240Sjfv e1000_ffe_config_enabled = 0, 335169240Sjfv e1000_ffe_config_active, 336169240Sjfv e1000_ffe_config_blocked 337181027Sjfv}; 338169240Sjfv 339181027Sjfvenum e1000_dsp_config { 340169240Sjfv e1000_dsp_config_disabled = 0, 341169240Sjfv e1000_dsp_config_enabled, 342169240Sjfv e1000_dsp_config_activated, 343169240Sjfv e1000_dsp_config_undefined = 0xFF 344181027Sjfv}; 345169240Sjfv 346185353Sjfvenum e1000_ms_type { 347185353Sjfv e1000_ms_hw_default = 0, 348185353Sjfv e1000_ms_force_master, 349185353Sjfv e1000_ms_force_slave, 350185353Sjfv e1000_ms_auto 351185353Sjfv}; 352185353Sjfv 353185353Sjfvenum e1000_smart_speed { 354185353Sjfv e1000_smart_speed_default = 0, 355185353Sjfv e1000_smart_speed_on, 356185353Sjfv e1000_smart_speed_off 357185353Sjfv}; 358185353Sjfv 359190872Sjfvenum e1000_serdes_link_state { 360190872Sjfv e1000_serdes_link_down = 0, 361190872Sjfv e1000_serdes_link_autoneg_progress, 362190872Sjfv e1000_serdes_link_autoneg_complete, 363190872Sjfv e1000_serdes_link_forced_up 364190872Sjfv}; 365190872Sjfv 366213234Sjfv#define __le16 u16 367213234Sjfv#define __le32 u32 368213234Sjfv#define __le64 u64 369169240Sjfv/* Receive Descriptor */ 370169240Sjfvstruct e1000_rx_desc { 371185353Sjfv __le64 buffer_addr; /* Address of the descriptor's data buffer */ 372185353Sjfv __le16 length; /* Length of data DMAed into data buffer */ 373228386Sjfv __le16 csum; /* Packet checksum */ 374228386Sjfv u8 status; /* Descriptor status */ 375228386Sjfv u8 errors; /* Descriptor Errors */ 376185353Sjfv __le16 special; 377169240Sjfv}; 378169240Sjfv 379169240Sjfv/* Receive Descriptor - Extended */ 380169240Sjfvunion e1000_rx_desc_extended { 381169240Sjfv struct { 382185353Sjfv __le64 buffer_addr; 383185353Sjfv __le64 reserved; 384169240Sjfv } read; 385169240Sjfv struct { 386169240Sjfv struct { 387228386Sjfv __le32 mrq; /* Multiple Rx Queues */ 388169240Sjfv union { 389228386Sjfv __le32 rss; /* RSS Hash */ 390169240Sjfv struct { 391185353Sjfv __le16 ip_id; /* IP id */ 392185353Sjfv __le16 csum; /* Packet Checksum */ 393169240Sjfv } csum_ip; 394169240Sjfv } hi_dword; 395169240Sjfv } lower; 396169240Sjfv struct { 397185353Sjfv __le32 status_error; /* ext status/error */ 398185353Sjfv __le16 length; 399228386Sjfv __le16 vlan; /* VLAN tag */ 400169240Sjfv } upper; 401169240Sjfv } wb; /* writeback */ 402169240Sjfv}; 403169240Sjfv 404169240Sjfv#define MAX_PS_BUFFERS 4 405256200Sjfv 406256200Sjfv/* Number of packet split data buffers (not including the header buffer) */ 407256200Sjfv#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1) 408256200Sjfv 409169240Sjfv/* Receive Descriptor - Packet Split */ 410169240Sjfvunion e1000_rx_desc_packet_split { 411169240Sjfv struct { 412169240Sjfv /* one buffer for protocol header(s), three data buffers */ 413185353Sjfv __le64 buffer_addr[MAX_PS_BUFFERS]; 414169240Sjfv } read; 415169240Sjfv struct { 416169240Sjfv struct { 417228386Sjfv __le32 mrq; /* Multiple Rx Queues */ 418169240Sjfv union { 419228386Sjfv __le32 rss; /* RSS Hash */ 420169240Sjfv struct { 421185353Sjfv __le16 ip_id; /* IP id */ 422185353Sjfv __le16 csum; /* Packet Checksum */ 423169240Sjfv } csum_ip; 424169240Sjfv } hi_dword; 425169240Sjfv } lower; 426169240Sjfv struct { 427185353Sjfv __le32 status_error; /* ext status/error */ 428228386Sjfv __le16 length0; /* length of buffer 0 */ 429228386Sjfv __le16 vlan; /* VLAN tag */ 430169240Sjfv } middle; 431169240Sjfv struct { 432185353Sjfv __le16 header_status; 433256200Sjfv /* length of buffers 1-3 */ 434256200Sjfv __le16 length[PS_PAGE_BUFFERS]; 435169240Sjfv } upper; 436185353Sjfv __le64 reserved; 437169240Sjfv } wb; /* writeback */ 438169240Sjfv}; 439169240Sjfv 440169240Sjfv/* Transmit Descriptor */ 441169240Sjfvstruct e1000_tx_desc { 442185353Sjfv __le64 buffer_addr; /* Address of the descriptor's data buffer */ 443169240Sjfv union { 444185353Sjfv __le32 data; 445169240Sjfv struct { 446228386Sjfv __le16 length; /* Data buffer length */ 447228386Sjfv u8 cso; /* Checksum offset */ 448228386Sjfv u8 cmd; /* Descriptor control */ 449169240Sjfv } flags; 450169240Sjfv } lower; 451169240Sjfv union { 452185353Sjfv __le32 data; 453169240Sjfv struct { 454228386Sjfv u8 status; /* Descriptor status */ 455228386Sjfv u8 css; /* Checksum start */ 456185353Sjfv __le16 special; 457169240Sjfv } fields; 458169240Sjfv } upper; 459169240Sjfv}; 460169240Sjfv 461169240Sjfv/* Offload Context Descriptor */ 462169240Sjfvstruct e1000_context_desc { 463169240Sjfv union { 464185353Sjfv __le32 ip_config; 465169240Sjfv struct { 466228386Sjfv u8 ipcss; /* IP checksum start */ 467228386Sjfv u8 ipcso; /* IP checksum offset */ 468228386Sjfv __le16 ipcse; /* IP checksum end */ 469169240Sjfv } ip_fields; 470169240Sjfv } lower_setup; 471169240Sjfv union { 472185353Sjfv __le32 tcp_config; 473169240Sjfv struct { 474228386Sjfv u8 tucss; /* TCP checksum start */ 475228386Sjfv u8 tucso; /* TCP checksum offset */ 476228386Sjfv __le16 tucse; /* TCP checksum end */ 477169240Sjfv } tcp_fields; 478169240Sjfv } upper_setup; 479185353Sjfv __le32 cmd_and_length; 480169240Sjfv union { 481185353Sjfv __le32 data; 482169240Sjfv struct { 483228386Sjfv u8 status; /* Descriptor status */ 484228386Sjfv u8 hdr_len; /* Header length */ 485228386Sjfv __le16 mss; /* Maximum segment size */ 486169240Sjfv } fields; 487169240Sjfv } tcp_seg_setup; 488169240Sjfv}; 489169240Sjfv 490169240Sjfv/* Offload data descriptor */ 491169240Sjfvstruct e1000_data_desc { 492228386Sjfv __le64 buffer_addr; /* Address of the descriptor's buffer address */ 493169240Sjfv union { 494185353Sjfv __le32 data; 495169240Sjfv struct { 496228386Sjfv __le16 length; /* Data buffer length */ 497169240Sjfv u8 typ_len_ext; 498169240Sjfv u8 cmd; 499169240Sjfv } flags; 500169240Sjfv } lower; 501169240Sjfv union { 502185353Sjfv __le32 data; 503169240Sjfv struct { 504228386Sjfv u8 status; /* Descriptor status */ 505228386Sjfv u8 popts; /* Packet Options */ 506185353Sjfv __le16 special; 507169240Sjfv } fields; 508169240Sjfv } upper; 509169240Sjfv}; 510169240Sjfv 511169240Sjfv/* Statistics counters collected by the MAC */ 512169240Sjfvstruct e1000_hw_stats { 513169240Sjfv u64 crcerrs; 514169240Sjfv u64 algnerrc; 515169240Sjfv u64 symerrs; 516169240Sjfv u64 rxerrc; 517169240Sjfv u64 mpc; 518169240Sjfv u64 scc; 519169240Sjfv u64 ecol; 520169240Sjfv u64 mcc; 521169240Sjfv u64 latecol; 522169240Sjfv u64 colc; 523169240Sjfv u64 dc; 524169240Sjfv u64 tncrs; 525169240Sjfv u64 sec; 526169240Sjfv u64 cexterr; 527169240Sjfv u64 rlec; 528169240Sjfv u64 xonrxc; 529169240Sjfv u64 xontxc; 530169240Sjfv u64 xoffrxc; 531169240Sjfv u64 xofftxc; 532169240Sjfv u64 fcruc; 533169240Sjfv u64 prc64; 534169240Sjfv u64 prc127; 535169240Sjfv u64 prc255; 536169240Sjfv u64 prc511; 537169240Sjfv u64 prc1023; 538169240Sjfv u64 prc1522; 539169240Sjfv u64 gprc; 540169240Sjfv u64 bprc; 541169240Sjfv u64 mprc; 542169240Sjfv u64 gptc; 543173788Sjfv u64 gorc; 544173788Sjfv u64 gotc; 545169240Sjfv u64 rnbc; 546169240Sjfv u64 ruc; 547169240Sjfv u64 rfc; 548169240Sjfv u64 roc; 549169240Sjfv u64 rjc; 550169240Sjfv u64 mgprc; 551169240Sjfv u64 mgpdc; 552169240Sjfv u64 mgptc; 553173788Sjfv u64 tor; 554173788Sjfv u64 tot; 555169240Sjfv u64 tpr; 556169240Sjfv u64 tpt; 557169240Sjfv u64 ptc64; 558169240Sjfv u64 ptc127; 559169240Sjfv u64 ptc255; 560169240Sjfv u64 ptc511; 561169240Sjfv u64 ptc1023; 562169240Sjfv u64 ptc1522; 563169240Sjfv u64 mptc; 564169240Sjfv u64 bptc; 565169240Sjfv u64 tsctc; 566169240Sjfv u64 tsctfc; 567169240Sjfv u64 iac; 568169240Sjfv u64 icrxptc; 569169240Sjfv u64 icrxatc; 570169240Sjfv u64 ictxptc; 571169240Sjfv u64 ictxatc; 572169240Sjfv u64 ictxqec; 573169240Sjfv u64 ictxqmtc; 574169240Sjfv u64 icrxdmtc; 575169240Sjfv u64 icrxoc; 576169240Sjfv u64 cbtmpc; 577169240Sjfv u64 htdpmc; 578169240Sjfv u64 cbrdpc; 579169240Sjfv u64 cbrmpc; 580169240Sjfv u64 rpthc; 581169240Sjfv u64 hgptc; 582169240Sjfv u64 htcbdpc; 583173788Sjfv u64 hgorc; 584173788Sjfv u64 hgotc; 585169240Sjfv u64 lenerrs; 586169240Sjfv u64 scvpc; 587169240Sjfv u64 hrmpc; 588185353Sjfv u64 doosync; 589228386Sjfv u64 o2bgptc; 590228386Sjfv u64 o2bspc; 591228386Sjfv u64 b2ospc; 592228386Sjfv u64 b2ogprc; 593169240Sjfv}; 594169240Sjfv 595209616Sjfvstruct e1000_vf_stats { 596209616Sjfv u64 base_gprc; 597209616Sjfv u64 base_gptc; 598209616Sjfv u64 base_gorc; 599209616Sjfv u64 base_gotc; 600209616Sjfv u64 base_mprc; 601209616Sjfv u64 base_gotlbc; 602209616Sjfv u64 base_gptlbc; 603209616Sjfv u64 base_gorlbc; 604209616Sjfv u64 base_gprlbc; 605185353Sjfv 606209616Sjfv u32 last_gprc; 607209616Sjfv u32 last_gptc; 608209616Sjfv u32 last_gorc; 609209616Sjfv u32 last_gotc; 610209616Sjfv u32 last_mprc; 611209616Sjfv u32 last_gotlbc; 612209616Sjfv u32 last_gptlbc; 613209616Sjfv u32 last_gorlbc; 614209616Sjfv u32 last_gprlbc; 615209616Sjfv 616209616Sjfv u64 gprc; 617209616Sjfv u64 gptc; 618209616Sjfv u64 gorc; 619209616Sjfv u64 gotc; 620209616Sjfv u64 mprc; 621209616Sjfv u64 gotlbc; 622209616Sjfv u64 gptlbc; 623209616Sjfv u64 gorlbc; 624209616Sjfv u64 gprlbc; 625209616Sjfv}; 626209616Sjfv 627169240Sjfvstruct e1000_phy_stats { 628169240Sjfv u32 idle_errors; 629169240Sjfv u32 receive_errors; 630169240Sjfv}; 631169240Sjfv 632169240Sjfvstruct e1000_host_mng_dhcp_cookie { 633169240Sjfv u32 signature; 634169240Sjfv u8 status; 635169240Sjfv u8 reserved0; 636169240Sjfv u16 vlan_id; 637169240Sjfv u32 reserved1; 638169240Sjfv u16 reserved2; 639169240Sjfv u8 reserved3; 640169240Sjfv u8 checksum; 641169240Sjfv}; 642169240Sjfv 643169240Sjfv/* Host Interface "Rev 1" */ 644169240Sjfvstruct e1000_host_command_header { 645169240Sjfv u8 command_id; 646169240Sjfv u8 command_length; 647169240Sjfv u8 command_options; 648169240Sjfv u8 checksum; 649169240Sjfv}; 650169240Sjfv 651228386Sjfv#define E1000_HI_MAX_DATA_LENGTH 252 652169240Sjfvstruct e1000_host_command_info { 653169240Sjfv struct e1000_host_command_header command_header; 654169240Sjfv u8 command_data[E1000_HI_MAX_DATA_LENGTH]; 655169240Sjfv}; 656169240Sjfv 657169240Sjfv/* Host Interface "Rev 2" */ 658169240Sjfvstruct e1000_host_mng_command_header { 659169240Sjfv u8 command_id; 660169240Sjfv u8 checksum; 661169240Sjfv u16 reserved1; 662169240Sjfv u16 reserved2; 663169240Sjfv u16 command_length; 664169240Sjfv}; 665169240Sjfv 666228386Sjfv#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8 667169240Sjfvstruct e1000_host_mng_command_info { 668169240Sjfv struct e1000_host_mng_command_header command_header; 669169240Sjfv u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH]; 670169240Sjfv}; 671169240Sjfv 672169240Sjfv#include "e1000_mac.h" 673169240Sjfv#include "e1000_phy.h" 674169240Sjfv#include "e1000_nvm.h" 675169240Sjfv#include "e1000_manage.h" 676209616Sjfv#include "e1000_mbx.h" 677169240Sjfv 678247064Sjfv/* Function pointers for the MAC. */ 679177867Sjfvstruct e1000_mac_operations { 680177867Sjfv s32 (*init_params)(struct e1000_hw *); 681190872Sjfv s32 (*id_led_init)(struct e1000_hw *); 682173788Sjfv s32 (*blink_led)(struct e1000_hw *); 683247064Sjfv bool (*check_mng_mode)(struct e1000_hw *); 684173788Sjfv s32 (*check_for_link)(struct e1000_hw *); 685173788Sjfv s32 (*cleanup_led)(struct e1000_hw *); 686173788Sjfv void (*clear_hw_cntrs)(struct e1000_hw *); 687173788Sjfv void (*clear_vfta)(struct e1000_hw *); 688173788Sjfv s32 (*get_bus_info)(struct e1000_hw *); 689185353Sjfv void (*set_lan_id)(struct e1000_hw *); 690173788Sjfv s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *); 691173788Sjfv s32 (*led_on)(struct e1000_hw *); 692173788Sjfv s32 (*led_off)(struct e1000_hw *); 693190872Sjfv void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32); 694173788Sjfv s32 (*reset_hw)(struct e1000_hw *); 695173788Sjfv s32 (*init_hw)(struct e1000_hw *); 696181027Sjfv void (*shutdown_serdes)(struct e1000_hw *); 697203049Sjfv void (*power_up_serdes)(struct e1000_hw *); 698173788Sjfv s32 (*setup_link)(struct e1000_hw *); 699173788Sjfv s32 (*setup_physical_interface)(struct e1000_hw *); 700173788Sjfv s32 (*setup_led)(struct e1000_hw *); 701173788Sjfv void (*write_vfta)(struct e1000_hw *, u32, u32); 702185353Sjfv void (*config_collision_dist)(struct e1000_hw *); 703269196Sjfv int (*rar_set)(struct e1000_hw *, u8*, u32); 704185353Sjfv s32 (*read_mac_addr)(struct e1000_hw *); 705185353Sjfv s32 (*validate_mdi_setting)(struct e1000_hw *); 706247064Sjfv s32 (*set_obff_timer)(struct e1000_hw *, u32); 707238148Sjfv s32 (*acquire_swfw_sync)(struct e1000_hw *, u16); 708238148Sjfv void (*release_swfw_sync)(struct e1000_hw *, u16); 709177867Sjfv}; 710169240Sjfv 711247064Sjfv/* When to use various PHY register access functions: 712228386Sjfv * 713228386Sjfv * Func Caller 714228386Sjfv * Function Does Does When to use 715228386Sjfv * ~~~~~~~~~~~~ ~~~~~ ~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 716228386Sjfv * X_reg L,P,A n/a for simple PHY reg accesses 717228386Sjfv * X_reg_locked P,A L for multiple accesses of different regs 718228386Sjfv * on different pages 719228386Sjfv * X_reg_page A L,P for multiple accesses of different regs 720228386Sjfv * on the same page 721228386Sjfv * 722228386Sjfv * Where X=[read|write], L=locking, P=sets page, A=register access 723228386Sjfv * 724228386Sjfv */ 725177867Sjfvstruct e1000_phy_operations { 726177867Sjfv s32 (*init_params)(struct e1000_hw *); 727177867Sjfv s32 (*acquire)(struct e1000_hw *); 728185353Sjfv s32 (*cfg_on_link_up)(struct e1000_hw *); 729173788Sjfv s32 (*check_polarity)(struct e1000_hw *); 730173788Sjfv s32 (*check_reset_block)(struct e1000_hw *); 731177867Sjfv s32 (*commit)(struct e1000_hw *); 732173788Sjfv s32 (*force_speed_duplex)(struct e1000_hw *); 733173788Sjfv s32 (*get_cfg_done)(struct e1000_hw *hw); 734173788Sjfv s32 (*get_cable_length)(struct e1000_hw *); 735177867Sjfv s32 (*get_info)(struct e1000_hw *); 736228386Sjfv s32 (*set_page)(struct e1000_hw *, u16); 737177867Sjfv s32 (*read_reg)(struct e1000_hw *, u32, u16 *); 738200243Sjfv s32 (*read_reg_locked)(struct e1000_hw *, u32, u16 *); 739228386Sjfv s32 (*read_reg_page)(struct e1000_hw *, u32, u16 *); 740177867Sjfv void (*release)(struct e1000_hw *); 741177867Sjfv s32 (*reset)(struct e1000_hw *); 742173788Sjfv s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); 743173788Sjfv s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); 744177867Sjfv s32 (*write_reg)(struct e1000_hw *, u32, u16); 745200243Sjfv s32 (*write_reg_locked)(struct e1000_hw *, u32, u16); 746228386Sjfv s32 (*write_reg_page)(struct e1000_hw *, u32, u16); 747177867Sjfv void (*power_up)(struct e1000_hw *); 748177867Sjfv void (*power_down)(struct e1000_hw *); 749228386Sjfv s32 (*read_i2c_byte)(struct e1000_hw *, u8, u8, u8 *); 750228386Sjfv s32 (*write_i2c_byte)(struct e1000_hw *, u8, u8, u8); 751177867Sjfv}; 752169240Sjfv 753247064Sjfv/* Function pointers for the NVM. */ 754177867Sjfvstruct e1000_nvm_operations { 755177867Sjfv s32 (*init_params)(struct e1000_hw *); 756177867Sjfv s32 (*acquire)(struct e1000_hw *); 757177867Sjfv s32 (*read)(struct e1000_hw *, u16, u16, u16 *); 758177867Sjfv void (*release)(struct e1000_hw *); 759177867Sjfv void (*reload)(struct e1000_hw *); 760177867Sjfv s32 (*update)(struct e1000_hw *); 761173788Sjfv s32 (*valid_led_default)(struct e1000_hw *, u16 *); 762177867Sjfv s32 (*validate)(struct e1000_hw *); 763177867Sjfv s32 (*write)(struct e1000_hw *, u16, u16, u16 *); 764169240Sjfv}; 765169240Sjfv 766169240Sjfvstruct e1000_mac_info { 767177867Sjfv struct e1000_mac_operations ops; 768218530Sjfv u8 addr[ETH_ADDR_LEN]; 769218530Sjfv u8 perm_addr[ETH_ADDR_LEN]; 770169240Sjfv 771181027Sjfv enum e1000_mac_type type; 772169240Sjfv 773169240Sjfv u32 collision_delta; 774169240Sjfv u32 ledctl_default; 775169240Sjfv u32 ledctl_mode1; 776169240Sjfv u32 ledctl_mode2; 777169240Sjfv u32 mc_filter_type; 778169240Sjfv u32 tx_packet_delta; 779169240Sjfv u32 txcw; 780169240Sjfv 781169240Sjfv u16 current_ifs_val; 782169240Sjfv u16 ifs_max_val; 783169240Sjfv u16 ifs_min_val; 784169240Sjfv u16 ifs_ratio; 785169240Sjfv u16 ifs_step_size; 786169240Sjfv u16 mta_reg_count; 787200243Sjfv u16 uta_reg_count; 788194865Sjfv 789194865Sjfv /* Maximum size of the MTA register table in all supported adapters */ 790194865Sjfv #define MAX_MTA_REG 128 791190872Sjfv u32 mta_shadow[MAX_MTA_REG]; 792169240Sjfv u16 rar_entry_count; 793169240Sjfv 794169240Sjfv u8 forced_speed_duplex; 795169240Sjfv 796173788Sjfv bool adaptive_ifs; 797205869Sjfv bool has_fwsm; 798173788Sjfv bool arc_subsystem_valid; 799173788Sjfv bool asf_firmware_present; 800173788Sjfv bool autoneg; 801173788Sjfv bool autoneg_failed; 802173788Sjfv bool get_link_status; 803173788Sjfv bool in_ifs_mode; 804173788Sjfv bool report_tx_early; 805190872Sjfv enum e1000_serdes_link_state serdes_link_state; 806173788Sjfv bool serdes_has_link; 807173788Sjfv bool tx_pkt_filtering; 808247064Sjfv u32 max_frame_size; 809169240Sjfv}; 810169240Sjfv 811169240Sjfvstruct e1000_phy_info { 812177867Sjfv struct e1000_phy_operations ops; 813181027Sjfv enum e1000_phy_type type; 814169240Sjfv 815181027Sjfv enum e1000_1000t_rx_status local_rx; 816181027Sjfv enum e1000_1000t_rx_status remote_rx; 817181027Sjfv enum e1000_ms_type ms_type; 818181027Sjfv enum e1000_ms_type original_ms_type; 819181027Sjfv enum e1000_rev_polarity cable_polarity; 820181027Sjfv enum e1000_smart_speed smart_speed; 821169240Sjfv 822169240Sjfv u32 addr; 823169240Sjfv u32 id; 824169240Sjfv u32 reset_delay_us; /* in usec */ 825169240Sjfv u32 revision; 826169240Sjfv 827181027Sjfv enum e1000_media_type media_type; 828173788Sjfv 829169240Sjfv u16 autoneg_advertised; 830169240Sjfv u16 autoneg_mask; 831169240Sjfv u16 cable_length; 832169240Sjfv u16 max_cable_length; 833169240Sjfv u16 min_cable_length; 834169240Sjfv 835169240Sjfv u8 mdix; 836169240Sjfv 837173788Sjfv bool disable_polarity_correction; 838173788Sjfv bool is_mdix; 839173788Sjfv bool polarity_correction; 840173788Sjfv bool speed_downgraded; 841173788Sjfv bool autoneg_wait_to_complete; 842169240Sjfv}; 843169240Sjfv 844169240Sjfvstruct e1000_nvm_info { 845177867Sjfv struct e1000_nvm_operations ops; 846181027Sjfv enum e1000_nvm_type type; 847181027Sjfv enum e1000_nvm_override override; 848169240Sjfv 849169240Sjfv u32 flash_bank_size; 850169240Sjfv u32 flash_base_addr; 851169240Sjfv 852169240Sjfv u16 word_size; 853169240Sjfv u16 delay_usec; 854169240Sjfv u16 address_bits; 855169240Sjfv u16 opcode_bits; 856169240Sjfv u16 page_size; 857169240Sjfv}; 858169240Sjfv 859169240Sjfvstruct e1000_bus_info { 860181027Sjfv enum e1000_bus_type type; 861181027Sjfv enum e1000_bus_speed speed; 862181027Sjfv enum e1000_bus_width width; 863169240Sjfv 864169240Sjfv u16 func; 865169240Sjfv u16 pci_cmd_word; 866169240Sjfv}; 867169240Sjfv 868173788Sjfvstruct e1000_fc_info { 869228386Sjfv u32 high_water; /* Flow control high-water mark */ 870228386Sjfv u32 low_water; /* Flow control low-water mark */ 871228386Sjfv u16 pause_time; /* Flow control pause timer */ 872228386Sjfv u16 refresh_time; /* Flow control refresh timer */ 873228386Sjfv bool send_xon; /* Flow control send XON */ 874228386Sjfv bool strict_ieee; /* Strict IEEE mode */ 875228386Sjfv enum e1000_fc_mode current_mode; /* FC mode in effect */ 876228386Sjfv enum e1000_fc_mode requested_mode; /* FC mode requested by caller */ 877173788Sjfv}; 878173788Sjfv 879213234Sjfvstruct e1000_mbx_operations { 880213234Sjfv s32 (*init_params)(struct e1000_hw *hw); 881213234Sjfv s32 (*read)(struct e1000_hw *, u32 *, u16, u16); 882213234Sjfv s32 (*write)(struct e1000_hw *, u32 *, u16, u16); 883213234Sjfv s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16); 884213234Sjfv s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16); 885213234Sjfv s32 (*check_for_msg)(struct e1000_hw *, u16); 886213234Sjfv s32 (*check_for_ack)(struct e1000_hw *, u16); 887213234Sjfv s32 (*check_for_rst)(struct e1000_hw *, u16); 888213234Sjfv}; 889213234Sjfv 890213234Sjfvstruct e1000_mbx_stats { 891213234Sjfv u32 msgs_tx; 892213234Sjfv u32 msgs_rx; 893213234Sjfv 894213234Sjfv u32 acks; 895213234Sjfv u32 reqs; 896213234Sjfv u32 rsts; 897213234Sjfv}; 898213234Sjfv 899213234Sjfvstruct e1000_mbx_info { 900213234Sjfv struct e1000_mbx_operations ops; 901213234Sjfv struct e1000_mbx_stats stats; 902213234Sjfv u32 timeout; 903213234Sjfv u32 usec_delay; 904213234Sjfv u16 size; 905213234Sjfv}; 906213234Sjfv 907185353Sjfvstruct e1000_dev_spec_82541 { 908185353Sjfv enum e1000_dsp_config dsp_config; 909185353Sjfv enum e1000_ffe_config ffe_config; 910185353Sjfv u16 spd_default; 911185353Sjfv bool phy_init_script; 912185353Sjfv}; 913185353Sjfv 914185353Sjfvstruct e1000_dev_spec_82542 { 915185353Sjfv bool dma_fairness; 916185353Sjfv}; 917185353Sjfv 918185353Sjfvstruct e1000_dev_spec_82543 { 919185353Sjfv u32 tbi_compatibility; 920185353Sjfv bool dma_fairness; 921185353Sjfv bool init_phy_disabled; 922185353Sjfv}; 923185353Sjfv 924185353Sjfvstruct e1000_dev_spec_82571 { 925185353Sjfv bool laa_is_present; 926194865Sjfv u32 smb_counter; 927213234Sjfv E1000_MUTEX swflag_mutex; 928185353Sjfv}; 929185353Sjfv 930200243Sjfvstruct e1000_dev_spec_80003es2lan { 931200243Sjfv bool mdic_wa_enable; 932200243Sjfv}; 933200243Sjfv 934185353Sjfvstruct e1000_shadow_ram { 935185353Sjfv u16 value; 936185353Sjfv bool modified; 937185353Sjfv}; 938185353Sjfv 939247064Sjfv#define E1000_SHADOW_RAM_WORDS 2048 940185353Sjfv 941269196Sjfv/* I218 PHY Ultra Low Power (ULP) states */ 942269196Sjfvenum e1000_ulp_state { 943269196Sjfv e1000_ulp_state_unknown, 944269196Sjfv e1000_ulp_state_off, 945269196Sjfv e1000_ulp_state_on, 946269196Sjfv}; 947269196Sjfv 948185353Sjfvstruct e1000_dev_spec_ich8lan { 949185353Sjfv bool kmrn_lock_loss_workaround_enabled; 950185353Sjfv struct e1000_shadow_ram shadow_ram[E1000_SHADOW_RAM_WORDS]; 951200243Sjfv E1000_MUTEX nvm_mutex; 952200243Sjfv E1000_MUTEX swflag_mutex; 953200243Sjfv bool nvm_k1_enabled; 954238148Sjfv bool eee_disable; 955247064Sjfv u16 eee_lp_ability; 956269196Sjfv enum e1000_ulp_state ulp_state; 957185353Sjfv}; 958185353Sjfv 959185353Sjfvstruct e1000_dev_spec_82575 { 960185353Sjfv bool sgmii_active; 961190872Sjfv bool global_device_reset; 962238148Sjfv bool eee_disable; 963228386Sjfv bool module_plugged; 964247064Sjfv bool clear_semaphore_once; 965228386Sjfv u32 mtu; 966247064Sjfv struct sfp_e1000_flags eth_flags; 967256200Sjfv u8 media_port; 968256200Sjfv bool media_changed; 969185353Sjfv}; 970185353Sjfv 971185353Sjfvstruct e1000_dev_spec_vf { 972218530Sjfv u32 vf_number; 973218530Sjfv u32 v2p_mailbox; 974185353Sjfv}; 975185353Sjfv 976169240Sjfvstruct e1000_hw { 977169240Sjfv void *back; 978169240Sjfv 979169240Sjfv u8 *hw_addr; 980169240Sjfv u8 *flash_address; 981169240Sjfv unsigned long io_base; 982169240Sjfv 983169240Sjfv struct e1000_mac_info mac; 984173788Sjfv struct e1000_fc_info fc; 985169240Sjfv struct e1000_phy_info phy; 986169240Sjfv struct e1000_nvm_info nvm; 987169240Sjfv struct e1000_bus_info bus; 988209616Sjfv struct e1000_mbx_info mbx; 989169240Sjfv struct e1000_host_mng_dhcp_cookie mng_cookie; 990169240Sjfv 991185353Sjfv union { 992218530Sjfv struct e1000_dev_spec_82541 _82541; 993218530Sjfv struct e1000_dev_spec_82542 _82542; 994218530Sjfv struct e1000_dev_spec_82543 _82543; 995218530Sjfv struct e1000_dev_spec_82571 _82571; 996200243Sjfv struct e1000_dev_spec_80003es2lan _80003es2lan; 997218530Sjfv struct e1000_dev_spec_ich8lan ich8lan; 998218530Sjfv struct e1000_dev_spec_82575 _82575; 999218530Sjfv struct e1000_dev_spec_vf vf; 1000185353Sjfv } dev_spec; 1001169240Sjfv 1002169240Sjfv u16 device_id; 1003169240Sjfv u16 subsystem_vendor_id; 1004169240Sjfv u16 subsystem_device_id; 1005169240Sjfv u16 vendor_id; 1006169240Sjfv 1007169240Sjfv u8 revision_id; 1008169240Sjfv}; 1009169240Sjfv 1010181027Sjfv#include "e1000_82541.h" 1011181027Sjfv#include "e1000_82543.h" 1012181027Sjfv#include "e1000_82571.h" 1013181027Sjfv#include "e1000_80003es2lan.h" 1014181027Sjfv#include "e1000_ich8lan.h" 1015181027Sjfv#include "e1000_82575.h" 1016238148Sjfv#include "e1000_i210.h" 1017181027Sjfv 1018169240Sjfv/* These functions must be implemented by drivers */ 1019169240Sjfvvoid e1000_pci_clear_mwi(struct e1000_hw *hw); 1020169240Sjfvvoid e1000_pci_set_mwi(struct e1000_hw *hw); 1021169240Sjfvs32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value); 1022194865Sjfvs32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value); 1023169240Sjfvvoid e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value); 1024169240Sjfvvoid e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value); 1025169240Sjfv 1026169240Sjfv#endif 1027