1235783Skib/*
2235783Skib * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3235783Skib * Copyright (c) 2007-2008 Intel Corporation
4235783Skib *   Jesse Barnes <jesse.barnes@intel.com>
5235783Skib *
6235783Skib * Permission is hereby granted, free of charge, to any person obtaining a
7235783Skib * copy of this software and associated documentation files (the "Software"),
8235783Skib * to deal in the Software without restriction, including without limitation
9235783Skib * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10235783Skib * and/or sell copies of the Software, and to permit persons to whom the
11235783Skib * Software is furnished to do so, subject to the following conditions:
12235783Skib *
13235783Skib * The above copyright notice and this permission notice (including the next
14235783Skib * paragraph) shall be included in all copies or substantial portions of the
15235783Skib * Software.
16235783Skib *
17235783Skib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18235783Skib * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19235783Skib * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20235783Skib * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21235783Skib * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22235783Skib * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23235783Skib * IN THE SOFTWARE.
24235783Skib *
25235783Skib * $FreeBSD: releng/10.2/sys/dev/drm2/i915/intel_drv.h 280369 2015-03-23 13:38:33Z kib $
26235783Skib */
27235783Skib
28235783Skib#ifndef DRM_INTEL_DRV_H
29235783Skib#define	DRM_INTEL_DRV_H
30235783Skib
31235783Skib#include <dev/drm2/i915/i915_drm.h>
32235783Skib#include <dev/drm2/i915/i915_drv.h>
33235783Skib#include <dev/drm2/drm_crtc.h>
34235783Skib#include <dev/drm2/drm_crtc_helper.h>
35235783Skib#include <dev/drm2/drm_fb_helper.h>
36235783Skib
37235783Skib#define _intel_wait_for(DEV, COND, MS, W, WMSG)				\
38235783Skib({									\
39235783Skib	int end, ret;							\
40235783Skib									\
41235783Skib	end = ticks + (MS) * hz / 1000;					\
42235783Skib	ret = 0;							\
43235783Skib									\
44235783Skib	while (!(COND)) {						\
45235783Skib		if (time_after(ticks, end)) {				\
46235783Skib			ret = -ETIMEDOUT;				\
47235783Skib			break;						\
48235783Skib		}							\
49235783Skib		if (W)							\
50235783Skib			pause((WMSG), 1);				\
51235783Skib		else							\
52235783Skib			DELAY(1000);					\
53235783Skib	}								\
54235783Skib									\
55235783Skib	ret;								\
56235783Skib})
57235783Skib
58280369Skib#define wait_for_atomic_us(COND, US) ({ \
59280369Skib	int i, ret__ = -ETIMEDOUT;	\
60280369Skib	for (i = 0; i < (US); i++) {	\
61280369Skib		if ((COND)) {		\
62280369Skib			ret__ = 0;	\
63280369Skib			break;		\
64280369Skib		}			\
65280369Skib		DELAY(1);		\
66280369Skib	}				\
67280369Skib	ret__;				\
68280369Skib})
69280369Skib
70280369Skib#define	wait_for(COND, MS) _intel_wait_for(NULL, COND, MS, 1, "915wfi")
71280369Skib#define	wait_for_atomic(COND, MS) _intel_wait_for(NULL, COND, MS, 0, "915wfa")
72280369Skib
73235783Skib#define KHz(x) (1000*x)
74235783Skib#define MHz(x) KHz(1000*x)
75235783Skib
76235783Skib/* store information about an Ixxx DVO */
77235783Skib/* The i830->i865 use multiple DVOs with multiple i2cs */
78235783Skib/* the i915, i945 have a single sDVO i2c bus - which is different */
79235783Skib#define MAX_OUTPUTS 6
80235783Skib/* maximum connectors per crtcs in the mode set */
81235783Skib#define INTELFB_CONN_LIMIT 4
82235783Skib
83235783Skib#define INTEL_I2C_BUS_DVO 1
84235783Skib#define INTEL_I2C_BUS_SDVO 2
85235783Skib
86235783Skib/* these are outputs from the chip - integrated only
87235783Skib   external chips are via DVO or SDVO output */
88235783Skib#define INTEL_OUTPUT_UNUSED 0
89235783Skib#define INTEL_OUTPUT_ANALOG 1
90235783Skib#define INTEL_OUTPUT_DVO 2
91235783Skib#define INTEL_OUTPUT_SDVO 3
92235783Skib#define INTEL_OUTPUT_LVDS 4
93235783Skib#define INTEL_OUTPUT_TVOUT 5
94235783Skib#define INTEL_OUTPUT_HDMI 6
95235783Skib#define INTEL_OUTPUT_DISPLAYPORT 7
96235783Skib#define INTEL_OUTPUT_EDP 8
97235783Skib
98235783Skib/* Intel Pipe Clone Bit */
99235783Skib#define INTEL_HDMIB_CLONE_BIT 1
100235783Skib#define INTEL_HDMIC_CLONE_BIT 2
101235783Skib#define INTEL_HDMID_CLONE_BIT 3
102235783Skib#define INTEL_HDMIE_CLONE_BIT 4
103235783Skib#define INTEL_HDMIF_CLONE_BIT 5
104235783Skib#define INTEL_SDVO_NON_TV_CLONE_BIT 6
105235783Skib#define INTEL_SDVO_TV_CLONE_BIT 7
106235783Skib#define INTEL_SDVO_LVDS_CLONE_BIT 8
107235783Skib#define INTEL_ANALOG_CLONE_BIT 9
108235783Skib#define INTEL_TV_CLONE_BIT 10
109235783Skib#define INTEL_DP_B_CLONE_BIT 11
110235783Skib#define INTEL_DP_C_CLONE_BIT 12
111235783Skib#define INTEL_DP_D_CLONE_BIT 13
112235783Skib#define INTEL_LVDS_CLONE_BIT 14
113235783Skib#define INTEL_DVO_TMDS_CLONE_BIT 15
114235783Skib#define INTEL_DVO_LVDS_CLONE_BIT 16
115235783Skib#define INTEL_EDP_CLONE_BIT 17
116235783Skib
117235783Skib#define INTEL_DVO_CHIP_NONE 0
118235783Skib#define INTEL_DVO_CHIP_LVDS 1
119235783Skib#define INTEL_DVO_CHIP_TMDS 2
120235783Skib#define INTEL_DVO_CHIP_TVOUT 4
121235783Skib
122235783Skib/* drm_display_mode->private_flags */
123235783Skib#define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
124235783Skib#define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
125235783Skib#define INTEL_MODE_DP_FORCE_6BPC (0x10)
126235783Skib/* This flag must be set by the encoder's mode_fixup if it changes the crtc
127235783Skib * timings in the mode to prevent the crtc fixup from overwriting them.
128235783Skib * Currently only lvds needs that. */
129235783Skib#define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
130235783Skib
131235783Skibstatic inline void
132235783Skibintel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
133235783Skib				int multiplier)
134235783Skib{
135235783Skib	mode->clock *= multiplier;
136235783Skib	mode->private_flags |= multiplier;
137235783Skib}
138235783Skib
139235783Skibstatic inline int
140235783Skibintel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
141235783Skib{
142235783Skib	return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
143235783Skib}
144235783Skib
145235783Skibstruct intel_framebuffer {
146235783Skib	struct drm_framebuffer base;
147235783Skib	struct drm_i915_gem_object *obj;
148235783Skib};
149235783Skib
150235783Skibstruct intel_fbdev {
151235783Skib	struct drm_fb_helper helper;
152235783Skib	struct intel_framebuffer ifb;
153235783Skib	struct list_head fbdev_list;
154235783Skib	struct drm_display_mode *our_mode;
155235783Skib};
156235783Skib
157235783Skibstruct intel_encoder {
158235783Skib	struct drm_encoder base;
159235783Skib	int type;
160235783Skib	bool needs_tv_clock;
161235783Skib	void (*hot_plug)(struct intel_encoder *);
162235783Skib	int crtc_mask;
163235783Skib	int clone_mask;
164235783Skib};
165235783Skib
166235783Skibstruct intel_connector {
167235783Skib	struct drm_connector base;
168235783Skib	struct intel_encoder *encoder;
169235783Skib};
170235783Skib
171235783Skibstruct intel_crtc {
172235783Skib	struct drm_crtc base;
173235783Skib	enum pipe pipe;
174235783Skib	enum plane plane;
175235783Skib	u8 lut_r[256], lut_g[256], lut_b[256];
176235783Skib	int dpms_mode;
177235783Skib	bool active; /* is the crtc on? independent of the dpms mode */
178235783Skib	bool busy; /* is scanout buffer being updated frequently? */
179235783Skib	struct callout idle_callout;
180235783Skib	bool lowfreq_avail;
181235783Skib	struct intel_overlay *overlay;
182235783Skib	struct intel_unpin_work *unpin_work;
183235783Skib	int fdi_lanes;
184235783Skib
185235783Skib	struct drm_i915_gem_object *cursor_bo;
186235783Skib	uint32_t cursor_addr;
187235783Skib	int16_t cursor_x, cursor_y;
188235783Skib	int16_t cursor_width, cursor_height;
189235783Skib	bool cursor_visible;
190235783Skib	unsigned int bpp;
191235783Skib
192280369Skib	/* We can share PLLs across outputs if the timings match */
193280369Skib	struct intel_pch_pll *pch_pll;
194235783Skib};
195235783Skib
196235783Skibstruct intel_plane {
197235783Skib	struct drm_plane base;
198235783Skib	enum pipe pipe;
199235783Skib	struct drm_i915_gem_object *obj;
200235783Skib	bool primary_disabled;
201235783Skib	int max_downscale;
202235783Skib	u32 lut_r[1024], lut_g[1024], lut_b[1024];
203235783Skib	void (*update_plane)(struct drm_plane *plane,
204235783Skib			     struct drm_framebuffer *fb,
205235783Skib			     struct drm_i915_gem_object *obj,
206235783Skib			     int crtc_x, int crtc_y,
207235783Skib			     unsigned int crtc_w, unsigned int crtc_h,
208235783Skib			     uint32_t x, uint32_t y,
209235783Skib			     uint32_t src_w, uint32_t src_h);
210235783Skib	void (*disable_plane)(struct drm_plane *plane);
211235783Skib	int (*update_colorkey)(struct drm_plane *plane,
212235783Skib			       struct drm_intel_sprite_colorkey *key);
213235783Skib	void (*get_colorkey)(struct drm_plane *plane,
214235783Skib			     struct drm_intel_sprite_colorkey *key);
215235783Skib};
216235783Skib
217280369Skibstruct intel_watermark_params {
218280369Skib	unsigned long fifo_size;
219280369Skib	unsigned long max_wm;
220280369Skib	unsigned long default_wm;
221280369Skib	unsigned long guard_size;
222280369Skib	unsigned long cacheline_size;
223280369Skib};
224280369Skib
225280369Skibstruct cxsr_latency {
226280369Skib	int is_desktop;
227280369Skib	int is_ddr3;
228280369Skib	unsigned long fsb_freq;
229280369Skib	unsigned long mem_freq;
230280369Skib	unsigned long display_sr;
231280369Skib	unsigned long display_hpll_disable;
232280369Skib	unsigned long cursor_sr;
233280369Skib	unsigned long cursor_hpll_disable;
234280369Skib};
235280369Skib
236235783Skib#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
237235783Skib#define to_intel_connector(x) container_of(x, struct intel_connector, base)
238235783Skib#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
239235783Skib#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
240235783Skib#define to_intel_plane(x) container_of(x, struct intel_plane, base)
241235783Skib
242235783Skib#define DIP_HEADER_SIZE	5
243235783Skib
244235783Skib#define DIP_TYPE_AVI    0x82
245235783Skib#define DIP_VERSION_AVI 0x2
246235783Skib#define DIP_LEN_AVI     13
247280369Skib#define DIP_AVI_PR_1    0
248280369Skib#define DIP_AVI_PR_2    1
249235783Skib
250235783Skib#define DIP_TYPE_SPD	0x83
251235783Skib#define DIP_VERSION_SPD	0x1
252235783Skib#define DIP_LEN_SPD	25
253235783Skib#define DIP_SPD_UNKNOWN	0
254235783Skib#define DIP_SPD_DSTB	0x1
255235783Skib#define DIP_SPD_DVDP	0x2
256235783Skib#define DIP_SPD_DVHS	0x3
257235783Skib#define DIP_SPD_HDDVR	0x4
258235783Skib#define DIP_SPD_DVC	0x5
259235783Skib#define DIP_SPD_DSC	0x6
260235783Skib#define DIP_SPD_VCD	0x7
261235783Skib#define DIP_SPD_GAME	0x8
262235783Skib#define DIP_SPD_PC	0x9
263235783Skib#define DIP_SPD_BD	0xa
264235783Skib#define DIP_SPD_SCD	0xb
265235783Skib
266235783Skibstruct dip_infoframe {
267235783Skib	uint8_t type;		/* HB0 */
268235783Skib	uint8_t ver;		/* HB1 */
269235783Skib	uint8_t len;		/* HB2 - body len, not including checksum */
270235783Skib	uint8_t ecc;		/* Header ECC */
271235783Skib	uint8_t checksum;	/* PB0 */
272235783Skib	union {
273235783Skib		struct {
274235783Skib			/* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
275235783Skib			uint8_t Y_A_B_S;
276235783Skib			/* PB2 - C 7:6, M 5:4, R 3:0 */
277235783Skib			uint8_t C_M_R;
278235783Skib			/* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
279235783Skib			uint8_t ITC_EC_Q_SC;
280235783Skib			/* PB4 - VIC 6:0 */
281235783Skib			uint8_t VIC;
282280369Skib			/* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
283280369Skib			uint8_t YQ_CN_PR;
284235783Skib			/* PB6 to PB13 */
285235783Skib			uint16_t top_bar_end;
286235783Skib			uint16_t bottom_bar_start;
287235783Skib			uint16_t left_bar_end;
288235783Skib			uint16_t right_bar_start;
289280369Skib		} __attribute__ ((packed)) avi;
290235783Skib		struct {
291235783Skib			uint8_t vn[8];
292235783Skib			uint8_t pd[16];
293235783Skib			uint8_t sdi;
294280369Skib		} __attribute__ ((packed)) spd;
295235783Skib		uint8_t payload[27];
296235783Skib	} __attribute__ ((packed)) body;
297235783Skib} __attribute__((packed));
298235783Skib
299280369Skibstruct intel_hdmi {
300280369Skib	struct intel_encoder base;
301280369Skib	u32 sdvox_reg;
302280369Skib	int ddc_bus;
303280369Skib	int ddi_port;
304280369Skib	uint32_t color_range;
305280369Skib	bool has_hdmi_sink;
306280369Skib	bool has_audio;
307280369Skib	enum hdmi_force_audio force_audio;
308280369Skib	void (*write_infoframe)(struct drm_encoder *encoder,
309280369Skib				struct dip_infoframe *frame);
310280369Skib};
311280369Skib
312235783Skibstatic inline struct drm_crtc *
313235783Skibintel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
314235783Skib{
315235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
316235783Skib	return dev_priv->pipe_to_crtc_mapping[pipe];
317235783Skib}
318235783Skib
319235783Skibstatic inline struct drm_crtc *
320235783Skibintel_get_crtc_for_plane(struct drm_device *dev, int plane)
321235783Skib{
322235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
323235783Skib	return dev_priv->plane_to_crtc_mapping[plane];
324235783Skib}
325235783Skib
326235783Skibstruct intel_unpin_work {
327235783Skib	struct task task;
328235783Skib	struct drm_device *dev;
329235783Skib	struct drm_i915_gem_object *old_fb_obj;
330235783Skib	struct drm_i915_gem_object *pending_flip_obj;
331235783Skib	struct drm_pending_vblank_event *event;
332235783Skib	int pending;
333235783Skib	bool enable_stall_check;
334235783Skib};
335235783Skib
336235783Skibstruct intel_fbc_work {
337235783Skib	struct timeout_task task;
338235783Skib	struct drm_crtc *crtc;
339235783Skib	struct drm_framebuffer *fb;
340235783Skib	int interval;
341235783Skib};
342235783Skib
343235783Skibint intel_ddc_get_modes(struct drm_connector *c, device_t adapter);
344235783Skibextern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
345235783Skib
346235783Skibextern void intel_attach_force_audio_property(struct drm_connector *connector);
347235783Skibextern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
348235783Skib
349235783Skibextern void intel_crt_init(struct drm_device *dev);
350235783Skibextern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
351280369Skibextern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
352280369Skibextern void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
353280369Skib			    struct drm_display_mode *adjusted_mode);
354280369Skibextern void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder);
355280369Skibextern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
356280369Skibextern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
357280369Skib			    bool is_sdvob);
358235783Skibextern void intel_dvo_init(struct drm_device *dev);
359235783Skibextern void intel_tv_init(struct drm_device *dev);
360235783Skibextern void intel_mark_busy(struct drm_device *dev,
361235783Skib			    struct drm_i915_gem_object *obj);
362235783Skibextern bool intel_lvds_init(struct drm_device *dev);
363235783Skibextern void intel_dp_init(struct drm_device *dev, int dp_reg);
364235783Skibvoid
365235783Skibintel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
366235783Skib		 struct drm_display_mode *adjusted_mode);
367235783Skibextern bool intel_dpd_is_edp(struct drm_device *dev);
368235783Skibextern void intel_edp_link_config(struct intel_encoder *, int *, int *);
369235783Skibextern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
370235783Skibextern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
371280369Skibextern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
372280369Skib				      enum plane plane);
373235783Skib
374280369Skibvoid intel_sanitize_pm(struct drm_device *dev);
375280369Skib
376235783Skib/* intel_panel.c */
377235783Skibextern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
378235783Skib				   struct drm_display_mode *adjusted_mode);
379235783Skibextern void intel_pch_panel_fitting(struct drm_device *dev,
380235783Skib				    int fitting_mode,
381254797Sdumbbell				    const struct drm_display_mode *mode,
382235783Skib				    struct drm_display_mode *adjusted_mode);
383235783Skibextern u32 intel_panel_get_max_backlight(struct drm_device *dev);
384235783Skibextern u32 intel_panel_get_backlight(struct drm_device *dev);
385235783Skibextern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
386235783Skibextern int intel_panel_setup_backlight(struct drm_device *dev);
387235783Skibextern void intel_panel_enable_backlight(struct drm_device *dev);
388235783Skibextern void intel_panel_disable_backlight(struct drm_device *dev);
389235783Skibextern void intel_panel_destroy_backlight(struct drm_device *dev);
390235783Skibextern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
391235783Skib
392235783Skibextern void intel_crtc_load_lut(struct drm_crtc *crtc);
393235783Skibextern void intel_encoder_prepare(struct drm_encoder *encoder);
394235783Skibextern void intel_encoder_commit(struct drm_encoder *encoder);
395235783Skibextern void intel_encoder_destroy(struct drm_encoder *encoder);
396235783Skib
397235783Skibstatic inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
398235783Skib{
399235783Skib	return to_intel_connector(connector)->encoder;
400235783Skib}
401235783Skib
402235783Skibextern void intel_connector_attach_encoder(struct intel_connector *connector,
403235783Skib					   struct intel_encoder *encoder);
404235783Skibextern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
405235783Skib
406235783Skibextern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
407235783Skib						    struct drm_crtc *crtc);
408235783Skibint intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
409235783Skib				struct drm_file *file_priv);
410235783Skibextern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
411235783Skibextern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
412235783Skib
413235783Skibstruct intel_load_detect_pipe {
414235783Skib	struct drm_framebuffer *release_fb;
415235783Skib	bool load_detect_temp;
416235783Skib	int dpms_mode;
417235783Skib};
418235783Skibextern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
419235783Skib				       struct drm_connector *connector,
420235783Skib				       struct drm_display_mode *mode,
421235783Skib				       struct intel_load_detect_pipe *old);
422235783Skibextern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
423235783Skib					   struct drm_connector *connector,
424235783Skib					   struct intel_load_detect_pipe *old);
425235783Skib
426235783Skibextern void intelfb_restore(void);
427235783Skibextern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
428235783Skib				    u16 blue, int regno);
429235783Skibextern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
430235783Skib				    u16 *blue, int regno);
431235783Skibextern void intel_enable_clock_gating(struct drm_device *dev);
432280369Skibextern void ironlake_disable_rc6(struct drm_device *dev);
433235783Skibextern void ironlake_enable_drps(struct drm_device *dev);
434235783Skibextern void ironlake_disable_drps(struct drm_device *dev);
435235783Skibextern void gen6_enable_rps(struct drm_i915_private *dev_priv);
436235783Skibextern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
437235783Skibextern void gen6_disable_rps(struct drm_device *dev);
438235783Skibextern void intel_init_emon(struct drm_device *dev);
439280369Skibextern int intel_enable_rc6(const struct drm_device *dev);
440235783Skib
441280369Skibextern void intel_ddi_dpms(struct drm_encoder *encoder, int mode);
442280369Skibextern void intel_ddi_mode_set(struct drm_encoder *encoder,
443280369Skib			       struct drm_display_mode *mode,
444280369Skib			       struct drm_display_mode *adjusted_mode);
445280369Skib
446235783Skibextern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
447235783Skib				      struct drm_i915_gem_object *obj,
448235783Skib				      struct intel_ring_buffer *pipelined);
449235783Skibextern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
450235783Skib
451235783Skibextern int intel_framebuffer_init(struct drm_device *dev,
452235783Skib				  struct intel_framebuffer *ifb,
453235783Skib				  struct drm_mode_fb_cmd2 *mode_cmd,
454235783Skib				  struct drm_i915_gem_object *obj);
455235783Skibextern int intel_fbdev_init(struct drm_device *dev);
456235783Skibextern void intel_fbdev_fini(struct drm_device *dev);
457235783Skib
458235783Skibextern void intel_prepare_page_flip(struct drm_device *dev, int plane);
459235783Skibextern void intel_finish_page_flip(struct drm_device *dev, int pipe);
460235783Skibextern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
461235783Skib
462235783Skibextern void intel_setup_overlay(struct drm_device *dev);
463235783Skibextern void intel_cleanup_overlay(struct drm_device *dev);
464235783Skibextern int intel_overlay_switch_off(struct intel_overlay *overlay);
465235783Skibextern int intel_overlay_put_image(struct drm_device *dev, void *data,
466235783Skib				   struct drm_file *file_priv);
467235783Skibextern int intel_overlay_attrs(struct drm_device *dev, void *data,
468235783Skib			       struct drm_file *file_priv);
469235783Skib
470235783Skibextern void intel_fb_output_poll_changed(struct drm_device *dev);
471235783Skibextern void intel_fb_restore_mode(struct drm_device *dev);
472235783Skib
473235783Skibextern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
474235783Skib			bool state);
475235783Skib#define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
476235783Skib#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
477235783Skib
478235783Skibextern void intel_init_clock_gating(struct drm_device *dev);
479235783Skibextern void intel_write_eld(struct drm_encoder *encoder,
480235783Skib			    struct drm_display_mode *mode);
481235783Skibextern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
482280369Skibextern void intel_prepare_ddi(struct drm_device *dev);
483280369Skibextern void hsw_fdi_link_train(struct drm_crtc *crtc);
484280369Skibextern void intel_ddi_init(struct drm_device *dev, enum port port);
485235783Skib
486235783Skib/* For use by IVB LP watermark workaround in intel_sprite.c */
487280369Skibextern void intel_update_watermarks(struct drm_device *dev);
488235783Skibextern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
489235783Skib					   uint32_t sprite_width,
490235783Skib					   int pixel_size);
491280369Skibextern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
492280369Skib			 struct drm_display_mode *mode);
493280369Skib
494235783Skibextern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
495235783Skib				     struct drm_file *file_priv);
496235783Skibextern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
497235783Skib				     struct drm_file *file_priv);
498235783Skib
499280369Skibextern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
500280369Skib
501280369Skib/* Power-related functions, located in intel_pm.c */
502280369Skibextern void intel_init_pm(struct drm_device *dev);
503280369Skib/* FBC */
504280369Skibextern bool intel_fbc_enabled(struct drm_device *dev);
505280369Skibextern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
506280369Skibextern void intel_update_fbc(struct drm_device *dev);
507280369Skib
508280369Skib#endif /* __INTEL_DRV_H__ */
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