savage_drm.h revision 145132
1153761Swollman/* savage_drm.h -- Public header for the savage driver 2204887Sedwin * 3192886Sedwin * Copyright 2004 Felix Kuehling 4192886Sedwin * All Rights Reserved. 5153761Swollman * 62742Swollman * Permission is hereby granted, free of charge, to any person obtaining a 786464Swollman * copy of this software and associated documentation files (the "Software"), 82742Swollman * to deal in the Software without restriction, including without limitation 92742Swollman * the rights to use, copy, modify, merge, publish, distribute, sub license, 102742Swollman * and/or sell copies of the Software, and to permit persons to whom the 112742Swollman * Software is furnished to do so, subject to the following conditions: 122742Swollman * 132742Swollman * The above copyright notice and this permission notice (including the 1486222Swollman * next paragraph) shall be included in all copies or substantial portions 1586222Swollman * of the Software. 162742Swollman * 1758787Sru * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 182742Swollman * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 192742Swollman * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 202742Swollman * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR 212742Swollman * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF 222742Swollman * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 232742Swollman * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 2458787Sru * 2558787Sru * $FreeBSD: head/sys/dev/drm/savage_drm.h 145132 2005-04-16 03:44:47Z anholt $ 2658787Sru */ 272742Swollman 282742Swollman#ifndef __SAVAGE_DRM_H__ 299908Swollman#define __SAVAGE_DRM_H__ 302742Swollman 3130711Swollman#ifndef __SAVAGE_SAREA_DEFINES__ 322742Swollman#define __SAVAGE_SAREA_DEFINES__ 339908Swollman 34169811Swollman/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 35169811Swollman * regions, subject to a minimum region size of (1<<16) == 64k. 36169811Swollman * 37169811Swollman * Clients may subdivide regions internally, but when sharing between 38169811Swollman * clients, the region size is the minimum granularity. 39169811Swollman */ 40169811Swollman 41169811Swollman#define SAVAGE_CARD_HEAP 0 42169811Swollman#define SAVAGE_AGP_HEAP 1 43169811Swollman#define SAVAGE_NR_TEX_HEAPS 2 44169811Swollman#define SAVAGE_NR_TEX_REGIONS 16 452742Swollman#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16 4658787Sru 47169811Swollman#endif /* __SAVAGE_SAREA_DEFINES__ */ 48169811Swollman 49169811Swollmantypedef struct _drm_savage_sarea { 50169811Swollman /* LRU lists for texture memory in agp space and on the card. 51169811Swollman */ 529908Swollman drm_tex_region_t texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS+1]; 5320094Swollman unsigned int texAge[SAVAGE_NR_TEX_HEAPS]; 54149514Swollman 5520094Swollman /* Mechanism to validate card state. 5620094Swollman */ 5720094Swollman int ctxOwner; 5820094Swollman} drm_savage_sarea_t, *drm_savage_sarea_ptr; 5920094Swollman 6020094Swollman/* Savage-specific ioctls 6120094Swollman */ 6220094Swollman#define DRM_SAVAGE_BCI_INIT 0x00 6320094Swollman#define DRM_SAVAGE_BCI_CMDBUF 0x01 6420094Swollman#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02 6520094Swollman#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03 6658787Sru 6758787Sru#define DRM_IOCTL_SAVAGE_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t) 6821217Swollman#define DRM_IOCTL_SAVAGE_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t) 6921217Swollman#define DRM_IOCTL_SAVAGE_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t) 7058787Sru#define DRM_IOCTL_SAVAGE_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t) 7158787Sru 722742Swollman#define SAVAGE_DMA_PCI 1 7358787Sru#define SAVAGE_DMA_AGP 3 7421217Swollmantypedef struct drm_savage_init { 7520094Swollman enum { 7658787Sru SAVAGE_INIT_BCI = 1, 7758787Sru SAVAGE_CLEANUP_BCI = 2 7820094Swollman } func; 792742Swollman unsigned int sarea_priv_offset; 809908Swollman 812742Swollman /* some parameters */ 8214343Swollman unsigned int cob_size; 8314343Swollman unsigned int bci_threshold_lo, bci_threshold_hi; 84171948Sedwin unsigned int dma_type; 8514343Swollman 8614343Swollman /* frame buffer layout */ 8714343Swollman unsigned int fb_bpp; 8864499Swollman unsigned int front_offset, front_pitch; 8964499Swollman unsigned int back_offset, back_pitch; 9064499Swollman unsigned int depth_bpp; 9164499Swollman unsigned int depth_offset, depth_pitch; 9264499Swollman 93149514Swollman /* local textures */ 94149514Swollman unsigned int texture_offset; 95171948Sedwin unsigned int texture_size; 96171948Sedwin 97171948Sedwin /* physical locations of non-permanent maps */ 982742Swollman unsigned long status_offset; 992742Swollman unsigned long buffers_offset; 1002742Swollman unsigned long agp_textures_offset; 10158787Sru unsigned long cmd_dma_offset; 1022742Swollman} drm_savage_init_t; 1032742Swollman 1049908Swollmantypedef union drm_savage_cmd_header drm_savage_cmd_header_t; 105149514Swollmantypedef struct drm_savage_cmdbuf { 106149514Swollman /* command buffer in client's address space */ 107149514Swollman drm_savage_cmd_header_t __user *cmd_addr; 108149514Swollman unsigned int size; /* size of the command buffer in 64bit units */ 109149514Swollman 1102742Swollman unsigned int dma_idx; /* DMA buffer index to use */ 11158787Sru int discard; /* discard DMA buffer when done */ 11258787Sru /* vertex buffer in client's address space */ 11314343Swollman unsigned int __user *vb_addr; 11414343Swollman unsigned int vb_size; /* size of client vertex buffer in bytes */ 11558787Sru unsigned int vb_stride; /* stride of vertices in 32bit words */ 11614343Swollman /* boxes in client's address space */ 11714343Swollman drm_clip_rect_t __user *box_addr; 11814343Swollman unsigned int nbox; /* number of clipping boxes */ 11958787Sru} drm_savage_cmdbuf_t; 12014343Swollman 12158787Sru#define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */ 12258787Sru#define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */ 12358787Sru#define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */ 124149514Swollmantypedef struct drm_savage_event { 12558787Sru unsigned int count; 12658787Sru unsigned int flags; 127149514Swollman} drm_savage_event_emit_t, drm_savage_event_wait_t; 128171948Sedwin 129171948Sedwin/* Commands for the cmdbuf ioctl 1302742Swollman */ 1312742Swollman#define SAVAGE_CMD_STATE 0 /* a range of state registers */ 13258787Sru#define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */ 13358787Sru#define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */ 13458787Sru#define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */ 1352742Swollman#define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */ 136149514Swollman#define SAVAGE_CMD_CLEAR 5 /* clear buffers */ 137149514Swollman#define SAVAGE_CMD_SWAP 6 /* swap buffers */ 138149514Swollman 139149514Swollman/* Primitive types 140149514Swollman*/ 1412742Swollman#define SAVAGE_PRIM_TRILIST 0 /* triangle list */ 1429908Swollman#define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */ 1432742Swollman#define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */ 14414343Swollman#define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat 14558787Sru * shading on s3d */ 14614343Swollman 14714343Swollman/* Skip flags (vertex format) 14858787Sru */ 14958787Sru#define SAVAGE_SKIP_Z 0x01 15014343Swollman#define SAVAGE_SKIP_W 0x02 151149514Swollman#define SAVAGE_SKIP_C0 0x04 15258787Sru#define SAVAGE_SKIP_C1 0x08 153171948Sedwin#define SAVAGE_SKIP_S0 0x10 154149514Swollman#define SAVAGE_SKIP_T0 0x20 155171948Sedwin#define SAVAGE_SKIP_ST0 0x30 156171948Sedwin#define SAVAGE_SKIP_S1 0x40 157171948Sedwin#define SAVAGE_SKIP_T1 0x80 1582742Swollman#define SAVAGE_SKIP_ST1 0xc0 1592742Swollman#define SAVAGE_SKIP_ALL_S3D 0x3f 16058787Sru#define SAVAGE_SKIP_ALL_S4 0xff 1612742Swollman 1622742Swollman/* Buffer names for clear command 1639908Swollman */ 1642742Swollman#define SAVAGE_FRONT 0x1 16514343Swollman#define SAVAGE_BACK 0x2 16614343Swollman#define SAVAGE_DEPTH 0x4 16714343Swollman 16814343Swollman/* 64-bit command header 16914343Swollman */ 17014343Swollmanunion drm_savage_cmd_header { 17114343Swollman struct { 17243543Swollman unsigned char cmd; /* command */ 17314343Swollman unsigned char pad0; 174149514Swollman unsigned short pad1; 17558787Sru unsigned short pad2; 176171948Sedwin unsigned short pad3; 177149514Swollman } cmd; /* generic */ 178171948Sedwin struct { 179171948Sedwin unsigned char cmd; 180171948Sedwin unsigned char global; /* need idle engine? */ 1812742Swollman unsigned short count; /* number of consecutive registers */ 1822742Swollman unsigned short start; /* first register */ 18358787Sru unsigned short pad3; 1842742Swollman } state; /* SAVAGE_CMD_STATE */ 1852742Swollman struct { 1862742Swollman unsigned char cmd; 1872742Swollman unsigned char prim; /* primitive type */ 18858787Sru unsigned short skip; /* vertex format (skip flags) */ 18958787Sru unsigned short count; /* number of vertices */ 19058787Sru unsigned short start; /* first vertex in DMA/vertex buffer */ 1918029Swollman } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */ 19214343Swollman struct { 19314343Swollman unsigned char cmd; 19475267Swollman unsigned char prim; 19575267Swollman unsigned short skip; 19675267Swollman unsigned short count; /* number of indices that follow */ 19775267Swollman unsigned short pad3; 19875267Swollman } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */ 19975267Swollman struct { 20075267Swollman unsigned char cmd; 201149514Swollman unsigned char pad0; 20275267Swollman unsigned short pad1; 203171948Sedwin unsigned int flags; 204149514Swollman } clear0; /* SAVAGE_CMD_CLEAR */ 205171948Sedwin struct { 206171948Sedwin unsigned int mask; 207171948Sedwin unsigned int value; 2082742Swollman } clear1; /* SAVAGE_CMD_CLEAR data */ 2092742Swollman}; 21014343Swollman 2118029Swollman#endif 21214343Swollman