bshwvar.h revision 285830
1/* $FreeBSD: releng/10.2/sys/dev/ct/bshwvar.h 139749 2005-01-06 01:43:34Z imp $ */ 2/* $NecBSD: bshwvar.h,v 1.3.14.3 2001/06/21 04:07:37 honda Exp $ */ 3/* $NetBSD$ */ 4 5/*- 6 * [NetBSD for NEC PC-98 series] 7 * Copyright (c) 1994, 1995, 1996, 1997, 1998 8 * NetBSD/pc98 porting staff. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33#ifndef _BSHWVAR_H_ 34#define _BSHWVAR_H_ 35 36/* 37 * bshwvar.h 38 * NEC 55 compatible board specific definitions 39 */ 40 41#define BSHW_DEFAULT_CHIPCLK 20 /* 20MHz */ 42#define BSHW_DEFAULT_HOSTID 7 43 44struct bshw { 45#define BSHW_SYNC_RELOAD 0x01 46#define BSHW_SMFIFO 0x02 47#define BSHW_DOUBLE_DMACHAN 0x04 48 u_int hw_flags; 49 u_int hw_sregaddr; 50 51 int ((*hw_dma_init)(struct ct_softc *)); 52 void ((*hw_dma_start)(struct ct_softc *)); 53 void ((*hw_dma_stop)(struct ct_softc *)); 54}; 55 56struct bshw_softc { 57 int sc_hostid; 58 int sc_irq; /* irq */ 59 int sc_drq; /* drq */ 60 61 /* dma transfer */ 62 u_int8_t *sc_segaddr; 63 u_int8_t *sc_bufp; 64 int sc_seglen; 65 u_int sc_sdatalen; /* SMIT */ 66 u_int sc_edatalen; /* SMIT */ 67 68 /* private bounce */ 69 u_int8_t *sc_bounce_phys; 70 u_int8_t *sc_bounce_addr; 71 u_int sc_bounce_size; 72 bus_addr_t sc_minphys; 73 74 /* io control */ 75#define BSHW_READ_INTERRUPT_DRIVEN 0x0001 76#define BSHW_WRITE_INTERRUPT_DRIVEN 0x0002 77#define BSHW_DMA_BLOCK 0x0010 78#define BSHW_SMIT_BLOCK 0x0020 79 u_int sc_io_control; 80 81 /* hardware */ 82 struct bshw *sc_hw; 83 void ((*sc_dmasync_before))(struct ct_softc *); 84 void ((*sc_dmasync_after))(struct ct_softc *); 85}; 86 87void bshw_synch_setup(struct ct_softc *, struct targ_info *); 88void bshw_bus_reset(struct ct_softc *); 89int bshw_read_settings(struct ct_bus_access_handle *, struct bshw_softc *); 90int bshw_smit_xfer_start(struct ct_softc *); 91void bshw_smit_xfer_stop(struct ct_softc *); 92int bshw_dma_xfer_start(struct ct_softc *); 93void bshw_dma_xfer_stop(struct ct_softc *); 94 95extern struct dvcfg_hwsel bshw_hwsel; 96#endif /* !_BSHWVAR_H_ */ 97