cfi_reg.h revision 188156
150477Speter/*- 22834Swollman * Copyright (c) 2007, Juniper Networks, Inc. 3156813Sru * All rights reserved. 4156813Sru * 5265999Sian * Redistribution and use in source and binary forms, with or without 6265999Sian * modification, are permitted provided that the following conditions 7230972Srmh * are met: 8230972Srmh * 1. Redistributions of source code must retain the above copyright 9230972Srmh * notice, this list of conditions and the following disclaimer. 10236621Sobrien * 2. Redistributions in binary form must reproduce the above copyright 11236621Sobrien * notice, this list of conditions and the following disclaimer in the 12156260Syar * documentation and/or other materials provided with the distribution. 13124591Sru * 3. Neither the name of the author nor the names of any co-contributors 14250963Sachim * may be used to endorse or promote products derived from this software 15124591Sru * without specific prior written permission. 16180593Sdwmalone * 1779745Sbrooks * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18232937Sadrian * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19232937Sadrian * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20124591Sru * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21183567Sstas * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22210409Skib * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23179101Syongari * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24124591Sru * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 2579745Sbrooks * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26131292Simp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27195534Sscottl * SUCH DAMAGE. 28124591Sru * 29106389Sscottl * $FreeBSD: head/sys/dev/cfi/cfi_reg.h 188156 2009-02-05 18:12:07Z sam $ 3088633Salfred */ 31198279Savg 32198279Savg#ifndef _DEV_CFI_REG_H_ 33205959Slstewart#define _DEV_CFI_REG_H_ 34199969Savg 35189768Srpaulostruct cfi_qry { 3679745Sbrooks u_char reserved[16]; 37155341Simp u_char ident[3]; /* "QRY" */ 38124591Sru u_char pri_vend[2]; 39124591Sru u_char pri_vend_eqt[2]; 40144423Sscottl u_char alt_vend[2]; 41129275Sru u_char alt_vend_eqt[2]; 42173427Srpaulo /* System Interface Information. */ 43124591Sru u_char min_vcc; 44144330Ssos u_char max_vcc; 45185522Ssam u_char min_vpp; 46220185Sadrian u_char max_vpp; 47270892Strasz u_char tto_byte_write; /* 2**n milliseconds. */ 48136301Syongari u_char tto_buf_write; /* 2**n milliseconds. */ 49230972Srmh u_char tto_block_erase; /* 2**n milliseconds. */ 50119917Swpaul u_char tto_chip_erase; /* 2**n milliseconds. */ 5184059Swpaul u_char mto_byte_write; /* 2**n times typical t/o. */ 52221030Sdavidch u_char mto_buf_write; /* 2**n times typical t/o. */ 53124591Sru u_char mto_block_erase; /* 2**n times typical t/o. */ 54124591Sru u_char mto_chip_erase; /* 2**n times typical t/o. */ 55179645Smarcel /* Device Geometry Definition. */ 56160729Sthompsa u_char size; /* 2**n bytes. */ 57206501Simp u_char iface[2]; 58206501Simp u_char max_buf_write_size[2]; /* 2**n. */ 59104313Sjake u_char nregions; /* Number of erase regions. */ 60124591Sru u_char region[4]; /* Single entry. */ 61124591Sru /* Additional entries follow. */ 62124591Sru /* Primary Vendor-specific Extended Query table follows. */ 63228576Sglebius /* Alternate Vendor-specific Extended Query table follows. */ 64194246Smarius}; 65124591Sru 66216109Slstewart#define CFI_QRY_CMD_ADDR 0x55 67104313Sjake#define CFI_QRY_CMD_DATA 0x98 68120492Sfjoe 69155159Srik#define CFI_QRY_IDENT offsetof(struct cfi_qry, ident) 70228981Smarcel#define CFI_QRY_VEND offsetof(struct cfi_qry, pri_vend) 71124591Sru 72124591Sru#define CFI_QRY_TTO_WRITE offsetof(struct cfi_qry, tto_byte_write) 73176868Srink#define CFI_QRY_TTO_ERASE offsetof(struct cfi_qry, tto_block_erase) 74124591Sru#define CFI_QRY_MTO_WRITE offsetof(struct cfi_qry, mto_byte_write) 75171854Sdes#define CFI_QRY_MTO_ERASE offsetof(struct cfi_qry, mto_block_erase) 76129339Srik 77239281Sgonzo#define CFI_QRY_SIZE offsetof(struct cfi_qry, size) 78181430Sstas#define CFI_QRY_IFACE offsetof(struct cfi_qry, iface) 79141339Sscottl#define CFI_QRY_NREGIONS offsetof(struct cfi_qry, nregions) 80105251Smarkm#define CFI_QRY_REGION0 offsetof(struct cfi_qry, region) 81105251Smarkm#define CFI_QRY_REGION(x) (CFI_QRY_REGION0 + (x) * 4) 82140875Simp 83240170Sjhb#define CFI_VEND_NONE 0x0000 84127409Srik#define CFI_VEND_INTEL_ECS 0x0001 85249009Strasz#define CFI_VEND_AMD_SCS 0x0002 86205845Simp#define CFI_VEND_INTEL_SCS 0x0003 87252491Srmh#define CFI_VEND_AMD_ECS 0x0004 88179262Sjb#define CFI_VEND_MITSUBISHI_SCS 0x0100 8979745Sbrooks#define CFI_VEND_MITSUBISHI_ECS 0x0101 90121468Ssimokawa 91121468Ssimokawa#define CFI_IFACE_X8 0x0000 9279745Sbrooks#define CFI_IFACE_X16 0x0001 93182081Sjhb#define CFI_IFACE_X8X16 0x0002 94124591Sru#define CFI_IFACE_X32 0x0003 95124591Sru#define CFI_IFACE_X16X32 0x0005 96235859Skib 97179262Sjb/* Standard Command Set (aka Basic Command Set) */ 9884528Sps#define CFI_BCS_BLOCK_ERASE 0x20 99124591Sru#define CFI_BCS_PROGRAM 0x40 100124591Sru#define CFI_BCS_CLEAR_STATUS 0x50 101124591Sru#define CFI_BCS_READ_STATUS 0x70 102116441Sharti#define CFI_BCS_ERASE_SUSPEND 0xb0 103124591Sru#define CFI_BCS_ERASE_RESUME 0xd0 /* Equals CONFIRM */ 104202006Smarius#define CFI_BCS_CONFIRM 0xd0 105227006Smarius#define CFI_BCS_READ_ARRAY 0xff 106179895Sdelphij 107124591Sru/* Intel commands. */ 108124591Sru#define CFI_INTEL_READ_ID 0x90 /* Read Identifier */ 109124591Sru#define CFI_INTEL_PP_SETUP 0xc0 /* Protection Program Setup */ 110230972Srmh 111105594Sbde/* NB: these are addresses for 16-bit accesses */ 11279745Sbrooks#define CFI_INTEL_PLR 0x80 /* Protection Lock Register */ 113124591Sru#define CFI_INTEL_PR(n) (0x81+(n)) /* Protection Register */ 114241351Sobrien 115106556Sjhb/* Status register definitions */ 116154974Smlaier#define CFI_INTEL_STATUS_WSMS 0x0080 /* Write Machine Status */ 117241519Sattilio#define CFI_INTEL_STATUS_ESS 0x0040 /* Erase Suspend Status */ 118230972Srmh#define CFI_INTEL_STATUS_ECLBS 0x0020 /* Erase and Clear Lock-Bit Status */ 119172334Smarius#define CFI_INTEL_STATUS_PSLBS 0x0010 /* Program and Set Lock-Bit Status */ 120115479Sphk#define CFI_INTEL_STATUS_VPENS 0x0008 /* Programming Voltage Status */ 121221961Sbrix#define CFI_INTEL_STATUS_PSS 0x0004 /* Program Suspend Status */ 122181467Sphilip#define CFI_INTEL_STATUS_DPS 0x0002 /* Device Protect Status */ 123116491Sharti#define CFI_INTEL_STATUS_RSVD 0x0001 /* reserved */ 124104487Ssam 125133733Smarius/* eXtended Status register definitions */ 126228940Sdelphij#define CFI_INTEL_XSTATUS_WBS 0x8000 /* Write Buffer Status */ 127169421Sscottl#define CFI_INTEL_XSTATUS_RSVD 0x7f00 /* reserved */ 128136858Sscottl 129252867Sdelphij/* AMD commands. */ 130174604Sscottl#define CFI_AMD_BLOCK_ERASE 0x30 131145344Smarcel#define CFI_AMD_UNLOCK_ACK 0x55 132255524Sgrehan#define CFI_AMD_ERASE_SECTOR 0x80 133124591Sru#define CFI_AMD_PROGRAM 0xa0 134255932Salfred#define CFI_AMD_UNLOCK 0xaa 135124591Sru 136129124Sdes#define AMD_ADDR_START 0xaaa 137124591Sru#define AMD_ADDR_ACK 0x555 138124591Sru 139146987Sthompsa#endif /* _DEV_CFI_REG_H_ */ 14079745Sbrooks