ar5416_gpio.c revision 185406
1/* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $Id: ar5416_gpio.c,v 1.3 2008/11/10 04:08:04 sam Exp $ 18 */ 19#include "opt_ah.h" 20 21#include "ah.h" 22#include "ah_internal.h" 23#include "ah_devid.h" 24#ifdef AH_DEBUG 25#include "ah_desc.h" /* NB: for HAL_PHYERR* */ 26#endif 27 28#include "ar5416/ar5416.h" 29#include "ar5416/ar5416reg.h" 30#include "ar5416/ar5416phy.h" 31 32#define AR_NUM_GPIO 6 /* 6 GPIO pins */ 33#define AR_GPIO_BIT(_gpio) (1 << _gpio) 34 35/* 36 * Configure GPIO Output lines 37 */ 38HAL_BOOL 39ar5416GpioCfgOutput(struct ath_hal *ah, uint32_t gpio) 40{ 41 HALASSERT(gpio < AR_NUM_GPIO); 42 OS_REG_CLR_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio)); 43 return AH_TRUE; 44} 45 46/* 47 * Configure GPIO Input lines 48 */ 49HAL_BOOL 50ar5416GpioCfgInput(struct ath_hal *ah, uint32_t gpio) 51{ 52 HALASSERT(gpio < AR_NUM_GPIO); 53 OS_REG_SET_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio)); 54 return AH_TRUE; 55} 56 57/* 58 * Once configured for I/O - set output lines 59 */ 60HAL_BOOL 61ar5416GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val) 62{ 63 uint32_t reg; 64 65 HALASSERT(gpio < AR_NUM_GPIO); 66 reg = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_OUT_VAL); 67 if (val & 1) 68 reg |= AR_GPIO_BIT(gpio); 69 else 70 reg &= ~AR_GPIO_BIT(gpio); 71 72 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_OUT_VAL, reg); 73 return AH_TRUE; 74} 75 76/* 77 * Once configured for I/O - get input lines 78 */ 79uint32_t 80ar5416GpioGet(struct ath_hal *ah, uint32_t gpio) 81{ 82 if (gpio >= AR_NUM_GPIO) 83 return 0xffffffff; 84 return ((OS_REG_READ(ah, AR_GPIO_IN) & AR_GPIO_BIT(gpio)) >> gpio); 85} 86 87/* 88 * Set the GPIO Interrupt 89 */ 90void 91ar5416GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel) 92{ 93 uint32_t val; 94 95 HALASSERT(gpio < AR_NUM_GPIO); 96 /* XXX bounds check gpio */ 97 val = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_INTR_CTRL); 98 if (ilevel) /* 0 == interrupt on pin high */ 99 val &= ~AR_GPIO_BIT(gpio); 100 else /* 1 == interrupt on pin low */ 101 val |= AR_GPIO_BIT(gpio); 102 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_INTR_CTRL, val); 103 104 /* Change the interrupt mask. */ 105 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), AR_INTR_GPIO); 106 val |= AR_GPIO_BIT(gpio); 107 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, AR_INTR_GPIO, val); 108 109 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK), AR_INTR_GPIO); 110 val |= AR_GPIO_BIT(gpio); 111 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, AR_INTR_GPIO, val); 112} 113