ar5416_gpio.c revision 185377
1185377Ssam/* 2185377Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3185377Ssam * Copyright (c) 2002-2008 Atheros Communications, Inc. 4185377Ssam * 5185377Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185377Ssam * purpose with or without fee is hereby granted, provided that the above 7185377Ssam * copyright notice and this permission notice appear in all copies. 8185377Ssam * 9185377Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185377Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185377Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185377Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185377Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185377Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185377Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185377Ssam * 17185377Ssam * $Id: ar5416_gpio.c,v 1.3 2008/11/10 04:08:04 sam Exp $ 18185377Ssam */ 19185377Ssam#include "opt_ah.h" 20185377Ssam 21185377Ssam#ifdef AH_SUPPORT_AR5416 22185377Ssam 23185377Ssam#include "ah.h" 24185377Ssam#include "ah_internal.h" 25185377Ssam#include "ah_devid.h" 26185377Ssam#ifdef AH_DEBUG 27185377Ssam#include "ah_desc.h" /* NB: for HAL_PHYERR* */ 28185377Ssam#endif 29185377Ssam 30185377Ssam#include "ar5416/ar5416.h" 31185377Ssam#include "ar5416/ar5416reg.h" 32185377Ssam#include "ar5416/ar5416phy.h" 33185377Ssam 34185377Ssam#define AR_NUM_GPIO 6 /* 6 GPIO pins */ 35185377Ssam#define AR_GPIO_BIT(_gpio) (1 << _gpio) 36185377Ssam 37185377Ssam/* 38185377Ssam * Configure GPIO Output lines 39185377Ssam */ 40185377SsamHAL_BOOL 41185377Ssamar5416GpioCfgOutput(struct ath_hal *ah, uint32_t gpio) 42185377Ssam{ 43185377Ssam HALASSERT(gpio < AR_NUM_GPIO); 44185377Ssam OS_REG_CLR_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio)); 45185377Ssam return AH_TRUE; 46185377Ssam} 47185377Ssam 48185377Ssam/* 49185377Ssam * Configure GPIO Input lines 50185377Ssam */ 51185377SsamHAL_BOOL 52185377Ssamar5416GpioCfgInput(struct ath_hal *ah, uint32_t gpio) 53185377Ssam{ 54185377Ssam HALASSERT(gpio < AR_NUM_GPIO); 55185377Ssam OS_REG_SET_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio)); 56185377Ssam return AH_TRUE; 57185377Ssam} 58185377Ssam 59185377Ssam/* 60185377Ssam * Once configured for I/O - set output lines 61185377Ssam */ 62185377SsamHAL_BOOL 63185377Ssamar5416GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val) 64185377Ssam{ 65185377Ssam uint32_t reg; 66185377Ssam 67185377Ssam HALASSERT(gpio < AR_NUM_GPIO); 68185377Ssam reg = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_OUT_VAL); 69185377Ssam if (val & 1) 70185377Ssam reg |= AR_GPIO_BIT(gpio); 71185377Ssam else 72185377Ssam reg &= ~AR_GPIO_BIT(gpio); 73185377Ssam 74185377Ssam OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_OUT_VAL, reg); 75185377Ssam return AH_TRUE; 76185377Ssam} 77185377Ssam 78185377Ssam/* 79185377Ssam * Once configured for I/O - get input lines 80185377Ssam */ 81185377Ssamuint32_t 82185377Ssamar5416GpioGet(struct ath_hal *ah, uint32_t gpio) 83185377Ssam{ 84185377Ssam if (gpio >= AR_NUM_GPIO) 85185377Ssam return 0xffffffff; 86185377Ssam return ((OS_REG_READ(ah, AR_GPIO_IN) & AR_GPIO_BIT(gpio)) >> gpio); 87185377Ssam} 88185377Ssam 89185377Ssam/* 90185377Ssam * Set the GPIO Interrupt 91185377Ssam */ 92185377Ssamvoid 93185377Ssamar5416GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel) 94185377Ssam{ 95185377Ssam uint32_t val; 96185377Ssam 97185377Ssam HALASSERT(gpio < AR_NUM_GPIO); 98185377Ssam /* XXX bounds check gpio */ 99185377Ssam val = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_INTR_CTRL); 100185377Ssam if (ilevel) /* 0 == interrupt on pin high */ 101185377Ssam val &= ~AR_GPIO_BIT(gpio); 102185377Ssam else /* 1 == interrupt on pin low */ 103185377Ssam val |= AR_GPIO_BIT(gpio); 104185377Ssam OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_INTR_CTRL, val); 105185377Ssam 106185377Ssam /* Change the interrupt mask. */ 107185377Ssam val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), AR_INTR_GPIO); 108185377Ssam val |= AR_GPIO_BIT(gpio); 109185377Ssam OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, AR_INTR_GPIO, val); 110185377Ssam 111185377Ssam val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK), AR_INTR_GPIO); 112185377Ssam val |= AR_GPIO_BIT(gpio); 113185377Ssam OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, AR_INTR_GPIO, val); 114185377Ssam} 115185377Ssam#endif /* AH_SUPPORT_AR5416 */ 116