1185380Ssam/* 2185380Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3185380Ssam * Copyright (c) 2002-2008 Atheros Communications, Inc. 4185380Ssam * 5185380Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185380Ssam * purpose with or without fee is hereby granted, provided that the above 7185380Ssam * copyright notice and this permission notice appear in all copies. 8185380Ssam * 9185380Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185380Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185380Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185380Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185380Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185380Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185380Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185380Ssam * 17203158Srpaulo * $FreeBSD: releng/10.2/sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c 203158 2010-01-29 10:07:17Z rpaulo $ 18185380Ssam */ 19185380Ssam#include "opt_ah.h" 20185380Ssam 21185380Ssam#include "ah.h" 22185380Ssam#include "ah_internal.h" 23185380Ssam#include "ah_devid.h" 24185380Ssam 25185380Ssam#include "ar5416/ar5416.h" 26185380Ssam#include "ar5416/ar5416reg.h" 27185380Ssam#include "ar5416/ar5416phy.h" 28185380Ssam 29185380Ssam/* Adc Gain Cal aliases */ 30185380Ssam#define totalAdcIOddPhase(i) caldata[0][i].u 31185380Ssam#define totalAdcIEvenPhase(i) caldata[1][i].u 32185380Ssam#define totalAdcQOddPhase(i) caldata[2][i].u 33185380Ssam#define totalAdcQEvenPhase(i) caldata[3][i].u 34185380Ssam 35185380Ssam/* 36185380Ssam * Collect data from HW to later perform ADC Gain Calibration 37185380Ssam */ 38185380Ssamvoid 39185380Ssamar5416AdcGainCalCollect(struct ath_hal *ah) 40185380Ssam{ 41185380Ssam struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; 42185380Ssam int i; 43185380Ssam 44185380Ssam /* 45185380Ssam * Accumulate ADC Gain cal measures for active chains 46185380Ssam */ 47185380Ssam for (i = 0; i < AR5416_MAX_CHAINS; i++) { 48185380Ssam cal->totalAdcIOddPhase(i) += 49185380Ssam OS_REG_READ(ah, AR_PHY_CAL_MEAS_0(i)); 50185380Ssam cal->totalAdcIEvenPhase(i) += 51185380Ssam OS_REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); 52185380Ssam cal->totalAdcQOddPhase(i) += 53185380Ssam OS_REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); 54185380Ssam cal->totalAdcQEvenPhase(i) += 55185380Ssam OS_REG_READ(ah, AR_PHY_CAL_MEAS_3(i)); 56185380Ssam 57185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 58185380Ssam "%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n", 59185380Ssam cal->calSamples, i, cal->totalAdcIOddPhase(i), 60185380Ssam cal->totalAdcIEvenPhase(i), cal->totalAdcQOddPhase(i), 61185380Ssam cal->totalAdcQEvenPhase(i)); 62185380Ssam } 63185380Ssam} 64185380Ssam 65185380Ssam/* 66185380Ssam * Use HW data to do ADC Gain Calibration 67185380Ssam */ 68185380Ssamvoid 69185380Ssamar5416AdcGainCalibration(struct ath_hal *ah, uint8_t numChains) 70185380Ssam{ 71185380Ssam struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; 72185380Ssam uint32_t i; 73185380Ssam 74185380Ssam for (i = 0; i < numChains; i++) { 75185380Ssam uint32_t iOddMeasOffset = cal->totalAdcIOddPhase(i); 76185380Ssam uint32_t iEvenMeasOffset = cal->totalAdcIEvenPhase(i); 77185380Ssam uint32_t qOddMeasOffset = cal->totalAdcQOddPhase(i); 78185380Ssam uint32_t qEvenMeasOffset = cal->totalAdcQEvenPhase(i); 79185380Ssam 80185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 81185380Ssam "Start ADC Gain Cal for Chain %d\n", i); 82185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 83185380Ssam " pwr_meas_odd_i = 0x%08x\n", iOddMeasOffset); 84185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 85185380Ssam " pwr_meas_even_i = 0x%08x\n", iEvenMeasOffset); 86185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 87185380Ssam " pwr_meas_odd_q = 0x%08x\n", qOddMeasOffset); 88185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 89185380Ssam " pwr_meas_even_q = 0x%08x\n", qEvenMeasOffset); 90185380Ssam 91185380Ssam if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) { 92185380Ssam uint32_t iGainMismatch = 93185380Ssam ((iEvenMeasOffset*32)/iOddMeasOffset) & 0x3f; 94185380Ssam uint32_t qGainMismatch = 95185380Ssam ((qOddMeasOffset*32)/qEvenMeasOffset) & 0x3f; 96185380Ssam uint32_t val; 97185380Ssam 98185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 99185380Ssam " gain_mismatch_i = 0x%08x\n", 100185380Ssam iGainMismatch); 101185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 102185380Ssam " gain_mismatch_q = 0x%08x\n", 103185380Ssam qGainMismatch); 104185380Ssam 105185380Ssam val = OS_REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i)); 106185380Ssam val &= 0xfffff000; 107185380Ssam val |= (qGainMismatch) | (iGainMismatch << 6); 108185380Ssam OS_REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); 109185380Ssam 110185380Ssam HALDEBUG(ah, HAL_DEBUG_PERCAL, 111185380Ssam "ADC Gain Cal done for Chain %d\n", i); 112185380Ssam } 113185380Ssam } 114185380Ssam OS_REG_SET_BIT(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), 115185380Ssam AR_PHY_NEW_ADC_GAIN_CORR_ENABLE); 116185380Ssam} 117