ar5413.c revision 185418
1/*
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $Id: ar5413.c,v 1.8 2008/11/15 22:15:46 sam Exp $
18 */
19#include "opt_ah.h"
20
21#include "ah.h"
22#include "ah_internal.h"
23
24#include "ah_eeprom_v3.h"
25
26#include "ar5212/ar5212.h"
27#include "ar5212/ar5212reg.h"
28#include "ar5212/ar5212phy.h"
29
30#define AH_5212_5413
31#include "ar5212/ar5212.ini"
32
33#define	N(a)	(sizeof(a)/sizeof(a[0]))
34
35struct ar5413State {
36	RF_HAL_FUNCS	base;		/* public state, must be first */
37	uint16_t	pcdacTable[PWR_TABLE_SIZE_2413];
38
39	uint32_t	Bank1Data[N(ar5212Bank1_5413)];
40	uint32_t	Bank2Data[N(ar5212Bank2_5413)];
41	uint32_t	Bank3Data[N(ar5212Bank3_5413)];
42	uint32_t	Bank6Data[N(ar5212Bank6_5413)];
43	uint32_t	Bank7Data[N(ar5212Bank7_5413)];
44
45	/*
46	 * Private state for reduced stack usage.
47	 */
48	/* filled out Vpd table for all pdGains (chanL) */
49	uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
50			    [MAX_PWR_RANGE_IN_HALF_DB];
51	/* filled out Vpd table for all pdGains (chanR) */
52	uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
53			    [MAX_PWR_RANGE_IN_HALF_DB];
54	/* filled out Vpd table for all pdGains (interpolated) */
55	uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
56			    [MAX_PWR_RANGE_IN_HALF_DB];
57};
58#define	AR5413(ah)	((struct ar5413State *) AH5212(ah)->ah_rfHal)
59
60extern	void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
61		uint32_t numBits, uint32_t firstBit, uint32_t column);
62
63static void
64ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
65	int writes)
66{
67	HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
68	HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes);
69	HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes);
70}
71
72/*
73 * Take the MHz channel value and set the Channel value
74 *
75 * ASSUMES: Writes enabled to analog bus
76 */
77static HAL_BOOL
78ar5413SetChannel(struct ath_hal *ah,  HAL_CHANNEL_INTERNAL *chan)
79{
80	uint32_t channelSel  = 0;
81	uint32_t bModeSynth  = 0;
82	uint32_t aModeRefSel = 0;
83	uint32_t reg32       = 0;
84	uint16_t freq;
85
86	OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel);
87
88	if (chan->channel < 4800) {
89		uint32_t txctl;
90
91		if (((chan->channel - 2192) % 5) == 0) {
92			channelSel = ((chan->channel - 672) * 2 - 3040)/10;
93			bModeSynth = 0;
94		} else if (((chan->channel - 2224) % 5) == 0) {
95			channelSel = ((chan->channel - 704) * 2 - 3040) / 10;
96			bModeSynth = 1;
97		} else {
98			HALDEBUG(ah, HAL_DEBUG_ANY,
99			    "%s: invalid channel %u MHz\n",
100			    __func__, chan->channel);
101			return AH_FALSE;
102		}
103
104		channelSel = (channelSel << 2) & 0xff;
105		channelSel = ath_hal_reverseBits(channelSel, 8);
106
107		txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
108		if (chan->channel == 2484) {
109			/* Enable channel spreading for channel 14 */
110			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
111				txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
112		} else {
113			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
114				txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
115		}
116	} else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) {
117		freq = chan->channel - 2; /* Align to even 5MHz raster */
118		channelSel = ath_hal_reverseBits(
119			(uint32_t)(((freq - 4800)*10)/25 + 1), 8);
120            	aModeRefSel = ath_hal_reverseBits(0, 2);
121	} else if ((chan->channel % 20) == 0 && chan->channel >= 5120) {
122		channelSel = ath_hal_reverseBits(
123			((chan->channel - 4800) / 20 << 2), 8);
124		aModeRefSel = ath_hal_reverseBits(1, 2);
125	} else if ((chan->channel % 10) == 0) {
126		channelSel = ath_hal_reverseBits(
127			((chan->channel - 4800) / 10 << 1), 8);
128		aModeRefSel = ath_hal_reverseBits(1, 2);
129	} else if ((chan->channel % 5) == 0) {
130		channelSel = ath_hal_reverseBits(
131			(chan->channel - 4800) / 5, 8);
132		aModeRefSel = ath_hal_reverseBits(1, 2);
133	} else {
134		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
135		    __func__, chan->channel);
136		return AH_FALSE;
137	}
138
139	reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
140			(1 << 12) | 0x1;
141	OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
142
143	reg32 >>= 8;
144	OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
145
146	AH_PRIVATE(ah)->ah_curchan = chan;
147	return AH_TRUE;
148}
149
150/*
151 * Reads EEPROM header info from device structure and programs
152 * all rf registers
153 *
154 * REQUIRES: Access to the analog rf device
155 */
156static HAL_BOOL
157ar5413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
158{
159#define	RF_BANK_SETUP(_priv, _ix, _col) do {				    \
160	int i;								    \
161	for (i = 0; i < N(ar5212Bank##_ix##_5413); i++)			    \
162		(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\
163} while (0)
164	struct ath_hal_5212 *ahp = AH5212(ah);
165	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
166	uint16_t ob5GHz = 0, db5GHz = 0;
167	uint16_t ob2GHz = 0, db2GHz = 0;
168	struct ar5413State *priv = AR5413(ah);
169	int regWrites = 0;
170
171	HALDEBUG(ah, HAL_DEBUG_RFPARAM,
172	    "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
173	    __func__, chan->channel, chan->channelFlags, modesIndex);
174
175	HALASSERT(priv != AH_NULL);
176
177	/* Setup rf parameters */
178	switch (chan->channelFlags & CHANNEL_ALL) {
179	case CHANNEL_A:
180	case CHANNEL_T:
181		if (chan->channel > 4000 && chan->channel < 5260) {
182			ob5GHz = ee->ee_ob1;
183			db5GHz = ee->ee_db1;
184		} else if (chan->channel >= 5260 && chan->channel < 5500) {
185			ob5GHz = ee->ee_ob2;
186			db5GHz = ee->ee_db2;
187		} else if (chan->channel >= 5500 && chan->channel < 5725) {
188			ob5GHz = ee->ee_ob3;
189			db5GHz = ee->ee_db3;
190		} else if (chan->channel >= 5725) {
191			ob5GHz = ee->ee_ob4;
192			db5GHz = ee->ee_db4;
193		} else {
194			/* XXX else */
195		}
196		break;
197	case CHANNEL_B:
198		ob2GHz = ee->ee_obFor24;
199		db2GHz = ee->ee_dbFor24;
200		break;
201	case CHANNEL_G:
202	case CHANNEL_108G:
203		ob2GHz = ee->ee_obFor24g;
204		db2GHz = ee->ee_dbFor24g;
205		break;
206	default:
207		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
208		    __func__, chan->channelFlags);
209		return AH_FALSE;
210	}
211
212	/* Bank 1 Write */
213	RF_BANK_SETUP(priv, 1, 1);
214
215	/* Bank 2 Write */
216	RF_BANK_SETUP(priv, 2, modesIndex);
217
218	/* Bank 3 Write */
219	RF_BANK_SETUP(priv, 3, modesIndex);
220
221	/* Bank 6 Write */
222	RF_BANK_SETUP(priv, 6, modesIndex);
223
224    	/* Only the 5 or 2 GHz OB/DB need to be set for a mode */
225	if (IS_CHAN_2GHZ(chan)) {
226        	ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0);
227        	ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0);
228
229			/* TODO - only for Eagle 1.0 2GHz - remove for production */
230			/* XXX: but without this bit G doesn't work. */
231			ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2);
232
233			/* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */
234			if (IS_PCIE(ah)) {
235				ar5212ModifyRfBuffer(priv->Bank6Data, ath_hal_reverseBits(6, 3),
236						 3, 131, 3);
237			}
238	} else {
239        	ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0);
240        	ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0);
241
242	}
243
244	/* Bank 7 Setup */
245	RF_BANK_SETUP(priv, 7, modesIndex);
246
247	/* Write Analog registers */
248	HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites);
249	HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites);
250	HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites);
251	HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites);
252	HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites);
253
254	/* Now that we have reprogrammed rfgain value, clear the flag. */
255	ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
256
257	return AH_TRUE;
258#undef	RF_BANK_SETUP
259}
260
261/*
262 * Return a reference to the requested RF Bank.
263 */
264static uint32_t *
265ar5413GetRfBank(struct ath_hal *ah, int bank)
266{
267	struct ar5413State *priv = AR5413(ah);
268
269	HALASSERT(priv != AH_NULL);
270	switch (bank) {
271	case 1: return priv->Bank1Data;
272	case 2: return priv->Bank2Data;
273	case 3: return priv->Bank3Data;
274	case 6: return priv->Bank6Data;
275	case 7: return priv->Bank7Data;
276	}
277	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
278	    __func__, bank);
279	return AH_NULL;
280}
281
282/*
283 * Return indices surrounding the value in sorted integer lists.
284 *
285 * NB: the input list is assumed to be sorted in ascending order
286 */
287static void
288GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
289                          uint32_t *vlo, uint32_t *vhi)
290{
291	int16_t target = v;
292	const uint16_t *ep = lp+listSize;
293	const uint16_t *tp;
294
295	/*
296	 * Check first and last elements for out-of-bounds conditions.
297	 */
298	if (target < lp[0]) {
299		*vlo = *vhi = 0;
300		return;
301	}
302	if (target >= ep[-1]) {
303		*vlo = *vhi = listSize - 1;
304		return;
305	}
306
307	/* look for value being near or between 2 values in list */
308	for (tp = lp; tp < ep; tp++) {
309		/*
310		 * If value is close to the current value of the list
311		 * then target is not between values, it is one of the values
312		 */
313		if (*tp == target) {
314			*vlo = *vhi = tp - (const uint16_t *) lp;
315			return;
316		}
317		/*
318		 * Look for value being between current value and next value
319		 * if so return these 2 values
320		 */
321		if (target < tp[1]) {
322			*vlo = tp - (const uint16_t *) lp;
323			*vhi = *vlo + 1;
324			return;
325		}
326	}
327}
328
329/*
330 * Fill the Vpdlist for indices Pmax-Pmin
331 */
332static HAL_BOOL
333ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t  Pmax,
334		   const int16_t *pwrList, const uint16_t *VpdList,
335		   uint16_t numIntercepts,
336		   uint16_t retVpdList[][64])
337{
338	uint16_t ii, jj, kk;
339	int16_t currPwr = (int16_t)(2*Pmin);
340	/* since Pmin is pwr*2 and pwrList is 4*pwr */
341	uint32_t  idxL, idxR;
342
343	ii = 0;
344	jj = 0;
345
346	if (numIntercepts < 2)
347		return AH_FALSE;
348
349	while (ii <= (uint16_t)(Pmax - Pmin)) {
350		GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
351				   numIntercepts, &(idxL), &(idxR));
352		if (idxR < 1)
353			idxR = 1;			/* extrapolate below */
354		if (idxL == (uint32_t)(numIntercepts - 1))
355			idxL = numIntercepts - 2;	/* extrapolate above */
356		if (pwrList[idxL] == pwrList[idxR])
357			kk = VpdList[idxL];
358		else
359			kk = (uint16_t)
360				(((currPwr - pwrList[idxL])*VpdList[idxR]+
361				  (pwrList[idxR] - currPwr)*VpdList[idxL])/
362				 (pwrList[idxR] - pwrList[idxL]));
363		retVpdList[pdGainIdx][ii] = kk;
364		ii++;
365		currPwr += 2;				/* half dB steps */
366	}
367
368	return AH_TRUE;
369}
370
371/*
372 * Returns interpolated or the scaled up interpolated value
373 */
374static int16_t
375interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
376	int16_t targetLeft, int16_t targetRight)
377{
378	int16_t rv;
379
380	if (srcRight != srcLeft) {
381		rv = ((target - srcLeft)*targetRight +
382		      (srcRight - target)*targetLeft) / (srcRight - srcLeft);
383	} else {
384		rv = targetLeft;
385	}
386	return rv;
387}
388
389/*
390 * Uses the data points read from EEPROM to reconstruct the pdadc power table
391 * Called by ar5413SetPowerTable()
392 */
393static int
394ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
395		const RAW_DATA_STRUCT_2413 *pRawDataset,
396		uint16_t pdGainOverlap_t2,
397		int16_t  *pMinCalPower, uint16_t pPdGainBoundaries[],
398		uint16_t pPdGainValues[], uint16_t pPDADCValues[])
399{
400	struct ar5413State *priv = AR5413(ah);
401#define	VpdTable_L	priv->vpdTable_L
402#define	VpdTable_R	priv->vpdTable_R
403#define	VpdTable_I	priv->vpdTable_I
404	uint32_t ii, jj, kk;
405	int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
406	uint32_t idxL, idxR;
407	uint32_t numPdGainsUsed = 0;
408	/*
409	 * If desired to support -ve power levels in future, just
410	 * change pwr_I_0 to signed 5-bits.
411	 */
412	int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
413	/* to accomodate -ve power levels later on. */
414	int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
415	/* to accomodate -ve power levels later on */
416	uint16_t numVpd = 0;
417	uint16_t Vpd_step;
418	int16_t tmpVal ;
419	uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
420
421	/* Get upper lower index */
422	GetLowerUpperIndex(channel, pRawDataset->pChannels,
423				 pRawDataset->numChannels, &(idxL), &(idxR));
424
425	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
426		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
427		/* work backwards 'cause highest pdGain for lowest power */
428		numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
429		if (numVpd > 0) {
430			pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
431			Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
432			if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
433				Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
434			}
435			Pmin_t2[numPdGainsUsed] = (int16_t)
436				(Pmin_t2[numPdGainsUsed] / 2);
437			Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
438			if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
439				Pmax_t2[numPdGainsUsed] =
440					pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
441			Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
442			ar5413FillVpdTable(
443					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
444					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
445					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
446					   );
447			ar5413FillVpdTable(
448					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
449					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
450					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
451					   );
452			for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
453				VpdTable_I[numPdGainsUsed][kk] =
454					interpolate_signed(
455							   channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
456							   (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
457			}
458			/* fill VpdTable_I for this pdGain */
459			numPdGainsUsed++;
460		}
461		/* if this pdGain is used */
462	}
463
464	*pMinCalPower = Pmin_t2[0];
465	kk = 0; /* index for the final table */
466	for (ii = 0; ii < numPdGainsUsed; ii++) {
467		if (ii == (numPdGainsUsed - 1))
468			pPdGainBoundaries[ii] = Pmax_t2[ii] +
469				PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
470		else
471			pPdGainBoundaries[ii] = (uint16_t)
472				((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
473		if (pPdGainBoundaries[ii] > 63) {
474			HALDEBUG(ah, HAL_DEBUG_ANY,
475			    "%s: clamp pPdGainBoundaries[%d] %d\n",
476			    __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
477			pPdGainBoundaries[ii] = 63;
478		}
479
480		/* Find starting index for this pdGain */
481		if (ii == 0)
482			ss = 0; /* for the first pdGain, start from index 0 */
483		else
484			ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
485				pdGainOverlap_t2;
486		Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
487		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
488		/*
489		 *-ve ss indicates need to extrapolate data below for this pdGain
490		 */
491		while (ss < 0) {
492			tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
493			pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
494			ss++;
495		}
496
497		sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
498		tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
499		maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
500
501		while (ss < (int16_t)maxIndex)
502			pPDADCValues[kk++] = VpdTable_I[ii][ss++];
503
504		Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
505				       VpdTable_I[ii][sizeCurrVpdTable-2]);
506		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
507		/*
508		 * for last gain, pdGainBoundary == Pmax_t2, so will
509		 * have to extrapolate
510		 */
511		if (tgtIndex > maxIndex) {	/* need to extrapolate above */
512			while(ss < (int16_t)tgtIndex) {
513				tmpVal = (uint16_t)
514					(VpdTable_I[ii][sizeCurrVpdTable-1] +
515					 (ss-maxIndex)*Vpd_step);
516				pPDADCValues[kk++] = (tmpVal > 127) ?
517					127 : tmpVal;
518				ss++;
519			}
520		}				/* extrapolated above */
521	}					/* for all pdGainUsed */
522
523	while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
524		pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
525		ii++;
526	}
527	while (kk < 128) {
528		pPDADCValues[kk] = pPDADCValues[kk-1];
529		kk++;
530	}
531
532	return numPdGainsUsed;
533#undef VpdTable_L
534#undef VpdTable_R
535#undef VpdTable_I
536}
537
538static HAL_BOOL
539ar5413SetPowerTable(struct ath_hal *ah,
540	int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan,
541	uint16_t *rfXpdGain)
542{
543	struct ath_hal_5212 *ahp = AH5212(ah);
544	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
545	const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
546	uint16_t pdGainOverlap_t2;
547	int16_t minCalPower5413_t2;
548	uint16_t *pdadcValues = ahp->ah_pcdacTable;
549	uint16_t gainBoundaries[4];
550	uint32_t reg32, regoffset;
551	int i, numPdGainsUsed;
552#ifndef AH_USE_INIPDGAIN
553	uint32_t tpcrg1;
554#endif
555
556	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
557	    __func__, chan->channel,chan->channelFlags);
558
559	if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
560		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
561	else if (IS_CHAN_B(chan))
562		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
563	else {
564		HALASSERT(IS_CHAN_5GHZ(chan));
565		pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
566	}
567
568	pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
569					  AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
570
571	numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah,
572		chan->channel, pRawDataset, pdGainOverlap_t2,
573		&minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues);
574	HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
575
576#ifdef AH_USE_INIPDGAIN
577	/*
578	 * Use pd_gains curve from eeprom; Atheros always uses
579	 * the default curve from the ini file but some vendors
580	 * (e.g. Zcomax) want to override this curve and not
581	 * honoring their settings results in tx power 5dBm low.
582	 */
583	OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
584			 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
585#else
586	tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
587	tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
588		  | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
589	switch (numPdGainsUsed) {
590	case 3:
591		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
592		tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
593		/* fall thru... */
594	case 2:
595		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
596		tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
597		/* fall thru... */
598	case 1:
599		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
600		tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
601		break;
602	}
603#ifdef AH_DEBUG
604	if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
605		HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
606		    "pd_gains (default 0x%x, calculated 0x%x)\n",
607		    __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
608#endif
609	OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
610#endif
611
612	/*
613	 * Note the pdadc table may not start at 0 dBm power, could be
614	 * negative or greater than 0.  Need to offset the power
615	 * values by the amount of minPower for griffin
616	 */
617	if (minCalPower5413_t2 != 0)
618		ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2);
619	else
620		ahp->ah_txPowerIndexOffset = 0;
621
622	/* Finally, write the power values into the baseband power table */
623	regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
624	for (i = 0; i < 32; i++) {
625		reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0)  |
626			((pdadcValues[4*i + 1] & 0xFF) << 8)  |
627			((pdadcValues[4*i + 2] & 0xFF) << 16) |
628			((pdadcValues[4*i + 3] & 0xFF) << 24) ;
629		OS_REG_WRITE(ah, regoffset, reg32);
630		regoffset += 4;
631	}
632
633	OS_REG_WRITE(ah, AR_PHY_TPCRG5,
634		     SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
635		     SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
636		     SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
637		     SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
638		     SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
639
640	return AH_TRUE;
641}
642
643static int16_t
644ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
645{
646	uint32_t ii,jj;
647	uint16_t Pmin=0,numVpd;
648
649	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
650		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
651		/* work backwards 'cause highest pdGain for lowest power */
652		numVpd = data->pDataPerPDGain[jj].numVpd;
653		if (numVpd > 0) {
654			Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
655			return(Pmin);
656		}
657	}
658	return(Pmin);
659}
660
661static int16_t
662ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
663{
664	uint32_t ii;
665	uint16_t Pmax=0,numVpd;
666
667	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
668		/* work forwards cuase lowest pdGain for highest power */
669		numVpd = data->pDataPerPDGain[ii].numVpd;
670		if (numVpd > 0) {
671			Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
672			return(Pmax);
673		}
674	}
675	return(Pmax);
676}
677
678static HAL_BOOL
679ar5413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan,
680	int16_t *maxPow, int16_t *minPow)
681{
682	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
683	const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
684	const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL;
685	uint16_t numChannels;
686	int totalD,totalF, totalMin,last, i;
687
688	*maxPow = 0;
689
690	if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
691		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
692	else if (IS_CHAN_B(chan))
693		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
694	else {
695		HALASSERT(IS_CHAN_5GHZ(chan));
696		pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
697	}
698
699	numChannels = pRawDataset->numChannels;
700	data = pRawDataset->pDataPerChannel;
701
702	/* Make sure the channel is in the range of the TP values
703	 *  (freq piers)
704	 */
705	if (numChannels < 1)
706		return(AH_FALSE);
707
708	if ((chan->channel < data[0].channelValue) ||
709	    (chan->channel > data[numChannels-1].channelValue)) {
710		if (chan->channel < data[0].channelValue) {
711			*maxPow = ar5413GetMaxPower(ah, &data[0]);
712			*minPow = ar5413GetMinPower(ah, &data[0]);
713			return(AH_TRUE);
714		} else {
715			*maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]);
716			*minPow = ar5413GetMinPower(ah, &data[numChannels - 1]);
717			return(AH_TRUE);
718		}
719	}
720
721	/* Linearly interpolate the power value now */
722	for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue);
723	     last = i++);
724	totalD = data[i].channelValue - data[last].channelValue;
725	if (totalD > 0) {
726		totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]);
727		*maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) +
728				     ar5413GetMaxPower(ah, &data[last])*totalD)/totalD);
729		totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]);
730		*minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) +
731				     ar5413GetMinPower(ah, &data[last])*totalD)/totalD);
732		return(AH_TRUE);
733	} else {
734		if (chan->channel == data[i].channelValue) {
735			*maxPow = ar5413GetMaxPower(ah, &data[i]);
736			*minPow = ar5413GetMinPower(ah, &data[i]);
737			return(AH_TRUE);
738		} else
739			return(AH_FALSE);
740	}
741}
742
743/*
744 * Free memory for analog bank scratch buffers
745 */
746static void
747ar5413RfDetach(struct ath_hal *ah)
748{
749	struct ath_hal_5212 *ahp = AH5212(ah);
750
751	HALASSERT(ahp->ah_rfHal != AH_NULL);
752	ath_hal_free(ahp->ah_rfHal);
753	ahp->ah_rfHal = AH_NULL;
754}
755
756/*
757 * Allocate memory for analog bank scratch buffers
758 * Scratch Buffer will be reinitialized every reset so no need to zero now
759 */
760static HAL_BOOL
761ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status)
762{
763	struct ath_hal_5212 *ahp = AH5212(ah);
764	struct ar5413State *priv;
765
766	HALASSERT(ah->ah_magic == AR5212_MAGIC);
767
768	HALASSERT(ahp->ah_rfHal == AH_NULL);
769	priv = ath_hal_malloc(sizeof(struct ar5413State));
770	if (priv == AH_NULL) {
771		HALDEBUG(ah, HAL_DEBUG_ANY,
772		    "%s: cannot allocate private state\n", __func__);
773		*status = HAL_ENOMEM;		/* XXX */
774		return AH_FALSE;
775	}
776	priv->base.rfDetach		= ar5413RfDetach;
777	priv->base.writeRegs		= ar5413WriteRegs;
778	priv->base.getRfBank		= ar5413GetRfBank;
779	priv->base.setChannel		= ar5413SetChannel;
780	priv->base.setRfRegs		= ar5413SetRfRegs;
781	priv->base.setPowerTable	= ar5413SetPowerTable;
782	priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower;
783	priv->base.getNfAdjust		= ar5212GetNfAdjust;
784
785	ahp->ah_pcdacTable = priv->pcdacTable;
786	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
787	ahp->ah_rfHal = &priv->base;
788
789	return AH_TRUE;
790}
791
792static HAL_BOOL
793ar5413Probe(struct ath_hal *ah)
794{
795	return IS_5413(ah);
796}
797AH_RF(RF5413, ar5413Probe, ar5413RfAttach);
798