1289715Sglebius/* 2289715Sglebius * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3289715Sglebius * Copyright (c) 2002-2008 Atheros Communications, Inc. 4289715Sglebius * 5289715Sglebius * Permission to use, copy, modify, and/or distribute this software for any 6294569Sdelphij * purpose with or without fee is hereby granted, provided that the above 7289715Sglebius * copyright notice and this permission notice appear in all copies. 8289715Sglebius * 9289715Sglebius * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10289715Sglebius * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11289715Sglebius * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12294569Sdelphij * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13294569Sdelphij * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14294569Sdelphij * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15294569Sdelphij * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16294569Sdelphij * 17294569Sdelphij * $FreeBSD: releng/10.2/sys/dev/ath/ath_hal/ar5212/ar5212_power.c 203159 2010-01-29 10:10:14Z rpaulo $ 18294569Sdelphij */ 19294569Sdelphij#include "opt_ah.h" 20294569Sdelphij 21289715Sglebius#include "ah.h" 22294569Sdelphij#include "ah_internal.h" 23289715Sglebius 24294569Sdelphij#include "ar5212/ar5212.h" 25294569Sdelphij#include "ar5212/ar5212reg.h" 26294569Sdelphij#include "ar5212/ar5212desc.h" 27289715Sglebius 28289715Sglebius/* 29289715Sglebius * Notify Power Mgt is enabled in self-generated frames. 30289715Sglebius * If requested, force chip awake. 31294569Sdelphij * 32294569Sdelphij * Returns A_OK if chip is awake or successfully forced awake. 33294569Sdelphij * 34294569Sdelphij * WARNING WARNING WARNING 35294569Sdelphij * There is a problem with the chip where sometimes it will not wake up. 36294569Sdelphij */ 37294569Sdelphijstatic HAL_BOOL 38294569Sdelphijar5212SetPowerModeAwake(struct ath_hal *ah, int setChip) 39294569Sdelphij{ 40294569Sdelphij#define AR_SCR_MASK \ 41294569Sdelphij (AR_SCR_SLDUR|AR_SCR_SLE|AR_SCR_SLDTP|AR_SCR_SLDWP|\ 42294569Sdelphij AR_SCR_SLEPOL|AR_SCR_MIBIE|AR_SCR_UNKNOWN) 43294569Sdelphij#define POWER_UP_TIME 2000 44294569Sdelphij uint32_t scr, val; 45294569Sdelphij int i; 46294569Sdelphij 47289715Sglebius if (setChip) { 48294569Sdelphij /* 49294569Sdelphij * Be careful setting the AWAKE mode. When we are called 50294569Sdelphij * with the chip powered down the read returns 0xffffffff 51294569Sdelphij * which when blindly written back with OS_REG_RMW_FIELD 52289715Sglebius * enables the MIB interrupt for the sleep performance 53289715Sglebius * counters. This can result in an interrupt storm when 54289715Sglebius * ANI is in operation as noone knows to turn off the MIB 55289715Sglebius * interrupt cause. 56289715Sglebius */ 57289715Sglebius scr = OS_REG_READ(ah, AR_SCR); 58289715Sglebius if (scr & ~AR_SCR_MASK) { 59289715Sglebius HALDEBUG(ah, HAL_DEBUG_ANY, 60289715Sglebius "%s: bogus SCR 0x%x, PCICFG 0x%x\n", 61294569Sdelphij __func__, scr, OS_REG_READ(ah, AR_PCICFG)); 62294569Sdelphij scr = 0; 63294569Sdelphij } 64294569Sdelphij scr = (scr &~ AR_SCR_SLE) | AR_SCR_SLE_WAKE; 65294569Sdelphij OS_REG_WRITE(ah, AR_SCR, scr); 66289715Sglebius OS_DELAY(10); /* Give chip the chance to awake */ 67289715Sglebius 68289715Sglebius for (i = POWER_UP_TIME / 50; i != 0; i--) { 69289715Sglebius val = OS_REG_READ(ah, AR_PCICFG); 70289715Sglebius if ((val & AR_PCICFG_SPWR_DN) == 0) 71289715Sglebius break; 72289715Sglebius OS_DELAY(50); 73289715Sglebius OS_REG_WRITE(ah, AR_SCR, scr); 74289715Sglebius } 75289715Sglebius if (i == 0) { 76289715Sglebius#ifdef AH_DEBUG 77289715Sglebius ath_hal_printf(ah, "%s: Failed to wakeup in %ums\n", 78289715Sglebius __func__, POWER_UP_TIME/50); 79289715Sglebius#endif 80289715Sglebius return AH_FALSE; 81289715Sglebius } 82289715Sglebius } 83289715Sglebius 84289715Sglebius OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); 85289715Sglebius return AH_TRUE; 86289715Sglebius#undef POWER_UP_TIME 87289715Sglebius#undef AR_SCR_MASK 88289715Sglebius} 89289715Sglebius 90289715Sglebius/* 91294569Sdelphij * Notify Power Mgt is disabled in self-generated frames. 92294569Sdelphij * If requested, force chip to sleep. 93294569Sdelphij */ 94294569Sdelphijstatic void 95289715Sglebiusar5212SetPowerModeSleep(struct ath_hal *ah, int setChip) 96289715Sglebius{ 97289715Sglebius OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); 98 if (setChip) 99 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP); 100} 101 102/* 103 * Notify Power Management is enabled in self-generating 104 * fames. If request, set power mode of chip to 105 * auto/normal. Duration in units of 128us (1/8 TU). 106 */ 107static void 108ar5212SetPowerModeNetworkSleep(struct ath_hal *ah, int setChip) 109{ 110 OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); 111 if (setChip) 112 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM); 113} 114 115/* 116 * Set power mgt to the requested mode, and conditionally set 117 * the chip as well 118 */ 119HAL_BOOL 120ar5212SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip) 121{ 122 struct ath_hal_5212 *ahp = AH5212(ah); 123#ifdef AH_DEBUG 124 static const char* modes[] = { 125 "AWAKE", 126 "FULL-SLEEP", 127 "NETWORK SLEEP", 128 "UNDEFINED" 129 }; 130#endif 131 int status = AH_TRUE; 132 133 HALDEBUG(ah, HAL_DEBUG_POWER, "%s: %s -> %s (%s)\n", __func__, 134 modes[ahp->ah_powerMode], modes[mode], 135 setChip ? "set chip " : ""); 136 switch (mode) { 137 case HAL_PM_AWAKE: 138 status = ar5212SetPowerModeAwake(ah, setChip); 139 break; 140 case HAL_PM_FULL_SLEEP: 141 ar5212SetPowerModeSleep(ah, setChip); 142 break; 143 case HAL_PM_NETWORK_SLEEP: 144 ar5212SetPowerModeNetworkSleep(ah, setChip); 145 break; 146 default: 147 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown power mode %u\n", 148 __func__, mode); 149 return AH_FALSE; 150 } 151 ahp->ah_powerMode = mode; 152 return status; 153} 154 155/* 156 * Return the current sleep mode of the chip 157 */ 158HAL_POWER_MODE 159ar5212GetPowerMode(struct ath_hal *ah) 160{ 161 /* Just so happens the h/w maps directly to the abstracted value */ 162 return MS(OS_REG_READ(ah, AR_SCR), AR_SCR_SLE); 163} 164 165#if 0 166/* 167 * Return the current sleep state of the chip 168 * TRUE = sleeping 169 */ 170HAL_BOOL 171ar5212GetPowerStatus(struct ath_hal *ah) 172{ 173 return (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_SPWR_DN) != 0; 174} 175#endif 176