ar5212_gpio.c revision 185377
1/* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $Id: ar5212_gpio.c,v 1.3 2008/11/10 04:08:03 sam Exp $ 18 */ 19#include "opt_ah.h" 20 21#ifdef AH_SUPPORT_AR5212 22 23#include "ah.h" 24#include "ah_internal.h" 25#include "ah_devid.h" 26#ifdef AH_DEBUG 27#include "ah_desc.h" /* NB: for HAL_PHYERR* */ 28#endif 29 30#include "ar5212/ar5212.h" 31#include "ar5212/ar5212reg.h" 32#include "ar5212/ar5212phy.h" 33#ifdef AH_SUPPORT_AR5311 34#include "ar5212/ar5311reg.h" 35#endif 36 37#define AR_NUM_GPIO 6 /* 6 GPIO pins */ 38#define AR_GPIOD_MASK 0x0000002F /* GPIO data reg r/w mask */ 39 40/* 41 * Configure GPIO Output lines 42 */ 43HAL_BOOL 44ar5212GpioCfgOutput(struct ath_hal *ah, uint32_t gpio) 45{ 46 HALASSERT(gpio < AR_NUM_GPIO); 47 48 /* 49 * NB: AR_GPIOCR_CR_A(pin) is all 1's so there's no need 50 * to clear the field before or'ing in the new value. 51 */ 52 OS_REG_WRITE(ah, AR_GPIOCR, 53 OS_REG_READ(ah, AR_GPIOCR) | AR_GPIOCR_CR_A(gpio)); 54 55 return AH_TRUE; 56} 57 58/* 59 * Configure GPIO Input lines 60 */ 61HAL_BOOL 62ar5212GpioCfgInput(struct ath_hal *ah, uint32_t gpio) 63{ 64 HALASSERT(gpio < AR_NUM_GPIO); 65 66 OS_REG_WRITE(ah, AR_GPIOCR, 67 (OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_CR_A(gpio)) 68 | AR_GPIOCR_CR_N(gpio)); 69 70 return AH_TRUE; 71} 72 73/* 74 * Once configured for I/O - set output lines 75 */ 76HAL_BOOL 77ar5212GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val) 78{ 79 uint32_t reg; 80 81 HALASSERT(gpio < AR_NUM_GPIO); 82 83 reg = OS_REG_READ(ah, AR_GPIODO); 84 reg &= ~(1 << gpio); 85 reg |= (val&1) << gpio; 86 87 OS_REG_WRITE(ah, AR_GPIODO, reg); 88 return AH_TRUE; 89} 90 91/* 92 * Once configured for I/O - get input lines 93 */ 94uint32_t 95ar5212GpioGet(struct ath_hal *ah, uint32_t gpio) 96{ 97 if (gpio < AR_NUM_GPIO) { 98 uint32_t val = OS_REG_READ(ah, AR_GPIODI); 99 val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1; 100 return val; 101 } else { 102 return 0xffffffff; 103 } 104} 105 106/* 107 * Set the GPIO Interrupt 108 */ 109void 110ar5212GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel) 111{ 112 uint32_t val; 113 114 /* XXX bounds check gpio */ 115 val = OS_REG_READ(ah, AR_GPIOCR); 116 val &= ~(AR_GPIOCR_CR_A(gpio) | 117 AR_GPIOCR_INT_MASK | AR_GPIOCR_INT_ENA | AR_GPIOCR_INT_SEL); 118 val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA; 119 if (ilevel) 120 val |= AR_GPIOCR_INT_SELH; /* interrupt on pin high */ 121 else 122 val |= AR_GPIOCR_INT_SELL; /* interrupt on pin low */ 123 124 /* Don't need to change anything for low level interrupt. */ 125 OS_REG_WRITE(ah, AR_GPIOCR, val); 126 127 /* Change the interrupt mask. */ 128 (void) ar5212SetInterrupts(ah, AH5212(ah)->ah_maskReg | HAL_INT_GPIO); 129} 130 131#endif /* AH_SUPPORT_AR5212 */ 132