ah_osdep.c revision 223459
1/*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD: head/sys/dev/ath/ah_osdep.c 223459 2011-06-23 02:38:36Z adrian $ 30 */ 31#include "opt_ah.h" 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/kernel.h> 36#include <sys/module.h> 37#include <sys/sysctl.h> 38#include <sys/bus.h> 39#include <sys/malloc.h> 40#include <sys/proc.h> 41 42#include <machine/stdarg.h> 43 44#include <net/ethernet.h> /* XXX for ether_sprintf */ 45 46#include <dev/ath/ath_hal/ah.h> 47 48/* 49 * WiSoC boards overload the bus tag with information about the 50 * board layout. We must extract the bus space tag from that 51 * indirect structure. For everyone else the tag is passed in 52 * directly. 53 * XXX cache indirect ref privately 54 */ 55#ifdef AH_SUPPORT_AR5312 56#define BUSTAG(ah) \ 57 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 58#else 59#define BUSTAG(ah) ((ah)->ah_st) 60#endif 61 62extern void ath_hal_printf(struct ath_hal *, const char*, ...) 63 __printflike(2,3); 64extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 65 __printflike(2, 0); 66extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 67extern void *ath_hal_malloc(size_t); 68extern void ath_hal_free(void *); 69#ifdef AH_ASSERT 70extern void ath_hal_assert_failed(const char* filename, 71 int lineno, const char* msg); 72#endif 73#ifdef AH_DEBUG 74extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...); 75#endif /* AH_DEBUG */ 76 77/* NB: put this here instead of the driver to avoid circular references */ 78SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 79 80MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 81 82void* 83ath_hal_malloc(size_t size) 84{ 85 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 86} 87 88void 89ath_hal_free(void* p) 90{ 91 free(p, M_ATH_HAL); 92} 93 94void 95ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 96{ 97 vprintf(fmt, ap); 98} 99 100void 101ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 102{ 103 va_list ap; 104 va_start(ap, fmt); 105 ath_hal_vprintf(ah, fmt, ap); 106 va_end(ap); 107} 108 109const char* 110ath_hal_ether_sprintf(const u_int8_t *mac) 111{ 112 return ether_sprintf(mac); 113} 114 115#ifdef AH_DEBUG 116 117/* This must match the definition in ath_hal/ah_debug.h */ 118#define HAL_DEBUG_UNMASKABLE 0xf0000000 119void 120DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 121{ 122 if ((mask == HAL_DEBUG_UNMASKABLE) || (ah->ah_config.ah_debug & mask)) { 123 __va_list ap; 124 va_start(ap, fmt); 125 ath_hal_vprintf(ah, fmt, ap); 126 va_end(ap); 127 } 128} 129#undef HAL_DEBUG_UNMASKABLE 130#endif /* AH_DEBUG */ 131 132#ifdef AH_DEBUG_ALQ 133/* 134 * ALQ register tracing support. 135 * 136 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 137 * writes to the file /tmp/ath_hal.log. The file format is a simple 138 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 139 * and then decode the file with the arcode program (that is part of the 140 * HAL). If you start+stop tracing the data will be appended to an 141 * existing file. 142 * 143 * NB: doesn't handle multiple devices properly; only one DEVICE record 144 * is emitted and the different devices are not identified. 145 */ 146#include <sys/alq.h> 147#include <sys/pcpu.h> 148#include <dev/ath/ath_hal/ah_decode.h> 149 150SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters"); 151 152static struct alq *ath_hal_alq; 153static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 154static u_int ath_hal_alq_lost; /* count of lost records */ 155static char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log"; 156 157SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW, 158 &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile"); 159 160static u_int ath_hal_alq_qsize = 64*1024; 161 162static int 163ath_hal_setlogging(int enable) 164{ 165 int error; 166 167 if (enable) { 168 error = alq_open(&ath_hal_alq, ath_hal_logfile, 169 curthread->td_ucred, ALQ_DEFAULT_CMODE, 170 sizeof (struct athregrec), ath_hal_alq_qsize); 171 ath_hal_alq_lost = 0; 172 ath_hal_alq_emitdev = 1; 173 printf("ath_hal: logging to %s enabled\n", 174 ath_hal_logfile); 175 } else { 176 if (ath_hal_alq) 177 alq_close(ath_hal_alq); 178 ath_hal_alq = NULL; 179 printf("ath_hal: logging disabled\n"); 180 error = 0; 181 } 182 return (error); 183} 184 185static int 186sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 187{ 188 int error, enable; 189 190 enable = (ath_hal_alq != NULL); 191 error = sysctl_handle_int(oidp, &enable, 0, req); 192 if (error || !req->newptr) 193 return (error); 194 else 195 return (ath_hal_setlogging(enable)); 196} 197SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 198 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 199SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 200 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 201SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 202 &ath_hal_alq_lost, 0, "Register operations not logged"); 203 204static struct ale * 205ath_hal_alq_get(struct ath_hal *ah) 206{ 207 struct ale *ale; 208 209 if (ath_hal_alq_emitdev) { 210 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 211 if (ale) { 212 struct athregrec *r = 213 (struct athregrec *) ale->ae_data; 214 r->op = OP_DEVICE; 215 r->reg = 0; 216 r->val = ah->ah_devid; 217 alq_post(ath_hal_alq, ale); 218 ath_hal_alq_emitdev = 0; 219 } else 220 ath_hal_alq_lost++; 221 } 222 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 223 if (!ale) 224 ath_hal_alq_lost++; 225 return ale; 226} 227 228void 229ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 230{ 231 bus_space_tag_t tag = BUSTAG(ah); 232 bus_space_handle_t h = ah->ah_sh; 233 234 if (ath_hal_alq) { 235 struct ale *ale = ath_hal_alq_get(ah); 236 if (ale) { 237 struct athregrec *r = (struct athregrec *) ale->ae_data; 238 r->op = OP_WRITE; 239 r->reg = reg; 240 r->val = val; 241 alq_post(ath_hal_alq, ale); 242 } 243 } 244#if _BYTE_ORDER == _BIG_ENDIAN 245 if (OS_REG_UNSWAPPED(reg)) 246 bus_space_write_4(tag, h, reg, val); 247 else 248#endif 249 bus_space_write_stream_4(tag, h, reg, val); 250} 251 252u_int32_t 253ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 254{ 255 bus_space_tag_t tag = BUSTAG(ah); 256 bus_space_handle_t h = ah->ah_sh; 257 u_int32_t val; 258 259#if _BYTE_ORDER == _BIG_ENDIAN 260 if (OS_REG_UNSWAPPED(reg)) 261 val = bus_space_read_4(tag, h, reg); 262 else 263#endif 264 val = bus_space_read_stream_4(tag, h, reg); 265 if (ath_hal_alq) { 266 struct ale *ale = ath_hal_alq_get(ah); 267 if (ale) { 268 struct athregrec *r = (struct athregrec *) ale->ae_data; 269 r->op = OP_READ; 270 r->reg = reg; 271 r->val = val; 272 alq_post(ath_hal_alq, ale); 273 } 274 } 275 return val; 276} 277 278void 279OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 280{ 281 if (ath_hal_alq) { 282 struct ale *ale = ath_hal_alq_get(ah); 283 if (ale) { 284 struct athregrec *r = (struct athregrec *) ale->ae_data; 285 r->op = OP_MARK; 286 r->reg = id; 287 r->val = v; 288 alq_post(ath_hal_alq, ale); 289 } 290 } 291} 292#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 293/* 294 * Memory-mapped device register read/write. These are here 295 * as routines when debugging support is enabled and/or when 296 * explicitly configured to use function calls. The latter is 297 * for architectures that might need to do something before 298 * referencing memory (e.g. remap an i/o window). 299 * 300 * NB: see the comments in ah_osdep.h about byte-swapping register 301 * reads and writes to understand what's going on below. 302 */ 303 304void 305ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 306{ 307 bus_space_tag_t tag = BUSTAG(ah); 308 bus_space_handle_t h = ah->ah_sh; 309 310#if _BYTE_ORDER == _BIG_ENDIAN 311 if (OS_REG_UNSWAPPED(reg)) 312 bus_space_write_4(tag, h, reg, val); 313 else 314#endif 315 bus_space_write_stream_4(tag, h, reg, val); 316} 317 318u_int32_t 319ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 320{ 321 bus_space_tag_t tag = BUSTAG(ah); 322 bus_space_handle_t h = ah->ah_sh; 323 u_int32_t val; 324 325#if _BYTE_ORDER == _BIG_ENDIAN 326 if (OS_REG_UNSWAPPED(reg)) 327 val = bus_space_read_4(tag, h, reg); 328 else 329#endif 330 val = bus_space_read_stream_4(tag, h, reg); 331 return val; 332} 333#endif /* AH_DEBUG || AH_REGOPS_FUNC */ 334 335#ifdef AH_ASSERT 336void 337ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 338{ 339 printf("Atheros HAL assertion failure: %s: line %u: %s\n", 340 filename, lineno, msg); 341 panic("ath_hal_assert"); 342} 343#endif /* AH_ASSERT */ 344