ah_osdep.c revision 162413
1162413Ssam/*- 2162413Ssam * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting 3162413Ssam * All rights reserved. 4162413Ssam * 5162413Ssam * Redistribution and use in source and binary forms, with or without 6162413Ssam * modification, are permitted provided that the following conditions 7162413Ssam * are met: 8162413Ssam * 1. Redistributions of source code must retain the above copyright 9162413Ssam * notice, this list of conditions and the following disclaimer, 10162413Ssam * without modification. 11162413Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12162413Ssam * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13162413Ssam * redistribution must be conditioned upon including a substantially 14162413Ssam * similar Disclaimer requirement for further binary redistribution. 15162413Ssam * 3. Neither the names of the above-listed copyright holders nor the names 16162413Ssam * of any contributors may be used to endorse or promote products derived 17162413Ssam * from this software without specific prior written permission. 18162413Ssam * 19162413Ssam * Alternatively, this software may be distributed under the terms of the 20162413Ssam * GNU General Public License ("GPL") version 2 as published by the Free 21162413Ssam * Software Foundation. 22162413Ssam * 23162413Ssam * NO WARRANTY 24162413Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25162413Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26162413Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27162413Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28162413Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29162413Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30162413Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31162413Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32162413Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33162413Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34162413Ssam * THE POSSIBILITY OF SUCH DAMAGES. 35162413Ssam * 36162413Ssam * $FreeBSD: head/sys/dev/ath/ah_osdep.c 162413 2006-09-18 16:49:15Z sam $ 37162413Ssam */ 38162413Ssam#include "opt_ah.h" 39162413Ssam 40162413Ssam#include <sys/param.h> 41162413Ssam#include <sys/systm.h> 42162413Ssam#include <sys/kernel.h> 43162413Ssam#include <sys/module.h> 44162413Ssam#include <sys/sysctl.h> 45162413Ssam#include <sys/bus.h> 46162413Ssam#include <sys/malloc.h> 47162413Ssam#include <sys/proc.h> 48162413Ssam 49162413Ssam#include <machine/stdarg.h> 50162413Ssam 51162413Ssam#include <net/ethernet.h> /* XXX for ether_sprintf */ 52162413Ssam 53162413Ssam#include <contrib/dev/ath/ah.h> 54162413Ssam 55162413Ssam/* 56162413Ssam * WiSoC boards overload the bus tag with information about the 57162413Ssam * board layout. We must extract the bus space tag from that 58162413Ssam * indirect structure. For everyone else the tag is passed in 59162413Ssam * directly. 60162413Ssam * XXX cache indirect ref privately 61162413Ssam */ 62162413Ssam#ifdef AH_SUPPORT_AR5312 63162413Ssam#define BUSTAG(ah) \ 64162413Ssam ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 65162413Ssam#else 66162413Ssam#define BUSTAG(ah) ((bus_space_tag_t) (ah)->ah_st) 67162413Ssam#endif 68162413Ssam 69162413Ssamextern void ath_hal_printf(struct ath_hal *, const char*, ...) 70162413Ssam __printflike(2,3); 71162413Ssamextern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 72162413Ssam __printflike(2, 0); 73162413Ssamextern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 74162413Ssamextern void *ath_hal_malloc(size_t); 75162413Ssamextern void ath_hal_free(void *); 76162413Ssam#ifdef AH_ASSERT 77162413Ssamextern void ath_hal_assert_failed(const char* filename, 78162413Ssam int lineno, const char* msg); 79162413Ssam#endif 80162413Ssam#ifdef AH_DEBUG 81162413Ssamextern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...); 82162413Ssamextern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...); 83162413Ssam#endif /* AH_DEBUG */ 84162413Ssam 85162413Ssam/* NB: put this here instead of the driver to avoid circular references */ 86162413SsamSYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 87162413SsamSYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters"); 88162413Ssam 89162413Ssam#ifdef AH_DEBUG 90162413Ssamstatic int ath_hal_debug = 0; 91162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, 92162413Ssam 0, "Atheros HAL debugging printfs"); 93162413SsamTUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug); 94162413Ssam#endif /* AH_DEBUG */ 95162413Ssam 96162413SsamSYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0, 97162413Ssam "Atheros HAL version"); 98162413Ssam 99162413Ssam/* NB: these are deprecated; they exist for now for compatibility */ 100162413Ssamint ath_hal_dma_beacon_response_time = 2; /* in TU's */ 101162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW, 102162413Ssam &ath_hal_dma_beacon_response_time, 0, 103162413Ssam "Atheros HAL DMA beacon response time"); 104162413Ssamint ath_hal_sw_beacon_response_time = 10; /* in TU's */ 105162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW, 106162413Ssam &ath_hal_sw_beacon_response_time, 0, 107162413Ssam "Atheros HAL software beacon response time"); 108162413Ssamint ath_hal_additional_swba_backoff = 0; /* in TU's */ 109162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW, 110162413Ssam &ath_hal_additional_swba_backoff, 0, 111162413Ssam "Atheros HAL additional SWBA backoff time"); 112162413Ssam 113162413SsamMALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 114162413Ssam 115162413Ssamvoid* 116162413Ssamath_hal_malloc(size_t size) 117162413Ssam{ 118162413Ssam return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 119162413Ssam} 120162413Ssam 121162413Ssamvoid 122162413Ssamath_hal_free(void* p) 123162413Ssam{ 124162413Ssam return free(p, M_ATH_HAL); 125162413Ssam} 126162413Ssam 127162413Ssamvoid 128162413Ssamath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 129162413Ssam{ 130162413Ssam vprintf(fmt, ap); 131162413Ssam} 132162413Ssam 133162413Ssamvoid 134162413Ssamath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 135162413Ssam{ 136162413Ssam va_list ap; 137162413Ssam va_start(ap, fmt); 138162413Ssam ath_hal_vprintf(ah, fmt, ap); 139162413Ssam va_end(ap); 140162413Ssam} 141162413Ssam 142162413Ssamconst char* 143162413Ssamath_hal_ether_sprintf(const u_int8_t *mac) 144162413Ssam{ 145162413Ssam return ether_sprintf(mac); 146162413Ssam} 147162413Ssam 148162413Ssam#ifdef AH_DEBUG 149162413Ssamvoid 150162413SsamHALDEBUG(struct ath_hal *ah, const char* fmt, ...) 151162413Ssam{ 152162413Ssam if (ath_hal_debug) { 153162413Ssam __va_list ap; 154162413Ssam va_start(ap, fmt); 155162413Ssam ath_hal_vprintf(ah, fmt, ap); 156162413Ssam va_end(ap); 157162413Ssam } 158162413Ssam} 159162413Ssam 160162413Ssamvoid 161162413SsamHALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...) 162162413Ssam{ 163162413Ssam if (ath_hal_debug >= level) { 164162413Ssam __va_list ap; 165162413Ssam va_start(ap, fmt); 166162413Ssam ath_hal_vprintf(ah, fmt, ap); 167162413Ssam va_end(ap); 168162413Ssam } 169162413Ssam} 170162413Ssam#endif /* AH_DEBUG */ 171162413Ssam 172162413Ssam#ifdef AH_DEBUG_ALQ 173162413Ssam/* 174162413Ssam * ALQ register tracing support. 175162413Ssam * 176162413Ssam * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 177162413Ssam * writes to the file /tmp/ath_hal.log. The file format is a simple 178162413Ssam * fixed-size array of records. When done logging set hw.ath.hal.alq=0 179162413Ssam * and then decode the file with the arcode program (that is part of the 180162413Ssam * HAL). If you start+stop tracing the data will be appended to an 181162413Ssam * existing file. 182162413Ssam * 183162413Ssam * NB: doesn't handle multiple devices properly; only one DEVICE record 184162413Ssam * is emitted and the different devices are not identified. 185162413Ssam */ 186162413Ssam#include <sys/alq.h> 187162413Ssam#include <sys/pcpu.h> 188162413Ssam#include <contrib/dev/ath/ah_decode.h> 189162413Ssam 190162413Ssamstatic struct alq *ath_hal_alq; 191162413Ssamstatic int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 192162413Ssamstatic u_int ath_hal_alq_lost; /* count of lost records */ 193162413Ssamstatic const char *ath_hal_logfile = "/tmp/ath_hal.log"; 194162413Ssamstatic u_int ath_hal_alq_qsize = 64*1024; 195162413Ssam 196162413Ssamstatic int 197162413Ssamath_hal_setlogging(int enable) 198162413Ssam{ 199162413Ssam int error; 200162413Ssam 201162413Ssam if (enable) { 202162413Ssam error = suser(curthread); 203162413Ssam if (error == 0) { 204162413Ssam error = alq_open(&ath_hal_alq, ath_hal_logfile, 205162413Ssam curthread->td_ucred, ALQ_DEFAULT_CMODE, 206162413Ssam sizeof (struct athregrec), ath_hal_alq_qsize); 207162413Ssam ath_hal_alq_lost = 0; 208162413Ssam ath_hal_alq_emitdev = 1; 209162413Ssam printf("ath_hal: logging to %s enabled\n", 210162413Ssam ath_hal_logfile); 211162413Ssam } 212162413Ssam } else { 213162413Ssam if (ath_hal_alq) 214162413Ssam alq_close(ath_hal_alq); 215162413Ssam ath_hal_alq = NULL; 216162413Ssam printf("ath_hal: logging disabled\n"); 217162413Ssam error = 0; 218162413Ssam } 219162413Ssam return (error); 220162413Ssam} 221162413Ssam 222162413Ssamstatic int 223162413Ssamsysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 224162413Ssam{ 225162413Ssam int error, enable; 226162413Ssam 227162413Ssam enable = (ath_hal_alq != NULL); 228162413Ssam error = sysctl_handle_int(oidp, &enable, 0, req); 229162413Ssam if (error || !req->newptr) 230162413Ssam return (error); 231162413Ssam else 232162413Ssam return (ath_hal_setlogging(enable)); 233162413Ssam} 234162413SsamSYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 235162413Ssam 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 236162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 237162413Ssam &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 238162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 239162413Ssam &ath_hal_alq_lost, 0, "Register operations not logged"); 240162413Ssam 241162413Ssamstatic struct ale * 242162413Ssamath_hal_alq_get(struct ath_hal *ah) 243162413Ssam{ 244162413Ssam struct ale *ale; 245162413Ssam 246162413Ssam if (ath_hal_alq_emitdev) { 247162413Ssam ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 248162413Ssam if (ale) { 249162413Ssam struct athregrec *r = 250162413Ssam (struct athregrec *) ale->ae_data; 251162413Ssam r->op = OP_DEVICE; 252162413Ssam r->reg = 0; 253162413Ssam r->val = ah->ah_devid; 254162413Ssam alq_post(ath_hal_alq, ale); 255162413Ssam ath_hal_alq_emitdev = 0; 256162413Ssam } else 257162413Ssam ath_hal_alq_lost++; 258162413Ssam } 259162413Ssam ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 260162413Ssam if (!ale) 261162413Ssam ath_hal_alq_lost++; 262162413Ssam return ale; 263162413Ssam} 264162413Ssam 265162413Ssamvoid 266162413Ssamath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 267162413Ssam{ 268162413Ssam bus_space_tag_t tag = BUSTAG(ah); 269162413Ssam bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 270162413Ssam 271162413Ssam if (ath_hal_alq) { 272162413Ssam struct ale *ale = ath_hal_alq_get(ah); 273162413Ssam if (ale) { 274162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 275162413Ssam r->op = OP_WRITE; 276162413Ssam r->reg = reg; 277162413Ssam r->val = val; 278162413Ssam alq_post(ath_hal_alq, ale); 279162413Ssam } 280162413Ssam } 281162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 282162413Ssam if (reg >= 0x4000 && reg < 0x5000) 283162413Ssam bus_space_write_4(tag, h, reg, val); 284162413Ssam else 285162413Ssam#endif 286162413Ssam bus_space_write_stream_4(tag, h, reg, val); 287162413Ssam} 288162413Ssam 289162413Ssamu_int32_t 290162413Ssamath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 291162413Ssam{ 292162413Ssam bus_space_tag_t tag = BUSTAG(ah); 293162413Ssam bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 294162413Ssam u_int32_t val; 295162413Ssam 296162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 297162413Ssam if (reg >= 0x4000 && reg < 0x5000) 298162413Ssam val = bus_space_read_4(tag, h, reg); 299162413Ssam else 300162413Ssam#endif 301162413Ssam val = bus_space_read_stream_4(tag, h, reg); 302162413Ssam if (ath_hal_alq) { 303162413Ssam struct ale *ale = ath_hal_alq_get(ah); 304162413Ssam if (ale) { 305162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 306162413Ssam r->op = OP_READ; 307162413Ssam r->reg = reg; 308162413Ssam r->val = val; 309162413Ssam alq_post(ath_hal_alq, ale); 310162413Ssam } 311162413Ssam } 312162413Ssam return val; 313162413Ssam} 314162413Ssam 315162413Ssamvoid 316162413SsamOS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 317162413Ssam{ 318162413Ssam if (ath_hal_alq) { 319162413Ssam struct ale *ale = ath_hal_alq_get(ah); 320162413Ssam if (ale) { 321162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 322162413Ssam r->op = OP_MARK; 323162413Ssam r->reg = id; 324162413Ssam r->val = v; 325162413Ssam alq_post(ath_hal_alq, ale); 326162413Ssam } 327162413Ssam } 328162413Ssam} 329162413Ssam#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 330162413Ssam/* 331162413Ssam * Memory-mapped device register read/write. These are here 332162413Ssam * as routines when debugging support is enabled and/or when 333162413Ssam * explicitly configured to use function calls. The latter is 334162413Ssam * for architectures that might need to do something before 335162413Ssam * referencing memory (e.g. remap an i/o window). 336162413Ssam * 337162413Ssam * NB: see the comments in ah_osdep.h about byte-swapping register 338162413Ssam * reads and writes to understand what's going on below. 339162413Ssam */ 340162413Ssam 341162413Ssamvoid 342162413Ssamath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 343162413Ssam{ 344162413Ssam bus_space_tag_t tag = BUSTAG(ah); 345162413Ssam bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 346162413Ssam 347162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 348162413Ssam if (reg >= 0x4000 && reg < 0x5000) 349162413Ssam bus_space_write_4(tag, h, reg, val); 350162413Ssam else 351162413Ssam#endif 352162413Ssam bus_space_write_stream_4(tag, h, reg, val); 353162413Ssam} 354162413Ssam 355162413Ssamu_int32_t 356162413Ssamath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 357162413Ssam{ 358162413Ssam bus_space_tag_t tag = BUSTAG(ah); 359162413Ssam bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 360162413Ssam u_int32_t val; 361162413Ssam 362162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 363162413Ssam if (reg >= 0x4000 && reg < 0x5000) 364162413Ssam val = bus_space_read_4(tag, h, reg); 365162413Ssam else 366162413Ssam#endif 367162413Ssam val = bus_space_read_stream_4(tag, h, reg); 368162413Ssam return val; 369162413Ssam} 370162413Ssam#endif /* AH_DEBUG || AH_REGOPS_FUNC */ 371162413Ssam 372162413Ssam#ifdef AH_ASSERT 373162413Ssamvoid 374162413Ssamath_hal_assert_failed(const char* filename, int lineno, const char *msg) 375162413Ssam{ 376162413Ssam printf("Atheros HAL assertion failure: %s: line %u: %s\n", 377162413Ssam filename, lineno, msg); 378162413Ssam panic("ath_hal_assert"); 379162413Ssam} 380162413Ssam#endif /* AH_ASSERT */ 381162413Ssam 382162413Ssam/* 383162413Ssam * Delay n microseconds. 384162413Ssam */ 385162413Ssamvoid 386162413Ssamath_hal_delay(int n) 387162413Ssam{ 388162413Ssam DELAY(n); 389162413Ssam} 390162413Ssam 391162413Ssamu_int32_t 392162413Ssamath_hal_getuptime(struct ath_hal *ah) 393162413Ssam{ 394162413Ssam struct bintime bt; 395162413Ssam getbinuptime(&bt); 396162413Ssam return (bt.sec * 1000) + 397162413Ssam (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32); 398162413Ssam} 399162413Ssam 400162413Ssamvoid 401162413Ssamath_hal_memzero(void *dst, size_t n) 402162413Ssam{ 403162413Ssam bzero(dst, n); 404162413Ssam} 405162413Ssam 406162413Ssamvoid * 407162413Ssamath_hal_memcpy(void *dst, const void *src, size_t n) 408162413Ssam{ 409162413Ssam return memcpy(dst, src, n); 410162413Ssam} 411162413Ssam 412162413Ssam/* 413162413Ssam * Module glue. 414162413Ssam */ 415162413Ssam 416162413Ssamstatic int 417162413Ssamath_hal_modevent(module_t mod, int type, void *unused) 418162413Ssam{ 419162413Ssam const char *sep; 420162413Ssam int i; 421162413Ssam 422162413Ssam switch (type) { 423162413Ssam case MOD_LOAD: 424162413Ssam printf("ath_hal: %s (", ath_hal_version); 425162413Ssam sep = ""; 426162413Ssam for (i = 0; ath_hal_buildopts[i] != NULL; i++) { 427162413Ssam printf("%s%s", sep, ath_hal_buildopts[i]); 428162413Ssam sep = ", "; 429162413Ssam } 430162413Ssam printf(")\n"); 431162413Ssam return 0; 432162413Ssam case MOD_UNLOAD: 433162413Ssam return 0; 434162413Ssam } 435162413Ssam return EINVAL; 436162413Ssam} 437162413Ssam 438162413Ssamstatic moduledata_t ath_hal_mod = { 439162413Ssam "ath_hal", 440162413Ssam ath_hal_modevent, 441162413Ssam 0 442162413Ssam}; 443162413SsamDECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY); 444162413SsamMODULE_VERSION(ath_hal, 1); 445