ata-dma.c revision 54969
1/*- 2 * Copyright (c) 1998,1999 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 54969 1999-12-21 20:18:56Z sos $ 29 */ 30 31#include "pci.h" 32#include "apm.h" 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/buf.h> 36#include <sys/malloc.h> 37#include <sys/bus.h> 38#include <sys/disk.h> 39#include <sys/devicestat.h> 40#include <vm/vm.h> 41#include <vm/pmap.h> 42#if NPCI > 0 43#include <pci/pcivar.h> 44#endif 45#if NAPM > 0 46#include <machine/apm_bios.h> 47#endif 48#include <dev/ata/ata-all.h> 49#include <dev/ata/ata-disk.h> 50 51/* prototypes */ 52static void hpt366_timing(struct ata_softc *, int32_t, int32_t); 53 54/* misc defines */ 55#define MIN(a,b) ((a)>(b)?(b):(a)) 56#ifdef __alpha__ 57#undef vtophys 58#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) 59#endif 60 61#if NPCI > 0 62 63int32_t 64ata_dmainit(struct ata_softc *scp, int32_t device, 65 int32_t apiomode, int32_t wdmamode, int32_t udmamode) 66{ 67 int32_t type, error; 68 int32_t devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 69 void *dmatab; 70 71 if (!scp->bmaddr) 72 return -1; 73 74 /* if simplex controller, only allow DMA on primary channel */ 75 if (scp->unit == 1) { 76 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) & 77 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 78 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { 79 printf("ata%d: simplex device, DMA on primary channel only\n", 80 scp->lun); 81 return -1; 82 } 83 } 84 85 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) 86 return -1; 87 88 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^ 89 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) { 90 printf("ata%d-%s: dmatab crosses page boundary, no DMA\n", 91 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 92 free(dmatab, M_DEVBUF); 93 return -1; 94 } 95 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab; 96 97 switch (type = pci_get_devid(scp->dev)) { 98 99 case 0x71118086: /* Intel PIIX4 */ 100 case 0x71998086: /* Intel PIIX4 */ 101 if (udmamode >= 2) { 102 int32_t mask48, new48; 103 104 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 105 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 106 if (bootverbose) 107 printf("ata%d-%s: %s setting up UDMA2 mode on PIIX4 chip\n", 108 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 109 (error) ? "failed" : "success"); 110 if (!error) { 111 mask48 = (1 << devno) + (3 << (16 + (devno << 2))); 112 new48 = (1 << devno) + (2 << (16 + (devno << 2))); 113 pci_write_config(scp->dev, 0x48, 114 (pci_read_config(scp->dev, 0x48, 4) & 115 ~mask48) | new48, 4); 116 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 117 return 0; 118 } 119 } 120 /* FALLTHROUGH */ 121 122 case 0x70108086: /* Intel PIIX3 */ 123 if (wdmamode >= 2 && apiomode >= 4) { 124 int32_t mask40, new40, mask44, new44; 125 126 /* if SITRE not set doit for both channels */ 127 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){ 128 new40 = pci_read_config(scp->dev, 0x40, 4); 129 new44 = pci_read_config(scp->dev, 0x44, 4); 130 if (!(new40 & 0x00004000)) { 131 new44 &= ~0x0000000f; 132 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8); 133 } 134 if (!(new40 & 0x40000000)) { 135 new44 &= ~0x000000f0; 136 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20); 137 } 138 new40 |= 0x40004000; 139 pci_write_config(scp->dev, 0x40, new40, 4); 140 pci_write_config(scp->dev, 0x44, new44, 4); 141 } 142 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 143 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 144 if (bootverbose) 145 printf("ata%d-%s: %s setting up WDMA2 mode on PIIX%s chip\n", 146 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 147 (error) ? "failed" : "success", 148 (type == 0x70108086) ? "3" : "4"); 149 if (!error) { 150 if (device == ATA_MASTER) { 151 mask40 = 0x0000330f; 152 new40 = 0x00002307; 153 mask44 = 0; 154 new44 = 0; 155 } 156 else { 157 mask40 = 0x000000f0; 158 new40 = 0x00000070; 159 mask44 = 0x0000000f; 160 new44 = 0x0000000b; 161 } 162 if (scp->unit) { 163 mask40 <<= 16; 164 new40 <<= 16; 165 mask44 <<= 4; 166 new44 <<= 4; 167 } 168 pci_write_config(scp->dev, 0x40, 169 (pci_read_config(scp->dev, 0x40, 4) & ~mask40)| 170 new40, 4); 171 pci_write_config(scp->dev, 0x44, 172 (pci_read_config(scp->dev, 0x44, 4) & ~mask44)| 173 new44, 4); 174 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 175 return 0; 176 } 177 } 178 /* we could set PIO mode timings, but we assume the BIOS did that */ 179 break; 180 181 case 0x12308086: /* Intel PIIX */ 182 if (wdmamode >= 2 && apiomode >= 4) { 183 int32_t word40; 184 185 word40 = pci_read_config(scp->dev, 0x40, 4); 186 word40 >>= scp->unit * 16; 187 188 /* Check for timing config usable for DMA on controller */ 189 if (!((word40 & 0x3300) == 0x2300 && 190 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1)) 191 break; 192 193 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 194 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 195 if (bootverbose) 196 printf("ata%d-%s: %s setting up WDMA2 mode on PIIX chip\n", 197 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 198 (error) ? "failed" : "success"); 199 if (!error) { 200 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 201 return 0; 202 } 203 } 204 break; 205 206 case 0x522910b9: /* AcerLabs Aladdin IV/V */ 207 /* the Aladdin doesn't support ATAPI DMA on both master & slave */ 208 if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) { 209 printf("ata%d: Aladdin: two atapi devices on this channel, " 210 "DMA disabled\n", scp->lun); 211 break; 212 } 213 if (udmamode >= 2) { 214 int32_t word54 = pci_read_config(scp->dev, 0x54, 4); 215 216 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 217 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 218 if (bootverbose) 219 printf("ata%d-%s: %s setting up UDMA2 mode on Aladdin chip\n", 220 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 221 (error) ? "failed" : "success"); 222 if (!error) { 223 word54 |= 0x5555; 224 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2))); 225 pci_write_config(scp->dev, 0x54, word54, 4); 226 pci_write_config(scp->dev, 0x53, 227 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 228 scp->flags |= ATA_ATAPI_DMA_RO; 229 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 230 return 0; 231 } 232 } 233 if (wdmamode >= 2 && apiomode >= 4) { 234 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 235 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 236 if (bootverbose) 237 printf("ata%d-%s: %s setting up WDMA2 mode on Aladdin chip\n", 238 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 239 (error) ? "failed" : "success"); 240 if (!error) { 241 pci_write_config(scp->dev, 0x53, 242 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 243 scp->flags |= ATA_ATAPI_DMA_RO; 244 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 245 return 0; 246 } 247 } 248 /* we could set PIO mode timings, but we assume the BIOS did that */ 249 break; 250 251 case 0x05711106: /* VIA Apollo 82C571 / 82C586 / 82C686 */ 252 case 0x74091022: /* AMD 756 */ 253 /* UDMA4 mode only on 82C686 / AMD 756 hardware */ 254 if ((udmamode >= 4 && ata_find_dev(scp->dev, 0x06861106)) || 255 (udmamode >= 4 && type == 0x74091022)) { 256 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 257 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 258 if (bootverbose) 259 printf("ata%d-%s: %s setting up UDMA4 mode on %s chip\n", 260 scp->lun, (device == ATA_MASTER) ? "master":"slave", 261 (error) ? "failed" : "success", 262 (type == 0x74091022) ? "AMD" : "VIA"); 263 if (!error) { 264 pci_write_config(scp->dev, 0x53 - devno, 0xc3, 1); 265 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 266 return 0; 267 } 268 } 269 270 /* UDMA2 mode only on 82C686 and AMD 756 and rev 1 and better 82C586 */ 271 if ((udmamode >= 2 && ata_find_dev(scp->dev, 0x06861106)) || 272 (udmamode >= 2 && type == 0x74091022) || 273 (udmamode >= 2 && ata_find_dev(scp->dev, 0x05861106) && 274 pci_read_config(scp->dev, 0x08, 1) >= 0x01)) { 275 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 276 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 277 if (bootverbose) 278 printf("ata%d-%s: %s setting up UDMA2 mode on %s chip\n", 279 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 280 (error) ? "failed" : "success", 281 (type == 0x74091022) ? "AMD" : "VIA"); 282 if (!error) { 283 pci_write_config(scp->dev, 0x53 - devno, 0xc0, 1); 284 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 285 return 0; 286 } 287 } 288 if (wdmamode >= 2 && apiomode >= 4) { 289 /* set WDMA2 mode timing */ 290 291 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 292 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 293 if (bootverbose) 294 printf("ata%d-%s: %s setting up WDMA2 mode on %s chip\n", 295 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 296 (error) ? "failed" : "success", 297 (type == 0x74091022) ? "AMD" : "VIA"); 298 if (!error) { 299 pci_write_config(scp->dev, 0x53 - devno, 0x82, 1); 300 pci_write_config(scp->dev, 0x4b - devno, 0x31, 1); 301 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 302 return 0; 303 } 304 } 305 /* we could set PIO mode timings, but we assume the BIOS did that */ 306 break; 307 308 case 0x55131039: /* SiS 5591 */ 309 if (udmamode >= 2) { 310 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 311 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 312 if (bootverbose) 313 printf("ata%d-%s: %s setting up UDMA2 mode on SiS chip\n", 314 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 315 (error) ? "failed" : "success"); 316 if (!error) { 317 pci_write_config(scp->dev, 0x40 + (devno << 1), 0xa301, 2); 318 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 319 return 0; 320 } 321 } 322 if (wdmamode >=2 && apiomode >= 4) { 323 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 324 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 325 if (bootverbose) 326 printf("ata%d-%s: %s setting up WDMA2 mode on SiS chip\n", 327 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 328 (error) ? "failed" : "success"); 329 if (!error) { 330 pci_write_config(scp->dev, 0x40 + (devno << 1), 0x0301, 2); 331 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 332 return 0; 333 } 334 } 335 /* we could set PIO mode timings, but we assume the BIOS did that */ 336 break; 337 338 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */ 339 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */ 340 /* the Promise can only do DMA on ATA disks not on ATAPI devices */ 341 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 342 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 343 break; 344 345 if (udmamode >=4 && type == 0x4d38105a && 346 !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) { 347 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 348 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 349 if (bootverbose) 350 printf("ata%d-%s: %s setting up UDMA4 mode on Promise chip\n", 351 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 352 (error) ? "failed" : "success"); 353 if (!error) { 354 outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2); 355 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 356 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 357 return 0; 358 } 359 } 360 if (udmamode >= 2) { 361 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 362 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 363 if (bootverbose) 364 printf("ata%d-%s: %s setting up UDMA2 mode on Promise chip\n", 365 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 366 (error) ? "failed" : "success"); 367 if (!error) { 368 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 369 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 370 return 0; 371 } 372 } 373 if (wdmamode >= 2 && apiomode >= 4) { 374 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 375 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 376 if (bootverbose) 377 printf("ata%d-%s: %s setting up WDMA2 mode on Promise chip\n", 378 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 379 (error) ? "failed" : "success"); 380 if (!error) { 381 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4); 382 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 383 return 0; 384 } 385 } 386 if (bootverbose) 387 printf("ata%d-%s: setting PIO mode on Promise chip\n", 388 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 389 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4); 390 break; 391 392 case 0x00041103: /* HighPoint HPT366 controller */ 393 /* no ATAPI devices for now */ 394 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 395 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 396 break; 397 398 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 399 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 400 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 401 if (bootverbose) 402 printf("ata%d-%s: %s setting up UDMA4 mode on HPT366 chip\n", 403 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 404 (error) ? "failed" : "success"); 405 if (!error) { 406 hpt366_timing(scp, device, ATA_MODE_UDMA4); 407 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 408 return 0; 409 } 410 } 411 if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 412 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 413 ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY); 414 if (bootverbose) 415 printf("ata%d-%s: %s setting up UDMA3 mode on HPT366 chip\n", 416 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 417 (error) ? "failed" : "success"); 418 if (!error) { 419 hpt366_timing(scp, device, ATA_MODE_UDMA3); 420 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3; 421 return 0; 422 } 423 } 424 if (udmamode >= 2) { 425 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 426 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 427 if (bootverbose) 428 printf("ata%d-%s: %s setting up UDMA2 mode on HPT366 chip\n", 429 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 430 (error) ? "failed" : "success"); 431 if (!error) { 432 hpt366_timing(scp, device, ATA_MODE_UDMA2); 433 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 434 return 0; 435 } 436 } 437 if (wdmamode >= 2 && apiomode >= 4) { 438 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 439 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 440 if (bootverbose) 441 printf("ata%d-%s: %s setting up WDMA2 mode on HPT366 chip\n", 442 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 443 (error) ? "failed" : "success"); 444 if (!error) { 445 hpt366_timing(scp, device, ATA_MODE_WDMA2); 446 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 447 return 0; 448 } 449 } 450 if (bootverbose) 451 printf("ata%d-%s: setting PIO mode on HPT366 chip\n", 452 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 453 hpt366_timing(scp, device, ATA_MODE_PIO); 454 break; 455 456 default: /* unknown controller chip */ 457 /* better not try generic DMA on ATAPI devices it almost never works */ 458 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 459 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 460 break; 461 462 /* well, we have no support for this, but try anyways */ 463 if ((wdmamode >= 2 && apiomode >= 4) && scp->bmaddr) { 464#if MAYBE_NOT 465 && (inb(scp->bmaddr + ATA_BMSTAT_PORT) & 466 ((device == ATA_MASTER) ? 467 ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) { 468#endif 469 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 470 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 471 if (bootverbose) 472 printf("ata%d-%s: %s setting up WDMA2 mode on generic chip\n", 473 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 474 (error) ? "failed" : "success"); 475 if (!error) { 476 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 477 return 0; 478 } 479 } 480 } 481 free(dmatab, M_DEVBUF); 482 return -1; 483} 484 485int32_t 486ata_dmasetup(struct ata_softc *scp, int32_t device, 487 int8_t *data, int32_t count, int32_t flags) 488{ 489 struct ata_dmaentry *dmatab; 490 u_int32_t dma_count, dma_base; 491 int32_t i = 0; 492 493 if (((uintptr_t)data & 1) || (count & 1)) 494 return -1; 495 496 if (!count) { 497 printf("ata%d-%s: zero length DMA transfer attempted\n", 498 scp->lun, ((device == ATA_MASTER) ? "master" : "slave")); 499 return -1; 500 } 501 502 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1]; 503 dma_base = vtophys(data); 504 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK))); 505 data += dma_count; 506 count -= dma_count; 507 508 while (count) { 509 dmatab[i].base = dma_base; 510 dmatab[i].count = (dma_count & 0xffff); 511 i++; 512 if (i >= ATA_DMA_ENTRIES) { 513 printf("ata%d-%s: too many segments in DMA table\n", 514 scp->lun, (device ? "slave" : "master")); 515 return -1; 516 } 517 dma_base = vtophys(data); 518 dma_count = MIN(count, PAGE_SIZE); 519 data += MIN(count, PAGE_SIZE); 520 count -= MIN(count, PAGE_SIZE); 521 } 522 dmatab[i].base = dma_base; 523 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT; 524 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab)); 525 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0); 526 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) | 527 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 528 return 0; 529} 530 531void 532ata_dmastart(struct ata_softc *scp) 533{ 534 scp->flags |= ATA_DMA_ACTIVE; 535 outb(scp->bmaddr + ATA_BMCMD_PORT, 536 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 537} 538 539int32_t 540ata_dmadone(struct ata_softc *scp) 541{ 542 outb(scp->bmaddr + ATA_BMCMD_PORT, 543 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 544 scp->flags &= ~ATA_DMA_ACTIVE; 545 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 546} 547 548int32_t 549ata_dmastatus(struct ata_softc *scp) 550{ 551 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 552} 553 554static void 555hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode) 556{ 557 u_int32_t timing; 558 559 switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){ 560 case 0x85: /* 25Mhz */ 561 switch (mode) { 562 case ATA_MODE_PIO: timing = 0xc0ca8521; break; 563 case ATA_MODE_WDMA2: timing = 0xa0ca8521; break; 564 case ATA_MODE_UDMA2: 565 case ATA_MODE_UDMA3: timing = 0x90cf8521; break; 566 case ATA_MODE_UDMA4: timing = 0x90c98521; break; 567 default: timing = 0x01208585; 568 } 569 break; 570 default: 571 case 0xa7: /* 33MHz */ 572 switch (mode) { 573 case ATA_MODE_PIO: timing = 0xc0c8a731; break; 574 case ATA_MODE_WDMA2: timing = 0xa0c8a731; break; 575 case ATA_MODE_UDMA2: timing = 0x90caa731; break; 576 case ATA_MODE_UDMA3: timing = 0x90cfa731; break; 577 case ATA_MODE_UDMA4: timing = 0x90c9a731; break; 578 default: timing = 0x0120a7a7; 579 } 580 break; 581 case 0xd9: /* 40Mhz */ 582 switch (mode) { 583 case ATA_MODE_PIO: timing = 0xc008d963; break; 584 case ATA_MODE_WDMA2: timing = 0xa008d943; break; 585 case ATA_MODE_UDMA2: timing = 0x900bd943; break; 586 case ATA_MODE_UDMA3: timing = 0x900ad943; break; 587 case ATA_MODE_UDMA4: timing = 0x900fd943; break; 588 default: timing = 0x0120d9d9; 589 } 590 } 591 pci_write_config(scp->dev, (device==ATA_MASTER ? 0x40 : 0x44), timing, 4); 592} 593 594#else /* NPCI > 0 */ 595 596int32_t 597ata_dmainit(struct ata_softc *scp, int32_t device, 598 int32_t piomode, int32_t wdmamode, int32_t udmamode) 599{ 600 return -1; 601} 602 603int32_t 604ata_dmasetup(struct ata_softc *scp, int32_t device, 605 int8_t *data, int32_t count, int32_t flags) 606{ 607 return -1; 608} 609 610void 611ata_dmastart(struct ata_softc *scp) 612{ 613} 614 615int32_t 616ata_dmadone(struct ata_softc *scp) 617{ 618 return -1; 619} 620 621int32_t 622ata_dmastatus(struct ata_softc *scp) 623{ 624 return -1; 625} 626 627#endif /* NPCI > 0 */ 628