ata-dma.c revision 54270
1/*- 2 * Copyright (c) 1998,1999 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 54270 1999-12-07 22:07:18Z sos $ 29 */ 30 31#include "pci.h" 32#include "apm.h" 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/buf.h> 36#include <sys/malloc.h> 37#include <sys/bus.h> 38#include <sys/disk.h> 39#include <sys/devicestat.h> 40#include <vm/vm.h> 41#include <vm/pmap.h> 42#if NPCI > 0 43#include <pci/pcivar.h> 44#endif 45#if NAPM > 0 46#include <machine/apm_bios.h> 47#endif 48#include <dev/ata/ata-all.h> 49#include <dev/ata/ata-disk.h> 50 51/* prototypes */ 52static void hpt366_timing(struct ata_softc *, int32_t, int32_t); 53 54/* misc defines */ 55#define MIN(a,b) ((a)>(b)?(b):(a)) 56#ifdef __alpha__ 57#undef vtophys 58#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) 59#endif 60 61#if NPCI > 0 62 63int32_t 64ata_dmainit(struct ata_softc *scp, int32_t device, 65 int32_t apiomode, int32_t wdmamode, int32_t udmamode) 66{ 67 int32_t type, devno, error; 68 void *dmatab; 69 70 if (!scp->bmaddr) 71 return -1; 72#ifdef ATA_DMADEBUG 73 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n", 74 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr); 75#endif 76 77 /* if simplex controller, only allow DMA on primary channel */ 78 if (scp->unit == 1) { 79 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) & 80 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 81 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { 82 printf("ata%d: simplex device, DMA on primary channel only\n", 83 scp->lun); 84 return -1; 85 } 86 } 87 88 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) 89 return -1; 90 91 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^ 92 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) { 93 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n"); 94 free(dmatab, M_DEVBUF); 95 return -1; 96 } 97 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab; 98 99 switch (type = pci_get_devid(scp->dev)) { 100 101 case 0x71118086: /* Intel PIIX4 */ 102 if (udmamode >= 2) { 103 int32_t mask48, new48; 104 105 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 106 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 107 if (bootverbose) 108 printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n", 109 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 110 (error) ? "failed" : "success"); 111 if (!error) { 112 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 113 mask48 = (1 << devno) + (3 << (16 + (devno << 2))); 114 new48 = (1 << devno) + (2 << (16 + (devno << 2))); 115 pci_write_config(scp->dev, 0x48, 116 (pci_read_config(scp->dev, 0x48, 4) & 117 ~mask48) | new48, 4); 118 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 119 return 0; 120 } 121 } 122 /* FALLTHROUGH */ 123 124 case 0x70108086: /* Intel PIIX3 */ 125 if (wdmamode >= 2 && apiomode >= 4) { 126 int32_t mask40, new40, mask44, new44; 127 128 /* if SITRE not set doit for both channels */ 129 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){ 130 new40 = pci_read_config(scp->dev, 0x40, 4); 131 new44 = pci_read_config(scp->dev, 0x44, 4); 132 if (!(new40 & 0x00004000)) { 133 new44 &= ~0x0000000f; 134 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8); 135 } 136 if (!(new40 & 0x40000000)) { 137 new44 &= ~0x000000f0; 138 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20); 139 } 140 new40 |= 0x40004000; 141 pci_write_config(scp->dev, 0x40, new40, 4); 142 pci_write_config(scp->dev, 0x44, new44, 4); 143 } 144 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 145 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 146 if (bootverbose) 147 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n", 148 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 149 (error) ? "failed" : "success"); 150 if (!error) { 151 if (device == ATA_MASTER) { 152 mask40 = 0x0000330f; 153 new40 = 0x00002307; 154 mask44 = 0; 155 new44 = 0; 156 } 157 else { 158 mask40 = 0x000000f0; 159 new40 = 0x00000070; 160 mask44 = 0x0000000f; 161 new44 = 0x0000000b; 162 } 163 if (scp->unit) { 164 mask40 <<= 16; 165 new40 <<= 16; 166 mask44 <<= 4; 167 new44 <<= 4; 168 } 169 pci_write_config(scp->dev, 0x40, 170 (pci_read_config(scp->dev, 0x40, 4) & ~mask40)| 171 new40, 4); 172 pci_write_config(scp->dev, 0x44, 173 (pci_read_config(scp->dev, 0x44, 4) & ~mask44)| 174 new44, 4); 175 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 176 return 0; 177 } 178 } 179 /* we could set PIO mode timings, but we assume the BIOS did that */ 180 break; 181 182 case 0x12308086: /* Intel PIIX */ 183 /* probably not worth the trouble */ 184 break; 185 186 case 0x522910b9: /* AcerLabs Aladdin IV/V */ 187 /* the Aladdin doesn't support ATAPI DMA on both master & slave */ 188 if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) { 189 printf("ata%d: Aladdin: two atapi devices on this channel, " 190 "DMA disabled\n", scp->lun); 191 break; 192 } 193 if (udmamode >= 2) { 194 int32_t word54 = pci_read_config(scp->dev, 0x54, 4); 195 196 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 197 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 198 if (bootverbose) 199 printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n", 200 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 201 (error) ? "failed" : "success"); 202 if (!error) { 203 word54 |= 0x5555; 204 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2))); 205 pci_write_config(scp->dev, 0x54, word54, 4); 206 pci_write_config(scp->dev, 0x53, 207 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 208 scp->flags |= ATA_ATAPI_DMA_RO; 209 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 210 return 0; 211 } 212 } 213 if (wdmamode >= 2 && apiomode >= 4) { 214 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 215 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 216 if (bootverbose) 217 printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n", 218 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 219 (error) ? "failed" : "success"); 220 if (!error) { 221 pci_write_config(scp->dev, 0x53, 222 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 223 scp->flags |= ATA_ATAPI_DMA_RO; 224 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 225 return 0; 226 } 227 } 228 /* we could set PIO mode timings, but we assume the BIOS did that */ 229 break; 230 231 case 0x05711106: /* VIA Apollo 82c571 / 82c586 / 82c686 */ 232 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 233 234 /* UDMA4 mode only on rev 6 (VT82C686) hardware */ 235 if (udmamode >= 4 && pci_read_config(scp->dev, 0x08, 1) == 0x06) { 236 int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 237 238 /* enable UDMA transfer modes setting by SETFEATURES cmd */ 239 pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 240 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 241 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 242 if (bootverbose) 243 printf("ata%d: %s: %s setting up UDMA4 mode on VIA chip\n", 244 scp->lun, (device == ATA_MASTER) ? "master":"slave", 245 (error) ? "failed" : "success"); 246 if (!error) { 247 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 248 return 0; 249 } 250 pci_write_config(scp->dev, 0x53 - devno, byte, 1); 251 } 252 253 /* UDMA2 mode only on rev 1 and up (VT82C586, VT82C686) hardware */ 254 if (udmamode >= 2 && pci_read_config(scp->dev, 0x08, 1) >= 0x01) { 255 int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 256 257 /* enable UDMA transfer modes setting by SETFEATURES cmd */ 258 pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 259 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 260 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 261 if (bootverbose) 262 printf("ata%d: %s: %s setting up UDMA2 mode on VIA chip\n", 263 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 264 (error) ? "failed" : "success"); 265 if (!error) { 266 if ((device == ATA_MASTER && scp->devices & ATA_ATA_MASTER) || 267 (device == ATA_SLAVE && scp->devices & ATA_ATA_SLAVE)) { 268 struct ata_params *ap = ((struct ad_softc *) 269 (scp->dev_softc[(device==ATA_MASTER)?0:1]))->ata_parm; 270 271 if ((pci_read_config(scp->dev, 0x08, 1) == 0x06) && 272 (ap->udmamodes & 0x10) && !ap->cblid) { 273 pci_write_config(scp->dev, 0x53 - devno, 274 (byte & 0x1c) | 0x42, 1); 275 } 276 } 277 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 278 return 0; 279 } 280 pci_write_config(scp->dev, 0x53 - devno, byte, 1); 281 } 282 if (wdmamode >= 2 && apiomode >= 4) { 283 /* set WDMA2 mode timing */ 284 pci_write_config(scp->dev, 0x4b - devno, 0x31 , 1); 285 286 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 287 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 288 if (bootverbose) 289 printf("ata%d: %s: %s setting up WDMA2 mode on VIA chip\n", 290 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 291 (error) ? "failed" : "success"); 292 if (!error) { 293 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 294 return 0; 295 } 296 } 297 /* we could set PIO mode timings, but we assume the BIOS did that */ 298 break; 299 300 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */ 301 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */ 302 /* the Promise can only do DMA on ATA disks not on ATAPI devices */ 303 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 304 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 305 break; 306 307 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 308 if (udmamode >=4 && type == 0x4d38105a && 309 !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) { 310 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 311 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 312 if (bootverbose) 313 printf("ata%d: %s: %s setting up UDMA4 mode on Promise chip\n", 314 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 315 (error) ? "failed" : "success"); 316 if (!error) { 317 outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2); 318 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 319 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 320 return 0; 321 } 322 } 323 if (udmamode >= 2) { 324 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 325 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 326 if (bootverbose) 327 printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n", 328 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 329 (error) ? "failed" : "success"); 330 if (!error) { 331 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 332 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 333 return 0; 334 } 335 } 336 if (wdmamode >= 2 && apiomode >= 4) { 337 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 338 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 339 if (bootverbose) 340 printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n", 341 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 342 (error) ? "failed" : "success"); 343 if (!error) { 344 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4); 345 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 346 return 0; 347 } 348 } 349 if (bootverbose) 350 printf("ata%d: %s: setting PIO mode on Promise chip\n", 351 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 352 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4); 353 break; 354 355 case 0x00041103: /* HighPoint HPT366 controller */ 356 /* no ATAPI devices for now */ 357 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 358 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 359 break; 360 361 devno = (device == ATA_MASTER) ? 0 : 1; 362 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 363 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 364 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 365 if (bootverbose) 366 printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n", 367 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 368 (error) ? "failed" : "success"); 369 if (!error) { 370 hpt366_timing(scp, device, ATA_MODE_UDMA4); 371 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 372 return 0; 373 } 374 } 375 if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 376 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 377 ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY); 378 if (bootverbose) 379 printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n", 380 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 381 (error) ? "failed" : "success"); 382 if (!error) { 383 hpt366_timing(scp, device, ATA_MODE_UDMA3); 384 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3; 385 return 0; 386 } 387 } 388 if (udmamode >= 2) { 389 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 390 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 391 if (bootverbose) 392 printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n", 393 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 394 (error) ? "failed" : "success"); 395 if (!error) { 396 hpt366_timing(scp, device, ATA_MODE_UDMA2); 397 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 398 return 0; 399 } 400 } 401 if (wdmamode >= 2 && apiomode >= 4) { 402 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 403 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 404 if (bootverbose) 405 printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n", 406 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 407 (error) ? "failed" : "success"); 408 if (!error) { 409 hpt366_timing(scp, device, ATA_MODE_WDMA2); 410 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 411 return 0; 412 } 413 } 414 if (bootverbose) 415 printf("ata%d: %s: setting PIO mode on HPT366 chip\n", 416 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 417 hpt366_timing(scp, device, ATA_MODE_PIO); 418 break; 419 420 default: /* unknown controller chip */ 421 /* better not try generic DMA on ATAPI devices it almost never works */ 422 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 423 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 424 break; 425 426 /* well, we have no support for this, but try anyways */ 427 if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) && 428 (inb(scp->bmaddr + ATA_BMSTAT_PORT) & 429 ((device == ATA_MASTER) ? 430 ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER))) { 431 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 432 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 433 if (bootverbose) 434 printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n", 435 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 436 (error) ? "failed" : "success"); 437 if (!error) { 438 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 439 return 0; 440 } 441 } 442 } 443 free(dmatab, M_DEVBUF); 444 return -1; 445} 446 447int32_t 448ata_dmasetup(struct ata_softc *scp, int32_t device, 449 int8_t *data, int32_t count, int32_t flags) 450{ 451 struct ata_dmaentry *dmatab; 452 u_int32_t dma_count, dma_base; 453 int32_t i = 0; 454 455#ifdef ATA_DMADEBUG 456 printf("ata%d: dmasetup\n", scp->lun); 457#endif 458 if (((uintptr_t)data & 1) || (count & 1)) 459 return -1; 460 461 if (!count) { 462#ifdef ATA_DMADEBUG 463 printf("ata%d: zero length DMA transfer attempt on %s\n", 464 scp->lun, ((device == ATA_MASTER) ? "master" : "slave")); 465#endif 466 return -1; 467 } 468 469 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1]; 470 dma_base = vtophys(data); 471 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK))); 472 data += dma_count; 473 count -= dma_count; 474 475 while (count) { 476 dmatab[i].base = dma_base; 477 dmatab[i].count = (dma_count & 0xffff); 478 i++; 479 if (i >= ATA_DMA_ENTRIES) { 480 printf("ata%d: too many segments in DMA table for %s\n", 481 scp->lun, (device ? "slave" : "master")); 482 return -1; 483 } 484 dma_base = vtophys(data); 485 dma_count = MIN(count, PAGE_SIZE); 486 data += MIN(count, PAGE_SIZE); 487 count -= MIN(count, PAGE_SIZE); 488 } 489#ifdef ATA_DMADEBUG 490 printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count); 491#endif 492 dmatab[i].base = dma_base; 493 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT; 494 495 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab)); 496#ifdef ATA_DMADEBUG 497 printf("dmatab=%08x %08x\n", 498 vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT)); 499#endif 500 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0); 501 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) | 502 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 503 return 0; 504} 505 506void 507ata_dmastart(struct ata_softc *scp) 508{ 509#ifdef ATA_DMADEBUG 510 printf("ata%d: dmastart\n", scp->lun); 511#endif 512 scp->flags |= ATA_DMA_ACTIVE; 513 outb(scp->bmaddr + ATA_BMCMD_PORT, 514 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 515} 516 517int32_t 518ata_dmadone(struct ata_softc *scp) 519{ 520#ifdef ATA_DMADEBUG 521 printf("ata%d: dmadone\n", scp->lun); 522#endif 523 outb(scp->bmaddr + ATA_BMCMD_PORT, 524 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 525 scp->flags &= ~ATA_DMA_ACTIVE; 526 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 527} 528 529int32_t 530ata_dmastatus(struct ata_softc *scp) 531{ 532#ifdef ATA_DMADEBUG 533 printf("ata%d: dmastatus\n", scp->lun); 534#endif 535 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 536} 537 538static void 539hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode) 540{ 541 u_int32_t timing; 542 543 switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){ 544 case 0x85: /* 25Mhz */ 545 switch (mode) { 546 case ATA_MODE_PIO: timing = 0xc0ca8521; break; 547 case ATA_MODE_WDMA2: timing = 0xa0ca8521; break; 548 case ATA_MODE_UDMA2: 549 case ATA_MODE_UDMA3: timing = 0x90cf8521; break; 550 case ATA_MODE_UDMA4: timing = 0x90c98521; break; 551 default: timing = 0x01208585; 552 } 553 break; 554 default: 555 case 0xa7: /* 33MHz */ 556 switch (mode) { 557 case ATA_MODE_PIO: timing = 0xc0c8a731; break; 558 case ATA_MODE_WDMA2: timing = 0xa0c8a731; break; 559 case ATA_MODE_UDMA2: timing = 0x90caa731; break; 560 case ATA_MODE_UDMA3: timing = 0x90cfa731; break; 561 case ATA_MODE_UDMA4: timing = 0x90c9a731; break; 562 default: timing = 0x0120a7a7; 563 } 564 break; 565 case 0xd9: /* 40Mhz */ 566 switch (mode) { 567 case ATA_MODE_PIO: timing = 0xc008d963; break; 568 case ATA_MODE_WDMA2: timing = 0xa008d943; break; 569 case ATA_MODE_UDMA2: timing = 0x900bd943; break; 570 case ATA_MODE_UDMA3: timing = 0x900ad943; break; 571 case ATA_MODE_UDMA4: timing = 0x900fd943; break; 572 default: timing = 0x0120d9d9; 573 } 574 } 575 pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4); 576} 577 578#else /* NPCI > 0 */ 579 580int32_t 581ata_dmainit(struct ata_softc *scp, int32_t device, 582 int32_t piomode, int32_t wdmamode, int32_t udmamode) 583{ 584 return -1; 585} 586 587int32_t 588ata_dmasetup(struct ata_softc *scp, int32_t device, 589 int8_t *data, int32_t count, int32_t flags) 590{ 591 return -1; 592} 593 594void 595ata_dmastart(struct ata_softc *scp) 596{ 597} 598 599int32_t 600ata_dmadone(struct ata_softc *scp) 601{ 602 return -1; 603} 604 605int32_t 606ata_dmastatus(struct ata_softc *scp) 607{ 608 return -1; 609} 610 611#endif /* NPCI > 0 */ 612